PA power protection function circuit and apparatus

CN116015225BActive Publication Date: 2026-09-29ZHEJIANG STARSHINE SEMICON CO LTD
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Patent Information

Application Number
CN202310116606.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-01-16
Publication Date
2026-09-29
Estimated Expiration
2043-01-16

AI Technical Summary

Technical Problem

[0002]功率放大器PA在工作时集电极会产生较大的电压和电流摆幅,在一些情况下会发生晶体管过压,这会导致集电极电流瞬间增大,从而发生PA内部功率管烧毁

Benefits of technology

[0020]当PA功率管由于天线端电压驻波比失配或低温等出现异常大负载电流时,通过过流保护模块直接牵制PA的输出电流和功率,更加简单、直接、高效地保护了电路及PA。

✦ Generated by Eureka AI based on patent content.

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Abstract

The application provides a PA power protection function circuit and device, which comprises an overcurrent protection module and an operational amplifier module, the operational amplifier module is used for external connection of a PA and power supply to a PA collector electrode; the overcurrent protection module is electrically connected with the operational amplifier module, and the overcurrent protection module monitors the load current of the PA; when the load current of the PA exceeds a threshold value, the operational amplifier module outputs an overload signal to the overcurrent protection module, and the overcurrent protection module limits the output current of the operational amplifier module to the PA. When the PA power tube has an abnormally large load current due to antenna end voltage standing wave ratio mismatch or low temperature and the like, the output current and power of the PA are directly restrained by the overcurrent protection module, so that the circuit and the PA are more simply, directly and efficiently protected.
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Description

Technical Field

[0001] This invention relates to the technical field of electronic circuits, and more specifically, to a power protection circuit and device for a power amplifier (PA). Background Technology

[0002] When a power amplifier (PA) is operating, its collector experiences significant voltage and current swings. Under certain circumstances, transistor overvoltage can occur, leading to a sudden increase in collector current and potentially causing the internal power transistor to burn out. Current technology typically protects the PA by indirectly controlling the collector current through the base reference current. However, this method has significant limitations. The static current gain of the power transistor fluctuates with temperature and current, introducing errors into the indirect control method and ultimately failing to effectively protect the PA.

[0003] Therefore, a power amplifier protection circuit is needed to solve the above problems. Summary of the Invention

[0004] In view of the deficiencies in the prior art, the purpose of this invention is to provide a power protection circuit and device for a power amplifier (PA).

[0005] According to the present invention, a power protection circuit for a power amplifier (PA) includes an overcurrent protection module and an operational amplifier module. The operational amplifier module is used to connect an external power amplifier (PA) and supply power to the collector of the PA. The overcurrent protection module is electrically connected to the operational amplifier module and monitors the load current of the PA. When the load current of the PA exceeds a threshold, the operational amplifier module outputs an overload signal to the overcurrent protection module, and the overcurrent protection module limits the output current of the operational amplifier module to the PA.

[0006] Preferably, the overcurrent protection module includes a first branch, a second branch, a third branch, a fourth branch, and a fifth branch;

[0007] The first branch is electrically connected to the second branch and outputs a bias voltage to the second branch. The second branch is electrically connected to the third branch and outputs a bias voltage to the third branch. The third branch is electrically connected to the fourth branch and the fifth branch respectively. The fourth branch is electrically connected to the operational amplifier module to monitor the load current. The fifth branch is electrically connected to the operational amplifier module to limit the output current of the operational amplifier module to the PA.

[0008] Preferably, the first branch includes a current source I3 and a MOS transistor M1; one end of the current source I3 is connected to VDD, and the other end is connected to the drain of the MOS transistor M1; the source and substrate of the MOS transistor M1 are grounded, and the gate and drain of the MOS transistor M1 are electrically connected to provide a bias voltage ibn.

[0009] Preferably, the second branch includes a MOS transistor M3 and a MOS transistor M4 connected in series; the source and substrate of the MOS transistor M4 are connected to VDD, and the gate and drain of the MOS transistor M4 are electrically connected to provide a bias voltage ibp; the drain of the MOS transistor M4 is electrically connected to the drain of the MOS transistor M3, the source and substrate of the MOS transistor M3 are grounded, and the gate of the MOS transistor M3 is electrically connected to the gate of the MOS transistor M1 in the first branch to form a current mirror.

[0010] Preferably, the third branch includes MOS transistors M5 and M6 connected in series; the source and substrate of MOS transistor M6 are connected to Vdd, the gate of MOS transistor M6 is electrically connected to the gate of MOS transistor M4 to form a current mirror, the drain of MOS transistor M6 is electrically connected to the drain of MOS transistor M5 and the fifth branch; the source and substrate of MOS transistor M5 are grounded, and the gate of MOS transistor M5 is electrically connected to the fourth branch.

[0011] Preferably, the fourth branch includes a series-connected MOS transistor M7 and a MOS transistor M8; the source and substrate of the MOS transistor M8 are connected to Vdd, the gate of the MOS transistor M8 is electrically connected to the operational amplifier module for monitoring the load current of PA, the drain of the MOS transistor M8 is electrically connected to the drain of the MOS transistor M7, the gate of the MOS transistor M7 is electrically connected to the drain of the MOS transistor M7 and is electrically connected to the gate of the MOS transistor M5 to form a current mirror, and the source and substrate of the MOS transistor M7 are grounded.

[0012] Preferably, the fifth branch includes a MOS transistor M11, the source and substrate of which are electrically connected to Vdd, the gate of which is electrically connected to the drain of MOS transistor M6 and the drain of MOS transistor M5, and the drain of which is electrically connected to the operational amplifier module to limit the output current of the operational amplifier module to PA.

[0013] Preferably, it also includes MOSFET M9, MOSFET M10 and MOSFET M12;

[0014] The source of MOSFET M10 is electrically connected to the drain of MOSFET M8, and the drain of MOSFET M10 is electrically connected to the drain of MOSFET M7. The substrate of MOSFET M10 is connected to Vdd, and the gate of MOSFET M10 is electrically connected to the gate of MOSFET M12. The gate of MOSFET M12 is electrically connected to the drain of MOSFET M12, and the substrate of MOSFET M12 is connected to Vdd. The source of MOSFET M12 is connected to the power supply voltage PA in the amplifier module. The drain of MOSFET M9 is electrically connected to the drain of MOSFET M12, the substrate of MOSFET M9 is grounded, the gate of MOSFET M9 is connected to the bias voltage ibn, and the source of MOSFET M9 is grounded.

[0015] Preferably, the operational amplifier module includes an operational amplifier, current source I1, current source I2, MOSFET M0, MOSFET M2, resistor R0, and resistor R1;

[0016] The positive power supply terminal of the operational amplifier, one end of the current mirror I1, and the source of the MOS transistor M0 are electrically connected to Vdd. The negative power supply terminal of the operational amplifier is grounded. The positive input terminal of the operational amplifier is electrically connected to the reference voltage source Vramp. The output terminal of the operational amplifier is electrically connected to the gate of the MOS transistor M2. The source of the MOS transistor M2 is electrically connected to the other end of the current source I1 and the gate of the MOS transistor M0. The drain of the MOS transistor M2 is grounded. The drain of the MOS transistor M0 is connected to one end of the current source I2 and one end of the resistor R0. The other end of the current source I2 is used to connect to PA. The other end of the resistor R0 is electrically connected to one end of the resistor R1. The other end of the resistor R1 is grounded. The negative input terminal of the operational amplifier is electrically connected to one end of the resistor R1. The substrates of the MOS transistor M2 and the substrates of the MOS transistor M0 are electrically connected to Vdd.

[0017] The gate of MOS transistor M2 is electrically connected to the drain of MOS transistor M11, and the gate of MOS transistor M0 is electrically connected to the gate of MOS transistor M8 to form a current mirror.

[0018] A PA power protection function device provided by the present invention includes a PA power protection function circuit.

[0019] Compared with the prior art, the present invention has the following beneficial effects:

[0020] When the PA power transistor experiences abnormally large load current due to antenna voltage standing wave ratio mismatch or low temperature, the overcurrent protection module directly controls the PA's output current and power, providing simpler, more direct, and more efficient protection for the circuit and PA. Attached Figure Description

[0021] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0022] Figure 1 This is a circuit structure diagram of the overcurrent protection module in the functional circuit of this invention;

[0023] Figure 2 This is a circuit diagram of the operational amplifier module in the functional circuit of this invention;

[0024] Figure 3 This is a diagram showing the voltage variation at node V1 in the functional circuit of this invention.

[0025] Figure 4 This is a diagram showing the voltage variation at node V3 in the functional circuit of this invention.

[0026] Figure 5 This is a graph showing the variation of the load voltage Vload of the power amplifier PA in the functional circuit of this invention;

[0027] Figure 6 This is a graph showing the variation of the load current Iload of the power amplifier PA in the functional circuit of this invention. Detailed Implementation

[0028] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the protection scope of the present invention.

[0029] This invention discloses a power protection circuit for a power amplifier (PA), comprising an overcurrent protection module and an operational amplifier module. The operational amplifier module is used to connect an external power amplifier (PA) and supply power to the PA's collector. The overcurrent protection module is electrically connected to the operational amplifier module and monitors the PA's load current. When the operational amplifier module outputs an overload signal to the overcurrent protection module, and the PA's load current exceeds a threshold, the overcurrent protection module limits the operational amplifier module's output current to the PA. When the PA's load current is within a normal range, the overcurrent protection module does not activate, and the PA operates normally.

[0030] Reference Figure 1 As shown, the overcurrent protection module includes a first branch, a second branch, a third branch, a fourth branch, and a fifth branch connected in parallel. In the diagram, M0, M1, M2, M3, M4, M5, M6, M7, M8, M9, M10, M11, and M12 are MOS transistors. I1 and I3 are Imirror (i.e., external reference current), I2 is the load current provided by the operational amplifier module to the PA collector, Vload is the load voltage, ibn and ibp are bias voltages, Vramp is the reference voltage, Vdd is the external supply voltage, R0 and R1 are resistors, and gnd is ground.

[0031] The first branch includes a current source I3 and a MOSFET M1. One end of the current source I3 is connected to VDD, and the other end is connected to the drain of the MOSFET M1. The source and substrate of the MOSFET M1 are grounded, and the gate and drain of the MOSFET M1 are electrically connected to provide a bias voltage ibn.

[0032] The second branch includes MOS transistors M3 and M4 connected in series. The source and substrate of MOS transistor M4 are connected to VDD. The gate and drain of MOS transistor M4 are electrically connected to provide a bias voltage ibp. The drain of MOS transistor M4 is electrically connected to the drain of MOS transistor M3. The source and substrate of MOS transistor M3 are grounded. The gate of MOS transistor M3 is electrically connected to the gate of MOS transistor M1 in the first branch to form a current mirror.

[0033] The third branch includes MOS transistors M5 and M6 connected in series. The source and substrate of MOS transistor M6 are connected to Vdd. The gate of MOS transistor M6 is electrically connected to the gate of MOS transistor M4 to form a current mirror. The drain of MOS transistor M6 is electrically connected to the drain of MOS transistor M5 and the fifth branch. The source and substrate of MOS transistor M5 are grounded. The gate of MOS transistor M5 is electrically connected to the fourth branch.

[0034] The fourth branch includes MOSFETs M7 and M8 connected in series. The source and substrate of MOSFET M8 are connected to Vdd. The gate of MOSFET M8 is electrically connected to the operational amplifier module to monitor the load current of PA. The drain of MOSFET M8 is electrically connected to the drain of MOSFET M7. The gate of MOSFET M7 is electrically connected to the drain of MOSFET M7 and is also electrically connected to the gate of MOSFET M5 to form a current mirror. The source and substrate of MOSFET M7 are grounded.

[0035] The fifth branch includes a MOS transistor M11, whose source and substrate are electrically connected to Vdd. The gate of the MOS transistor M11 is electrically connected to the drain of the MOS transistor M6 and the drain of the MOS transistor M5. The drain of the MOS transistor M11 is electrically connected to the operational amplifier module, limiting the output current of the operational amplifier module to PA.

[0036] In one embodiment, the overcurrent protection module further includes MOSFETs M9, M10, and M12; this part of the circuit is mainly used to suppress channel length modulation effects to ensure the accuracy of the mirror current between the overcurrent protection module and the operational amplifier module. Specifically, it includes:

[0037] The source of MOSFET M10 is electrically connected to the drain of MOSFET M8, and the drain of MOSFET M10 is electrically connected to the drain of MOSFET M7. The substrate of MOSFET M10 is connected to Vdd. The gate of MOSFET M10 is electrically connected to the gate of MOSFET M12. The gate of MOSFET M12 is electrically connected to the drain of MOSFET M12. The substrate of MOSFET M12 is connected to Vdd. The source of MOSFET M12 is connected to the load voltage Vload of PA in the amplifier module. The drain of MOSFET M9 is electrically connected to the drain of MOSFET M12. The substrate of MOSFET M9 is grounded. The gate of MOSFET M9 is connected to the bias voltage ibn. The source of MOSFET M9 is grounded.

[0038] Reference Figure 2 As shown, the operational amplifier module includes an operational amplifier, current source I1, current source I2, MOSFET M0, MOSFET M2, resistor R0, and resistor R1.

[0039] The positive power supply terminal of the operational amplifier, one end of the current mirror I1, and the source of the MOS transistor M0 are electrically connected to Vdd. The negative power supply terminal of the operational amplifier is grounded. The positive input terminal of the operational amplifier is electrically connected to the reference voltage source Vramp. The output terminal of the operational amplifier is electrically connected to the gate of the MOS transistor M2. The source of the MOS transistor M2 is electrically connected to the other end of the current source I1 and the gate of the MOS transistor M0. The drain of the MOS transistor M2 is grounded. The drain of the MOS transistor M0 is connected to one end of the current source I2 and one end of the resistor R0. The other end of the current source I2 is used to connect to PA. The other end of the resistor R0 is electrically connected to one end of the resistor R1. The other end of the resistor R1 is grounded. The negative input terminal of the operational amplifier is electrically connected to one end of the resistor R1. The substrates of the MOS transistor M2 and the substrates of the MOS transistor M0 are electrically connected to Vdd.

[0040] The gate of MOSFET M2 is electrically connected to the drain of MOSFET M11, such as... Figure 1 V1 and Figure 2 V1 is electrically connected, and the gate of MOS transistor M0 is electrically connected to the gate of MOS transistor M8 to form a current mirror, such as... Figure 1 V2 and Figure 2 The V2 electrical connection is in the middle.

[0041] Working principle:

[0042] The functional circuit of this invention has two operating states: normal PA operating state and abnormal PA operating state. The abnormal PA operating state is mainly caused by factors such as antenna terminal voltage standing wave ratio mismatch, low temperature, and abnormally large current. Next, the working process of the functional circuit under the two PA operating states will be further explained.

[0043] In the normal operating state of PA, Iload does not exceed the limit. Since the gate of MOSFET M8 in the overcurrent protection module is electrically connected to the gate of MOSFET M0 in the operational amplifier module through node V2, the current through MOSFET M0 can be proportionally mirrored from node V2 to the fourth branch where MOSFET M8 is located in the overcurrent protection module. Further, in the overcurrent protection module, the current in the fourth branch is mirrored to the third branch through the current formed by MOSFETs M5 and M7, causing MOSFET M5 to be in the saturation operating region, with a small current I4 flowing through the drain of MOSFET M6. Simultaneously, the reference current I3 is mirrored through MOSFET M3 to the second branch, and then through MOSFET M4 to MOSFET M6, causing MOSFET M6 to have a saturation current I5. Because the aforementioned current flowing through the drain of MOSFET M6 is a small current I4 and less than I5, MOSFET M6 is in the linear operating region. Consequently, the voltage at node V3 at the gate of MOSFET M11 is close to the voltage Vdd at the source of MOSFET M11, causing MOSFET M11 to be in the cutoff region. Ultimately, the MOSFET M11 is not conducting, so the overcurrent protection module does not affect the operational amplifier module. At this time, the Vramp in the operational amplifier module adjusts Vload to control the PA power output, and the PA continues to work normally.

[0044] When the PA is not operating normally, Iload exceeds the set value and has a large load current. The large current through MOSFET M0 is mirrored from node V2 to the fourth branch where MOSFET M8 is located in the overcurrent protection module. The large current in the second branch is mirrored to the third branch through the current mirror formed by MOSFETs M5 and M7. The large current keeps MOSFET M5 in the linear operating region. At the same time, the reference current I3 is mirrored through MOSFET M3 to the second branch, and then through MOSFET M4 to the gate of MOSFET M6, giving MOSFET M6 a saturation current I5. Because the drain current of MOSFET M6 is very large and exceeds I5, the voltage at node V3 is momentarily pulled down. After a brief fluctuation, it reaches a stable state. At this time, MOSFETs M5 and M6 are both in the saturation operating region, thus fixing the voltage at node V1. Since the overcurrent protection module node V1 is electrically connected to the operational amplifier module node V1, the gate voltage of MOSFET M2 is fixed. In addition, the reference current I1 remains unchanged, thus fixing the voltage at node V2. Ultimately, a fixed voltage difference is formed between the gate and drain of MOSFET M2, fixing Iload at a limited value while pulling Vload low to protect PA from damage and improve ruggedness performance.

[0045] Reference Figures 3-6As shown, under abnormally high current conditions such as antenna voltage VSWR mismatch or low temperature, the current limiting protection module activates to limit the current, protecting the PA power transistor from damage and improving ruggedness performance; under normal conditions, it does not affect PA operation. As shown in the diagram, under abnormal operating conditions, the voltages at nodes V1 and V3 are fixed after approximately 44µs, Vload is pulled low after approximately 43µs, and Iload is fixed at its limit value after approximately 43µs, demonstrating the protection effect of the functional circuit on the PA and its improved ruggedness performance.

[0046] The present invention also discloses a PA power protection function device, which includes the above-described PA power protection function circuit.

[0047] Specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the essence of the present invention. Unless otherwise specified, the embodiments and features described in this application can be arbitrarily combined with each other.

Claims

1. A power protection circuit for a power amplifier (PA), characterized in that, include: An overcurrent protection module and an operational amplifier module are included. The operational amplifier module is used to connect an external power amplifier (PA) and supply power to the collector of the PA. The overcurrent protection module is electrically connected to the operational amplifier module and monitors the load current of the PA. When the load current of the PA exceeds a threshold, the operational amplifier module outputs an overload signal to the overcurrent protection module, and the overcurrent protection module limits the output current of the operational amplifier module to the PA. The operational amplifier module includes an operational amplifier, current source I1, current source I2, MOSFET M0, MOSFET M2, resistor R0, and resistor R1. The positive power supply terminal of the operational amplifier, one end of the current source I1, and the source of the MOS transistor M0 are electrically connected to Vdd. The negative power supply terminal of the operational amplifier is grounded. The positive input terminal of the operational amplifier is electrically connected to the reference voltage source Vramp. The output terminal of the operational amplifier is electrically connected to the gate of the MOS transistor M2. The source of the MOS transistor M2 is electrically connected to the other end of the current source I1 and the gate of the MOS transistor M0. The drain of the MOS transistor M2 is grounded. The drain of the MOS transistor M0 is connected to one end of the current source I2 and one end of the resistor R0. The other end of the current source I2 is used to connect to PA. The other end of the resistor R0 is electrically connected to one end of the resistor R1. The other end of the resistor R1 is grounded. The negative input terminal of the operational amplifier is electrically connected to one end of the resistor R1. The substrates of the MOS transistor M2 and the MOS transistor M0 are electrically connected to Vdd. The gate of MOS transistor M2 is electrically connected to the drain of MOS transistor M11, and the gate of MOS transistor M0 is electrically connected to the gate of MOS transistor M8 to form a current mirror. When the PA is working normally, the MOSFET M11 is in the cutoff region. The overcurrent protection module does not affect the operational amplifier module. The load voltage is adjusted by the reference voltage source in the operational amplifier module to control the PA power output, and the PA continues to work normally. When the PA is not operating normally, a fixed voltage difference is formed between the gate and drain of the MOSFET M2, which fixes the load current at a limited value and pulls down the load voltage to protect the PA from damage. The overcurrent protection module includes a first branch, a second branch, a third branch, a fourth branch, and a fifth branch; The first branch is electrically connected to the second branch and outputs a bias voltage to the second branch. The second branch is electrically connected to the third branch and outputs a bias voltage to the third branch. The third branch is electrically connected to the fourth branch and the fifth branch respectively. The fourth branch is electrically connected to the operational amplifier module to monitor the load current. The fifth branch is electrically connected to the operational amplifier module to limit the output current of the operational amplifier module to the PA. The first branch includes a current source I3 and a MOSFET M1; one end of the current source I3 is connected to Vdd, and the other end is connected to the drain of the MOSFET M1; the source and substrate of the MOSFET M1 are grounded, and the gate and drain of the MOSFET M1 are electrically connected to provide a bias voltage ibn. The second branch includes MOS transistors M3 and M4 connected in series; the source and substrate of MOS transistor M4 are connected to Vdd, and the gate and drain of MOS transistor M4 are electrically connected to provide a bias voltage ibp; the drain of MOS transistor M4 is electrically connected to the drain of MOS transistor M3, the source and substrate of MOS transistor M3 are grounded, and the gate of MOS transistor M3 is electrically connected to the gate of MOS transistor M1 in the first branch to form a current mirror; The third branch includes MOS transistors M5 and M6 connected in series; the source and substrate of MOS transistor M6 are connected to Vdd, the gate of MOS transistor M6 is electrically connected to the gate of MOS transistor M4 to form a current mirror, the drain of MOS transistor M6 is electrically connected to the drain of MOS transistor M5 and the fifth branch; the source and substrate of MOS transistor M5 are grounded, and the gate of MOS transistor M5 is electrically connected to the fourth branch. The fourth branch includes MOSFETs M7 and M8 connected in series; the source and substrate of MOSFET M8 are connected to Vdd, the gate of MOSFET M8 is electrically connected to the operational amplifier module for monitoring the load current of PA, the drain of MOSFET M8 is electrically connected to the drain of MOSFET M7, the gate of MOSFET M7 is electrically connected to the drain of MOSFET M7 and is electrically connected to the gate of MOSFET M5 to form a current mirror, and the source and substrate of MOSFET M7 are grounded; The fifth branch includes a MOS transistor M11, the source of which is electrically connected to the substrate Vdd, the gate of which is electrically connected to the drain of MOS transistor M6 and the drain of MOS transistor M5, and the drain of which is electrically connected to the operational amplifier module to limit the output current of the operational amplifier module to PA.

2. The PA power protection circuit according to claim 1, characterized in that, It also includes MOSFETs M9, M10, and M12; The source of MOSFET M10 is electrically connected to the drain of MOSFET M8, and the drain of MOSFET M10 is electrically connected to the drain of MOSFET M7. The substrate of MOSFET M10 is connected to Vdd, and the gate of MOSFET M10 is electrically connected to the gate of MOSFET M12. The gate of MOSFET M12 is electrically connected to the drain of MOSFET M12, and the substrate of MOSFET M12 is connected to Vdd. The source of MOSFET M12 is connected to the power supply voltage PA in the amplifier module. The drain of MOSFET M9 is electrically connected to the drain of MOSFET M12, the substrate of MOSFET M9 is grounded, the gate of MOSFET M9 is connected to the bias voltage ibn, and the source of MOSFET M9 is grounded.

3. A power protection device for a power amplifier (PA), characterized in that, Includes the PA power protection function circuit as described in claim 1.

Citation Information

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