Radio frequency integrated circuit

Abstract

A radio frequency integrated circuit includes at least one transistor, a matching circuit coupled to the transistor, and at least one bump used for the matching circuit to form a passive element. The bump can be used as a passive element for harmonic impedance matching of an amplifier, and the bump can be used as a passive element for harmonic impedance matching of the amplifier.

Description

Technical Field

[0001] This invention relates to a radio frequency integrated circuit, and more particularly to an electronic component in which a bump is part of an impedance matching network, such that the bump constitutes part of the impedance matching network. Background Technology

[0002] Since the thickness of the substrate is ground to 50um to 100um, it will have a variation of + / -10% within six standard deviations, which makes quality management difficult to control. Therefore, the problem of parasitic inductance variation caused by substrate thickness variation is also the problem that this invention aims to solve. Summary of the Invention

[0003] Therefore, the main objective of this invention is to provide a radio frequency integrated circuit that uses bumps as passive elements for amplifier harmonic impedance matching, thereby improving the effectiveness of reducing signal reflection in high-frequency circuit applications.

[0004] Another object of the present invention is to provide a radio frequency integrated circuit that uses bumps to design a novel circuit, thereby increasing the bandwidth and efficiency of the amplifier and reducing the chip area of ​​the amplifier to reduce costs.

[0005] To achieve the above objectives, the technical means employed in this invention include: at least one transistor; a matching circuit coupled to the transistor; and at least one bump used by the matching circuit to form a passive element and for radio frequency matching.

[0006] Based on the aforementioned characteristics, the radio frequency matching is harmonic matching, fundamental frequency matching, or a combination thereof.

[0007] Based on the aforementioned characteristics, the radio frequency integrated circuit is a single-crystal microwave integrated circuit or a hybrid integrated circuit.

[0008] Based on the aforementioned features, the matching circuit includes a harmonic matching circuit, which has an input harmonic matching circuit, an output harmonic matching circuit, or a combination thereof.

[0009] Based on the aforementioned characteristics, the harmonic matching circuit matches the impedance of the transistor at the second harmonic frequency, the third harmonic frequency, or a combination thereof.

[0010] Based on the aforementioned features, the harmonic matching circuit includes a parallel LC harmonic network consisting of an inductor and a capacitor connected in series, and the inductor includes the inductance of the bump.

[0011] Based on the aforementioned features, the bump is composed of a eutectic composite material, a lead-free material, a high-lead material, a soldering material, a copper-containing material, or a combination thereof.

[0012] Based on the aforementioned features, the protrusion is a support.

[0013] Based on the aforementioned features, it also includes a conductor disposed at a predetermined location on the radio frequency integrated circuit, facilitating its use with the bump.

[0014] Based on the aforementioned characteristics, the conductor is either wire bonded or wedge bonded.

[0015] Based on the aforementioned features, it also includes a substrate connected to the bump, and the substrate is a printed circuit board, a laminate, an interlayer, or a combination thereof.

[0016] Based on the aforementioned features, it also includes a substrate, which is connected to the harmonic matching circuit via the bump.

[0017] Based on the aforementioned features, the capacitor of the parallel LC network is partially or entirely formed on the substrate.

[0018] Based on the aforementioned features, the substrate is a printed circuit board, a laminate, an interlayer, or a combination thereof.

[0019] Based on the aforementioned features, it also includes a rewiring layer, and the matching circuit is connected through the rewiring layer via the bump.

[0020] Based on the aforementioned features, it also includes an antenna and a bottom substrate, the antenna being disposed on the bottom substrate, and the radio frequency integrated circuit being located on the bottom substrate, such that the radio frequency integrated circuit can be connected to the antenna.

[0021] Based on the aforementioned features, the bottom substrate is silicon, silicon-on-insulator, ceramic, glass, laminate, printed circuit board, interlayer, or a combination thereof.

[0022] Based on the aforementioned features, the radio frequency integrated circuit and the antenna together form an antenna package product.

[0023] Based on the aforementioned features, the operating frequency range of this radio frequency integrated circuit is 3 GHz to 300 GHz.

[0024] Based on the aforementioned features, it also includes a transmission line connected to the bump.

[0025] Based on the aforementioned characteristics, the transmission line is a coplanar waveguide, a grounded coplanar waveguide, a microstrip line, a stripline, or a combination thereof.

[0026] Based on the aforementioned features, it also includes a transmission line formed on the bottom substrate.

[0027] Based on the aforementioned features, it also includes a substrate and a transmission line, the transmission line terminating as an open-circuit stub or the bump, the bump being an ungrounded bump.

[0028] Based on the aforementioned features, it also includes a top substrate, a bottom substrate, and a substrate having a substrate through-hole and a back metal layer on the back side, such that the bottom substrate is connected to the back metal layer through the substrate through-hole and the top substrate is connected to the bump.

[0029] Based on the aforementioned features, the radio frequency integrated circuit is a stacked chip connected to the bottom substrate and the top substrate.

[0030] Based on the aforementioned features, it also includes an ungrounded via that is connected to the via in the substrate.

[0031] Based on the aforementioned features, the bump can be connected in series with a parallel transmission line.

[0032] Based on the aforementioned features, it also includes a substrate having an ungrounded substrate through-hole.

[0033] Based on the aforementioned features, it also includes an antenna and a bottom substrate, wherein the bottom substrate on which the antenna is disposed is silicon, silicon-on-insulator, ceramic, glass, laminate, printed circuit board, interlayer or a combination thereof.

[0034] Based on the aforementioned features, the bump, the parallel transmission line, the ungrounded substrate via, or a combination thereof, can be connected in series with the capacitor to form a parallel LC harmonic network. The parallel LC harmonic network, together with the parasitic capacitance of the transistor, forms the matching circuit, which is a harmonic matching circuit.

[0035] Based on the aforementioned features, the parallel LC harmonic network branches are connected to the input terminal of the transistor for input harmonic termination, the output terminal of the transistor for output harmonic termination, or a combination thereof, for use in a linear power amplifier.

[0036] Based on the aforementioned features, the capacitance of the parallel LC harmonic network is partially or entirely formed by using a metal-insulator-metal capacitor as the capacitor in an ungrounded via or an ungrounded substrate via.

[0037] Based on the aforementioned features, the metal-insulator-metal capacitor and the ungrounded via or the ungrounded substrate via share a common metal layer.

[0038] Based on the aforementioned features, the common metal layer can be formed on the back metal layer of the substrate to the ungrounded via or the ungrounded substrate via and the base plate of the metal-insulator-metal capacitor.

[0039] Based on the aforementioned features, the capacitor of the parallel LC harmonic network is partially or entirely formed by using an open-circuit stub transmission line as the capacitor, and the parallel transmission line, the bump, or the ungrounded substrate via acts as an inductor of the parallel LC harmonic network.

[0040] Based on the aforementioned features, the capacitor of the parallel LC harmonic network is formed in part or entirely by using a voltage-adjustable capacitor as the capacitor, and the dielectric material of the capacitor is formed in part or entirely by barium strontium titanate, tantalum pentoxide, hafnium oxide, aluminum oxide or a combination thereof.

[0041] Based on the aforementioned features, the capacitor formation portion or all of the parallel LC harmonic network is formed as a metal-insulator-metal capacitor or a lower bump by using a wedge bond, the wedge bond and the bump having a common metal layer.

[0042] Based on the aforementioned features, the common metal layer can form the lower bump metal of the bump and the top plate of the metal-insulator-metal capacitor.

[0043] Based on the aforementioned features, the metal-insulator-metal capacitor is formed through a parallel plate capacitor, an interdigital capacitor, a metal jumper, or a combination thereof.

[0044] Based on the aforementioned characteristics, this parallel LC harmonic network is either a switch-mode power amplifier or a linear amplifier.

[0045] Based on the aforementioned characteristics, the harmonic matching circuit is a Class F topology and also includes a parallel compensation network composed of a parallel inductor and a parallel capacitor. This parallel compensation network is a low-pass π-type parallel quarter-wave transmission line.

[0046] Based on the aforementioned characteristics, the values ​​of the inductor and capacitor in this harmonic matching circuit, which is a Class F topology, are calculated using formulas 1 to 4:

[0047]

[0048]

[0049] L = L BUMMP +L aDD --------(Formula 3)

[0050]

[0051] Among them, L BUMP L is the inductance of the bump; L is the inductance of the parallel LC harmonic network; C is the capacitance of the parallel LC harmonic network; L ADD This is the additional inductance of the inductor in the parallel LC harmonic network; w o L is the radio frequency fundamental angular frequency; B For the parallel inductor of the parallel compensation network; C O Z0 is the parallel capacitance of the parallel compensation network; Z0 is the characteristic impedance of the low-pass π-type parallel quarter-wave transmission line of the parallel compensation network; C DS This is the parasitic capacitance of the transistor.

[0052] Based on the aforementioned features, the bump can be a single bump or multiple bumps connected in parallel.

[0053] Based on the aforementioned characteristics, the bump is a solder bump, micro bump, hybrid bump, or combination thereof formed of Ti / NiV / Ag.

[0054] Based on the aforementioned characteristics, the bump is a flip-chip bump formed of Ti / TiW / Cu / AuSn.

[0055] With the help of the above-mentioned technology, the thickness of the bump can be adjusted or the design of the solder bump can be adjusted through fine-tuning process, resulting in more precise impedance matching. Therefore, the bump can be used as a passive component for harmonic impedance matching of amplifiers or as a passive component for harmonic impedance termination of amplifiers, which can enhance the power, bandwidth and efficiency of amplifiers and integrated circuits. Attached Figure Description

[0056] Figure 1 This is a schematic diagram of the harmonic matching circuit of the present invention.

[0057] Figure 2 This is a schematic diagram of the impedance matching transistor in the harmonic matching circuit of the present invention.

[0058] Figure 3 This is a schematic diagram of the parallel LC harmonic network of the present invention, which consists of an inductor and a capacitor connected in series.

[0059] Figure 4A This is a schematic diagram of the protrusion of the present invention.

[0060] Figure 4B This is another schematic diagram of the protrusion of the present invention.

[0061] Figure 5 This is a schematic diagram of the first embodiment of the radio frequency integrated circuit of the present invention.

[0062] Figure 6A This is a schematic diagram of a second embodiment of the radio frequency integrated circuit of the present invention.

[0063] Figure 6B This is a top view of different bumps in a second embodiment of the radio frequency integrated circuit of the present invention.

[0064] Figure 7 This is a schematic diagram of a third embodiment of the radio frequency integrated circuit of the present invention.

[0065] Figure 8 This is a schematic diagram of the fourth embodiment of the radio frequency integrated circuit of the present invention.

[0066] Figure 9 This is a schematic diagram of the fifth embodiment of the radio frequency integrated circuit of the present invention.

[0067] Figure 10 This is a schematic diagram of the sixth embodiment of the radio frequency integrated circuit of the present invention.

[0068] Figure 11A This is a schematic diagram of the seventh embodiment of the radio frequency integrated circuit of the present invention.

[0069] Figure 11B This is a top view of the bump-bonded transmission line of the seventh embodiment of the radio frequency integrated circuit of the present invention.

[0070] Figure 11C This is a top view of another bump-connected transmission line in the seventh embodiment of the radio frequency integrated circuit of the present invention.

[0071] Figure 12 This is a schematic diagram of the eighth embodiment of the radio frequency integrated circuit of the present invention.

[0072] Figure 13 This is a schematic diagram of the ninth embodiment of the radio frequency integrated circuit of the present invention.

[0073] Figure 14 This is a schematic diagram of the tenth embodiment of the radio frequency integrated circuit of the present invention.

[0074] Figure 15 This is a schematic diagram of the eleventh embodiment of the radio frequency integrated circuit of the present invention.

[0075] Figure 16 This is a schematic diagram of the twelfth embodiment of the radio frequency integrated circuit of the present invention.

[0076] Figure 17A This is a schematic diagram of the thirteenth embodiment of the radio frequency integrated circuit of the present invention.

[0077] Figure 17B This is a top view of the bump-bonded transmission line according to the thirteenth embodiment of the radio frequency integrated circuit of the present invention.

[0078] Figure 18 This is a schematic diagram of the fourteenth embodiment of the radio frequency integrated circuit of the present invention.

[0079] Figure 19 This is a schematic diagram of the radio frequency matching circuit of the present invention.

[0080] Figure 20A This is a simulation curve of the inductance measurement using the bump in this invention.

[0081] Figure 20B This is a simulation curve of the quality factor of the bump measurement in this invention.

[0082] Figure 20C This is a simulation curve of the resistance measurement using the bump in this invention.

[0083] Figure 20D This is another simulation curve for measuring inductance using the bump in this invention.

[0084] Figure 20E This is another simulation curve of the bump measurement quality factor of the present invention.

[0085] Figure 20F This is another simulation curve of the resistance measurement using the bump in this invention.

[0086] Explanation of reference numerals: 10 – RF integrated circuit; 11 – Transistor; 111 – Input terminal; 112 – Output terminal; 12 – Matching circuit; 121 – Harmonic matching circuit; 1211 – Input harmonic matching circuit; 1212 – Output harmonic matching circuit; 1213 – Parallel compensation network; 13 – Bump; 14 – Substrate; 141 – Substrate via; 142 – Back metal layer; 143 – Ungrounded via; 144 – Ungrounded substrate via; 145 – Front metal layer; 15 – Dielectric layer; 20 – Conductor; 30 – Redundancy layer; 40 – Antenna; 50 – Bottom substrate; 51 – First metal layer; 60 – Antenna package product; 70 – Top substrate; 71 – Second metal layer; 80 – Input matching network; 90 – Output matching network; B – Base plate of metal-insulator-metal capacitor; C – Capacitor; C O ~ Parallel capacitor; C DS ~ Parasitic capacitance; H ~ Bump thickness; L ~ Inductance; L BUMP ~Inductance of bumps; L D ~ Parasitic capacitance; L B ~ Parallel inductor; L ADD ~Extra inductor; LC ~Parallel LC harmonic network; OS ~Open circuit short; P1 ~Contact pad; P2 ~Ungrounded contact pad; P3 ~Grounded contact pad; TL 30 ~ Parallel transmission line; TL4 ~ Quarter-wave transmission line; TL 50 ~ Transmission line; T ~ Top plate of metal-insulator-metal capacitor; W ~ Width of bump; w o ~RF fundamental frequency angular frequency; Z0 ~characteristic impedance. Detailed Implementation

[0087] First, please refer to Figures 1 to 20F As shown, a preferred embodiment of the radio frequency integrated circuit 10A-10N of the present invention includes: at least one transistor 11; a matching circuit 12 coupled to the transistor 11; and at least one bump 13, which is used to form a passive element in the matching circuit 12 and is used for radio frequency matching. In this embodiment, the radio frequency matching is harmonic matching, fundamental frequency matching, or a combination thereof. The radio frequency integrated circuit 10 is a single-crystal microwave integrated circuit or a hybrid integrated circuit. The operating frequency range of the radio frequency integrated circuit 10 is 3GHz to 300GHz, but is not limited thereto.

[0088] like Figures 1-3 As shown, the matching circuit 12 includes a harmonic matching circuit 121, which has an input harmonic matching circuit 1211, an output harmonic matching circuit 1212, or a combination thereof. In this embodiment, the harmonic matching circuit 121 matches the impedance of the transistor 11 at a second harmonic frequency, a third harmonic frequency, or a combination thereof. The harmonic matching circuit 121 includes a parallel LC harmonic network LC, which is composed of an inductor L and a capacitor C connected in series, and the inductor L includes the inductance L of the bump 13. BUMP The parallel LC harmonic network LC branch connects the input terminal 111 of the transistor 11 for input harmonic termination, the output terminal 112 of the transistor 11 for output harmonic termination, or a combination thereof, for use in a linear power amplifier, but is not limited thereto.

[0089] Continuing on the above, the bump 13 is composed of a eutectic composite material, lead-free material, high-lead material, soldering material, copper-containing material, or a combination thereof; the bump 13 is a solder bump, micro bump, hybrid bump, or a combination thereof formed of Ti / NiV / Ag; or the bump 13 is a flip-chip bump formed of Ti / TiW / Cu / AuSn. The bump 13 serves as a support structure; the bump 13 can be a single bump or multiple bumps connected in parallel, such as... Figure 4A As shown, the width W of the bump 13 is 70 μm and the thickness H is 30 μm, or as... Figure 4B As shown, the width W of the bump 13 is 70 μm and the thickness H is 60 μm, but it is not limited to these.

[0090] like Figure 5 , Figure 6A , Figure 6B , Figure 7 , Figure 8 , Figure 9 , Figure 10 As shown, these are the first to sixth embodiments of the radio frequency integrated circuits 10A, 10B, 10C, 10D, 10E, and 10F, respectively. The circuit may also include a conductor 20 disposed at a predetermined location on the radio frequency integrated circuit 10, facilitating its use with the bump 13. The circuit may also include a substrate 14 connected to the bump 13, facilitating connection of the bump 13 or connection of the substrate 14 to the harmonic matching circuit 121 via the bump 13. In this embodiment, the substrate 14 is a printed circuit board, a laminate, an interposer, or a combination thereof, and the conductor 20 is wire-bonded or wedge-bonded. The capacitance C of the parallel LC network LC is partially or entirely formed on the substrate 14, but is not limited thereto.

[0091] like Figure 5As shown, this is a first embodiment of the radio frequency integrated circuit 10A. The substrate 14 has a back metal layer 142 on its back side and a contact pad P1 on its front side. It may also include a bottom substrate 50, which has an ungrounded contact pad P2 and a grounded contact pad P3. A bump 13 connects the contact pad P1 and the ungrounded contact pad P2, making the bump 13 an ungrounded bump. In this embodiment, the bottom substrate 50 is silicon, silicon-on-insulator, ceramic, glass, laminate, printed circuit board, interposer, or a combination thereof. Figure 6A , Figure 6B As shown, this is a second embodiment of the radio frequency integrated circuit 10B. The bump 13 is connected between the contact pad P1 and the ground contact pad P3, making the bump 13 a ground bump, but it is not limited to this.

[0092] like Figure 7 As shown, this is a third embodiment of the radio frequency integrated circuit 10C, which also includes a redistribution layer 30, and the matching circuit 12 is connected through the redistribution layer 30 by the bump 13. The difference from the radio frequency integrated circuit 10B in the second embodiment is that the contact pad P1 is different from the redistribution layer 30, and the bump 13 is connected between the redistribution layer 30 and the ground contact pad P3, but it is not limited to this.

[0093] like Figure 8 As shown, this is a fourth embodiment of the radio frequency integrated circuit 10D, which may also include an antenna 40 disposed on the bottom substrate 50, and the radio frequency integrated circuit 10D is located on the bottom substrate 50, so that the radio frequency integrated circuit 10D can be connected to the antenna 40. The difference from the radio frequency integrated circuit 10C of the third embodiment is the addition of the antenna 40, but it is not limited to this.

[0094] like Figure 9 As shown, this is the fifth embodiment of the radio frequency integrated circuit 10E. The radio frequency integrated circuit 10E and the antenna 40 together form an antenna package product 60. The difference from the radio frequency integrated circuit 10D of the fourth embodiment is in the packaging, but it is not limited thereto.

[0095] like Figure 10 As shown, this is the sixth embodiment of the radio frequency integrated circuit 10F, which may also include a transmission line TL. 50 The transmission line TL 50 Connected to the bump 13, in this embodiment, the transmission line TL 50 It can be a coplanar waveguide, a grounded coplanar waveguide, a microstrip line, a stripline, or a combination thereof, and the difference from the RF integrated circuit 10B of the second embodiment is the addition of this transmission line TL. 50 However, it is not limited to this.

[0096] like Figures 11A-11CAs shown, this is the seventh embodiment of the 10G radio frequency integrated circuit, and the transmission line TL 50 Formed on the bottom substrate 50, and further... Figure 11B As shown, the transmission line TL 50 One end is an open-circuit stub OS, while the transmission line TL 50 The other end is connected to the protrusion 13, which is an ungrounded protrusion, and then... Figure 11C As shown, the transmission line TL 50 Each end of the device is connected to the bump 13, which is an ungrounded bump and is not connected to the transmission line TL. 50 Each of the bumps 13 is a ground bump, and the difference from the RF integrated circuit 10E in the sixth embodiment is that the transmission line TL 50 The locations where they form may vary, but are not limited to these.

[0097] like Figure 12 , Figure 13 , Figure 14 , Figure 15 As shown, these are the eighth to eleventh embodiments of the RF integrated circuits 10H to 10K, respectively. They may also include a top substrate 70, allowing the RF integrated circuits 10H to 10K to be stacked chips connected to the bottom substrate 50 and the top substrate 70. The bottom substrate 50 has a first metal layer 51, or the top substrate 70 has a second metal layer 71, to facilitate the bonding of the RF integrated circuits 10H to 10K. A front metal layer 145 is provided on the front side of the substrate 14, but this is not a limitation. Furthermore, as... Figure 12 , Figure 14 As shown, the substrate 14 has a substrate through-hole 141, through which the bottom substrate 50 is connected to the back metal layer 142, and the top substrate 70 is connected to the bump 13, and the bump 13 is surrounded by a dielectric layer 15, or as shown. Figure 13 As shown, it also includes an ungrounded via 143, which is connected to the via 141 on the substrate, or as... Figure 15 As shown, the bump 13 can be connected in series with a parallel transmission line TL. 30 The substrate 14 has an ungrounded substrate through-hole 144, but is not limited thereto.

[0098] like Figure 16 , 17A As shown in 17B, these are the twelfth to thirteenth embodiments of the radio frequency integrated circuits 10L and 10M, including the bump 13 and the parallel transmission line TL. 30 The ungrounded substrate via 144 or a combination thereof can be connected in series with the capacitor C to form a parallel LC harmonic network LC. The parallel LC harmonic network LC and the parasitic capacitance L of the transistor 11 DThe combination of this matching circuit 12 forms a harmonic matching circuit, thereby balancing the parallel LC harmonic network LC and the parasitic capacitance L of the transistor 11. D Combining different compensation networks, in this embodiment, the capacitor C of the parallel LC harmonic network LC is partially or entirely formed by using a metal-insulator-metal capacitor as the capacitor C in the ungrounded via 143 or the ungrounded substrate via 144. Figure 17B As shown, the capacitor C of the parallel LC harmonic network LC is partially or entirely formed by using an open-circuit stub transmission line OS as the capacitor C, and the parallel transmission line TL 30 The bump 13 surrounded by the dielectric layer 15 or the ungrounded substrate via 144 may serve as an inductor of the parallel LC harmonic network LC, but is not limited thereto.

[0099] like Figure 18 As shown, this is the fourteenth embodiment of the radio frequency integrated circuit 10N. The metal-insulator-metal capacitor and the ungrounded via 143 or the ungrounded substrate via 144 have a dielectric layer 15. In this embodiment, the dielectric layer 15 may be formed on the back metal layer 142 of the substrate 14 to the ungrounded via 143 or the ungrounded substrate via 144 and the base plate B of the metal-insulator-metal capacitor, but it is not limited to this.

[0100] Furthermore, the capacitor C of the parallel LC harmonic network LC is formed partly or entirely by using a voltage-adjustable capacitor as the capacitor, and the dielectric material of the capacitor is formed partly or entirely by barium strontium titanate, tantalum pentoxide, hafnium oxide, aluminum oxide or a combination thereof. Alternatively, the capacitor C of the parallel LC harmonic network LC is formed partly or entirely by using a wedge bond to form a metal-insulator-metal capacitor or a lower bump. The wedge bond and the bump 13 have a dielectric layer 15. The dielectric layer 15 can form the lower bump metal of the bump 13 and the top plate T of the metal-insulator-metal capacitor. The metal-insulator-metal capacitor is formed by a parallel plate capacitor, an interdigital capacitor, a metal jumper or a combination thereof, but is not limited to these.

[0101] Continuing from the above, the parallel LC harmonic network LC is a switch-mode power amplifier, such as a Class C, E, F, inverse F, or S amplifier, or the parallel LC harmonic network LC is a linear amplifier, such as a Class A, AB, B, or C amplifier. Figure 19 As shown, the harmonic matching circuit 121 is a class F topology and also includes a parallel inductor L. B (Quarter-wave transmission line) Parallel capacitor C OThe parallel compensation network 1213 is a low-pass π-type parallel quarter-wave transmission line, using the second and third harmonic frequencies of the fundamental frequency. The harmonic matching circuit 121 is a class-F topology, and the values ​​of the inductor L and capacitor C are calculated using formulas 1 to 4.

[0102]

[0103]

[0104] L = L BUMP +L ADD --------(Formula 3)

[0105]

[0106] Among them, L BUMP L is the inductance of the bump; L is the inductance of the parallel LC harmonic network; C is the capacitance of the parallel LC harmonic network; L ADD This is the additional inductance of the inductor in the parallel LC harmonic network; w o L is the radio frequency fundamental angular frequency; B For the parallel inductor of the parallel compensation network; C O Z0 is the parallel capacitance of the parallel compensation network; Z0 is the characteristic impedance of the low-pass π-type parallel quarter-wave transmission line of the parallel compensation network; C DS The parasitic capacitance of the transistor is used for the second and third harmonics. Furthermore, the harmonic matching circuit 121 may be coupled to an input matching network 80 and a basic output matching network 90, but is not limited thereto.

[0107] Based on this structure, such as Figures 20A-20F As shown, the bump L B It has the advantages of high quality factor and self-resonant frequency, making the bump L B An excellent choice for designing harmonic matching networks for amplifiers, including low-noise amplifiers, power amplifiers, hybrid integrated circuits, or single-crystal integrated circuits. Using this bump as a passive element for amplifier impedance matching not only solves the power loss problem but also provides the optimal low inductance required for harmonic matching networks (typically 40-50 pH).

[0108] The drawings and descriptions disclosed above are merely preferred embodiments of the present invention. Modifications or equivalent changes made by those skilled in the art within the spirit and scope of this invention should still be included within the scope of this invention.

Claims

1. A radio frequency integrated circuit, characterized in that, Include: At least one transistor; A matching circuit that couples the transistor; and At least one bump is used in the matching circuit to form a passive element and is used for radio frequency matching. A top substrate, a bottom substrate, and a substrate having a substrate through-hole and a back metal layer on the back side of the substrate, such that the bottom substrate is connected to the back metal layer through the substrate through-hole and the top substrate is connected to the bump.

2. The radio frequency integrated circuit as described in claim 1, characterized in that, The radio frequency matching is input harmonic matching, output harmonic matching, input fundamental frequency matching, output fundamental frequency matching, or a combination thereof.

3. The radio frequency integrated circuit as described in claim 1, characterized in that, The radio frequency integrated circuit is a single-crystal microwave integrated circuit, a hybrid integrated circuit, or a combination thereof.

4. The radio frequency integrated circuit as described in claim 2, characterized in that, The matching circuit includes a harmonic matching circuit that matches the impedance of the transistor at a second harmonic frequency or a higher harmonic frequency, or a combination thereof.

5. The radio frequency integrated circuit as described in claim 4, characterized in that, The harmonic matching circuit includes a parallel LC harmonic network consisting of an inductor and a capacitor connected in series, and the inductor includes the inductance of the bump.

6. The radio frequency integrated circuit as described in claim 1, characterized in that, The bump is composed of a eutectic composite material, lead-free material, high-lead material, soldering material, copper-containing material, or a combination thereof.

7. The radio frequency integrated circuit as described in claim 1, characterized in that, This bump is a support.

8. The radio frequency integrated circuit as described in claim 1, characterized in that, It also includes a conductor disposed at a predetermined location on the radio frequency integrated circuit to facilitate its use with the bump.

9. The radio frequency integrated circuit as described in claim 8, characterized in that, The conductor is either wire bonded or wedge bonded.

10. The radio frequency integrated circuit as described in claim 8, characterized in that, It also includes a substrate connected to the bump, and the substrate is a printed circuit board, a laminate, an interlayer, or a combination thereof.

11. The radio frequency integrated circuit as described in claim 5, characterized in that, It also includes a substrate, which is connected to the harmonic matching circuit via the bump.

12. The radio frequency integrated circuit as described in claim 11, characterized in that, The capacitor of the parallel LC network is partially or entirely formed on the substrate.

13. The radio frequency integrated circuit as described in claim 11, characterized in that, The substrate is a printed circuit board, a laminate, an interlayer, or a combination thereof.

14. The radio frequency integrated circuit as claimed in claim 1, characterized in that, It also includes a rewiring layer, and the matching circuit is connected through the rewiring layer by the bump.

15. The radio frequency integrated circuit as described in claim 14, characterized in that, It also includes an antenna and a bottom substrate, the antenna being disposed on the bottom substrate, and the radio frequency integrated circuit being located on the bottom substrate such that the radio frequency integrated circuit is connected to the antenna.

16. The radio frequency integrated circuit as described in claim 15, characterized in that, The bottom substrate is silicon, silicon-on-insulator, ceramic, glass, laminate, printed circuit board, interlayer, or a combination thereof.

17. The radio frequency integrated circuit as claimed in claim 16, characterized in that, The radio frequency integrated circuit and the antenna together form an antenna package product.

18. The radio frequency integrated circuit as claimed in claim 1, characterized in that, The operating frequency range of this radio frequency integrated circuit is 3 GHz to 300 GHz.

19. The radio frequency integrated circuit as claimed in claim 1, characterized in that, It also includes a transmission line that is connected to the bump.

20. The radio frequency integrated circuit as described in claim 19, characterized in that, The transmission line is a coplanar waveguide, a grounded coplanar waveguide, a microstrip line, a stripline, or a combination thereof.

21. The radio frequency integrated circuit as claimed in claim 1, characterized in that, It also includes a transmission line formed on the bottom substrate.

22. The radio frequency integrated circuit as claimed in claim 1, characterized in that, It also includes a substrate and a transmission line, the transmission line being terminated by an open stub or the bump, the bump being an ungrounded bump.

23. The radio frequency integrated circuit as claimed in claim 1, characterized in that, The radio frequency integrated circuit is a stacked chip connected to the bottom substrate and the top substrate.

24. The radio frequency integrated circuit as claimed in claim 1, characterized in that, It also includes an ungrounded via that is connected to the via in the substrate.

25. The radio frequency integrated circuit as claimed in claim 1, characterized in that, The bump is connected in series with a parallel transmission line.

26. The radio frequency integrated circuit as described in claim 25, characterized in that, It also includes a substrate having an ungrounded substrate through-hole.

27. The radio frequency integrated circuit as claimed in claim 26, characterized in that, It also includes an antenna and a bottom substrate, wherein the bottom substrate on which the antenna is disposed is silicon, silicon-on-insulator, ceramic, glass, laminate, printed circuit board, interlayer or a combination thereof.

28. The radio frequency integrated circuit as claimed in claim 26, characterized in that, The bump, the parallel transmission line, the ungrounded substrate via, or a combination thereof, together with a capacitor in series to form a parallel LC harmonic network. The parallel LC harmonic network, together with the parasitic capacitance of the transistor, forms the matching circuit, which is a harmonic matching circuit.

29. The radio frequency integrated circuit as described in claim 28, characterized in that, The parallel LC harmonic network branches are connected to the input terminal of the transistor for input harmonic termination, the output terminal of the transistor for output harmonic termination, or a combination thereof, for use in a linear power amplifier.

30. The radio frequency integrated circuit as described in claim 28, characterized in that, The capacitor of the parallel LC harmonic network is partially or entirely formed by using a metal-insulator-metal capacitor as the capacitor in an ungrounded via or an ungrounded substrate via.

31. The radio frequency integrated circuit as described in claim 30, characterized in that, The metal-insulator-metal capacitor and the ungrounded via or the ungrounded substrate via share a common metal layer.

32. The radio frequency integrated circuit as described in claim 31, characterized in that, The common metal layer is formed from the back metal layer of the substrate to the ungrounded via or the ungrounded substrate via and the base plate of the metal-insulator-metal capacitor.

33. The radio frequency integrated circuit as described in claim 28, characterized in that, The capacitor of the parallel LC harmonic network is partially or entirely formed by using an open-circuit stub transmission line as the capacitor, and the parallel transmission line, the bump, or the ungrounded substrate via as an inductor of the parallel LC harmonic network.

34. The radio frequency integrated circuit as described in claim 28, characterized in that, The capacitor of the parallel LC harmonic network is partially or entirely formed by using a voltage-adjustable capacitor, a static capacitor, or a combination thereof as the capacitor.

35. The radio frequency integrated circuit as described in claim 28, characterized in that, The capacitor formation portion or all of the parallel LC harmonic network is formed as a metal-insulator-metal capacitor or a lower bump by using a wedge bond, the wedge bond and the bump having a common metal layer.

36. The radio frequency integrated circuit as described in claim 35, characterized in that, The common metal layer forms the lower bump metal of the bump and the top plate of the metal-insulator-metal capacitor.

37. The radio frequency integrated circuit as described in claim 30, characterized in that, The metal-insulator-metal capacitor is formed by parallel plate capacitors, interdigitated capacitors, metal jumpers, or combinations thereof.

38. The radio frequency integrated circuit as described in claim 28, characterized in that, The parallel LC harmonic network is a switch-mode power amplifier or a linear amplifier.

39. The radio frequency integrated circuit as described in claim 28, characterized in that, The harmonic matching circuit is a Class F topology and also includes a parallel compensation network consisting of a parallel inductor and a parallel capacitor. This parallel compensation network is a low-pass π-type parallel quarter-wave transmission line.

40. The radio frequency integrated circuit as claimed in claim 1, characterized in that, The bump can be a single bump or multiple bumps in parallel.

41. The radio frequency integrated circuit as claimed in claim 1, characterized in that, The bump is a solder bump, a micro bump, a hybrid bump, or a combination thereof.

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