Semiconductor memory device and method for manufacturing semiconductor memory device

Abstract

A semiconductor storage device in which an easy erasing operation can be performed is provided. The semiconductor storage device includes: a laminate having a plurality of conductive layers and a plurality of insulating layers, the plurality of conductive layers including a first selection gate line connected to a gate of a first selection transistor, a word line provided above the first selection gate line and connected to a gate of a memory transistor, and a second selection gate line provided above the word line and connected to a gate of a second selection transistor; a core insulating layer having an upper surface lower than an upper surface of the second selection gate line with respect to a surface of a semiconductor substrate; a semiconductor layer including a first semiconductor portion having a channel formation region of each of the memory transistor and the first and second selection transistors, and a second semiconductor portion provided on the upper surface of the core insulating layer; and a memory layer provided between the semiconductor layer and the laminate in a first direction. The first semiconductor portion has an impurity semiconductor region containing an impurity element and overlapping the second selection gate line.

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