An instantiation module simulation verification method and device based on a scalable IP

Abstract

The embodiment of the application discloses a instantiation module simulation verification method and device based on a scalable IP, relates to the integrated circuit technical field, and can improve the verification efficiency of the instantiation module. The method comprises the following steps: instantiating each instantiation module based on the identification and the number of the instantiation modules in a first file, so as to obtain an instantiation module set; determining the system physical address of the register corresponding to a first instantiation module in the instantiation module set; generating special test cases corresponding to each functional logic in the first instantiation module based on the system physical address of the register corresponding to the first instantiation module and original test cases corresponding to each functional logic in the first instantiation module; and performing simulation verification on the first instantiation module by using the special test cases. The application is suitable for simulation verification on the instantiation module.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to a method and apparatus for simulating and verifying instantiated modules based on customizable IP. Background Technology

[0002] With continuous advancements in chip manufacturing processes and increasing integration levels, integrated circuits have evolved through stages of small-scale integration, medium-scale integration, large-scale integration, and ultra-large-scale integration. In ultra-large-scale chip design, chip complexity increases, and design functions multiply. Verification work accounts for approximately 70% of the time in chip design, becoming a key bottleneck. Therefore, the development and efficiency of the verification platform directly impact verification time.

[0003] To fully verify these instantiated modules that contain one or more functional logics, the traditional approach is to have a separate verification environment and corresponding test cases for each instantiated module. When there are dozens or even hundreds of instantiated modules with different functions, verification personnel need to spend a lot of time building the corresponding number of verification environments and writing test cases, resulting in very low overall efficiency. Summary of the Invention

[0004] In view of this, embodiments of this application provide a method, apparatus, electronic device, and storage medium for simulation verification of instantiated modules based on customizable IP, which can improve the verification efficiency of instantiated modules.

[0005] In a first aspect, embodiments of this application provide a simulation verification method for instantiated modules based on customizable IP. The method includes: instantiating each instantiated module based on the identifier and number of instantiated modules in a first file to obtain a set of instantiated modules; wherein the first file is generated based on predefined instantiated modules and corresponding functional logic; determining the system physical address of the register corresponding to the first instantiated module in the set of instantiated modules; wherein the register corresponding to the first instantiated module is the register operated by the original test cases corresponding to the functional logic in the first instantiated module; generating dedicated test cases corresponding to the functional logic in the first instantiated module based on the system physical address of the register corresponding to the first instantiated module and the original test cases corresponding to the functional logic in the first instantiated module; and using the dedicated test cases to perform simulation verification on the first instantiated module.

[0006] According to one possible implementation of this application, determining the system physical address of the register corresponding to the first instantiated module in the instantiated module set includes: determining the system physical address of the register corresponding to the first functional logic of the first instantiated module in the instantiated module set; wherein, the register corresponding to the first functional logic is the register operated by the original test case corresponding to the first functional logic.

[0007] According to one possible implementation of this application, the step of generating dedicated test cases corresponding to each functional logic in the first instantiation module based on the system physical address of the register corresponding to the first instantiation module and the original test cases corresponding to each functional logic in the first instantiation module includes: generating dedicated test cases corresponding to the first functional logic based on the system physical address of the register corresponding to the first functional logic in the first instantiation module and the original test cases corresponding to the first functional logic.

[0008] According to one possible implementation of this application, the step of using the dedicated test cases to simulate and verify the first instantiated module includes: using the dedicated test cases corresponding to the first functional logic to simulate and verify the first functional logic.

[0009] According to one possible implementation of this application, the instantiation of each instantiated module based on the identifier and number of instantiated modules in the first file includes: instantiating each instantiated module belonging to the same verification environment based on the identifier and number of instantiated modules in the first file.

[0010] According to one possible implementation of this application, before instantiating each instantiated module based on the identifier and number of instantiated modules in the first file, the method further includes: generating the first file based on a pre-configured configuration file; wherein each instantiated module and the functional logic corresponding to each instantiated module are defined in the configuration file.

[0011] According to one possible implementation of this application, determining the system physical address of the register corresponding to the first functional logic of the first instantiated module in the instantiated module set includes: determining the physical base address of the first instantiated module in the chip system; determining the offset address of the register corresponding to the first functional logic in the register model based on the identifier of the first functional logic; and determining the system physical address of the register corresponding to the first functional logic based on the physical base address of the first instantiated module in the chip system and the offset address of the register corresponding to the first functional logic.

[0012] According to one possible implementation of this application, after performing simulation verification on the first instantiated module using the dedicated test cases, the method further includes: outputting simulation verification results; comparing the output simulation verification results with simulation prediction results to determine whether the simulation verification of the dedicated test cases has passed.

[0013] Secondly, embodiments of this application provide a simulation verification device for instantiated modules based on customizable IP. The device includes: an acquisition module, configured to instantiate each instantiated module based on the identifier and number of instantiated modules in a first file to obtain a set of instantiated modules; wherein the first file is generated based on predefined instantiated modules and corresponding functional logic of each instantiated module; a determination module, configured to determine the system physical address of the register corresponding to the first instantiated module in the set of instantiated modules; wherein the register corresponding to the first instantiated module is the register operated by the original test cases corresponding to each functional logic of the first instantiated module; a first generation module, configured to generate dedicated test cases corresponding to each functional logic of the first instantiated module based on the system physical address of the register corresponding to the first instantiated module and the original test cases corresponding to each functional logic of the first instantiated module; and a verification module, configured to perform simulation verification on the first instantiated module using the dedicated test cases.

[0014] According to one possible implementation of an embodiment of this application, the determining module is specifically used to: determine the system physical address of the register corresponding to the first functional logic of the first instantiated module in the instantiated module set; wherein, the register corresponding to the first functional logic is the register operated by the original test case corresponding to the first functional logic.

[0015] According to one possible implementation of this application, the first generation module is specifically used to: generate a dedicated test case corresponding to the first functional logic based on the system physical address of the register corresponding to the first functional logic in the first instantiation module and the original test case corresponding to the first functional logic.

[0016] According to one possible implementation of an embodiment of this application, the verification module is specifically used to: perform simulation verification on the first functional logic using dedicated test cases corresponding to the first functional logic.

[0017] According to one possible implementation of an embodiment of this application, the acquisition module is specifically used to: instantiate each instantiated module belonging to the same verification environment based on the identifier and number of instantiated modules in the first file.

[0018] According to one possible implementation of an embodiment of this application, the apparatus further includes: a second generation module, configured to generate the first file based on a pre-configured configuration file before instantiating each instantiated module based on the identifier and number of instantiated modules in the first file; wherein each instantiated module and the corresponding functional logic of each instantiated module are defined in the configuration file.

[0019] According to one possible implementation of this application, the determining module includes: a first determining unit, configured to determine the physical base address of a first instantiated module in the chip system within the instantiated module set; a second determining unit, configured to determine the offset address of the register corresponding to the first functional logic in the register model based on the identifier of the first functional logic; and a third determining unit, configured to determine the system physical address of the register corresponding to the first functional logic based on the physical base address of the first instantiated module in the chip system and the offset address of the register corresponding to the first functional logic.

[0020] According to one possible implementation of this application, the apparatus further includes: an output module, configured to output a simulation verification result after the first instantiation module is simulated and verified using the dedicated test case; and a comparison module, configured to compare the output simulation verification result with the simulation prediction result to determine whether the simulation verification of the dedicated test case has passed.

[0021] Thirdly, embodiments of this application also provide an electronic device, the electronic device comprising: a processor, a memory, a circuit board, and a power supply circuit, wherein the circuit board is disposed within a space enclosed by a housing, and the processor and the memory are disposed on the circuit board; the power supply circuit is used to supply power to various circuits or devices of the above-mentioned electronic device; the memory is used to store executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, for executing any of the instantiation module simulation verification methods based on customizable IP provided in embodiments of this application.

[0022] Fourthly, embodiments of this application also provide a computer-readable storage medium storing one or more programs, which can be executed by one or more processors to implement any of the instantiation module simulation verification methods based on customizable IP provided in embodiments of this application.

[0023] The simulation verification method, apparatus, electronic device, and storage medium based on customizable IP-based instantiated modules provided in this application instantiate each instantiated module based on the identifier and number of instantiated modules in a first file, obtaining a set of instantiated modules. The system physical address of the register corresponding to the first instantiated module in the set is determined. Then, based on the system physical address of the register corresponding to the first instantiated module and the original test cases corresponding to each functional logic in the first instantiated module, dedicated test cases corresponding to each functional logic in the first instantiated module are generated. These dedicated test cases are used to simulate and verify the first instantiated module. This eliminates the need to build a corresponding verification environment and write corresponding test cases for each instantiated module, thus improving the verification efficiency of the instantiated modules. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 A flowchart illustrating a simulation verification method for instantiated modules based on customizable IP, provided in an embodiment of this application;

[0026] Figure 2 This is an example diagram illustrating an instantiation module based on customizable IP, provided as an embodiment of this application.

[0027] Figure 3 A schematic diagram of the structure of the verification platform for the instantiation module provided in the embodiments of this application;

[0028] Figure 4 A schematic diagram of the structure of an instantiation module simulation verification device based on customizable IP provided in an embodiment of this application;

[0029] Figure 5 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0030] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0031] It should be understood that the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0032] To better understand the simulation verification method for instantiated modules based on customizable IP provided in the embodiments of this application, a brief introduction to the relevant knowledge of the embodiments of this application is first given.

[0033] In integrated circuits, an IP (Intellectual Property) core refers to a mature design of a circuit module with independent functions, serving as an intermediate component in integrated circuit design. An IP core (or simply IP) is a functional block described using hardware description languages ​​such as Verilog / VHDL.

[0034] Generally speaking, a complex chip is composed of circuit parts designed by the chip designer and multiple off-the-shelf IP cores connected together. As integrated circuits become larger and more complex, using pre-made IP during the design process can avoid repetitive work and greatly improve the design efficiency of integrated circuits. IP can include multiple functional logic components, which are also called function points, function point components, or feature components. The term "function point" will be used to refer to functional logic in the following text.

[0035] Functional points can specifically be RTL code. RTL code refers to the functional description of combinational logic devices and sequential logic devices based on register transfers, using a hardware description language (a language that can describe logic devices, such as Verilog HDL or System Verilog). Customizable IP provides a more flexible integrated circuit design solution. It can be based on an initial version of IP, trimmed and instantiated into multiple instantiated modules, and the functional points of each instantiated module are a subset of the initial version of IP.

[0036] For each instantiated module in the same integrated circuit, the existing simulation verification method requires each instantiated module to have a separate verification environment and corresponding test cases. Verification personnel can only spend a lot of time building a verification environment and writing test cases for each instantiated module, resulting in very low overall simulation verification efficiency.

[0037] To address the aforementioned technical problems, in a first aspect, embodiments of this application provide a simulation verification method for instantiation modules based on customizable IP, which can improve the verification efficiency of instantiation modules.

[0038] like Figure 1 As shown in the embodiments of this application, the simulation verification method for instantiated modules based on customizable IP may include:

[0039] S11. Based on the identifier and number of instantiated modules in the first file, instantiate each instantiated module to obtain a set of instantiated modules.

[0040] The first file is generated based on each predefined instantiation module and the corresponding functional logic of each instantiation module;

[0041] The integrated circuit in this embodiment of the invention can be a SoC (System on Chip). In the specific implementation process, during the integrated circuit design process, a functional attribute file can be generated in advance based on the actual functional requirements of the integrated circuit. In this embodiment, this file is referred to as the first file. The functional attribute file defines which instantiated modules are included in the integrated circuit and which functional points are included in each instantiated module. The functional attribute file can be configured manually by engineers or generated automatically.

[0042] Furthermore, based on the functional attribute file, the customizable IP can be instantiated into different modules in the verification platform. During instantiation, only the functional points defined in the first file need to be added to the corresponding instantiated modules, thus avoiding the addition of redundant functional points to the instantiated modules. An instantiated module can be understood as tailoring the customizable IP into specific circuits with different functional points according to the functional attribute file, with each instantiated module distributed throughout the chip system.

[0043] Through the above instantiation process, each instantiated module may include one or more functional points, such as one or more first functional points and one or more second functional points, and may further include other functional points.

[0044] like Figure 2 As shown, taking the first customizable IP as an example, it includes function point 1, function point 2, function point 3, function point 4, function point 5, function point 6, function point 7, and function point 8, for a total of 8 function points. The first file predefines which instantiated modules are included in the integrated circuit, and which function points are included in each instantiated module. Specifically, this can be as follows:

[0045] Instantiated module 1 includes 3 functional points: functional point 1, functional point 2, and functional point 4.

[0046] Instantiated module 2 has 3 functional points: functional point 2, functional point 3, and functional point 5.

[0047] Instantiated module 3 has 4 functional points: functional point 1, functional point 3, functional point 6, and functional point 7.

[0048] Module 4 is instantiated and has 6 functional points: functional point 3, functional point 4, functional point 5, functional point 6, functional point 7, and functional point 8.

[0049] Therefore, based on the predefined instantiation module information and function point information in the first file, each instantiation module can be instantiated on the verification platform to obtain an instantiation module set, which specifically includes instantiation module 1, instantiation module 2, instantiation module 3, and instantiation module 4.

[0050] These instantiated modules, which contain different functionalities, have different RTL (Register Transfer Level) codes and not entirely the same application scenarios. Therefore, in the existing technology, it is necessary to build a corresponding verification environment for each instantiated module and perform simulation verification separately.

[0051] S12, determine the system physical address of the register corresponding to the first instantiated module in the instantiated module set.

[0052] Wherein, the register corresponding to the first instantiation module is the register of the original test case operation corresponding to each functional logic in the first instantiation module.

[0053] Specifically, the first instantiated module in this step can be any instantiated module in the set of instantiated modules. Testing and verifying the instantiated module involves verifying and testing all functionalities included in the first instantiated module. Specifically, the original test cases (one or more) corresponding to each functionality can be used to verify and test the functionalities. When verifying and testing functionalities, the system physical addresses of the registers operated by the original test cases corresponding to each functionality in the first instantiated module can be obtained first, so that the system physical addresses of the registers can be used subsequently to verify and test the functionalities.

[0054] S13. Based on the system physical address of the register corresponding to the first instantiation module and the original test cases corresponding to each functional logic in the first instantiation module, generate dedicated test cases corresponding to each functional logic in the first instantiation module.

[0055] S14, Using the dedicated test cases, the first instantiated module is simulated and verified.

[0056] Specifically, in order to fully verify and test each function in each instantiated module, corresponding original test cases can be generated in advance for each function. That is, each function has one or more original test cases, and each original test case defines specific test steps for the corresponding function to test a certain performance of the function.

[0057] The original test cases are not specific to any instantiated module and do not involve specific register address information. In order to enable read and write operations on registers when executing test cases, dedicated test cases can be generated based on the original test cases of the function point and the system physical addresses of the registers in the function point. The dedicated test cases include the specific system physical address information of each register.

[0058] For each functional point in the instantiation module, the dedicated test case generated in the above steps corresponding to that functional point can be executed. Executing the dedicated test case can realize the testing of that functional point in the first instantiation module. Executing the above steps for each functional point in the instantiation module can realize the simulation verification of all functional points in the instantiation module, that is, realize the simulation verification of the instantiation module.

[0059] The simulation verification method for instantiated modules based on customizable IP provided in this application embodiment instantiates each instantiated module based on the identifier and number of instantiated modules in a first file, obtaining a set of instantiated modules. By determining the system physical address of the register corresponding to the first instantiated module in the set of instantiated modules, and based on the system physical address of the register corresponding to the first instantiated module and the original test cases corresponding to each functional logic in the first instantiated module, dedicated test cases corresponding to each functional logic in the first instantiated module are generated. The first instantiated module is simulated and verified using the dedicated test cases. In this way, it is not necessary to build a corresponding verification environment and write corresponding test cases for each instantiated module, thus improving the verification efficiency of instantiated modules.

[0060] In order to determine the system physical address of the register corresponding to each functional logic in the first instantiation module, in one embodiment of this application, the step of determining the system physical address of the register corresponding to the first instantiation module in the instantiation module set (step S12) may include: determining the system physical address of the register corresponding to the first functional logic of the first instantiation module in the instantiation module set; wherein, the register corresponding to the first functional logic is the register operated by the original test case corresponding to the first functional logic.

[0061] In this embodiment, the first functional point can be any functional point in the first instantiation module. When performing verification testing on the first instantiation module, the system physical address of the register operated on in the original test case corresponding to the first functional point can be determined first, so that subsequent verification testing of the first functional point can be performed based on the aforementioned system physical address. Using this method, the system physical address of the register operated on in the original test case corresponding to each functional point in the first instantiation module can be obtained.

[0062] Optionally, in one embodiment of this application, the step of generating dedicated test cases corresponding to each functional logic in the first instantiation module based on the system physical address of the register corresponding to the first instantiation module and the original test cases corresponding to each functional logic in the first instantiation module (step S13) may include: generating dedicated test cases corresponding to the first functional logic based on the system physical address of the register corresponding to the first functional logic in the first instantiation module and the original test cases corresponding to the first functional logic.

[0063] In this embodiment, after obtaining the system physical address of the register corresponding to the first function point, a dedicated test case for the first function point can be generated by combining it with the original test case corresponding to the first function point. Compared to the original test case, the dedicated test case includes the system physical address information of the register corresponding to the first function point; therefore, when executing the dedicated test case, read and write operations can be performed on the registers involved.

[0064] Optionally, in one embodiment of this application, using the dedicated test cases to perform simulation verification on the first instantiation module (step S14) may include: using the dedicated test cases corresponding to the first functional logic to perform simulation verification on the first functional logic.

[0065] In this embodiment of the application, in order to perform simulation verification of the first functional point, a dedicated test case corresponding to the first functional point can be executed. Since the dedicated test case includes the system physical address information of the register corresponding to the first functional point, the dedicated test case can perform read and write operations on the aforementioned register according to the aforementioned system physical address information during operation, that is, it can realize the simulation verification of the first functional point. Each functional point in the first instantiation module can be simulated and verified in the above manner.

[0066] Furthermore, in this embodiment, the first functional point may further include at least two sub-functional points. Correspondingly, the original test cases may be a set of original test cases corresponding to any one of the at least two sub-functional points. Thus, when performing simulation verification on the first instantiated module, multiple functional points can be merged and then subjected to simulation verification testing.

[0067] Optionally, in one embodiment of this application, instantiating each instantiated module based on the identifier and number of instantiated modules in the first file (step S11) may include: instantiating each instantiated module belonging to the same verification environment based on the identifier and number of instantiated modules in the first file.

[0068] During the instantiation process based on the identifiers and number of instantiated modules in the first file, the same tag can be added to the names of each instantiated module. This tag can then be used to identify the verification environment to which each instantiated module belongs; instantiated modules with the same tag belong to the same verification environment. For example, the instantiation hierarchy is as follows: tb.instance1, tb.Instance2, tb.Instance3, tb.Instance4, where tb is the top-level verification environment. This verification environment contains four instantiated modules: instance1, instance2, instance3, and instance4, allowing for subsequent verification of these four instantiated modules within the same verification environment.

[0069] Optionally, in one embodiment of this application, before instantiating each instantiated module based on the identifier and number of instantiated modules in the first file (step S11), the simulation verification method of instantiated modules based on customizable IP provided in this application embodiment may further include: generating the first file based on a pre-configured configuration file; defining each instantiated module and the functional logic corresponding to each instantiated module in the configuration file.

[0070] In this embodiment, a corresponding configuration file can be pre-configured for each instantiated module. Each configuration file defines the functional points included in the corresponding instantiated module. Therefore, a script program can be used to extract relevant information from the configuration files to generate a first file. In this way, the first file can include information about each instantiated module and information about the functional points included in each instantiated module. Automating the generation of the first file not only increases efficiency but also helps improve accuracy.

[0071] Optionally, in one embodiment of this application, determining the system physical address of the register corresponding to the first instantiated module in the instantiated module set (step S12) may include: determining the physical base address of the first instantiated module in the chip system; determining the offset address of the register corresponding to the first functional logic in the register model based on the identifier of the first functional logic; and determining the system physical address of the register corresponding to the first functional logic based on the physical base address of the first instantiated module in the chip system and the offset address of the register corresponding to the first functional logic.

[0072] In this embodiment, the physical address space of each instantiated module in the instantiated module set within the chip system can be predefined in the first file. When simulating and verifying the first instantiated module, the physical base address of the first instantiated module in the chip system can be obtained from the first file first. Then, based on the name of the register corresponding to the first function point in the first instantiated module, the offset address of the register can be obtained from the register model. By summing the aforementioned base address and offset address, the system physical address of the register corresponding to the first function point can be calculated.

[0073] Optionally, in one embodiment of this application, after performing simulation verification on the first instantiation module using the dedicated test cases (step S14), the simulation verification method for the instantiation module based on customizable IP provided in this application embodiment may further include: outputting simulation verification results; comparing the output simulation verification results with the simulation prediction results to determine whether the simulation verification of the dedicated test cases has passed.

[0074] like Figure 3 As shown, a basic verification platform consists of the following parts: 1. A driver, used to apply the stimulus signals generated by executing dedicated test cases to the Design Under Test (DUT). In this embodiment, the DUT can specifically be the function point to be tested; 2. A monitor, used to monitor the actual output signal of the DUT after the stimulus signal is applied; 3. A reference model, whose input stimulus signal is exactly the same as that of the DUT, used to generate expected values ​​and send the expected values ​​to the scoreboard; 4. A scoreboard, used to compare the expected values ​​output by the reference model with the actual output values ​​of the DUT monitored by the monitor and generate comparison results.

[0075] In this embodiment, after executing a dedicated test case for the first functional point and applying a test stimulus signal to the first functional point via a driver, the actual test result can be obtained from the monitor. Furthermore, in the verification platform, the driver also applies the stimulus signal to a reference model to obtain the expected test result. Both are transmitted to a scoring board, which compares the actual test result with the expected test result to determine whether the first functional point has passed simulation verification. The above method can be used for simulation verification of any functional point in any instantiated module.

[0076] The following detailed description of the simulation verification method for instantiated modules based on customizable IP provided by the embodiments of the present invention will be carried out through specific examples.

[0077] Taking a distributed control IP in a SoC chip as an example, this IP defines seven functionalities named: cold_reset, hard_reset, soft_reset, reg_master_interface, reg_slave_interface, fuse_signals, and rom_signals. Multiple instantiated modules of this IP are distributed throughout the SoC. The following explanation uses instantiated module 1 as an example.

[0078] In order to output control signals to downstream IP1, the above-mentioned distributed control IP is instantiated to generate instantiated module 1 named CONTROL_1, which is used to output control signals to downstream IP1. The instantiated module includes two functional points: cold_reset and reg_master_interface.

[0079] The steps for testing the cold_reset function in instantiation module 1 are as follows:

[0080] S21, get_reg(“COLD_RESET_REG”).write(1), the get_reg function can obtain the base address of instantiated module 1 in the chip system, obtain the offset address of COLD_RESET_REG register from the register model, and then calculate the system physical address of COLD_RESET_REG register.

[0081] S22. Generate dedicated test cases based on the system physical address of the COLD_RESET_REG register and the original test cases for the cold_reset function point.

[0082] S23, execute the above-mentioned dedicated test case, write data 1 to the physical address of the system, detect the actual output signal of cold_reset of instantiated module 1, and compare it with the expected output data 1. When the actual output signal is 1, it can be determined that the cold_reset function point has passed the verification test; when the actual output signal is not 1, it can be determined that the cold_reset function point has failed the verification test.

[0083] S24, continue to execute the above-mentioned special test case, write data 0 to the physical address of the system, detect the actual output signal of cold_reset of instantiated module 1, and compare it with the expected output data 0. When the actual output signal is 0, it can be determined that the cold_reset function point has passed the verification test. When the actual output signal is not 0, it can be determined that the cold_reset function point has failed the verification test.

[0084] The steps for testing the reg_master_interface function in instantiation module 1 are as follows:

[0085] S31, get_reg(“STOP_SEND_REG”).write(1); The get_reg function can obtain the system physical address of the STOP_SEND_REG register of the instantiated module. Combined with the original test cases for the reg_master_interface function point, a special test case is generated. Execute the special test case to write data 1 to the system physical address, which is used to control the master interface of instantiated module 1 to stop sending data to downstream IPs.

[0086] S32, Send_rand_data(); The Send_rand_data function sends random data to instantiated module 1 through the verification platform. Under the control of STOP_SEND_REG, the master interface of instantiated module 1 should not send any data. It checks whether the master interface of instantiated module 1 has sent any data. If not, it can be determined that the reg_master_interface function point has passed the verification test; if data has been sent, it can be determined that the reg_master_interface function point has failed the verification test.

[0087] S33, get_reg(“STOP_SEND_REG”).write(0), the get_reg function can obtain the system physical address of the STOP_SEND_REG register of the instantiated module. Combined with the original test cases of the reg_master_interface function point, a dedicated test case is generated. Execute the dedicated test case to write data 0 to the system physical address, which is used to control the instantiated module 1 to send data to the downstream IP.

[0088] S34, Send_rand_data(): The Send_rand_data function sends random data to instantiated module 1 through the verification platform. Under the control of STOP_SEND_REG, the master interface should send data. Checking whether the master interface of instantiated module 1 has sent data, if so, it can be determined that the reg_master_interface function point has passed the verification test; if no data is sent, it can be determined that the reg_master_interface function point has failed the verification test.

[0089] In one specific implementation of this application, based on project requirements, an original version of a customizable IP is instantiated into more than 50 different instantiated modules. The final RTL code of all instantiated modules can be verified in a single verification environment, automatically generating more than 3,000 test cases. This significantly shortens the verification time and greatly improves verification efficiency. Without the method mentioned in this invention, it would generally be necessary to set up more than 50 verification environments to verify each instantiated module separately, and each verification environment would require rewriting test cases, necessitating a large investment of manpower. This invention can significantly improve verification efficiency and reduce human resource investment.

[0090] Secondly, embodiments of this application provide a simulation verification device for instantiated modules based on customizable IP, which can improve the verification efficiency of instantiated modules.

[0091] like Figure 4 As shown in the embodiment of this application, the instantiation module simulation verification device 2 based on customizable IP includes:

[0092] The acquisition module 21 is used to instantiate each instantiated module based on the identifier and number of instantiated modules in the first file, and obtain a set of instantiated modules; wherein, the first file is generated based on each predefined instantiated module and the corresponding functional logic of each instantiated module;

[0093] The determination module 22 is used to determine the system physical address of the register corresponding to the first instantiated module in the instantiated module set; wherein, the register corresponding to the first instantiated module is the register operated by the original test cases corresponding to each functional logic in the first instantiated module;

[0094] The first generation module 23 is used to generate dedicated test cases corresponding to each functional logic in the first instantiation module based on the system physical address of the register corresponding to the first instantiation module and the original test cases corresponding to each functional logic in the first instantiation module.

[0095] Verification module 24 is used to perform simulation verification on the first instantiation module using the dedicated test cases.

[0096] The instantiation module simulation verification device based on customizable IP provided in this application embodiment instantiates each instantiation module based on the identifier and number of instantiation modules in a first file, obtaining an instantiation module set. By determining the system physical address of the register corresponding to the first instantiation module in the instantiation module set, and based on the system physical address of the register corresponding to the first instantiation module and the original test cases corresponding to each functional logic in the first instantiation module, dedicated test cases corresponding to each functional logic in the first instantiation module are generated. The first instantiation module is simulated and verified using the dedicated test cases. In this way, it is not necessary to build a corresponding verification environment and write corresponding test cases for each instantiation module, thus improving the verification efficiency of the instantiation module.

[0097] Optionally, in one embodiment of this application, the determining module 22 is specifically used to: determine the system physical address of the register corresponding to the first functional logic of the first instantiated module in the instantiated module set; wherein, the register corresponding to the first functional logic is the register operated by the original test case corresponding to the first functional logic.

[0098] Optionally, in one embodiment of this application, the first generation module 23 is specifically used to: generate a dedicated test case corresponding to the first functional logic based on the system physical address of the register corresponding to the first functional logic in the first instantiation module and the original test case corresponding to the first functional logic.

[0099] Optionally, in one embodiment of this application, the verification module 24 is specifically used to: perform simulation verification on the first functional logic using dedicated test cases corresponding to the first functional logic.

[0100] Optionally, in one embodiment of this application, the acquisition module 21 is specifically used to: instantiate each instantiated module belonging to the same verification environment based on the identifier and number of instantiated modules in the first file.

[0101] Optionally, in one embodiment of this application, the apparatus 2 may further include: a second generation module, configured to generate the first file based on a pre-configured configuration file before instantiating each instantiated module based on the identifier and number of instantiated modules in the first file; wherein each instantiated module and the functional logic corresponding to each instantiated module are defined in the configuration file.

[0102] Optionally, in one embodiment of this application, the determining module 22 may include: a first determining unit, configured to determine the physical base address of the first instantiated module in the instantiated module set in the chip system; a second determining unit, configured to determine the offset address of the register corresponding to the first functional logic in the register model based on the identifier of the first functional logic; and a third determining unit, configured to determine the system physical address of the register corresponding to the first functional logic based on the physical base address of the first instantiated module in the chip system and the offset address of the register corresponding to the first functional logic.

[0103] Optionally, in one embodiment of this application, the device 2 may further include: an output module, configured to output a simulation verification result after the first instantiation module is simulated and verified using the dedicated test case; and a comparison module, configured to compare the output simulation verification result with the simulation prediction result to determine whether the simulation verification of the dedicated test case has passed.

[0104] Thirdly, embodiments of this application provide an electronic device that can improve the verification efficiency of the instantiation module.

[0105] like Figure 5 As shown in the embodiments of this application, an electronic device may include: a housing 41, a processor 42, a memory 43, a circuit board 44, and a power supply circuit 45. The circuit board 44 is disposed inside the space enclosed by the housing 41, and the processor 42 and the memory 43 are disposed on the circuit board 44. The power supply circuit 45 is used to supply power to various circuits or devices of the above-mentioned electronic device. The memory 43 is used to store executable program code. The processor 42 runs a program corresponding to the executable program code by reading the executable program code stored in the memory 43, and is used to execute the instantiation module simulation verification method based on customizable IP described in any of the foregoing embodiments.

[0106] The specific execution process of the above steps by the processor 42, as well as the steps further executed by the processor 42 by running executable program code, can be found in the description of the foregoing embodiments, and will not be repeated here.

[0107] This electronic device is used to run the verification platform and can exist in various forms, including but not limited to:

[0108] (1) Ultra-mobile personal computer devices: These devices fall under the category of personal computers, have computing and processing capabilities, and generally also have mobile internet access capabilities. These terminals include: PDA (Personal Digital Assistant), MID (Mobile Internet Device), and UMPC (Ultra-mobile Personal Computer) devices, such as the iPad.

[0109] (2) Server: A device that provides computing services. The components of a server include a processor, hard disk, memory, system bus, etc. Servers are similar to general computer architectures, but because they need to provide highly reliable services, they have higher requirements in terms of processing power, stability, reliability, security, scalability, and manageability.

[0110] (3) Other electronic devices with data interaction functions.

[0111] Fourthly, embodiments of this application also provide a computer-readable storage medium storing one or more programs, which can be executed by one or more processors to implement any of the instantiation module simulation verification methods based on customizable IP provided in the foregoing embodiments. Therefore, it can also achieve the corresponding technical effects, which have been described in detail above and will not be repeated here.

[0112] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0113] The various embodiments in this specification are described in a related manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0114] In particular, the device embodiment is basically similar to the method embodiment, so the description is relatively simple. For relevant details, please refer to the description of the method embodiment.

[0115] For ease of description, the above apparatus is described by dividing it into various functional units / modules. Of course, in implementing this invention, the functions of each unit / module can be implemented in one or more software and / or hardware.

[0116] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0117] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A simulation verification method for instantiated modules based on customizable IP, characterized in that, Applied to a verification platform, the method includes: Based on the identifiers and number of instantiated modules in the first file and the preset customizable IPs, each instantiated module is instantiated to obtain a set of instantiated modules; wherein, the first file is generated based on each predefined instantiated module and the corresponding functional logic of each instantiated module; each instantiated module includes one or more of the functional logics; the functional logic of each instantiated module is a subset of the customizable IPs, and the functional logics included in each instantiated module are not completely identical; each functional logic has one or more corresponding original test cases; each original test case defines the test steps of the corresponding functional logic; wherein, the instantiation of each instantiated module based on the identifiers and number of instantiated modules in the first file and the preset customizable IPs includes: adding the functional logic defined in the first file to the corresponding instantiated module; Determine the system physical address of the register corresponding to the first instantiation module in the instantiation module set; wherein, the register corresponding to the first instantiation module is the register operated by the original test case corresponding to each functional logic in the first instantiation module; the first instantiation module is any one of the instantiation modules in the instantiation module set; Based on the system physical address of the register corresponding to the first instantiation module, and the original test cases corresponding to each functional logic in the first instantiation module, generate dedicated test cases corresponding to each functional logic in the first instantiation module. The first instantiation module is simulated and verified using the dedicated test cases, and all instantiation modules are verified in the same verification environment.

2. The simulation verification method according to claim 1, characterized in that, The determination of the system physical address of the register corresponding to the first instantiated module in the set of instantiated modules includes: Determine the system physical address of the register corresponding to the first functional logic of the first instantiated module in the instantiated module set; wherein, the register corresponding to the first functional logic is the register operated by the original test case corresponding to the first functional logic.

3. The simulation verification method according to claim 2, characterized in that, The process of generating dedicated test cases corresponding to each functional logic in the first instantiation module based on the system physical address of the register corresponding to the first instantiation module and the original test cases corresponding to each functional logic in the first instantiation module includes: Based on the system physical address of the register corresponding to the first functional logic in the first instantiation module, and the original test cases corresponding to the first functional logic, a dedicated test case corresponding to the first functional logic is generated.

4. The simulation verification method according to claim 3, characterized in that, The simulation verification of the first instantiated module using the dedicated test cases includes: The first functional logic is simulated and verified using dedicated test cases corresponding to the first functional logic.

5. The simulation verification method according to claim 1, characterized in that, The instantiation of each module based on the identifier and number of instantiated modules in the first file and the preset customizable IP addresses includes: Based on the identifiers and number of instantiated modules in the first file, as well as the preset customizable IPs, instantiate each instantiated module belonging to the same verification environment.

6. The simulation verification method according to claim 1, characterized in that, Before instantiating each instantiated module based on the identifier and number of instantiated modules in the first file and the preset customizable IPs, the method further includes: The first file is generated based on a pre-configured configuration file; the configuration file defines each instantiation module and the corresponding functional logic of each instantiation module.

7. The simulation verification method according to claim 2, characterized in that, The determination of the system physical address of the register corresponding to the first functional logic of the first instantiated module in the set of instantiated modules includes: Determine the physical base address of the first instantiated module in the set of instantiated modules in the chip system; Based on the identifier of the first functional logic, the offset address of the register corresponding to the first functional logic is determined in the register model; Based on the physical base address of the first instantiation module in the chip system and the offset address of the register corresponding to the first functional logic, the system physical address of the register corresponding to the first functional logic is determined.

8. The simulation verification method according to claim 1, characterized in that, After performing simulation verification on the first instantiated module using the dedicated test cases, the method further includes: Output simulation verification results; The output simulation verification results are compared with the simulation prediction results to determine whether the simulation verification of the dedicated test cases has passed.

9. A simulation verification device for instantiated modules based on customizable IP, characterized in that, The device includes: An acquisition module is used to instantiate each instantiated module based on the identifier and number of instantiated modules in the first file and a preset set of customizable IPs, thereby obtaining a set of instantiated modules. The first file is generated based on predefined instantiated modules and their corresponding functional logics. Each instantiated module includes one or more of the functional logics. The functional logic of each instantiated module is a subset of the customizable IPs, and the functional logics included in each instantiated module are not entirely identical. Each functional logic has one or more corresponding original test cases. Each original test case defines the test steps for the corresponding functional logic. Specifically, the acquisition module is used to add the functional logic defined in the first file to the corresponding instantiated module. A determining module is used to determine the system physical address of the register corresponding to the first instantiated module in the set of instantiated modules; wherein, the register corresponding to the first instantiated module is the register operated by the original test case corresponding to each functional logic in the first instantiated module; the first instantiated module is any one of the instantiated modules in the set of instantiated modules; The first generation module is used to generate dedicated test cases corresponding to each functional logic in the first instantiation module based on the system physical address of the register corresponding to the first instantiation module and the original test cases corresponding to each functional logic in the first instantiation module. The verification module is used to perform simulation verification on the first instantiated module using the dedicated test cases, and all the instantiated modules are verified in the same verification environment.

10. The simulation verification device according to claim 9, characterized in that, The determining module is specifically used to: determine the system physical address of the register corresponding to the first functional logic of the first instantiated module in the instantiated module set; wherein, the register corresponding to the first functional logic is the register operated by the original test case corresponding to the first functional logic.

11. The simulation verification device according to claim 10, characterized in that, The generation module is specifically used to: generate dedicated test cases corresponding to the first functional logic based on the system physical address of the register corresponding to the first functional logic in the first instantiation module and the original test cases corresponding to the first functional logic.

12. The simulation verification device according to claim 11, characterized in that, The verification module is specifically used to: perform simulation verification on the first functional logic using dedicated test cases corresponding to the first functional logic.

13. The simulation verification device according to claim 9, characterized in that, The acquisition module is specifically used for: Based on the identifiers and number of instantiated modules in the first file, as well as the preset customizable IPs, instantiate each instantiated module belonging to the same verification environment.

14. The simulation verification device according to claim 9, characterized in that, The device further includes: The second generation module is used to generate the first file based on a pre-configured configuration file before instantiating each instantiated module, based on the identifier and number of instantiated modules in the first file; the configuration file defines each instantiated module and the corresponding functional logic of each instantiated module.

15. The simulation verification device according to claim 10, characterized in that, The determining module includes: The first determining unit is used to determine the physical base address of the first instantiated module in the instantiated module set in the chip system; The second determining unit is used to determine the offset address of the register corresponding to the first functional logic in the register model based on the identifier of the first functional logic. The third determining unit is used to determine the system physical address of the register corresponding to the first functional logic based on the physical base address of the first instantiation module in the chip system and the offset address of the register corresponding to the first functional logic.

16. The simulation verification device according to claim 9, characterized in that, The device further includes: The output module is used to output the simulation verification result after the first instantiated module is simulated and verified using the dedicated test cases; The comparison module is used to compare the output simulation verification results with the simulation prediction results to determine whether the simulation verification of the dedicated test cases has passed.

17. An electronic device, characterized in that, The electronic device includes: a processor, a memory, a circuit board, and a power supply circuit, wherein the circuit board is disposed inside the space enclosed by the housing, and the processor and the memory are disposed on the circuit board; the power supply circuit is used to supply power to various circuits or devices of the electronic device; the memory is used to store executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, for executing the instantiation module simulation verification method based on customizable IP as described in any one of claims 1 to 8.

18. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores one or more programs, which can be executed by one or more processors to implement the instantiation module simulation verification method based on customizable IP as described in any one of claims 1 to 8.

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