Trench gate IGBT devices and their manufacturing methods, electronic devices

Abstract

This invention provides a trench gate IGBT device and its manufacturing method, as well as an electronic device. The trench gate IGBT device includes: an N-well, a P-well, a polysilicon gate layer, and a deep-level donor doped layer. The P-well is disposed on the N-well, and several trenches are formed in the P-well and N-well. The polysilicon gate layer is disposed in each trench. The deep-level donor doped layer is disposed at the bottom of each trench and is connected to the bottom of each trench. Under certain high junction temperature extreme conditions, impurities in the deep-level donor doped layer with a specific doping concentration can act as recombination centers, releasing electrons to recombine with holes, reducing the hole concentration near the bottom of the trench. At high junction temperatures, the Fermi level of the deep-level donor doped layer drops below the impurity level, and the impurities automatically ionize to generate a large number of electrons, which recombine with holes, reducing the hole concentration, suppressing the formation of electric field peaks, and avoiding device failure caused by positive cycles of electric field and junction temperature.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a trench gate IGBT device, its manufacturing method, and electronic equipment. Background Technology

[0002] With technological advancements, the demand for high power density, small size, and lightweight design is increasingly evident across various application scenarios. To meet this demand, IGBT (Insulated Gate Bipolar Transistor) gate structures have evolved from planar gates, trench gates, to fine trench gates. Fine trench gate technology is one of the most crucial technologies for achieving high current density IGBT chips. As mesa width decreases and cell density increases, carrier injection enhancement is further improved, and on-state voltage drop is significantly reduced. However, when the device operates in the blocking or turn-off state, the high electric field on the front side can cause strong dynamic avalanche, especially in fine trench gate IGBT structures. The strong electric field concentrates at the bottom of the trench, and the hot carriers generated by dynamic avalanche directly bombard the nearby gate oxide layer, leading to potential device performance degradation and, in severe cases, irreversible breakdown failure. Summary of the Invention

[0003] Therefore, it is necessary to provide a trench gate IGBT device and its manufacturing method, as well as an electronic device, to address the aforementioned technical problems.

[0004] A trench gate IGBT device includes: an N-well, a P-well, a polysilicon gate layer, and a deep-level donor doped layer;

[0005] The P-well is disposed on the N-well, and the P-well and the N-well have a plurality of trenches, and the polysilicon gate layer is disposed in each of the trenches;

[0006] The deep-level donor doped layer is disposed at the bottom of each trench, and the deep-level donor doped layer is connected to the bottom of each trench.

[0007] In one embodiment, the impurities doped in the deep-level donor doped layer include at least one of sulfur, selenium, and tellurium.

[0008] In one embodiment, the depth of the trench is 4-6 μm.

[0009] A method for fabricating a trench gate IGBT device, comprising:

[0010] Deep-level donor doping is performed in the active region of the IGBT device to form a deep-level donor doped layer.

[0011] An N-well is fabricated on the deep-level donor-doped layer;

[0012] A P-well is fabricated on the N-well;

[0013] Trenches are formed on the N-well and the P-well such that the bottom of the trench is connected to the deep-level donor doped layer;

[0014] A polycrystalline silicon gate layer is formed within the trench.

[0015] In one embodiment, the step of performing deep-level donor doping in the active region of the IGBT device to form a deep-level donor doped layer includes:

[0016] Deep-level donor doping is performed at a predetermined depth in the active region of the IGBT device to form a deep-level donor doped layer.

[0017] A method for fabricating a trench gate IGBT device, comprising:

[0018] An N-well is fabricated in the active region of the IGBT device;

[0019] A P-well is fabricated on the N-well;

[0020] Trenches are formed on the N-well and the P-well;

[0021] Deep-level donor impurities are injected at the bottom of the trench, forming the deep-level donor doped layer at the bottom of the trench.

[0022] In one embodiment, the step of implanting deep-level donor impurities at the bottom of the trench to form the deep-level donor doped layer at the bottom of the trench includes:

[0023] Deep-level donor impurities are injected into the bottom of the trench;

[0024] The IGBT device is heat-treated to allow the deep-level donor impurities at the bottom of each trench to diffuse laterally, and the deep-level donor impurities at the bottom of each trench are interconnected to form the deep-level donor doped layer.

[0025] In one embodiment, the step of implanting deep-level donor impurities at the bottom of the trench to form the deep-level donor doped layer at the bottom of the trench includes:

[0026] Deep-level donor impurities are injected into the bottom of the trench using a mask to form the deep-level donor doped layer at the bottom of the trench.

[0027] In one embodiment, the step of implanting deep-level donor impurities at the bottom of the trench using a mask to form the deep-level donor doped layer at the bottom of the trench includes:

[0028] Deep-level donor impurities are implanted into the bottom of at least one pre-selected trench using a mask to form the deep-level donor doped layer at the bottom of the trench.

[0029] An electronic device comprising the trench gate IGBT device described in any of the above embodiments.

[0030] The aforementioned trench-gate IGBT device employs an ultra-high energy injection process to implant deep-level donor impurities at the bottom of the trench, forming a deep-level donor doped layer. At room temperature, because the energy levels of the deep-level donor doped layer are sufficiently deep, it has almost no impact on device characteristics. Under certain high junction temperature extreme conditions, impurities in the deep-level donor doped layer with specific doping concentrations can act as recombination centers, releasing electrons to recombine with holes and reducing the hole concentration near the bottom of the trench. At high junction temperatures, the Fermi level of the deep-level donor doped layer drops below the impurity energy level, causing the impurities to automatically ionize and generate a large number of electrons, which recombine with holes, reducing the hole concentration, suppressing the formation of electric field peaks, and avoiding device failure caused by positive cycles of electric field and junction temperature. Attached Figure Description

[0031] Figure 1 This is a schematic diagram of the structure of a trench gate IGBT device in one embodiment of the present invention;

[0032] Figure 2 This is a schematic flowchart of a method for manufacturing a trench gate IGBT device according to one embodiment of the present invention;

[0033] Figure 3 This is a schematic flowchart of a method for manufacturing a trench gate IGBT device according to one embodiment of the present invention;

[0034] Figure 4A This is a schematic diagram of the manufacturing process of a trench gate IGBT device according to one embodiment of the present invention;

[0035] Figure 4B This is a schematic diagram of the manufacturing process of a trench gate IGBT device according to another embodiment of the present invention;

[0036] Figure 5A This is a schematic diagram of the manufacturing process of a trench gate IGBT device according to one embodiment of the present invention;

[0037] Figure 5B This is a schematic diagram of the manufacturing process of a trench gate IGBT device according to another embodiment of the present invention;

[0038] Figure 6A This is a schematic diagram of the manufacturing process of a trench gate IGBT device according to one embodiment of the present invention;

[0039] Figure 6BThis is a schematic diagram of the manufacturing process of a trench gate IGBT device according to another embodiment of the present invention;

[0040] Figure 6C This is a schematic diagram of the manufacturing process of a trench gate IGBT device in another embodiment of the present invention. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0042] Example 1

[0043] In this embodiment, as Figure 1 As shown, a trench gate IGBT device is provided, including: an N-well 110, a P-well 120, a polysilicon gate layer 130, and a deep-level donor doped layer 140; the P-well 120 is disposed on the N-well 110, and the P-well 120 and the N-well 110 have a plurality of trenches 101 formed therein, and the polysilicon gate layer 130 is disposed in each of the trenches 101; the deep-level donor doped layer 140 is disposed at the bottom of each of the trenches 101, and the deep-level donor doped layer 140 is connected to the bottom of each of the trenches 101.

[0044] In this embodiment, the IGBT device further includes an N+ source 150, an insulating layer 160, and a surface metal layer 170. The N+ source 150 is disposed above the P-well 120, the insulating layer 160 is formed on the P-well 120, and the surface metal layer 170 is formed on the insulating layer 160. Metal vias 102 are formed in the surface metal layer 170 and the insulating layer 160, and a metal plug 180 is disposed within the metal via 102. The metal plug 180 connects the surface metal layer 170 and the P-well 120, and the surface metal layer 170 serves as the emitter of the IGBT. The insulating layer 160 is made of BPSG (Boro-phospho-silicate glass) and is doped with SiO2 (silicon oxide) containing B / P elements. The surface metal layer 170 is made of aluminum.

[0045] In this embodiment, a high-energy ion implantation process is used to implant deep-level donor impurities at the bottom of trench 101, forming a deep-level donor doped layer 140. At room temperature, since the energy levels of the deep-level donor doped layer 140 are sufficiently deep, it has almost no impact on device characteristics. Under certain high junction temperature extreme conditions, impurities in the deep-level donor doped layer 140 with a specific doping concentration can act as recombination centers, releasing electrons to recombine with holes and reducing the hole concentration near the bottom of trench 101.

[0046] It should be understood that IGBT turn-off limit test failures often occur under the combined effects of high electric field and high junction temperature. Excessive hole concentration leads to a larger slope of the electric field in the bulk region, resulting in an electric field spike at the bottom of trench 101. When the electric field increases to a certain extent, avalanche ionization will occur, and local overheating will further increase the avalanche intensity. On the one hand, dynamic avalanche generates hot carriers that bombard the gate oxide layer, which can lead to long-term reliability issues for the device; on the other hand, excessive hole current increases the risk of latch-up.

[0047] In this embodiment, at high junction temperature, the 140 Fermi level of the deep-level donor-doped layer drops below the impurity level. The impurities automatically ionize to generate a large number of electrons, which recombine with holes, reducing the hole concentration, suppressing the formation of electric field peaks, and avoiding device failure caused by positive cycles of electric field and junction temperature.

[0048] In one embodiment, the impurities doped in the deep-level donor-doped layer 140 include at least one of sulfur, selenium, and tellurium.

[0049] In each embodiment, the impurities doped in the deep-level donor doped layer 140, i.e., deep-level donor impurities, refer to donor impurities whose defect energy levels are more than 140 meV below the valence band bottom of the substrate material. Taking a silicon substrate as an example, the dopant can be elements such as sulfur, selenium, and tellurium. In one embodiment, the impurity doped in the deep-level donor doped layer 140 is sulfur; in another embodiment, the impurity doped in the deep-level donor doped layer 140 is selenium; and in yet another embodiment, the impurity doped in the deep-level donor doped layer 140 is tellurium. Sulfur, selenium, and tellurium can generate one or more donor energy levels in silicon. Due to their deeper energy levels, their influence on the concentration of conductive electrons, conductive holes, and conductive currents in the semiconductor is not as significant as that of shallow-level impurities. However, at specific temperatures, their recombination effect on charge carriers is stronger than that of shallow-level impurities. Therefore, these impurities can also be called recombination centers, which can effectively release electrons and holes to recombine, reducing the hole concentration near the bottom of trench 101.

[0050] In one embodiment, the trench 101 has a depth of 4-6 μm. In this embodiment, the deep-level donor doped layer 140 is located at a depth greater than 4-6 μm in the trench 101 gate IGBT device. This allows the 4-6 μm depth to be located at the bottom of the trench 101.

[0051] Example 2

[0052] In this embodiment, as Figure 2 As shown, a method for fabricating a trench 101 gate IGBT device includes:

[0053] Step 210, as follows Figure 4A As shown, deep-level donor doping is performed in the active region of the IGBT device to form a deep-level donor doped layer 140.

[0054] In this embodiment, a depth is reserved for the trench 101. Deep-level donor impurities are injected into the position below the bottom of the active region trench 101 by ultra-high energy ion implantation below the preset depth of the trench 101.

[0055] In one embodiment, the step of performing deep-level donor doping in the active region of the IGBT device to form a deep-level donor doped layer 140 includes: performing deep-level donor doping at a predetermined depth in the active region of the IGBT device to form a deep-level donor doped layer 140.

[0056] In this embodiment, the preset depth is greater than or equal to the depth of trench 101. By performing large-area deep-level donor doping at the bottom depth of the active region trench 101, recombination centers are achieved at high junction temperatures, releasing electrons, reducing hole concentration, and suppressing dynamic avalanche. The deep-level doped region can be realized by directly implanting ultra-high-energy ions at the target depth of the active region to form a deep-level donor doped layer 140.

[0057] Step 220: An N-well is fabricated on the deep-level donor-doped layer 140.

[0058] Step 230: Fabricate a P-well on the N-well.

[0059] Step 240, as follows Figure 4B As shown, trenches 101 are formed on the N-well and the P-well such that the bottom of the trenches 101 is connected to the deep-level donor doped layer 140.

[0060] Step 250: A polysilicon gate layer 130 is formed in the trench 101.

[0061] In this embodiment, after ultra-high energy ion implantation to form a deep-level donor doped layer 140, related processes are then performed to form the P-well 120, N-well 110, and trench 101 gate structure. During subsequent processes, due to thermal processes such as thermal oxidation and propulsion, the thermal budget can cause a certain degree of diffusion of deep-level impurities. Therefore, careful calculation and comprehensive consideration of the deep-level impurity implantation depth and thermal budget are necessary to prevent deep-level impurity diffusion into the P-well 120 region, which would affect the dynamic and static characteristics at high temperatures.

[0062] Example 3

[0063] In this embodiment, as Figure 3 As shown, a method for fabricating a trench gate IGBT device is provided, comprising:

[0064] Step 310: Fabricate an N-well in the active region of the IGBT device.

[0065] Step 320: Fabricate a P-well on the N-well.

[0066] Step 330, as follows Figure 5A As shown, trenches 101 are formed on the N-well and the P-well.

[0067] Step 340, as Figure 5B As shown, deep-level donor impurities are injected into the bottom of the trench 101, and the deep-level donor doped layer 140 is formed at the bottom of the trench 101.

[0068] In this embodiment, the gate structure of P-well 120, N-well 110, and trench 101 is first formed using conventional processes. Then, deep-level donor impurities are implanted at the bottom of trench 101, forming the deep-level donor doped layer 140 at the bottom of trench 101. This embodiment reduces the subsequent thermal budget, avoiding excessive propagation of deep-level impurities during the gate oxidation process. Furthermore, it reduces the energy requirements for deep-level impurity implantation, especially for deep-level impurities with high atomic numbers and large atomic particles. This process reduces the requirements for implantation equipment, resulting in higher throughput and lower costs.

[0069] In one embodiment, the step of implanting deep-level donor impurities at the bottom of the trench 101 and forming the deep-level donor doped layer 140 at the bottom of the trench 101 includes: implanting deep-level donor impurities at the bottom of the trench 101; and performing heat treatment on the IGBT device to allow the deep-level donor impurities at the bottom of each trench 101 to diffuse laterally, and the deep-level donor impurities at the bottom of each trench 101 to connect with each other to form the deep-level donor doped layer 140.

[0070] It should be understood that by injecting deep-level donor impurities into the bottom of each trench 101, deep-level donor impurities are distributed at the bottom of the trench 101. Since the lateral mobility of deep-level donor impurities is weak, in this embodiment, the IGBT device is heat-treated to improve the mobility of deep-level donor impurities, thereby allowing the deep-level donor impurities at the bottom of each trench 101 to diffuse laterally, and thus allowing the deep-level donor impurities at the bottom of each trench 101 to connect with each other to form the deep-level donor doped layer 140.

[0071] In one embodiment, the step of implanting deep-level donor impurities at the bottom of the trench 101 and forming the deep-level donor doped layer 140 at the bottom of the trench 101 includes: implanting deep-level donor impurities at the bottom of the trench 101 using a mask and forming the deep-level donor doped layer 140 at the bottom of the trench 101.

[0072] In this embodiment, a mask can be used to precisely inject deep-level donor impurities into the bottom of each trench 101.

[0073] Example 4

[0074] In one embodiment, the step of implanting deep-level donor impurities at the bottom of trench 101 using a mask to form the deep-level donor doped layer 140 at the bottom of trench 101 includes: as follows Figures 6B to 6C As shown, a deep-level donor impurity is implanted into the bottom of at least one pre-selected trench 101 using a mask, forming the deep-level donor doped layer 140 at the bottom of the trench 101.

[0075] In this embodiment, as Figure 6A As shown, after creating groove 101, as Figure 6B As shown, using a pre-set mask, deep-level impurities are selectively implanted only locally at the bottom of individual trenches 101, rather than being implanted at the bottom of all trenches 101. Figure 6C As shown, by thermally treating the IBGT device, the deep-level donor impurities at the bottom of each trench 101 are interconnected to form the deep-level donor doped layer 140. Subsequent related processes are then performed to form the complete trench 101 gate IGBT device structure. This allows for further modulation of the electric field peak during turn-off based on the potential of the polysilicon gate connection within the trench 101 and the electric field distribution under dynamic turn-off conditions, thereby reducing the dynamic avalanche breakdown strength.

[0076] Example 5

[0077] In this embodiment, an electronic device is provided, including the trench gate IGBT device described in any of the above embodiments.

[0078] In this embodiment, a deep-level donor impurity is injected at the bottom of the IGBT device trench using an ultra-high energy injection process to form a deep-level donor doped layer. At room temperature, because the energy level of the deep-level donor doped layer is sufficiently deep, it has almost no impact on the device characteristics. Under certain high junction temperature extreme conditions, the impurities in the deep-level donor doped layer with a specific doping concentration can act as recombination centers, releasing electrons to recombine with holes and reducing the hole concentration near the bottom of the trench. At high junction temperatures, the Fermi level of the deep-level donor doped layer drops below the impurity energy level, and the impurities automatically ionize to generate a large number of electrons, which recombine with holes, reducing the hole concentration, suppressing the formation of electric field peaks, and avoiding device failure caused by positive cycles of electric field and junction temperature.

[0079] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0080] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A trench-gate IGBT device, characterized by, include: N-well, P-well, polysilicon gate layer and deep-level donor doped layer; The P-well is disposed on the N-well, and the P-well and the N-well have a plurality of trenches, and the polysilicon gate layer is disposed in each of the trenches; The deep-level donor doped layer is disposed at the bottom of each trench and is connected to the bottom of each trench. The deep-level donor doped layer is formed by implanting deep-level donor impurities at the bottom of the trench using a high-energy ion implantation process. At high junction temperature, the energy level of the deep-level donor doped layer drops below the impurity energy level. Electrons and holes generated by the automatic ionization of the impurities recombine to reduce the hole concentration and suppress the formation of electric field peaks.

2. The trench-gated IGBT device of claim 1, wherein, The impurities doped in the deep-level donor doped layer include at least one of sulfur, selenium, and tellurium.

3. The trench-gated IGBT device of claim 1, wherein, The depth of the trench is 4-6 μm.

4. A method of manufacturing the trench-gate IGBT device according to any one of claims 1 to 3, characterized by, include: Deep-level donor doping is performed in the active region of the IGBT device to form a deep-level donor doped layer. An N-well is fabricated on the deep-level donor-doped layer; A P-well is fabricated on the N-well; Trenches are formed on the N-well and the P-well such that the bottom of the trench is connected to the deep-level donor doped layer; A polycrystalline silicon gate layer is formed within the trench.

5. The method of manufacturing a trench-gate IGBT device according to claim 4, wherein The step of performing deep-level donor doping in the active region of the IGBT device to form a deep-level donor doped layer includes: Deep-level donor doping is performed at a predetermined depth in the active region of the IGBT device to form a deep-level donor doped layer.

6. A method of manufacturing the trench-gate IGBT device of any one of claims 1 to 3, characterized by, include: An N-well is fabricated in the active region of the IGBT device; A P-well is fabricated on the N-well; Trenches are formed on the N-well and the P-well; Deep-level donor impurities are implanted at the bottom of the trench using a high-energy ion implantation process, forming the deep-level donor doped layer at the bottom of the trench.

7. The method of manufacturing a trench-gate IGBT device according to claim 6, wherein The step of implanting deep-level donor impurities at the bottom of the trench to form the deep-level donor doped layer at the bottom of the trench includes: Deep-level donor impurities are injected into the bottom of the trench; The IGBT device is heat-treated to allow the deep-level donor impurities at the bottom of each trench to diffuse laterally, and the deep-level donor impurities at the bottom of each trench are interconnected to form the deep-level donor doped layer.

8. The method of manufacturing a trench-gate IGBT device according to claim 6, wherein, The step of implanting deep-level donor impurities at the bottom of the trench to form the deep-level donor doped layer at the bottom of the trench includes: Deep-level donor impurities are injected into the bottom of the trench using a mask to form the deep-level donor doped layer at the bottom of the trench.

9. The manufacturing method of the trench-gate IGBT device according to claim 8, wherein The step of implanting deep-level donor impurities at the bottom of the trench using a mask to form the deep-level donor doped layer at the bottom of the trench includes: Deep-level donor impurities are implanted into the bottom of at least one pre-selected trench using a mask to form the deep-level donor doped layer at the bottom of the trench.

10. An electronic device, comprising: include: The trench gate IGBT device according to any one of claims 1-3.

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