Transfer substrate, method of manufacture, and mass transfer method of LED chips

Abstract

The application relates to a transfer substrate, which comprises a temporary substrate and a bonding layer, wherein the bonding layer is arranged on the temporary substrate, a side of the bonding layer opposite to the temporary substrate is provided with a plurality of grooves, the grooves are used for accommodating LED chips, so that the LED chips cannot be deviated in the grooves of the transfer substrate, and an elastic stamp is convenient for grabbing and transferring the LED chips, so that the yield of mass transfer of the LED chips is increased. The application further provides a preparation method of the transfer substrate and a mass transfer method of the LED chips.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a perforated transfer substrate, a method for preparing the transfer substrate, and a method for mass transfer of LED chips. Background Technology

[0002] Micro LEDs, as a next-generation display technology, offer higher photoelectric efficiency, higher brightness, higher contrast, and lower power consumption compared to traditional LEDs. With the maturation of manufacturing processes and the decrease in prices, display products based on Micro LED chips have become increasingly common in recent years, such as televisions and mobile phone screens. Because display products have a low tolerance for pixel errors, improving the yield of transferred Micro LED chips is particularly important for improving the overall yield of display products.

[0003] Currently, common transfer methods for Micro LED chips include electrostatic force, van der Waals force, magnetic force, laser selective transfer, fluid transfer, and direct transfer. Among these, van der Waals force is the most widely used method, which uses a flexible mold to selectively pick up and transfer the Micro LED chip to the substrate. However, because the Micro LED chip is tightly bonded to the substrate, it cannot be grasped by the flexible mold. Therefore, it is necessary to weaken the contact force between the Micro LED chip and the substrate to enable the flexible mold to grasp the chip. Summary of the Invention

[0004] In view of the shortcomings of the prior art, the purpose of this application is to provide a perforated transfer substrate, a method for preparing the transfer substrate, and a method for mass transfer of LED chips, which aims to solve the problem that Micro LED chips cannot be easily grasped by elastic molds due to the tight bonding between Micro LED chips and substrates.

[0005] A transfer substrate includes a temporary substrate and a bonding layer, wherein the bonding layer is disposed on the temporary substrate, and a plurality of grooves are formed on the side of the bonding layer opposite to the temporary substrate, the grooves being used to accommodate LED chips.

[0006] In summary, the transfer substrate of this application adopts a perforated transfer substrate design, which facilitates the gripping and transfer of the LED chip by the flexible mold. Furthermore, the LED chip will not shift within the grooves of the transfer substrate, making it easier for the flexible mold to grip and transfer the LED chip, thereby increasing the mass transfer yield of the LED chip.

[0007] Optionally, the bonding layer is a silicon oxide layer formed by bonding multiple silicon oxide spheres together with an adhesive, wherein the diameter of the silicon oxide spheres is 10-100 μm.

[0008] Optionally, the etching depth of the groove is less than the thickness of the LED chip.

[0009] In summary, the transfer substrate of this application adopts a perforated transfer substrate design. The silicon oxide spheres in this transfer substrate have a small contact area with the LED chip, resulting in no adhesive force on the LED chip. This facilitates the gripping and transfer of the LED chip by the elastic mold. Simultaneously, the LED chip will not shift within the grooves of the transfer substrate, further facilitating the gripping and transfer of the LED chip by the elastic mold, thereby increasing the mass transfer yield of the LED chip.

[0010] Based on the same inventive concept, this application also provides a method for preparing a transfer substrate, the method comprising: providing a temporary substrate; preparing a bonding layer on the temporary substrate; and forming a plurality of grooves on the side of the bonding layer opposite to the temporary substrate.

[0011] In summary, the transfer substrate prepared by the method of this application adopts a perforated transfer substrate design, which facilitates the gripping and transfer of the LED chip by the flexible mold. Simultaneously, the LED chip will not shift within the grooves of the transfer substrate, further enhancing the gripping and transfer capabilities of the flexible mold, thereby increasing the mass transfer yield of the LED chip.

[0012] Based on the same inventive concept, this application also provides a mass transfer method for LED chips, the mass transfer method comprising: providing an epitaxial wafer, obtaining a plurality of LED chips through the epitaxial wafer; preparing the transfer substrate; accommodating the plurality of LED chips in a groove of the transfer substrate, removing the substrate layer of the epitaxial wafer; transferring the plurality of LED chips obtained from the epitaxial wafer onto a backplane, wherein the first electrode and the second electrode of the plurality of LED chips are electrically connected to the backplane.

[0013] Optionally, providing an epitaxial wafer to obtain multiple LED chips includes: providing an epitaxial wafer comprising multiple epitaxial structures; forming multiple openings on the epitaxial wafer, each opening corresponding to one epitaxial structure, and forming the epitaxial structures into a first region and a second region; forming multiple slots on the epitaxial wafer, each slot being disposed between two adjacent epitaxial structures; forming a metal layer on a second semiconductor layer located in the first region of the epitaxial wafer; forming an insulating protective layer covering the epitaxial wafer and the metal layer; partially removing the insulating protective layer at the metal layer and the first semiconductor layer to partially expose the metal layer and the first semiconductor layer; forming a first electrode and a second electrode at the positions where the metal layer and the first semiconductor layer are exposed, wherein the first electrode is electrically connected to the metal layer and the second electrode is electrically connected to the first semiconductor layer, thereby obtaining multiple LED chips.

[0014] Optionally, multiple epitaxial structures are arranged in an array, each epitaxial structure including a substrate layer, a first semiconductor layer, a multi-quantum-well light-emitting layer, and a second semiconductor layer stacked sequentially, wherein the first semiconductor layer is disposed on the substrate layer to provide electrons; the second semiconductor layer is disposed on the multi-quantum-well light-emitting layer to provide holes; and the multi-quantum-well light-emitting layer is disposed between the first semiconductor layer and the second semiconductor layer to provide a site for recombination reactions between electrons provided by the first semiconductor layer and holes provided by the second semiconductor layer to generate photons.

[0015] Optionally, each of the openings penetrates the second semiconductor layer and the multi-quantum-well light-emitting layer, and communicates with the first semiconductor layer, wherein the area of ​​the first region is larger than the area of ​​the second region.

[0016] Optionally, each of the slots sequentially penetrates the second semiconductor layer, the multi-quantum-well light-emitting layer, and the first semiconductor layer, and the slot is formed between a second region of one of the epitaxial structures and a first region of another adjacent epitaxial structure.

[0017] Optionally, the thickness of the metal layer is 200-2000 Å, the thickness of the insulating protective layer is 1-4 μm, and the thickness of the first electrode and the second electrode is 1-4 μm.

[0018] In summary, in the mass transfer method for LED chips of this application, the LED chip is transferred using a perforated transfer substrate, and the adhesive material in the transfer substrate is etched. The silicon oxide spheres in the transfer substrate have no adhesive force on the LED chip, thereby making it easy for the elastic mold to grasp and transfer the LED chip. Furthermore, the LED chip will not shift within the grooves of the transfer substrate, further facilitating the elastic mold's grasping and transfer of the LED chip, thus increasing the mass transfer yield of the LED chip. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the structure of a transfer substrate disclosed in an embodiment of this application;

[0020] Figure 2 This is a schematic flowchart of a method for preparing a transfer substrate disclosed in an embodiment of this application;

[0021] Figure 3 for Figure 2 The diagram shows the corresponding structure formed in step S10 of the preparation method shown.

[0022] Figure 4 for Figure 2 The diagram shows the corresponding structure formed in step S20 of the preparation method shown.

[0023] Figure 5 for Figure 2 A schematic diagram of the corresponding structure formed in step S30 of the preparation method shown;

[0024] Figure 6 This is a flowchart illustrating a mass transfer method for LED chips disclosed in an embodiment of this application.

[0025] Figure 7 for Figure 5 A flowchart illustrating step S100 in the mass transfer method shown.

[0026] Figure 8 for Figure 7 A schematic diagram of the corresponding structure formed in step S110 of the mass transfer method shown;

[0027] Figure 9 for Figure 7 A schematic diagram of the corresponding structure formed in step S120 of the mass transfer method shown;

[0028] Figure 10 for Figure 7 A schematic diagram of the corresponding structure formed in step S130 of the mass transfer method shown;

[0029] Figure 11 for Figure 7 A schematic diagram of the corresponding structure formed in step S140 of the mass transfer method shown;

[0030] Figure 12 for Figure 7 A schematic diagram of the corresponding structure formed in step S150 of the mass transfer method shown;

[0031] Figure 13 for Figure 7 A schematic diagram of the corresponding structure formed in step S160 of the mass transfer method shown;

[0032] Figure 14 for Figure 6 A schematic diagram of the corresponding structure formed in step S300 of the mass transfer method shown;

[0033] Figure 15 for Figure 6 A schematic diagram of the corresponding structure formed in step S400 of the mass transfer method shown.

[0034] Explanation of reference numerals in the attached figures:

[0035] 100 - Transfer substrate;

[0036] 110 - Temporary substrate;

[0037] 120-bonding layer;

[0038] 121 - Groove;

[0039] 200 - Epitaxial wafer;

[0040] 210 - Substrate layer;

[0041] 220 - First semiconductor layer;

[0042] 230-Multiple quantum well light-emitting layer;

[0043] 240 - Second semiconductor layer;

[0044] 260-Extensional structure;

[0045] 262-Opening;

[0046] 264 - First Region;

[0047] 265 - Second Region;

[0048] 266 - Grooving;

[0049] 300-LED chip;

[0050] 310 - Metallic layer;

[0051] 320 - Insulation protective layer;

[0052] 340 - First electrode;

[0053] 350 - Second electrode;

[0054] 400-back panel;

[0055] The steps of the method for preparing the S10-S30 transfer substrate;

[0056] Steps of the mass transfer method for S100-S400 LED chips;

[0057] Step S100 in the mass transfer method of S110-S160 LED chips. Detailed Implementation

[0058] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of this application.

[0059] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.

[0060] Micro LEDs, as a next-generation display technology, offer higher photoelectric efficiency, higher brightness, higher contrast, and lower power consumption compared to traditional LEDs. With the maturation of manufacturing processes and the decrease in price, display products based on Micro LED chips have become increasingly common in recent years, such as televisions and mobile phone screens. Since display products have a low tolerance for pixel errors, improving the yield of Micro LED chip transfer is crucial for improving the overall yield of display products. Currently, common transfer methods for Micro LED chips include electrostatic force, van der Waals force, magnetic force, laser selective transfer, fluid transfer, and direct transfer. Among these, van der Waals force is currently the most widely used method, employing a flexible mold to selectively pick up and transfer the Micro LED chip to the substrate. However, because the Micro LED chip is tightly bonded to the substrate, it cannot be grasped by the flexible mold. Therefore, it is necessary to weaken the contact force between the Micro LED chip and the substrate to allow the chip to be grasped by the flexible mold. Therefore, how to solve the problem that Micro LED chips cannot be easily grasped by flexible molds due to the tight bonding between Micro LED chips and substrates is a problem that urgently needs to be solved by those skilled in the art.

[0061] Based on this, this application aims to provide a solution that can solve the above-mentioned technical problems. It can solve the problem that Micro LED chips cannot be easily grasped by elastic molds due to the tight bonding between Micro LED chips and substrates. The details will be described in subsequent embodiments.

[0062] This application provides a detailed description of the transfer substrate, the method for preparing the transfer substrate, and the method for mass transfer of LED chips.

[0063] Please see Figure 1 This is a schematic diagram of the structure of a transfer substrate disclosed in an embodiment of this application. Figure 1 As shown, this application provides a transfer substrate 100, which can adopt a perforated transfer substrate design. The transfer substrate 100 may include at least a temporary substrate 110 and a bonding layer 120. The bonding layer 120 is disposed on the temporary substrate 110, and a plurality of grooves 121 are formed on the side of the bonding layer 120 opposite to the temporary substrate 110. The grooves 121 are used to accommodate LED chips.

[0064] In this embodiment of the application, the LED chip is a micro LED chip.

[0065] In an exemplary embodiment, the depth of the groove 121 is 3-6 μm, such as 3 μm, 4 μm, 5 μm, 6 μm, or other values. The bonding layer 120 is a silicon oxide layer formed by bonding multiple silicon oxide spheres together with an adhesive, wherein the diameter of the silicon oxide spheres is 10-100 μm, such as 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, or other values.

[0066] In an exemplary embodiment, a bonding layer 120 is formed by uniformly bonding multiple silicon oxide spheres with an adhesive material, and the bonding layer 120 is deposited on one side surface of the temporary substrate 110. The pattern of the groove 121 is formed on the side of the bonding layer 120 opposite to the temporary substrate 110 by photolithography. It is understood that the etching depth of the groove 121 is less than the thickness of the LED chip.

[0067] In summary, the transfer substrate 100 of this application adopts a perforated transfer substrate design. The contact area between the silicon oxide spheres in the transfer substrate 100 and the LED chip is small, resulting in no adhesion to the LED chip 300. This facilitates the gripping and transfer of the LED chip 300 by the elastic mold. Simultaneously, the LED chip 300 will not shift within the groove 121 of the transfer substrate 100, further facilitating the gripping and transfer of the LED chip 300 by the elastic mold, thereby increasing the mass transfer yield of the LED chip 300.

[0068] Please see Figure 2 This is a schematic flowchart illustrating a method for fabricating a transfer substrate disclosed in an embodiment of this application. The method for fabricating the transfer substrate is used to prepare the aforementioned... Figure 1 The transfer substrate in the illustrated embodiment facilitates the gripping and transfer of LED chips by a flexible mold. Figure 2 As shown, the method for preparing the transfer substrate includes at least the following steps.

[0069] S10, Provide a temporary substrate 110.

[0070] For details, please refer to Figure 3 In this embodiment, the temporary substrate 110 prepares for the subsequent growth of other layer structures of the transfer substrate 100.

[0071] S20. A bonding layer 120 is prepared on the temporary substrate 110.

[0072] For details, please refer to Figure 4 In this embodiment of the application, silicon oxide spheres are deposited on one side surface of the temporary substrate 110, and the bonding layer 120 is formed by uniformly bonding multiple silicon oxide spheres with an adhesive.

[0073] In an exemplary embodiment, the diameter of the silicon oxide spheres can be 10-100 μm, such as 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 80 μm, or other values.

[0074] S30. A plurality of grooves 121 are formed on the side of the bonding layer 120 opposite to the temporary substrate 110.

[0075] For details, please refer to Figure 5 In this embodiment, the pattern of the groove 121 is formed by photolithography on the side of the bonding layer 120 opposite to the temporary base 110. The groove 121 is used to accommodate the LED chip. The depth of the groove 121 is 3-6 μm, for example, 3 μm, 4 μm, 5 μm, 6 μm, or other values. The photolithography is inductively coupled plasma (ICP) dry etching, and the etching gas for the ICP dry etching is CF4 / O2 / Ar. The etching depth of the groove 121 is 3-6 μm, for example, 3 μm, 4 μm, 5 μm, 6 μm, or other values. It is understood that the etching depth of the groove 121 is less than the thickness of the LED chip.

[0076] In summary, the transfer substrate 100 prepared by the method of this application adopts a perforated transfer substrate design. The contact area between the silicon oxide spheres in the transfer substrate 100 and the LED chip is small, resulting in no adhesion to the LED chip 300. This facilitates the gripping and transfer of the LED chip 300 by the elastic mold. Simultaneously, the LED chip 300 will not shift within the grooves 121 of the transfer substrate 100, further facilitating the gripping and transfer of the LED chip 300 by the elastic mold, thereby increasing the mass transfer yield of the LED chip 300.

[0077] Please see Figure 6 This is a flowchart illustrating a mass transfer method for LED chips disclosed in an embodiment of this application. In this embodiment, the mass transfer method is used to mass transfer LED chips to increase the yield of LED chip mass transfer. Please refer to [further details omitted]. Figures 7 to 15 As shown in the embodiments of this application, the mass transfer method for the LED chip may include at least the following steps.

[0078] S100, Provide an epitaxial wafer 200, and obtain a plurality of LED chips 300 through the epitaxial wafer 200.

[0079] Please see Figure 7 In this embodiment, step S100 includes at least the following steps.

[0080] S110. Provide an epitaxial wafer 200 including a plurality of epitaxial structures 260, and form a plurality of openings 262 on the epitaxial wafer 200, each opening 262 corresponding to one of the epitaxial structures 260, and form the epitaxial structures into a first region and a second region.

[0081] Specifically, in the embodiments of this application, such as Figure 8 As shown, the epitaxial wafer 200 includes a substrate layer 210, a first semiconductor layer 220, a multi-quantum-well light-emitting layer 230, and a second semiconductor layer 240, which are sequentially stacked. The first semiconductor layer 220 is disposed on the substrate layer 210 and provides electrons. The second semiconductor layer 240 is disposed on the multi-quantum-well light-emitting layer 230 and provides holes, which recombine with the electrons provided by the first semiconductor layer 220 to generate photons. The multi-quantum-well light-emitting layer 230 is disposed between the first semiconductor layer 220 and the second semiconductor layer 240, providing a space for the electrons provided by the first semiconductor layer 220 and the holes provided by the second semiconductor layer 240 to recombine and generate photons.

[0082] In this embodiment, the first semiconductor layer 220 is an N-type semiconductor material, such as N-type gallium nitride (GaN). The second semiconductor layer 240 is a P-type semiconductor material, such as P-type gallium nitride (GaN).

[0083] In an exemplary embodiment, the epitaxial wafer 200 includes a plurality of epitaxial structures 260 arranged in an array. Each epitaxial structure 260 also includes a substrate layer 210, a first semiconductor layer 220, a multi-quantum well light-emitting layer 230, and a second semiconductor layer 240 stacked sequentially. The epitaxial wafer 200 forms a plurality of openings 262, each opening 262 corresponding to one of the epitaxial structures 260. In this embodiment, the opening 262 penetrates the second semiconductor layer 240 and the multi-quantum well light-emitting layer 230 up to the first semiconductor layer 220, that is, the opening 262 communicates with the first semiconductor layer 220 and forms a groove with the first semiconductor layer 220 as the bottom, thereby forming a first region 264 and a second region 265 of the epitaxial structure 260, wherein the area of ​​the first region 264 is larger than the area of ​​the second region 265.

[0084] In an exemplary embodiment, a plurality of openings 262 on the epitaxial wafer 200 can be formed by photolithography, and the plurality of openings 262 on the epitaxial wafer 200 form a first pattern. In this embodiment, the first pattern can be a MESA (step-alteration) pattern. The photolithography is dry etching, and the etching gas for the dry etching is BCl3 / Cl2.

[0085] S120. A plurality of slots 266 are formed on the epitaxial wafer 200, and each slot 266 is disposed between two adjacent epitaxial structures 260.

[0086] Specifically, in the embodiments of this application, such as Figure 9 As shown, a plurality of slots 266 are formed on the epitaxial wafer 200, and each slot 266 is disposed between two adjacent epitaxial structures 260. The slot 266 sequentially penetrates the second semiconductor layer 240, the multi-quantum-well light-emitting layer 230, and the first semiconductor layer 220. Alternatively, the slot 266 can be understood as being formed between a second region 265 of one epitaxial structure 260 and a first region 264 of an adjacent epitaxial structure 260.

[0087] In an exemplary embodiment, a plurality of slots 266 on the epitaxial wafer 200 can be formed by photolithography, and the plurality of slots 266 on the epitaxial wafer 200 form a second pattern. For example, by using a dry etching machine to etch through the second semiconductor layer 240, the multi-quantum-well light-emitting layer 230, and the first semiconductor layer 220 to the substrate layer 210, that is, the slots 266 communicate with the substrate layer 210. In this embodiment, the second pattern can be an ISO (gallium nitride deep etching) pattern. The photolithography is dry etching, and the etching gas for dry etching is BCl3 / Cl2.

[0088] In the embodiments of this application, the etching depth is 4-8 μm, such as 4 μm, 5 μm, 6 μm, 7 μm, or other values.

[0089] S130, a metal layer 310 is formed on the second semiconductor layer 240 located in the first region 264 of the epitaxial wafer 200.

[0090] Specifically, in exemplary embodiments, such as Figure 10 As shown, the opening 262 extends through the second semiconductor layer 240 and the multi-quantum-well light-emitting layer 230 to the first semiconductor layer 220, thereby forming a first region 264 and a second region 265 in the epitaxial structure 260. An indium tin oxide (ITO) layer 310 is formed on the second semiconductor layer 240 located in the first region 264 in the epitaxial wafer 200. At this time, the metal layer 310 is electrically connected to the second semiconductor layer 240.

[0091] In an exemplary embodiment, the thickness of the metal layer 310 may be 200-2000 Å, such as 200 Å, 300 Å, 400 Å, 500 Å, 800 Å, 1500 Å, 1800 Å, or other values. The metal layer 310 may be made of indium tin oxide (ITO).

[0092] S140, forming an insulating protective layer 320 covering the epitaxial wafer 200 and the metal layer 310.

[0093] Specifically, in the embodiments of this application, such as Figure 11 As shown, the insulating protective layer 320 may be a stack of silicon oxide and silicon nitride. For example, the insulating protective layer 320 may also be a distributed Bragg reflector (DBR). Exemplarily, the insulating protective layer 320 is formed on the epitaxial wafer 200 and the metal layer 310 by vapor deposition of a stack of silicon oxide and silicon nitride (DBR).

[0094] In an exemplary embodiment, the thickness of the insulating protective layer 320 may be 1-4 μm, such as 1 μm, 1.5 μm, 2 μm, 3.5 μm, 4 μm, or other values.

[0095] S150, partially remove the insulating protective layer 320 at the metal layer 310 and the first semiconductor layer 220 to partially expose the metal layer 310 and the first semiconductor layer 220.

[0096] Specifically, in the embodiments of this application, such as Figure 12 As shown, removing the insulating protective layer 320 partially means removing the insulating protective layer 320 at the metal layer 310 and the first semiconductor layer 220 to partially expose the metal layer 310 and the first semiconductor layer 220.

[0097] In an exemplary embodiment, the insulating protective layer 320 can be partially removed using a dry etching machine by means of, but not limited to, dry etching. The etching gas used in the dry etching can be CF4 / O2 / Ar, and the etching depth needs to penetrate the insulating protective layer 320.

[0098] S160. A first electrode 340 and a second electrode 350 are formed at the positions where the metal layer 310 and the first semiconductor layer 220 are exposed, respectively. The first electrode 340 is electrically connected to the metal layer 310, and the second electrode 350 is electrically connected to the first semiconductor layer 220, so as to obtain a plurality of LED chips 300.

[0099] Specifically, in the embodiments of this application, such as Figure 13As shown, after partially removing the insulating protective layer 320 from the metal layer 310 and the first semiconductor layer 220, the metal layer 310 and the first semiconductor layer 220 are partially exposed by the insulating protective layer 320. A first electrode 340 and a second electrode 350 are then formed at the exposed locations. The first electrode is electrically connected to the metal layer, and the second electrode is electrically connected to the first semiconductor layer and exposed outside the insulating protective layer 320. For example, the first and second electrodes in this step serve as bonding metal layers, resulting in a complete micro-LED chip 300.

[0100] In an exemplary embodiment, negative photoresist photolithography electrode patterns can be applied to the insulating protective layer 320, and the electrode patterns can be deposited using an evaporation machine. After removing the photoresist through blue film stripping, the first electrode and the second electrode are obtained to fabricate multiple LED chips 300. The thickness of the first electrode 340 and the second electrode 350 can be 1-4 μm, for example, 1 μm, 2 μm, 3 μm, 4 μm, or other values.

[0101] S200, Preparation of transfer substrate 100.

[0102] Please see Figures 2 to 5 As shown, in this embodiment, step S200 includes at least the following steps.

[0103] S10, Provide a temporary substrate 110.

[0104] For details, please refer to Figure 3 In this embodiment, the temporary substrate 110 prepares for the subsequent growth of other layer structures of the transfer substrate 100.

[0105] S20. A bonding layer 120 is prepared on the temporary substrate 110.

[0106] For details, please refer to Figure 4 In this embodiment of the application, silicon oxide spheres are deposited on one side surface of the temporary substrate 110, and the bonding layer 120 is formed by uniformly bonding multiple silicon oxide spheres with an adhesive.

[0107] In an exemplary embodiment, the diameter of the silicon oxide spheres can be 10-100 μm, such as 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 80 μm, or other values.

[0108] S30. A plurality of grooves 121 are formed on the side of the bonding layer 120 opposite to the temporary substrate 110.

[0109] For details, please refer to Figure 5In this embodiment, the pattern of the groove 121 is formed by photolithography on the side of the bonding layer 120 opposite to the temporary base 110. The groove 121 is used to accommodate the LED chip. The depth of the groove 121 is 3-6 μm, for example, 3 μm, 4 μm, 5 μm, 6 μm, or other values. The photolithography is inductively coupled plasma (ICP) dry etching, and the etching gas for the ICP dry etching is CF4 / O2 / Ar. The etching depth of the groove 121 is 3-6 μm, for example, 3 μm, 4 μm, 5 μm, 6 μm, or other values. It is understood that the etching depth of the groove 121 is less than the thickness of the LED chip.

[0110] S300: The plurality of LED chips 300 are placed in the groove 121 of the transfer substrate 100, and the substrate layer 210 is removed.

[0111] Specifically, in the embodiments of this application, such as Figure 14 As shown, the substrate layer 210 is ground and polished, and a bonding agent is applied to the first electrode 340 and the second electrode 350 of the LED chip 300. The LED chip 300 with the bonding agent attached is placed in the corresponding groove 121 of the transfer substrate 100. Then, the first electrode 340 and the second electrode 350 of the LED chip 300 are bonded to the bottom of the groove 121, and the substrate layer 210 is removed by laser lift-off. The dimensions of the grooves 121 are all larger than the dimensions of the first electrode 340 and the second electrode 350.

[0112] S400, the LED chip 300 obtained from the epitaxial wafer 200 is transferred to the back plate 400, and the first electrode 340 and the second electrode 350 of the plurality of LED chips 300 are electrically connected to the back plate 400.

[0113] Specifically, in the embodiments of this application, such as Figure 15 As shown, the LED chip 300 and the adhesive material in the transfer substrate 100 are etched, and the LED chip 300 is transferred to the back plate 400 by an elastic mold. The first electrode 340 and the second electrode 350 of the plurality of LED chips 300 are electrically connected to the back plate 400.

[0114] In an exemplary embodiment, the etching method is dry etching, and the etching gas for dry etching is CF4 / O2 / Ar.

[0115] In summary, in the mass transfer method for LED chips of this application, the LED chip 300 is transferred using a perforated transfer substrate 100, and the adhesive material in the transfer substrate 100 is etched. The silicon oxide spheres in the transfer substrate 100 have no adhesive force on the LED chip 300, thereby making it easy for the elastic mold to grasp and transfer the LED chip 300. Furthermore, the LED chip 300 will not shift within the grooves 121 of the transfer substrate 100, further facilitating the grasp and transfer of the LED chip 300 by the elastic mold, thus increasing the mass transfer yield of the LED chip 300.

[0116] It should be understood that the application of this application is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A method for mass transfer of LED chips, characterized in that, The mass transfer method includes: An epitaxial wafer is provided, through which multiple LED chips are obtained; A transfer substrate is prepared, which adopts a hole-punch design and includes a temporary substrate and a bonding layer. The bonding layer is disposed on the temporary substrate. Multiple grooves are formed on the side of the bonding layer opposite to the temporary substrate. The grooves are used to accommodate LED chips. The diameter of the grooves is larger than the size of the LED chips, so that the LED chips are spaced apart from the sidewalls of the grooves. The bonding layer is a silicon oxide layer formed by bonding multiple silicon oxide spheres with adhesive material. The diameter of the silicon oxide spheres is 10-100 micrometers. Multiple LED chips are housed in the groove of the transfer substrate, the substrate layer of the epitaxial wafer is removed, the adhesive material in the transfer substrate is etched, and the silicon oxide spheres in the transfer substrate have no adhesive force on the LED chips, making it easy for the elastic mold to grasp and transfer the LED chips. Multiple LED chips are transferred onto a backplane, and the first and second electrodes of the multiple LED chips are electrically connected to the backplane.

2. The mass transfer method for LED chips as described in claim 1, characterized in that, The provision of an epitaxial wafer, through which multiple LED chips are obtained, includes: An epitaxial wafer comprising multiple epitaxial structures is provided. Each epitaxial structure includes a substrate layer, a first semiconductor layer, a multi-quantum-well light-emitting layer, and a second semiconductor layer stacked sequentially. Multiple openings are formed on the epitaxial wafer. Each opening penetrates the second semiconductor layer and the multi-quantum-well light-emitting layer and communicates with the first semiconductor layer. Each opening corresponds to one epitaxial structure, and the epitaxial structure forms a first region and a second region. Multiple slots are formed on the epitaxial wafer, and each slot is disposed between two adjacent epitaxial structures; A metal layer is formed on the second semiconductor layer located in the first region of the epitaxial wafer; An insulating protective layer is formed covering the epitaxial wafer and the metal layer; Partially remove the insulating protective layer at the metal layer and the first semiconductor layer to partially expose the metal layer and the first semiconductor layer; The first electrode and the second electrode are formed at the locations where the metal layer and the first semiconductor layer are exposed, respectively. The first electrode is electrically connected to the metal layer, and the second electrode is electrically connected to the first semiconductor layer, so as to obtain a plurality of LED chips.

3. The mass transfer method for LED chips as described in claim 2, characterized in that, Multiple epitaxial structures are arranged in an array. The first semiconductor layer is disposed on the substrate layer to provide electrons. The second semiconductor layer is disposed on the multi-quantum-well light-emitting layer to provide holes. The multi-quantum-well light-emitting layer is disposed between the first semiconductor layer and the second semiconductor layer to provide a space for the electrons provided by the first semiconductor layer and the holes provided by the second semiconductor layer to recombine and generate photons.

4. The mass transfer method for LED chips as described in claim 3, characterized in that, The area of ​​the first region is larger than the area of ​​the second region.

5. The mass transfer method for LED chips as described in claim 4, characterized in that, Each of the slots sequentially penetrates the second semiconductor layer, the multi-quantum-well light-emitting layer, and the first semiconductor layer, and the slot is formed between a second region of one of the epitaxial structures and a first region of another adjacent epitaxial structure.

6. The mass transfer method for LED chips as described in claim 1, characterized in that, The etching depth of the groove is less than the thickness of the LED chip.

7. The mass transfer method for LED chips as described in any one of claims 2-5, characterized in that, The thickness of the metal layer is 200-2000 angstroms, the thickness of the insulating protective layer is 1-4 micrometers, and the thickness of the first electrode and the second electrode is 1-4 micrometers.

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