A hot-plug protection circuit for DC power supplies
Patent Information
- Application Number
- CN202310084140.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-01-16
- Publication Date
- 2026-09-01
- Estimated Expiration
- 2043-01-16
AI Technical Summary
但是TVS管反向击穿后电流很大,可能导致设备电源超载,造成设备电源短路保护,另外TVS无法实现大容量储能电容的充电引起的浪涌电流抑制;PTC电阻被串接在输入电源和被保护负载之间,当电流过大时,PTC电阻发热使得阻值增大,从而减小电流,但是PTC电阻反应速度慢(秒级),对热插拔的浪涌电流的抑制能力有限;多种分立式元器件组合设计方案,一般使用TVS管和PCT电阻,配合控制电源线串接MOS管通断延时来消除热插拔时电源振荡,但是这种方案没有能解决TVS管和PCT电阻等分立器件的缺点,也一般不具备热插拔芯片的上、下电使能等功能
[0048]由于采用了上述技术方案,本发明具有如下的优点:本发明采用通用的分立式元器件设计,电路结构简单,成本低,使用灵活,可完全替代国外同类型的热插拔芯片方案。
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Figure CN116054080B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of hot-swap technology, and in particular to a hot-swap protection circuit for DC power supplies. Background Technology
[0002] Hot-swapping, or hot-swap, allows users to insert or remove new or replacement boards, modules, and other components without shutting down the system or cutting off power. This improves system reliability, ease of maintenance, and redundancy. Hot-swapping technology is a key technology for achieving continuous power supply operation and uninterrupted equipment maintenance.
[0003] In electronic communication systems, equipment often employs a standard rack-mount server architecture, offering excellent scalability and redundancy, supporting the expansion and replacement of standard boards with different functions. In military, communications, and financial fields, rack-mount servers are generally designed for continuous operation without power interruption; upgrading, expanding, or maintaining equipment requires the hot-plugging or removal of standard boards. If the power supply of these standard boards lacks hot-swap protection, two problems arise: First, during hot-plugging, the mechanical contacts of the connector may bounce, causing power oscillations. This can lead to power drops affecting the normal operation of other boards, potentially causing system restarts, and even connector arcing, resulting in a fire. Second, the charging effect of the large-capacity energy storage capacitors on the inserted boards can cause significant surge currents, which may burn out power fuses and electronic components.
[0004] Early hot-swapping technology relied primarily on capacitors and inductors to suppress instantaneous surges, but this could cause significant power supply damage, leading to system resets and restarts. Later, with advancements in semiconductor technology, hot-swapping protection was achieved mainly through discrete components such as transistors. In contemporary times, with the maturity of integrated circuit technology, new hot-swapping chips have emerged, gradually enabling precise control of power supply voltage and current. Therefore, there are currently two main technical solutions for implementing power supply hot-swapping: one involves using a hot-swapping protection chip and connecting an external sampling resistor and MOSFET in series between the input power supply and the protected load; the other involves using discrete components to build a circuit to achieve the power supply hot-swapping function.
[0005] The first approach uses a hot-swap protection chip to achieve overvoltage protection by acquiring voltage through an input voltage detection pin, and overcurrent protection by detecting the voltage across a sampling resistor. Additionally, the EN enable pin controls the power supply's on / off state, and it can precisely control the on / off state of external MOSFETs, thus achieving precise control of power current and voltage during hot-swapping. However, hot-swap chips are currently not entirely domestically produced, failing to meet the requirement for complete domestic production of some specialized and critical equipment.
[0006] The second approach, which implements the hot-swappable power supply function, mainly uses discrete components such as TVS diodes, PTC resistors, and combinations of various discrete components. The TVS diode is placed between the positive and negative terminals of the input power supply to the protected load. When the input voltage momentarily exceeds the reverse breakdown voltage of the TVS, it clamps the input voltage, absorbing the spike energy of the input power supply to prevent higher voltage damage to the protected load. However, TVS diodes draw a large current after reverse breakdown, which may overload the power supply and cause short circuit protection. In addition, TVS diodes cannot suppress surge current caused by charging large-capacity energy storage capacitors. PTC resistors are connected in series between the input power supply and the protected load. When the current is too large, the PTC resistor heats up and increases its resistance, thereby reducing the current. However, PTC resistors have a slow response time (seconds) and limited ability to suppress surge current during hot-plugging. A combination design of various discrete components generally uses TVS diodes and PCT resistors, along with a MOSFET connected in series with the control power line to delay the on / off state of the MOSFET to eliminate power oscillation during hot-plugging. However, this solution does not solve the shortcomings of discrete components such as TVS diodes and PCT resistors, and generally does not have the power-on and power-off enable functions for hot-plugged chips. Summary of the Invention
[0007] To address the shortcomings of implementing hot-swappable power supply functionality using discrete components, this invention provides a hot-swappable protection circuit for DC power supplies to solve the aforementioned technical problems.
[0008] This invention discloses a hot-swap protection circuit for a DC power supply, which includes an overvoltage protection unit, an enable control unit, an overcurrent protection unit, a MOSFET control unit, and a PMOSFET and a sampling resistor RS connected in series with the positive terminal of the power supply.
[0009] The two ends of the sampling resistor RS are respectively connected to the input terminal of the overcurrent protection unit;
[0010] The overcurrent protection unit is used to turn off the PMOSFET through the MOSFET control unit when its input current exceeds a set current threshold, thereby cutting off the positive power supply of the board.
[0011] The overvoltage protection unit is used to control the PMOSFET to disconnect the positive terminal of the board power supply when its input voltage is greater than a set threshold, thereby achieving overvoltage protection.
[0012] The enable control unit is used to implement positive logic control of the PMOSFET. When the signal EN is high or floating, the MOSFET control unit turns on the PMOSFET to connect the positive terminal of the board power supply; when the signal EN is low, the MOSFET control unit turns off the PMOSFET to disconnect the positive terminal of the board power supply.
[0013] Furthermore, the overvoltage protection unit generates an overvoltage protection signal through a series-connected resistor R7 and a Zener diode D2, which in turn controls the PMOSFET to disconnect the positive terminal of the board power supply to achieve overvoltage protection. Replacing the Zener diode with different reverse breakdown voltages can adjust the overvoltage protection threshold.
[0014] The overvoltage protection unit also includes: capacitor C4, Zener diode D2, PMOS transistor Q5, resistors R7, R11, R12 and NMOS transistor Q6;
[0015] One end of resistor R7 is connected to the positive terminal of the power supply, and the other end of resistor R7 is connected to the positive terminal of Zener diode D2 and the gate of PMOS transistor Q5. The positive terminal of Zener diode D2 is connected to the negative terminal of the power supply, the source of PMOS transistor Q5 is connected to the positive terminal of the power supply, and the drain of PMOS transistor Q5 is connected to resistors R11 and R12 connected in series. The common terminal of resistors R11 and R12 is connected to the gate of open-drain output NMOS transistor Q6.
[0016] Furthermore, the overcurrent protection unit is implemented by an instrumentation amplifier circuit consisting of three general-purpose amplifiers and an open-drain output circuit. The differential input of the instrumentation amplifier circuit is the voltage across the sampling resistor RS, Vsense = Vsense_p - Vsense_n, and the output is Vo = A × Vsense = A × Rs × I. When Vo is greater than the set voltage threshold of the open-drain output circuit, i.e., when I is greater than the set threshold, the PMOSFET will be quickly turned off, thereby cutting off the positive terminal of the board power supply. Here, Vsense_p is the voltage value at the high voltage end of the sampling resistor RS, Vsense_n is the voltage value at the low voltage end of the sampling resistor RS, A is the discharge factor of the instrumentation amplifier circuit, I is the current flowing through RS, and Vsense is the input signal of the overcurrent protection unit.
[0017] The overcurrent protection unit includes resistors R13, R14, R16, R19, and R21, general-purpose operational amplifiers U1 to U3, and an NMOS transistor Q7;
[0018] The high-voltage terminal Vsense_p of the sampling resistor RS is connected to resistors R16 and R13. The common terminal of resistors R16 and R13 is connected to the positive input terminal of the instrumentation amplifier circuit composed of general-purpose operational amplifiers U1 to U3. The low-voltage terminal Vsense_n of the sampling resistor RS is connected to resistors R19 and R21. The common terminal of resistors R19 and R21 is connected to the negative input terminal of the instrumentation amplifier circuit. The output terminal of the instrumentation amplifier circuit is connected to the gate of the open-drain output NMOS transistor Q7 through resistor R14.
[0019] Furthermore, the internal RC delay circuit of the MOSFET control unit is used to control the PMOSFET of the positive power supply to be turned off for a short time during the board insertion process and then slowly turned on again.
[0020] When only the enable shutdown signal, overvoltage protection signal, or overcurrent protection signal is active, the internal capacitor discharge circuit of the MOSFET control unit is used to quickly release the charge of the capacitor, thereby quickly turning off the PMOSFET and cutting off the positive power supply of the board.
[0021] The MOSFET control unit includes resistors R3, R4, R5, and R10, PMOS transistor Q4, and capacitor C1;
[0022] One end of resistor R5 serves as the input terminal of the MOSFET control unit. This input terminal is connected to the open-drain output circuit lines and signal lines of NMOS transistors Q3, Q6, and Q7. It is connected to the positive terminal of the power supply through resistors R5 and R3. The common terminal of resistors R5 and R3 is connected to the gate of PMOS transistor Q4. The source of PMOS transistor Q4 is connected to the positive terminal of the power supply through resistor R4. The drain of PMOS transistor Q4 is connected to the common terminal of capacitor C1 and resistor R10, which are connected in series between the positive and negative terminals of the power supply. This common terminal is also connected to the gate of the positive power supply switch Q1. The source of the positive power supply switch Q1 is connected to the low voltage terminal of the sampling resistor RS. The drain of the positive power supply switch Q1 is connected to the positive terminal of the load. Zener diode D1 is connected in parallel with the source and gate of the positive power supply switch Q1.
[0023] The enable control unit includes resistors R1, R2, R6, R8, and R9, and NMOS transistors Q2 and Q3;
[0024] Resistors R1 and R8 are connected in series between the positive and negative terminals of the power supply. The common terminal of resistors R1 and R8 is connected to the gate of NMOS transistor Q2. The EN signal is connected to the gate of NMOS transistor Q2 through resistor R6. The source of NMOS transistor Q2 is connected to the negative terminal of the power supply. The drain of NMOS transistor Q2 is connected to the common terminal of resistors R2 and R9, which are connected in series between the positive and negative terminals of the power supply. The common terminal of resistors R2 and R9 is also connected to the gate of open-drain output NMOS transistor Q3.
[0025] Furthermore, the output terminals of the overvoltage protection unit, the enable control unit, and the overcurrent protection unit are all connected to the input terminal of the MOSFET control unit, and the output terminal of the MOSFET control unit is connected to the gate of the PMOSFET.
[0026] The input terminals of the overvoltage protection unit, the enable control unit, and the overcurrent protection unit are all connected to the positive terminal of the power supply. The high voltage terminal of the sampling resistor RS is connected to the positive terminal of the power supply, and both the high voltage terminal and the low voltage terminal of the sampling resistor RS are connected to the input terminal of the overcurrent protection unit.
[0027] The input signals for the enable control unit include the signal EN.
[0028] The present invention also discloses a hot-swap protection circuit for a DC power supply, which includes an overvoltage protection unit, an enable control unit, an overcurrent protection unit, a MOSFET control unit, and an NMOSFET and a sampling resistor RS connected in series with the negative terminal of the power supply.
[0029] The two ends of the sampling resistor RS are respectively connected to the input terminal of the overcurrent protection unit;
[0030] The overcurrent protection unit is used to turn off the NMOSFET through the MOSFET control unit when its input current exceeds a set current threshold, thereby cutting off the negative terminal of the board power supply.
[0031] The overvoltage protection unit is used to control the NMOSFET to disconnect the negative terminal of the board power supply when its input voltage is greater than a set threshold, thereby achieving overvoltage protection.
[0032] The enable control unit is used to implement positive logic control of the NMOSFET. When the signal EN is high or floating, the MOSFET control unit turns on the NMOSFET to connect the negative terminal of the board power supply; when the signal EN is low, the MOSFET control unit turns off the NMOSFET to disconnect the negative terminal of the board power supply.
[0033] Furthermore, the overvoltage protection unit generates an overvoltage protection signal through a resistor-in-series Zener diode circuit, which in turn controls the NMOSFET to disconnect the negative terminal of the board power supply to achieve overvoltage protection. Replacing the Zener diode with different reverse breakdown voltages can adjust the overvoltage protection threshold.
[0034] The overvoltage protection unit also includes: capacitor C4, Zener diode D4, PMOS transistor D4, resistors R8, R12, R15 and NMOS transistor Q6;
[0035] One end of resistor R8 is connected to the positive terminal of the power supply, and the other end of resistor R8 is connected to the positive terminal of Zener diode D4 and the gate of PMOS transistor Q4. The positive terminal of Zener diode D4 is connected to the negative terminal of the power supply, the source of PMOS transistor Q4 is connected to the positive terminal of the power supply, and the drain of PMOS transistor Q4 is connected to resistors R12 and R15 connected in series. The common terminal of resistors R12 and R15 is connected to the gate of open-drain output NMOS transistor Q6.
[0036] Furthermore, the overcurrent protection unit is implemented by a differential circuit and an open-drain output circuit. The differential input of the differential circuit is the voltage across the sampling resistor RS, Vsense = Vsense_p - Vsense_n, and the output is Vo = A × Vsense = A × Rs × I. When Vo is greater than the set voltage threshold of the open-drain output circuit, i.e., when I is greater than the set threshold, the MOSFET control unit will quickly turn off the NMOSFET, thereby cutting off the negative terminal of the board power supply. Here, Vsense_p is the input power supply voltage, Vsense_n is the voltage of the power supply after passing through the sampling resistor RS, A is the discharge factor of the instrumentation amplifier circuit, and I is the current value flowing through RS.
[0037] The overcurrent protection unit includes resistors R11, R13, R14, and R16, a general-purpose operational amplifier U1, and an NMOS transistor Q5;
[0038] The high-voltage terminal Vsense_p of the sampling resistor RS is connected to resistors R13 and R11. The common terminal of resistors R13 and R11 is connected to the positive input terminal of the difference circuit formed by the general-purpose operational amplifier U1. The low-voltage terminal Vsense_n of the sampling resistor RS is connected to the negative input terminal of the difference circuit through resistor R14. Resistor R16 is the negative feedback resistor of the operational amplifier. The output terminal of the difference circuit is connected to the gate of the open-drain output NMOS transistor Q5.
[0039] Furthermore, during the board insertion process, the RC delay circuit inside the MOSFET control unit briefly disconnects the NMOSFET controlling the negative terminal of the power supply, and then slowly turns the NMOSFET back on.
[0040] When the enable / disable signal, overvoltage protection signal, and overcurrent protection signal are valid, the internal capacitor discharge circuit of the MOSFET control unit is used to quickly release the charge of the capacitor, thereby quickly turning off the NMOSFET and cutting off the negative terminal of the board power supply.
[0041] The MOSFET control unit includes resistors R3, R4, and R5, Zener diodes D1 and D2, PMOS transistor Q2, capacitor C1, and power supply negative switch Q7.
[0042] The common terminal of the series-connected resistor R3 and Zener diode D1 serves as the input terminal of the MOSFET control unit. This input terminal is connected to the open-drain output circuit lines and signal lines of NMOS transistors Q3, Q6, and Q5, and to the gate of PMOS transistor Q2. The gate of PMOS transistor Q2 is connected to the positive terminal of the power supply through resistor R3. Zener diode D1 is connected in parallel between the gate and drain of PMOS transistor Q2. The source of PMOS transistor Q2 is connected in series through resistor R5 to the common terminal of resistor R4 and capacitor C1 connected between the positive and negative terminals of the power supply. This common terminal is connected to the gate of the negative power supply switch Q7. The source of the negative power supply switch Q7 is connected to the sampling resistor RS. The drain of the negative power supply switch Q7 is connected to the negative terminal of the load. Zener diode D2 is connected in parallel with the gate and source of the negative power supply switch Q7.
[0043] The enable control unit includes resistors R1, R2, R6, R9, and R10, and NMOS transistors Q1 and Q3;
[0044] Resistors R1 and R9 are connected in series between the positive and negative terminals of the power supply. The common terminal of resistors R1 and R9 is connected to the gate of NMOS transistor Q1. The EN signal is connected to the gate of NMOS transistor Q1 through resistor R6. The source of NMOS transistor Q1 is connected to the negative terminal of the power supply. The drain of NMOS transistor Q1 is connected to the common terminal of resistors R2 and R10, which are connected in series between the positive and negative terminals of the power supply. The common terminal of resistors R2 and R10 is also connected to the gate of open-drain output NMOS transistor Q3.
[0045] Furthermore, the output terminals of the overvoltage protection unit, the enable control unit, and the overcurrent protection unit are all connected to the input terminal of the MOSFET control unit, and the output terminal of the MOSFET control unit is connected to the gate of the NMOSFET.
[0046] The input terminals of the overvoltage protection unit, the enable control unit, and the overcurrent protection unit are all connected to the power ground. The low voltage terminal of the sampling resistor RS is connected to the negative terminal of the power supply, and both the high voltage terminal and the low voltage terminal of the sampling resistor RS are connected to the input terminal of the overcurrent protection unit.
[0047] The input signals for the enable control unit include the signal EN.
[0048] Due to the adoption of the above technical solution, the present invention has the following advantages: The present invention adopts a general discrete component design, the circuit structure is simple, the cost is low, the use is flexible, and it can completely replace the foreign hot-swappable chip solution of the same type. Attached Figure Description
[0049] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments recorded in the embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings.
[0050] Figure 1 This is a schematic diagram of a hot-plug protection circuit applied to the positive terminal of a DC power supply according to an embodiment of the present invention;
[0051] Figure 2 This is a schematic diagram of a hot-plug protection circuit applied to the negative terminal of a DC power supply according to an embodiment of the present invention;
[0052] Figure 3 for Figure 1 A schematic diagram of the specific circuit configuration;
[0053] Figure 4 for Figure 2 A schematic diagram of the specific circuit configuration. Detailed Implementation
[0054] The present invention will be further described in conjunction with the accompanying drawings and embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. All other embodiments obtained by those skilled in the art should fall within the protection scope of the present invention.
[0055] Example 1:
[0056] See Figure 1 The present invention provides a hot-swap protection circuit for a DC power supply, which includes an overvoltage protection unit, an enable control unit, an overcurrent protection unit, a MOSFET control unit, and a PMOSFET and a sampling resistor RS connected in series with the positive terminal of the power supply.
[0057] The two ends of the sampling resistor RS are connected to the input terminal of the overcurrent protection unit;
[0058] The overcurrent protection unit is used to turn off the PMOSFET through the MOSFET control unit when its input current exceeds the set current threshold, thereby cutting off the positive power supply of the board.
[0059] The overvoltage protection unit is used to control the PMOSFET to disconnect the positive terminal of the board power supply when its input voltage exceeds a set threshold, thereby achieving overvoltage protection.
[0060] The enable control unit is used to implement the positive logic control of the PMOSFET. When the signal EN is high or floating, the MOSFET control unit turns on the PMOSFET to connect the positive power supply of the board; when the signal EN is low, the MOSFET control unit turns off the PMOSFET to disconnect the positive power supply of the board.
[0061] In this embodiment, the overvoltage protection unit generates an overvoltage protection signal through a series-connected resistor R7 and a Zener diode D2, which in turn controls the PMOSFET to disconnect the positive terminal of the board power supply to achieve overvoltage protection. Replacing the Zener diode with different reverse breakdown voltages can adjust the overvoltage protection threshold.
[0062] The overvoltage protection unit also includes: capacitor C4, Zener diode D2, PMOS transistor Q5, resistors R7, R11, R12 and NMOS transistor Q6;
[0063] One end of resistor R7 is connected to the positive terminal of the power supply, and the other end of resistor R7 is connected to the positive terminal of Zener diode D2 and the gate of PMOS transistor Q5. The positive terminal of Zener diode D2 is connected to the negative terminal of the power supply, the source of PMOS transistor Q5 is connected to the positive terminal of the power supply, and the drain of PMOS transistor Q5 is connected to resistors R11 and R12 connected in series. The common terminal of resistors R11 and R12 is connected to the gate of open-drain output NMOS transistor Q6.
[0064] In this embodiment, the overcurrent protection unit is implemented by an instrumentation amplifier circuit consisting of three general-purpose amplifiers and an open-drain output circuit. The differential input of the instrumentation amplifier circuit is the voltage across the sampling resistor RS, Vsense = Vsense_p - Vsense_n, and the output is Vo = A × Vsense = A × Rs × I. When Vo is greater than the set voltage threshold of the open-drain output circuit, i.e., when I is greater than the set threshold, the PMOSFET will be quickly turned off, thereby cutting off the positive terminal of the board power supply. Here, Vsense_p is the voltage value at the high voltage end of the sampling resistor RS, Vsense_n is the voltage value at the low voltage end of the sampling resistor RS, A is the discharge factor of the instrumentation amplifier circuit, I is the current flowing through RS, and Vsense is the input signal of the overcurrent protection unit.
[0065] The overcurrent protection unit includes resistors R13, R14, R16, R19, and R21, general-purpose operational amplifiers U1 to U3, and NMOS transistor Q7;
[0066] The high-voltage terminal Vsense_p of the sampling resistor RS is connected to resistors R16 and R13. The common terminal of resistors R16 and R13 is connected to the positive input terminal of the instrumentation amplifier circuit composed of general-purpose operational amplifiers U1 to U3. The low-voltage terminal Vsense_n of the sampling resistor RS is connected to resistors R19 and R21. The common terminal of resistors R19 and R21 is connected to the negative input terminal of the instrumentation amplifier circuit. The output terminal of the instrumentation amplifier circuit is connected to the gate of the open-drain output NMOS transistor Q7 through resistor R14.
[0067] In this embodiment, the internal RC delay circuit of the MOSFET control unit is used to control the PMOSFET of the positive terminal of the power supply to be turned off for a short time during the process of inserting the board into the device, and then slowly turn on the PMOSFET.
[0068] When only the enable shutdown signal, overvoltage protection signal, or overcurrent protection signal is active, the internal capacitor discharge circuit of the MOSFET control unit is used to quickly release the charge of the capacitor, thereby quickly turning off the PMOSFET and cutting off the positive power supply of the board.
[0069] The MOSFET control unit includes resistors R3, R4, R5, and R10, PMOS transistor Q4, and capacitor C1;
[0070] One end of resistor R5 serves as the input terminal of the MOSFET control unit. This input terminal is connected to the open-drain output circuit lines and signal lines of NMOS transistors Q3, Q6, and Q7. It is connected to the positive terminal of the power supply through resistors R5 and R3. The common terminal of resistors R5 and R3 is connected to the gate of PMOS transistor Q4. The source of PMOS transistor Q4 is connected to the positive terminal of the power supply through resistor R4. The drain of PMOS transistor Q4 is connected to the common terminal of capacitor C1 and resistor R10, which are connected in series between the positive and negative terminals of the power supply. This common terminal is also connected to the gate of the positive power supply switch Q1. The source of the positive power supply switch Q1 is connected to the low voltage terminal of the sampling resistor RS. The drain of the positive power supply switch Q1 is connected to the positive terminal of the load. Zener diode D1 is connected in parallel with the source and gate of the positive power supply switch Q1.
[0071] The enable control unit includes resistors R1, R2, R6, R8, and R9, and NMOS transistors Q2 and Q3;
[0072] Resistors R1 and R8 are connected in series between the positive and negative terminals of the power supply. The common terminal of resistors R1 and R8 is connected to the gate of NMOS transistor Q2. The EN signal is connected to the gate of NMOS transistor Q2 through resistor R6. The source of NMOS transistor Q2 is connected to the negative terminal of the power supply. The drain of NMOS transistor Q2 is connected to the common terminal of resistors R2 and R9, which are connected in series between the positive and negative terminals of the power supply. The common terminal of resistors R2 and R9 is also connected to the gate of open-drain output NMOS transistor Q3.
[0073] In this embodiment, the output terminals of the overvoltage protection unit, the enable control unit, and the overcurrent protection unit are all connected to the input terminal of the MOSFET control unit, and the output terminal of the MOSFET control unit is connected to the gate of the PMOSFET.
[0074] The input terminals of the overvoltage protection unit, the enable control unit, and the overcurrent protection unit are all connected to the positive terminal of the power supply. The high voltage terminal of the sampling resistor RS is connected to the positive terminal of the power supply, and both the high voltage terminal and the low voltage terminal of the sampling resistor RS are connected to the input terminal of the overcurrent protection unit.
[0075] The input signals that enable the control unit include the EN signal.
[0076] To facilitate understanding of Embodiment 1, the present invention provides a more specific embodiment:
[0077] Example 2:
[0078] See Figure 3 This is an example of a hot-swap protection circuit applied to the positive terminal of a DC power supply. In this example, the input power supply of the hot-swap board is VIN=12V, the overvoltage protection threshold is set to Vov=13V, the overcurrent protection threshold is Imax=10A, and the output signals of the overvoltage protection unit, the enable control unit, and the overcurrent protection unit control the MOSFET control unit through a wired-AND connection.
[0079] The overvoltage protection unit has resistor R7 connected to the positive terminal of the power supply at one end and to the positive terminal of Zener diode D2 and the gate of PMOS transistor Q5 at the other end. The other end of D2 is connected to the negative terminal of the power supply. The source of Q5 is connected to the positive terminal of the power supply, and the drain is connected to resistors R11 and R12. The middle of resistors R11 and R12 is connected to the gate of the open-drain output NMOS transistor Q6. Its operation is as follows: Zener diode D2 reverse breaks down to Vz = 13V. When the input power supply is greater than 13V, Zener diode D2 will reverse break down, and current will flow through R7. When the voltage difference across R7 is higher than the Vgs(th) of Q5, Q5 conducts. The voltage divider between R11 and R12 causes Q6 to also conduct and ground. Therefore, the Vgs of Q4 in the MOSFET control unit is less than 0, so Q4 conducts. The control voltage of Q1 is Vgs = 0V, so Q1 is turned off. The hot-swappable board is powered down, thus achieving overvoltage protection.
[0080] The enable control unit is connected via resistors R1 and R8 between the positive and negative terminals of the power supply, with the gate of NMOS transistor Q2 connected between them. The EN signal is connected to the gate of Q2 through series resistor R6. The source of Q2 is connected to the negative terminal of the power supply, and the drain of Q2 is connected to the middle of resistors R2 and R9 between the positive and negative terminals of the power supply, and then connected to the gate of the open-drain output NMOS transistor Q3. Its operation is as follows: When the input control signal EN is floating or high, Q2 is turned on, causing Q3's Vgs to be 0V and thus off. Therefore, Q4 in the MOSFET control unit has Vgs = 0 and is also off, setting the control voltage Vgs of Q7 to -12V, turning Q7 on, and powering on the hot-swappable board. When the input control signal EN is low, Q2 is off. After voltage division by R2 and R9, Q3 is turned on. In the MOSFET control unit, Q4 has Vgs < -1V and is turned on. The control voltage of Q1 is 0V and is off, powering off the hot-swappable board.
[0081] The overcurrent protection unit connects the high-voltage terminal Vsense_p of RS1 to resistors R16 and R13, with the positive input of the instrumentation amplifier circuit composed of general-purpose operational amplifiers U1 to U3 connected in between. The low-voltage terminal Vsense_n of RS1 is connected to resistors R19 and R21, with the negative input of the instrumentation amplifier circuit connected in between. The output of the instrumentation amplifier circuit is connected to the gate of the open-drain output NMOS transistor Q7 via series resistor R14. Its operation is as follows: the input of the instrumentation amplifier circuit is the voltage difference Vi across the sampling resistor RS1 = Vsense_p - Vsense_n, and the output is Vo = A × Vsense = A × Rs1 × I, where A is the amplification factor of the instrumentation circuit, set to A = 20, then Vo = 20 × 0.005 × I. The turn-on threshold Vgs(th) of Q7 is 1V. Therefore, when the load current I>10A, Vo>1V≥Vgs(th), Q7 is turned on and grounded. Thus, Q4 in the MOSFET control unit is turned on, and the control voltage Vgs of Q1 is 0V, which turns it off. The hot-swappable board is powered down, thereby achieving overcurrent protection.
[0082] A MOSFET control unit, whose input terminal is connected to the wired-AND signal line of the open-drain output circuits of Q3, Q6 and Q7, is connected to the positive electrode of a power supply through resistors R5 and R3. The middle point between resistors R5 and R3 is connected to the gate of a PMOS transistor Q4. The source of Q4 is connected to the positive electrode of the power supply through a resistor R4, and the drain of Q4 is connected to the middle point of the C1 and R10 network between the positive electrode and the negative electrode of the power supply, and is simultaneously connected to the gate of the power supply positive switch Q1. The source of Q1 is connected to RS1, the drain of Q1 is connected to the positive electrode of a load, and a Zener diode D1 is connected in parallel with the source and the gate of Q1. The working process is as follows: the turn-on and cut-off of the PMOSFET is determined by the wired-AND result of output signals from an overvoltage protection unit, an enable control unit and an overcurrent protection unit; when the wired-AND control signal result is at a high level, Q4 is cut off, and VIN starts to charge the capacitor C1 through the resistor R10. The calculation formula for the voltage across C1 is Vc1(t)=VIN×(1-e (-t / RC) ), since the turn-on voltage Vgs(th) of Q1 is greater than 1V, Q1 is in a cut-off state during the process when Vc1(t) < Vgs(th), and the positive electrode of the power supply is not connected. The power-on delay time T1=-RC*ln(1-Vgs(th) / VIN). According to the parameter values given in the circuit embodiment, T1≈17.4ms. Therefore, the power supply of the hot-swappable board card is not connected within the time T1, thereby avoiding power supply oscillation caused by bouncing of the mechanical contacts of the connector at the moment of contact; after the insertion time of the hot-swappable board card into the device is longer than T1, the PMOSFET starts to conduct, but due to the slow charging of the RC delay circuit, the inrush current caused by rapid charging of the large-capacity energy storage capacitor on the hot-swappable board card can be limited. According to the characteristic curve of Q1, when Vc1(t)>|Vgs|≈2.8V, the conducting current can reach the set maximum value, and the voltage drop Vds of Q1 is less than 1V at the same time. According to the above formula, when Vc1(t)=2.8V, the RC charging time T2≈53.1ms can be obtained. Therefore, it takes about T3=T2-T1≈35.7ms for the power supply voltage of the hot-swappable board card to rise from 0V to close to 12V, thereby limiting the inrush current caused by rapid charging of the large-capacity energy storage capacitor; when the enable signal of the hot-swappable board card is at a low level or overcurrent or overvoltage protection is activated, the wired-AND result is at a low level. At this time, Q4 inside the MOSFET control unit will conduct, and the charge on the capacitor C1 will be rapidly discharged through the path of R4, thereby quickly turning off the PMOSFET and cutting off the positive electrode of the board card power supply. According to the capacitor discharge formula, the turn-off time of the PMOSFET can be calculated as T4=-RC*ln(Vc1(t) / VIN), that is, when the voltage Vc1(t) across the capacitor C1 drops from 12V to 2.4V, the RC discharge time T4≈0.16ms, thereby realizing rapid turn-off of the power supply of the hot-swappable board card.
[0083] Third Embodiment:
[0084] See Figure 2 The present invention provides a hot-swap protection circuit for a DC power supply, which includes an overvoltage protection unit, an enable control unit, an overcurrent protection unit, a MOSFET control unit, and an NMOSFET and a sampling resistor RS connected in series with the negative terminal of the power supply.
[0085] The two ends of the sampling resistor RS are connected to the input terminal of the overcurrent protection unit;
[0086] The overcurrent protection unit is used to turn off the NMOSFET through the MOSFET control unit when its input current exceeds the set current threshold, thereby cutting off the negative terminal of the board's power supply.
[0087] The overvoltage protection unit is used to control the NMOSFET to disconnect the negative terminal of the board power supply when its input voltage exceeds a set threshold, thereby achieving overvoltage protection.
[0088] The enable control unit is used to implement the positive logic control of the NMOSFET. When the signal EN is high or floating, the MOSFET control unit turns on the NMOSFET to connect the negative terminal of the board power supply; when the signal EN is low, the MOSFET control unit turns off the NMOSFET to disconnect the negative terminal of the board power supply.
[0089] In this embodiment, the overvoltage protection unit generates an overvoltage protection signal through a resistor connected in series with a Zener diode circuit, which in turn controls the NMOSFET to disconnect the negative terminal of the board power supply to achieve overvoltage protection. Replacing the Zener diode with different reverse breakdown voltages can adjust the overvoltage protection threshold.
[0090] The overvoltage protection unit also includes: capacitor C4, Zener diode D4, PMOS transistor D4, resistors R8, R12, R15 and NMOS transistor Q6;
[0091] One end of resistor R8 is connected to the positive terminal of the power supply, and the other end of resistor R8 is connected to the positive terminal of Zener diode D4 and the gate of PMOS transistor Q4. The positive terminal of Zener diode D4 is connected to the negative terminal of the power supply, the source of PMOS transistor Q4 is connected to the positive terminal of the power supply, and the drain of PMOS transistor Q4 is connected to resistors R12 and R15 connected in series. The common terminal of resistors R12 and R15 is connected to the gate of open-drain output NMOS transistor Q6.
[0092] In this embodiment, the overcurrent protection unit is implemented by a differential circuit and an open-drain output circuit. The differential input of the differential circuit is the voltage across the sampling resistor RS, Vsense = Vsense_p - Vsense_n, and the output is Vo = A × Vsense = A × Rs × I. When Vo is greater than the set voltage threshold of the open-drain output circuit, i.e., when I is greater than the set threshold, the MOSFET control unit will quickly turn off the NMOSFET, thereby cutting off the negative terminal of the board power supply. Here, Vsense_p is the input power supply voltage, Vsense_n is the voltage of the power supply after passing through the sampling resistor RS, A is the discharge factor of the instrumentation amplifier circuit, and I is the current value flowing through RS.
[0093] The overcurrent protection unit includes resistors R11, R13, R14, and R16, a general-purpose operational amplifier U1, and an NMOS transistor Q5;
[0094] The high-voltage terminal Vsense_p of the sampling resistor RS is connected to resistors R13 and R11. The common terminal of resistors R13 and R11 is connected to the positive input terminal of the difference circuit formed by the general-purpose operational amplifier U1. The low-voltage terminal Vsense_n of the sampling resistor RS is connected to the negative input terminal of the difference circuit through resistor R14. Resistor R16 is the negative feedback resistor of the operational amplifier. The output terminal of the difference circuit is connected to the gate of the open-drain output NMOS transistor Q5.
[0095] In this embodiment, during the board insertion process, the internal RC delay circuit of the MOSFET control unit briefly disconnects the NMOSFET at the negative terminal of the power supply and then slowly turns the NMOSFET back on.
[0096] When the enable / disable signal, overvoltage protection signal, and overcurrent protection signal are valid, the internal capacitor discharge circuit of the MOSFET control unit is used to quickly release the charge of the capacitor, thereby quickly turning off the NMOSFET and cutting off the negative terminal of the board's power supply.
[0097] The MOSFET control unit includes resistors R3, R4, and R5, Zener diodes D1 and D2, PMOS transistor Q2, capacitor C1, and power supply negative switch Q7.
[0098] The common terminal of the series-connected resistor R3 and Zener diode D1 serves as the input terminal of the MOSFET control unit. This input terminal is connected to the open-drain output circuit lines and signal lines of NMOS transistors Q3, Q6, and Q5, and to the gate of PMOS transistor Q2. The gate of PMOS transistor Q2 is connected to the positive terminal of the power supply through resistor R3. Zener diode D1 is connected in parallel between the gate and drain of PMOS transistor Q2. The source of PMOS transistor Q2 is connected in series through resistor R5 to the common terminal of resistor R4 and capacitor C1 connected between the positive and negative terminals of the power supply. This common terminal is connected to the gate of the negative power supply switch Q7. The source of the negative power supply switch Q7 is connected to the sampling resistor RS. The drain of the negative power supply switch Q7 is connected to the negative terminal of the load. Zener diode D2 is connected in parallel with the gate and source of the negative power supply switch Q7.
[0099] The enable control unit includes resistors R1, R2, R6, R9, and R10, and NMOS transistors Q1 and Q3;
[0100] Resistors R1 and R9 are connected in series between the positive and negative terminals of the power supply. The common terminal of resistors R1 and R9 is connected to the gate of NMOS transistor Q1. The EN signal is connected to the gate of NMOS transistor Q1 through resistor R6. The source of NMOS transistor Q1 is connected to the negative terminal of the power supply. The drain of NMOS transistor Q1 is connected to the common terminal of resistors R2 and R10, which are connected in series between the positive and negative terminals of the power supply. The common terminal of resistors R2 and R10 is also connected to the gate of open-drain output NMOS transistor Q3.
[0101] In this embodiment, the output terminals of the overvoltage protection unit, the enable control unit, and the overcurrent protection unit are all connected to the input terminal of the MOSFET control unit, and the output terminal of the MOSFET control unit is connected to the gate of the NMOSFET.
[0102] The input terminals of the overvoltage protection unit, the enable control unit, and the overcurrent protection unit are all connected to the power ground. The low voltage terminal of the sampling resistor RS is connected to the negative terminal of the power supply, and both the high voltage terminal and the low voltage terminal of the sampling resistor RS are connected to the input terminal of the overcurrent protection unit.
[0103] The input signals that enable the control unit include the EN signal.
[0104] To facilitate understanding of Embodiment 3, the present invention provides a more specific embodiment:
[0105] Example 4:
[0106] See Figure 4This is an example of a hot-swap protection circuit applied to the negative terminal of a DC power supply. In this example, the input power supply of the hot-swap board is -VIN = -48V, the overvoltage protection threshold is set to Vov = -56V, the overcurrent protection threshold is Imax = 10A, and the output signals of the overvoltage protection unit, the enable control unit, and the overcurrent protection unit control the MOSFET control unit through a wired-AND connection.
[0107] The overvoltage protection unit has resistor R8 connected to the positive terminal of the power supply at one end, and to the positive terminal of Zener diode D4 and the gate of PMOS transistor Q4 at the other end. The other end of D4 is connected to the negative terminal of the power supply. The source of Q4 is connected to the positive terminal of the power supply, and the drain is connected to resistors R12 and R15. The middle of resistors R12 and R15 is connected to the gate of the open-drain output NMOS transistor Q6. Its operation is as follows: D4 is a Zener diode, and its reverse breakdown voltage is Vz = 56V. When the input power supply is less than -56V, the Zener diode D4 will break down in reverse, and current will flow through R8. When the voltage difference across R8 is higher than the Vgs(th) of Q4, Q4 conducts. The voltage divider between R12 and R15 causes Q6 to also conduct and ground. Therefore, the Vgs of Q2 in the MOSFET control unit is -12V, and Q2 conducts. The control voltage of Q7 is 0V, and Q7 is turned off. The hot-swappable board is powered down, thus achieving overvoltage protection.
[0108] The enable control unit is connected between the positive and negative terminals of the power supply, with the gate of NMOS transistor Q1 connected in the middle. The EN signal is connected to the gate of Q1 through series resistor R6. The source of Q1 is connected to the negative terminal of the power supply. The drain of Q1 is connected between resistors R2 and R10 between the positive and negative terminals of the power supply, and is connected to the gate of the open-drain output NMOS transistor Q3. The working process is as follows: When the input control signal EN is floating or high, Q1 is turned on, and Q3's Vgs = 0V, so it is turned off. Therefore, Q2 in the MOSFET control unit has Vgs = 0, so it is turned off. As a result, the Zener diode D2 breaks down in reverse, clamping the control power supply Vgs of Q7 to 12V, Q7 is turned on, and the hot-swappable board is powered on. When the input control signal EN is low, Q1 is turned off. After voltage division by R2 and R10, Q3 is turned on. In the MOSFET control unit, Q2's Vgs = -12V, so Q2 is turned on. Q7's control power supply Vgs = 0V, so it is turned off, and the hot-swappable board is powered off.
[0109] The overcurrent protection unit connects the high-voltage terminal Vsense_p of RS1 to the reference ground resistors R13 and R11, with the positive input of the difference circuit formed by the general-purpose operational amplifier U1 connected in between. The low-voltage terminal Vsense_n of RS1 is connected to the negative input of the difference circuit via R14, and R16 is the negative feedback resistor of the operational amplifier. The output of the difference circuit is connected to the gate of the open-drain output NMOS transistor Q5. Its operation is as follows: it is implemented through a difference circuit and an open-drain output circuit formed by the general-purpose operational amplifier U1. The input of the difference circuit is the voltage difference Vi = Vsense_p - Vsense_n across the sampling resistor RS1, and the output is Vo = A × Vsense = A × RS1 × I, where A is the amplification factor of the difference circuit. Setting A = 20, then Vo = 20 × 0.005 × I. The turn-on threshold Vgs(th) of Q5 is 1V. Therefore, when the load current I>10A, Vo>1V≥Vgs(th), Q5 is turned on and grounded. Thus, Q2 in the MOSFET control unit is turned on, and the control power supply Vgs of Q7 is 0V, which is turned off. The hot-swappable board is powered down, thereby achieving overcurrent protection.
[0110] The MOSFET control unit's input is connected to the open-drain output circuit lines of Q3, Q6, and Q5, and also to the gate of PMOS transistor Q2. The gate is connected to the positive power supply via resistor R3. Zener diode D1 is connected in parallel between the gate and drain of Q2. The source of Q2 is connected through resistor R5 to the middle of the R4 and C1 network between the positive and negative power supplies, and simultaneously connected to the gate of the negative power supply switch Q7. The source of Q7 is connected to RS1, and the drain of Q7 is connected to the negative load. Zener diode D2 is connected in parallel with the gate and source of Q7. Its operation is as follows: the NMOSFET's on / off control is determined by the wire-AND result of the output signals from the overvoltage protection unit, the enable control unit, and the overcurrent protection unit. When the wire-AND control signal result is high, Q2 is off, and VIN begins charging capacitor C1 through resistor R4. The voltage across C1 is calculated as Vc1(t) = VIN * (1 - e (-t / RC)), since the turn-on voltage Vgs(th) of Q7 is greater than 1V, Q7 is in cut-off state and the negative electrode of the power supply is not connected during the process when Vc1(t)<Vgs(th). The power-on delay time T1=-RC*ln(1-Vgs(th) / VIN). According to the parameter values given in the circuit implementation example, T1≈10.7ms. Therefore, the power supply of the hot-swappable board is not connected within the time T1, thereby avoiding power supply oscillation caused by bouncing of the mechanical contacts of the connector at the moment of contact; after the insertion time of the hot-swappable board into the device is longer than T1, the NMOSFET starts to conduct. However, due to the slow charging of the RC delay circuit, the inrush current caused by rapid charging of the large-capacity energy storage capacitor on the hot-swappable board can be limited. According to the characteristic curve of Q7, when Vc1(t)>Vgs≈3V, the conduction current can reach the set maximum value, and at the same time, the voltage drop Vds of Q7 is less than 1V. According to the above formula, when Vc1(t)=3V, the RC charging time T2≈32.9ms. Therefore, it takes about T3=T2-T1≈22.2ms for the power supply voltage of the hot-swappable board to rise from 0V to close to -48V, thereby limiting the inrush current caused by rapid charging of the large-capacity energy storage capacitor; when the enable signal of the hot-swappable board is at a low level or overcurrent and overvoltage protection is activated, the result of the wired AND connection is at a low level. At this time, the internal Q2 of the MOSFET control unit will conduct, and the charge of capacitor C1 will be discharged rapidly through the path of R5, thereby turning off the NMOSFET rapidly and cutting off the negative electrode of the board power supply. According to the capacitor discharge formula, the turn-off time of the NMOSFET can be calculated as T4=-RC*ln(Vc1(t) / VIN), that is, when the voltage Vc1(t) across capacitor C1 drops from 48V to 2.6V, the RC discharge time T4≈0.29ms, thereby realizing rapid power-off of the hot-swappable board power supply.
[0111] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than limit them. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that: modifications or equivalent substitutions can still be made to the specific embodiments of the present invention, and any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention shall be included within the protection scope of the claims of the present invention.
Claims
1. A hot-swap protection circuit for DC power supplies, characterized in that, It includes an overvoltage protection unit, an enable control unit, an overcurrent protection unit, a MOSFET control unit, and a PMOSFET and a sampling resistor RS connected in series with the positive terminal of the power supply; The two ends of the sampling resistor RS are respectively connected to the input terminal of the overcurrent protection unit; The overcurrent protection unit is used to turn off the PMOSFET through the MOSFET control unit when its input current exceeds a set current threshold, thereby cutting off the positive power supply of the board. The overvoltage protection unit is used to control the PMOSFET to disconnect the positive terminal of the board power supply when its input voltage is greater than a set threshold, thereby achieving overvoltage protection. The enable control unit is used to implement positive logic control of the PMOSFET. When the signal EN is high or floating, the MOSFET control unit turns on the PMOSFET to connect the positive terminal of the board power supply; when the signal EN is low, the MOSFET control unit turns off the PMOSFET to disconnect the positive terminal of the board power supply. The overvoltage protection unit generates an overvoltage protection signal through a series-connected resistor R7 and a Zener diode D2, which in turn controls the PMOSFET to disconnect the positive terminal of the board power supply to achieve overvoltage protection. The threshold of overvoltage protection can be adjusted by replacing the Zener diode with different reverse breakdown voltages. The overvoltage protection unit also includes: capacitor C4, Zener diode D2, PMOS transistor Q5, resistors R7, R11, R12 and NMOS transistor Q6; One end of resistor R7 is connected to the positive terminal of the power supply, and the other end of resistor R7 is connected to the positive terminal of Zener diode D2 and the gate of PMOS transistor Q5. The positive terminal of Zener diode D2 is connected to the negative terminal of the power supply, the source of PMOS transistor Q5 is connected to the positive terminal of the power supply, and the drain of PMOS transistor Q5 is connected to resistors R11 and R12 connected in series. The common terminal of resistors R11 and R12 is connected to the gate of open-drain output NMOS transistor Q6. The overcurrent protection unit is implemented by an instrumentation amplifier circuit consisting of three general-purpose amplifiers and an open-drain output circuit. The differential input of the instrumentation amplifier circuit is the voltage across the sampling resistor RS, Vsense = Vsense_p - Vsense_n, and the output is Vo = A × Vsense = A × Rs × I. When Vo is greater than the set voltage threshold of the open-drain output circuit, i.e., when I is greater than the set threshold, the PMOSFET will be quickly turned off, thereby cutting off the positive power supply of the board. Here, Vsense_p is the voltage value at the high voltage end of the sampling resistor RS, Vsense_n is the voltage value at the low voltage end of the sampling resistor RS, A is the discharge factor of the instrumentation amplifier circuit, I is the current flowing through RS, and Vsense is the input signal of the overcurrent protection unit. The overcurrent protection unit includes resistors R13, R14, R16, R19, and R21, general-purpose operational amplifiers U1~U3, and NMOS transistor Q7; The high-voltage terminal Vsense_p of the sampling resistor RS is connected to resistors R16 and R13. The common terminal of resistors R16 and R13 is connected to the positive input terminal of the instrumentation amplifier circuit composed of general-purpose operational amplifiers U1~U3. The low-voltage terminal Vsense_n of the sampling resistor RS is connected to resistors R19 and R21. The common terminal of resistors R19 and R21 is connected to the negative input terminal of the instrumentation amplifier circuit. The output terminal of the instrumentation amplifier circuit is connected to the gate of the open-drain output NMOS transistor Q7 through resistor R14.
2. The hot-swap protection circuit for DC power supplies according to claim 1, characterized in that, The internal RC delay circuit of the MOSFET control unit is used to control the PMOSFET of the positive terminal of the power supply to be turned off for a short time during the board insertion process and then slowly turned on again. When only the enable shutdown signal, overvoltage protection signal, or overcurrent protection signal is active, the internal capacitor discharge circuit of the MOSFET control unit is used to quickly release the charge of the capacitor, thereby quickly turning off the PMOSFET and cutting off the positive power supply of the board. The MOSFET control unit includes resistors R3, R4, R5, and R10, PMOS transistor Q4, and capacitor C1; One end of resistor R5 serves as the input terminal of the MOSFET control unit. This input terminal is connected to the open-drain output circuit lines and signal lines of NMOS transistors Q3, Q6, and Q7. It is connected to the positive terminal of the power supply through resistors R5 and R3. The common terminal of resistors R5 and R3 is connected to the gate of PMOS transistor Q4. The source of PMOS transistor Q4 is connected to the positive terminal of the power supply through resistor R4. The drain of PMOS transistor Q4 is connected to the common terminal of capacitor C1 and resistor R10, which are connected in series between the positive and negative terminals of the power supply. This common terminal is also connected to the gate of the positive power supply switch Q1. The source of the positive power supply switch Q1 is connected to the low voltage terminal of the sampling resistor RS. The drain of the positive power supply switch Q1 is connected to the positive terminal of the load. Zener diode D1 is connected in parallel with the source and gate of the positive power supply switch Q1. The enable control unit includes resistors R1, R2, R6, R8, and R9, and NMOS transistors Q2 and Q3; Resistors R1 and R8 are connected in series between the positive and negative terminals of the power supply. The common terminal of resistors R1 and R8 is connected to the gate of NMOS transistor Q2. The EN signal is connected to the gate of NMOS transistor Q2 through resistor R6. The source of NMOS transistor Q2 is connected to the negative terminal of the power supply. The drain of NMOS transistor Q2 is connected to the common terminal of resistors R2 and R9, which are connected in series between the positive and negative terminals of the power supply. The common terminal of resistors R2 and R9 is also connected to the gate of open-drain output NMOS transistor Q3.
3. The hot-swap protection circuit for DC power supplies according to claim 1, characterized in that, The output terminals of the overvoltage protection unit, the enable control unit, and the overcurrent protection unit are all connected to the input terminal of the MOSFET control unit, and the output terminal of the MOSFET control unit is connected to the gate of the PMOSFET. The input terminals of the overvoltage protection unit, the enable control unit, and the overcurrent protection unit are all connected to the positive terminal of the power supply. The high voltage terminal of the sampling resistor RS is connected to the positive terminal of the power supply, and both the high voltage terminal and the low voltage terminal of the sampling resistor RS are connected to the input terminal of the overcurrent protection unit. The input signals for the enable control unit include the signal EN.
4. A hot-swap protection circuit for DC power supplies, characterized in that, It includes an overvoltage protection unit, an enable control unit, an overcurrent protection unit, a MOSFET control unit, and an NMOSFET and a sampling resistor RS connected in series with the negative terminal of the power supply; The two ends of the sampling resistor RS are respectively connected to the input terminal of the overcurrent protection unit; The overcurrent protection unit is used to turn off the NMOSFET through the MOSFET control unit when its input current exceeds a set current threshold, thereby cutting off the negative terminal of the board power supply. The overvoltage protection unit is used to control the NMOSFET to disconnect the negative terminal of the board power supply when its input voltage is greater than a set threshold, thereby achieving overvoltage protection. The enable control unit is used to implement the positive logic control of the NMOSFET. When the signal EN is high or floating, the MOSFET control unit turns on the NMOSFET to connect the negative terminal of the board power supply; when the signal EN is low, the MOSFET control unit turns off the NMOSFET to disconnect the negative terminal of the board power supply. The overvoltage protection unit generates an overvoltage protection signal through a resistor-in-series Zener diode circuit, which in turn controls the NMOSFET to disconnect the negative terminal of the board power supply to achieve overvoltage protection. The overvoltage protection threshold can be adjusted by replacing the Zener diode with different reverse breakdown voltages. The overvoltage protection unit also includes: capacitor C4, Zener diode D4, PMOS transistor D4, resistors R8, R12, R15 and NMOS transistor Q6; One end of resistor R8 is connected to the positive terminal of the power supply, and the other end of resistor R8 is connected to the positive terminal of Zener diode D4 and the gate of PMOS transistor Q4. The positive terminal of Zener diode D4 is connected to the negative terminal of the power supply, the source of PMOS transistor Q4 is connected to the positive terminal of the power supply, and the drain of PMOS transistor Q4 is connected to resistors R12 and R15 connected in series. The common terminal of resistors R12 and R15 is connected to the gate of open-drain output NMOS transistor Q6. The overcurrent protection unit is implemented by a differential circuit and an open-drain output circuit. The differential input of the differential circuit is the voltage across the sampling resistor RS, Vsense = Vsense_p - Vsense_n, and the output is Vo = A × Vsense = A × Rs × I. When Vo is greater than the set voltage threshold of the open-drain output circuit, i.e., when I is greater than the set threshold, the MOSFET control unit will quickly turn off the NMOSFET, thereby cutting off the negative terminal of the board power supply. Here, Vsense_p is the input power supply voltage, Vsense_n is the voltage of the power supply after passing through the sampling resistor RS, A is the discharge factor of the instrumentation amplifier circuit, and I is the current value flowing through RS. The overcurrent protection unit includes resistors R11, R13, R14, and R16, a general-purpose operational amplifier U1, and an NMOS transistor Q5; The high-voltage terminal Vsense_p of the sampling resistor RS is connected to resistors R13 and R11. The common terminal of resistors R13 and R11 is connected to the positive input terminal of the difference circuit formed by the general-purpose operational amplifier U1. The low-voltage terminal Vsense_n of the sampling resistor RS is connected to the negative input terminal of the difference circuit through resistor R14. Resistor R16 is the negative feedback resistor of the operational amplifier. The output terminal of the difference circuit is connected to the gate of the open-drain output NMOS transistor Q5.
5. The hot-swap protection circuit for DC power supplies according to claim 4, characterized in that, During board insertion, the internal RC delay circuit of the MOSFET control unit briefly disconnects the NMOSFET controlling the negative terminal of the power supply, and then slowly turns the NMOSFET back on. When the enable / disable signal, overvoltage protection signal, and overcurrent protection signal are valid, the internal capacitor discharge circuit of the MOSFET control unit is used to quickly release the charge of the capacitor, thereby quickly turning off the NMOSFET and cutting off the negative terminal of the board power supply. The MOSFET control unit includes resistors R3, R4, and R5, Zener diodes D1 and D2, PMOS transistor Q2, capacitor C1, and power supply negative switch Q7. The common terminal of the series-connected resistor R3 and Zener diode D1 serves as the input terminal of the MOSFET control unit. This input terminal is connected to the open-drain output circuit lines and signal lines of NMOS transistors Q3, Q6, and Q5, and to the gate of PMOS transistor Q2. The gate of PMOS transistor Q2 is connected to the positive terminal of the power supply through resistor R3. Zener diode D1 is connected in parallel between the gate and drain of PMOS transistor Q2. The source of PMOS transistor Q2 is connected in series through resistor R5 to the common terminal of resistor R4 and capacitor C1 connected between the positive and negative terminals of the power supply. This common terminal is connected to the gate of the negative power supply switch Q7. The source of the negative power supply switch Q7 is connected to the sampling resistor RS. The drain of the negative power supply switch Q7 is connected to the negative terminal of the load. Zener diode D2 is connected in parallel with the gate and source of the negative power supply switch Q7. The enable control unit includes resistors R1, R2, R6, R9, and R10, and NMOS transistors Q1 and Q3; Resistors R1 and R9 are connected in series between the positive and negative terminals of the power supply. The common terminal of resistors R1 and R9 is connected to the gate of NMOS transistor Q1. The EN signal is connected to the gate of NMOS transistor Q1 through resistor R6. The source of NMOS transistor Q1 is connected to the negative terminal of the power supply. The drain of NMOS transistor Q1 is connected to the common terminal of resistors R2 and R10, which are connected in series between the positive and negative terminals of the power supply. The common terminal of resistors R2 and R10 is also connected to the gate of open-drain output NMOS transistor Q3.
6. The hot-swap protection circuit for DC power supplies according to claim 4, characterized in that, The output terminals of the overvoltage protection unit, the enable control unit, and the overcurrent protection unit are all connected to the input terminal of the MOSFET control unit, and the output terminal of the MOSFET control unit is connected to the gate of the NMOSFET. The input terminals of the overvoltage protection unit, the enable control unit, and the overcurrent protection unit are all connected to the power ground. The low voltage terminal of the sampling resistor RS is connected to the negative terminal of the power supply, and both the high voltage terminal and the low voltage terminal of the sampling resistor RS are connected to the input terminal of the overcurrent protection unit. The input signals for the enable control unit include the signal EN.
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