Circuit board pressing and mixing prevention monitoring method and device, computer device and storage medium

Abstract

The application provides a circuit board pressing anti-mixing monitoring method and device, computer equipment and a storage medium. The method comprises: acquiring a pressing orientation parameter of a circuit board; performing laminating sequencing processing on the pressing orientation parameter and a preset orientation parameter to obtain a pressing sequencing difference; and sending a pressing mixing board monitoring signal to a circuit board pressing system according to the pressing sequencing difference to adjust the pressing sequencing early warning of the circuit board. The current pressing sequencing of each level of the circuit board is determined by collecting the pressing orientation parameter. The pressing orientation parameter is compared with the preset orientation parameter to compare the difference of the pre-sequence order of each level of the circuit board, to determine the current sequencing of each level of the circuit board. Finally, the pressing mixing board problem of the circuit board is monitored according to the pre-sequence order difference degree, so as to timely perform early warning when the wrong level board is placed, and the anti-mixing performance of each pressing layer board is effectively improved.

Description

Technical Field

[0001] This invention relates to the field of circuit board technology, and in particular to a method, apparatus, computer equipment, and storage medium for monitoring circuit board lamination anti-mixing. Background Technology

[0002] With the development of the electronics industry, printed circuit boards (PCBs) have become the carrier boards for the main components. The conventional lamination design of PCBs is a symmetrical structure, such as a 4-layer board with a first circuit layer, a first PP dielectric layer, a second circuit layer, a second PP (Polypropylene) dielectric layer, a third circuit layer, a third PP dielectric layer, and a fourth circuit layer. Among them, the second circuit layer, the second PP dielectric layer, and the third circuit layer together form the inner core board, and the first dielectric layer and the third dielectric layer have almost equal thicknesses in a symmetrical structure.

[0003] However, some boards have asymmetrical structures due to factors such as board thickness, voltage, and signal lines. For example, the first and third dielectric layers in the laminate structure may not be equal. Because the materials and quantities of the first and third dielectric layers are inconsistent, it is easy for workers to place them incorrectly, leading to an increased scrap rate. Summary of the Invention

[0004] The purpose of this invention is to overcome the shortcomings of the prior art and provide a circuit board lamination anti-mixing monitoring method, device, computer equipment, and storage medium that effectively improves the anti-mixing performance of each lamination layer.

[0005] The objective of this invention is achieved through the following technical solution:

[0006] A method for monitoring circuit board lamination anti-misalignment, the method comprising:

[0007] Obtain the bonding orientation parameters of the circuit board;

[0008] The lamination orientation parameters and the preset orientation parameters are subjected to lamination sequencing processing to obtain the lamination sequencing difference.

[0009] Based on the pressing sequence difference, a pressing mix monitoring signal is sent to the circuit board pressing system to adjust the pressing sequence warning for the circuit board.

[0010] In one embodiment, obtaining the lamination orientation parameters of the circuit board includes: obtaining the orientation sorting parameters of the orientation inner layer of the circuit board.

[0011] In one embodiment, obtaining the orientation sorting parameters of the orientation inner layer board of the circuit board includes: obtaining the pre-sorting code of the orientation inner layer board.

[0012] In one embodiment, obtaining the orientation sorting parameters of the orientation inner layer board of the circuit board includes: obtaining the number of edge-mounted layers of the orientation inner layer board.

[0013] In one embodiment, the step of performing lamination sequence processing on the lamination orientation parameters and preset orientation parameters to obtain the lamination sequence difference includes: calculating the difference between the number of injection layers on the plate edge and the preset number of injection layers to obtain the lamination sequence layer difference.

[0014] In one embodiment, the step of sending a lamination mixing monitoring signal to the circuit board pressing system based on the lamination sequence difference to adjust the lamination sorting warning for the circuit board includes: detecting whether the lamination sequence difference matches a preset layer difference; and when the lamination sequence difference matches the preset layer difference, sending a lamination positive sequence signal to the circuit board pressing system.

[0015] In one embodiment, the step of detecting whether the lamination sequence layer difference matches the preset layer difference further includes: when the lamination sequence layer difference does not match the preset layer difference, sending a lamination mis-sequence alarm signal to the circuit board lamination system.

[0016] A circuit board lamination anti-mixing monitoring device includes: a lamination orientation acquisition unit and a circuit board anti-mixing detection main board; the lamination orientation acquisition unit is used to acquire lamination orientation parameters of the circuit board; the input terminal of the circuit board anti-mixing detection main board is connected to the output terminal of the lamination orientation acquisition unit, and the circuit board anti-mixing detection main board is used to perform lamination sequence processing on the lamination orientation parameters and preset orientation parameters to obtain a lamination sequence difference; and to send a lamination mixing monitoring signal to the circuit board lamination system according to the lamination sequence difference to adjust the lamination sorting warning of the circuit board.

[0017] A computer device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program performing the following steps:

[0018] Obtain the bonding orientation parameters of the circuit board;

[0019] The lamination orientation parameters and the preset orientation parameters are subjected to lamination sequencing processing to obtain the lamination sequencing difference.

[0020] Based on the pressing sequence difference, a pressing mix monitoring signal is sent to the circuit board pressing system to adjust the pressing sequence warning for the circuit board.

[0021] A computer-readable storage medium having a computer program stored thereon, the computer program performing the following steps when executed by a processor:

[0022] Obtain the bonding orientation parameters of the circuit board;

[0023] The lamination orientation parameters and the preset orientation parameters are subjected to lamination sequencing processing to obtain the lamination sequencing difference.

[0024] Based on the pressing sequence difference, a pressing mix monitoring signal is sent to the circuit board pressing system to adjust the pressing sequence warning for the circuit board.

[0025] Compared with the prior art, the present invention has at least the following advantages:

[0026] By collecting lamination orientation parameters, the current lamination sequence of each layer of the circuit board is determined. The lamination orientation parameters are compared with the preset orientation parameters to compare the differences in the pre-arrangement order of each layer of the circuit board, so as to determine the current sequence of each layer of the circuit board. Finally, based on the degree of difference in the pre-arrangement order, the problem of lamination board mixing is monitored so as to provide timely warning when the wrong layer board is placed, which effectively improves the anti-mixing performance of each lamination layer board. Attached Figure Description

[0027] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a flowchart of a circuit board lamination anti-mixing monitoring method in one embodiment;

[0029] Figure 2 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0030] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of the invention.

[0031] It should be noted that when an element is referred to as being "fixed to" another element, it can be directly attached to the other element or there may be an intervening element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or there may be an intervening element. The terms "vertical," "horizontal," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only possible implementation.

[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0033] This invention relates to a method for monitoring and preventing cross-contamination during circuit board lamination. In one embodiment, the method includes acquiring lamination orientation parameters of the circuit board; performing lamination sequencing processing on the lamination orientation parameters and preset orientation parameters to obtain a lamination sequencing difference; and sending a cross-contamination monitoring signal to the circuit board lamination system based on the lamination sequencing difference to adjust the lamination sequencing warning for the circuit board. By acquiring the lamination orientation parameters, the current lamination sequencing of each layer of the circuit board is determined. The lamination orientation parameters are compared with the preset orientation parameters to compare the differences in the pre-arrangement order of each layer of the circuit board, thereby determining the current layer sequence of the circuit board. Finally, based on the degree of difference in the pre-arrangement order, the method monitors for cross-contamination issues, enabling timely warnings when incorrectly placed layers occur, effectively improving the cross-contamination prevention performance of each lamination layer.

[0034] Please see Figure 1 This is a flowchart of a circuit board lamination anti-mixing monitoring method according to an embodiment of the present invention. The circuit board lamination anti-mixing monitoring method includes some or all of the following steps.

[0035] S100: Obtain the bonding orientation parameters of the circuit board.

[0036] In this embodiment, the lamination orientation parameter is the lamination orientation sequence of each layer of the circuit board, that is, the pre-arrangement sequence of each layer in the circuit board, or the current arrangement order of each layer in the circuit board when lamination is performed. By collecting the lamination orientation parameter, the current arrangement order of each layer in the circuit board is sampled, facilitating the collection of the current lamination sequence of each layer in the circuit board. This makes it easier to determine the pre-arrangement status of each layer in the circuit board when it is ready to be laminated, and further facilitates subsequent misplacement detection of the arrangement order of each layer in the circuit board, thereby improving the early warning monitoring of the arrangement order of each layer in the circuit board.

[0037] S200: Perform lamination sequencing processing on the lamination orientation parameters and the preset orientation parameters to obtain the lamination sequencing difference.

[0038] In this embodiment, the lamination orientation parameter is the lamination orientation sequence formed by each layer of the circuit board, that is, the lamination orientation parameter is the pre-arrangement sequence of each layer in the circuit board, or the current arrangement order of each layer in the circuit board when lamination is performed. By collecting the lamination orientation parameter, the current arrangement order of each layer in the circuit board is sampled, facilitating the collection of the current lamination sequence of each layer in the circuit board. This makes it easier to determine the pre-arrangement status of each layer in the circuit board when it is ready to be laminated, and further facilitates subsequent misplacement detection of the arrangement order of each layer in the circuit board, thereby improving the early warning monitoring of the arrangement order of each layer in the circuit board. The preset orientation parameter is the standard lamination orientation sequence formed by each layer of the circuit board, that is, the preset orientation parameter is the designated pre-arrangement sequence of each layer in the circuit board, or the reference arrangement order corresponding to the lamination of each layer in the circuit board. By performing lamination sequencing processing on the lamination orientation parameters and the preset orientation parameters, the difference between the lamination orientation parameters and the preset orientation parameters is detected. This facilitates the determination of the degree of difference between the current arrangement order of each layer in the circuit board and the standard arrangement order, thereby facilitating the determination of whether the current arrangement order of each layer in the circuit board is misplaced.

[0039] S300: Send a bonding mixing monitoring signal to the circuit board pressing system according to the bonding sequence difference, so as to adjust the bonding sequence warning of the circuit board.

[0040] In this embodiment, the lamination sequence difference is obtained based on the lamination orientation parameters and the preset orientation parameters. The lamination orientation parameters are the lamination orientation order of each layer of the circuit board, that is, the pre-arrangement order of each layer in the circuit board, or the current arrangement order of each layer in the circuit board when lamination is performed. By collecting the lamination orientation parameters, the current arrangement order of each layer in the circuit board is sampled, which facilitates the collection of the current lamination order of each layer in the circuit board. This makes it easier to determine the pre-arrangement of each layer in the circuit board when it is ready to be laminated, and further facilitates the subsequent misplacement detection of the arrangement order of each layer in the circuit board, thereby improving the early warning monitoring of the arrangement order of each layer in the circuit board. The preset orientation parameters are the standard lamination orientation sequence of each layer of the circuit board, that is, the preset orientation parameters are the designated pre-arrangement sequence of each layer in the circuit board, and also the reference arrangement sequence corresponding to the lamination of each layer in the circuit board. By processing the lamination sequence according to the lamination orientation parameters and the preset orientation parameters, the difference between the lamination orientation parameters and the preset orientation parameters is detected, which facilitates determining the degree of difference between the current arrangement sequence of each layer in the circuit board and the standard arrangement sequence, thereby facilitating the determination of whether the current arrangement sequence of each layer in the circuit board is misplaced. Thus, after obtaining the lamination sequence difference, the deviation of the current arrangement sequence of each layer in the circuit board can be determined. Based on the degree of difference in the arrangement sequence reflected by the lamination sequence difference, the misplacement of each layer in the circuit board can be judged, thereby facilitating the timely issuance of lamination sorting warnings when misplaced layers occur, to avoid producing unqualified circuit boards and reduce the probability of scrap boards.

[0041] In the above embodiments, by collecting the lamination orientation parameters, the current lamination order of each layer of the circuit board is determined. The lamination orientation parameters are compared with the preset orientation parameters to compare the differences in the pre-arrangement order of each layer of the circuit board, so as to determine the current arrangement of each layer of the circuit board. Finally, based on the degree of difference in the pre-arrangement order, the problem of lamination board mixing is monitored so as to provide timely warning when the wrong layer board is placed, effectively improving the anti-mixing performance of each lamination layer board.

[0042] In one embodiment, obtaining the lamination orientation parameters of the circuit board includes: obtaining the orientation sorting parameters of the orientation inner layer boards of the circuit board. In this embodiment, the lamination orientation parameters are the lamination orientation order formed by each layer of the circuit board, that is, the lamination orientation parameters are the pre-arrangement order of each layer in the circuit board, or the current arrangement order of each layer in the circuit board when lamination is performed. By collecting the lamination orientation parameters, the current arrangement order of each layer in the circuit board is sampled, which facilitates the collection of the current lamination order of each layer in the circuit board, thereby facilitating the determination of the pre-arrangement of each layer in the circuit board when lamination is performed, and further facilitating the subsequent misplacement detection of the arrangement order of each layer in the circuit board, so as to improve the early warning monitoring of the arrangement order of each layer in the circuit board. The lamination orientation parameters are the orientation sorting parameters of the orientation inner layer boards, that is, the lamination orientation parameters are the distribution of the inner layer boards of the circuit board, which facilitates the determination of the arrangement sequence of each orientation inner layer board in the circuit board.

[0043] Further, obtaining the orientation sorting parameters of the orientation inner layer board of the circuit board includes: obtaining the pre-arrangement code of the orientation inner layer board. In this embodiment, the orientation sorting parameters are the lamination orientation order formed by each layer of the circuit board, that is, the lamination orientation parameters are the pre-arrangement order of each layer in the circuit board, or the current arrangement order of each layer in the circuit board when lamination is performed. By collecting the lamination orientation parameters, the current arrangement order of each layer in the circuit board is sampled, which facilitates the collection of the current lamination order of each layer in the circuit board, thereby facilitating the determination of the pre-arrangement status of each layer in the circuit board when lamination is prepared, and further facilitating the subsequent misplacement detection of the arrangement order of each layer in the circuit board, so as to improve the early warning monitoring of the arrangement order of each layer in the circuit board. Specifically, the orientation sorting parameters are displayed in the form of pre-sorting codes, that is, the corresponding board arrangement order is determined by the codes on each layer board in the circuit board, so as to obtain its board arrangement number in the circuit board by scanning the code information on each layer board.

[0044] Furthermore, obtaining the orientation sorting parameters of the orientation inner layer board of the circuit board includes: obtaining the number of edge-mounted layers of the orientation inner layer board. In this embodiment, the orientation sorting parameters are the lamination orientation order of each layer of the circuit board, that is, the lamination orientation parameters are the pre-arrangement order of each layer in the circuit board, or the current arrangement order of each layer in the circuit board when lamination is performed. By collecting the lamination orientation parameters, the current arrangement order of each layer in the circuit board is sampled, which facilitates the collection of the current lamination order of each layer in the circuit board, thereby facilitating the determination of the pre-arrangement of each layer in the circuit board when lamination is performed, and further facilitating the subsequent misplacement detection of the arrangement order of each layer in the circuit board, so as to improve the early warning monitoring of the arrangement order of each layer in the circuit board. Specifically, the orientation and sorting parameters are displayed in the form of the board edge annotation layer number. That is, the corresponding board arrangement order is determined by the layer number sequence of each level board edge in the circuit board, which facilitates obtaining the board arrangement sequence number in the circuit board by collecting the layer number information on each level board. In another embodiment, the board edge annotation layer number is located on the board edge of at least one additional orientation inner layer board added to the circuit board. The orientation inner layer board is an additional dummy core board, that is, a core board with PP glue and copper plate stacking, which serves as the sorting and orientation basis for other level boards.

[0045] Furthermore, the step of performing lamination sequence processing on the lamination orientation parameters and the preset orientation parameters to obtain the lamination sequence difference includes: calculating the difference between the number of edge injection layers and the preset injection layer number to obtain the lamination sequence layer difference. In this embodiment, the orientation sorting parameter is the lamination orientation order formed by each layer of the circuit board, that is, the lamination orientation parameter is the pre-arrangement order of each layer in the circuit board, or the current arrangement order of each layer in the circuit board when lamination is performed. By collecting the lamination orientation parameters, the current arrangement order of each layer in the circuit board is sampled, which facilitates the collection of the current lamination order of each layer in the circuit board, thereby facilitating the determination of the pre-arrangement situation of each layer in the circuit board when lamination is prepared, and further facilitating the subsequent misplacement detection of the arrangement order of each layer in the circuit board, so as to improve the early warning monitoring of the arrangement order of each layer in the circuit board. Specifically, the orientation sorting parameters are displayed in the form of board edge annotation layer numbers. That is, the corresponding board arrangement order is determined by the layer number sequence of each level board in the circuit board, which facilitates obtaining the board arrangement sequence number in the circuit board by collecting the layer number information on each level board. The preset annotation layer number is the standard layer number of the orientation inner layer board in the circuit board. That is, the preset annotation layer number is the layer number in the circuit board under the specified and correct board arrangement. The difference between the board edge annotation layer number and the preset annotation layer number is the difference between the board arrangement order of the orientation inner layer board in the circuit board and the specified order. This facilitates determining the position of each level board in the circuit board relative to the orientation inner layer board, thereby facilitating the determination of the differences in the board arrangement order distribution of each level board in the circuit board.

[0046] Furthermore, the step of sending a lamination mixing monitoring signal to the circuit board lamination system based on the lamination sequence difference to adjust the lamination sorting warning for the circuit board includes: detecting whether the lamination sequence layer difference matches a preset layer difference; when the lamination sequence layer difference matches the preset layer difference, sending a lamination positive sequence signal to the circuit board lamination system. In this embodiment, the lamination sequence layer difference is the difference between the number of edge-mounted layers and the preset number of edge-mounted layers, and the orientation sorting parameter is the lamination orientation order formed by each layer of the circuit board, that is, the lamination orientation parameter is the pre-arrangement order of each layer in the circuit board, or the current lamination order of each layer in the circuit board. By collecting the bonding orientation parameters, the current board arrangement order of each layer in the circuit board is sampled. This facilitates the collection of the current bonding sequence of each layer in the circuit board, thereby determining the pre-arrangement status of each layer in the circuit board when it is ready to be bonded. This, in turn, facilitates subsequent detection of misplacement in the board arrangement order of each layer in the circuit board, improving the early warning monitoring of the board arrangement order. Specifically, the orientation sorting parameters are displayed in the form of layer numbers noted on the board edge. That is, the corresponding board arrangement order is determined by the layer number on the board edge of each layer in the circuit board, making it easy to obtain the board arrangement number in the circuit board by collecting the layer number information on each layer. The preset number of layers is the standard number of layers of the oriented inner layer board in the circuit board. That is, the preset number of layers is the number of layers in the circuit board under the specified and correct layout. The difference between the number of layers on the board edge and the preset number of layers is the difference between the layout order of the oriented inner layer board in the circuit board and the specified order. This is to facilitate the determination of the position of each layer board in the circuit board relative to the oriented inner layer board, and thus facilitate the determination of the differences in the layout order distribution of each layer board in the circuit board. The preset layer difference is the standard lamination sequence layer difference, that is, the preset layer difference is the lamination sequence layer difference of each layer board in the circuit board under the correct board arrangement order. The lamination sequence layer difference matching the preset layer difference indicates that the board arrangement order of each layer board in the circuit board is the same as the correct board arrangement order, that is, it indicates that there is no error in the board arrangement of each layer board in the circuit board, and that the board arrangement order of each layer board in the circuit board is consistent with the specified pre-arrangement order. At this time, the circuit board pressing system sends a lamination positive sequence signal so that the laminator can perform normal lamination operation on the circuit board.

[0047] In another embodiment, after detecting whether the lamination sequence layer difference matches the preset layer difference, the method further includes: when the lamination sequence layer difference does not match the preset layer difference, sending a lamination mis-sequence alarm signal to the circuit board lamination system. In this embodiment, the lamination sequence layer difference is the difference between the number of edge-mounted layers and the preset number of edge-mounted layers, and the orientation sorting parameter is the lamination orientation order formed by each layer of the circuit board, that is, the lamination orientation parameter is the pre-arrangement order of each layer in the circuit board, or the current lamination order of each layer in the circuit board. By collecting the bonding orientation parameters, the current board arrangement order of each layer in the circuit board is sampled. This facilitates the collection of the current bonding sequence of each layer in the circuit board, thereby determining the pre-arrangement status of each layer in the circuit board when it is ready to be bonded. This, in turn, facilitates subsequent detection of misplacement in the board arrangement order of each layer in the circuit board, improving the early warning monitoring of the board arrangement order. Specifically, the orientation sorting parameters are displayed in the form of layer numbers noted on the board edge. That is, the corresponding board arrangement order is determined by the layer number on the board edge of each layer in the circuit board, making it easy to obtain the board arrangement number in the circuit board by collecting the layer number information on each layer. The preset number of layers is the standard number of layers of the oriented inner layer board in the circuit board. That is, the preset number of layers is the number of layers in the circuit board under the specified and correct layout. The difference between the number of layers on the board edge and the preset number of layers is the difference between the layout order of the oriented inner layer board in the circuit board and the specified order. This is to facilitate the determination of the position of each layer board in the circuit board relative to the oriented inner layer board, and thus facilitate the determination of the differences in the layout order distribution of each layer board in the circuit board. The preset layer difference is the standard lamination sequence layer difference, that is, the preset layer difference is the lamination sequence layer difference of each layer board in the circuit board under the correct board arrangement order. If the lamination sequence layer difference does not match the preset layer difference, it indicates that the board arrangement order of each layer board in the circuit board is different from the specified board arrangement order, that is, it indicates that the board arrangement of each layer board in the circuit board is incorrect, that is, it indicates that the boards in each layer board are misplaced. At this time, the circuit board lamination system sends a lamination misorder alarm signal to issue a lamination alarm in time, so as to avoid the lamination machine from performing lamination operation, thereby avoiding the production of scrap boards.

[0048] During the actual lamination process of the circuit board, the lamination orientation parameters correspond to the orientation inner layer boards in the circuit board. That is, by locating the orientation inner layer boards, the relative positional relationship of each layer board in the circuit board is obtained, thus determining the sorting method of each layer board and facilitating the determination of whether there is any mixing of layers in the circuit board. However, during the lamination of each layer board, any two adjacent layer boards are bonded together with PP adhesive. This PP adhesive can easily obscure the lamination orientation parameters located on the orientation inner layer boards, making it easy for the lamination orientation parameters to be inaccurately collected. This can lead to misdetection or even missed detection of the orientation inner layer board's position.

[0049] To facilitate determining the position of the orientation inner layer board in the circuit board, the following steps are included before obtaining the lamination orientation parameters of the circuit board:

[0050] Obtain the copper etching image of the circuit board edge;

[0051] The copper defect value at the edge of the board is obtained based on the copper corrosion image at the edge of the board.

[0052] Detect whether the copper defect value at the board edge matches the preset copper defect value;

[0053] When the copper deficiency value on the board edge matches the preset copper deficiency value, a board edge orientation acquisition signal is sent to the circuit board pressing system to acquire the pressing orientation parameters for each board edge of the circuit board.

[0054] In this embodiment, the edge copper etching image is a side image of the circuit board, that is, the edge copper etching image is an edge image of each layer of the circuit board, and also a real-time image of the side copper layer of each layer of the circuit board. The edge copper etching image is used to display the etching status of the edge copper layer of the circuit board's layers, forming an image of the side etching degree of each layer of the circuit board. This facilitates the determination of the side etching status of each layer of the circuit board, thereby facilitating the determination of the amount of missing edge copper layer in each layer of the circuit board, i.e., the edge copper deficiency value. The preset copper deficiency value is the standard etching amount at the edge of the layer board of the circuit board. Specifically, the preset copper deficiency value is the standard missing amount of copper layer at the edge of the layer board of the circuit board, or the reduction amount of copper foil at the reference edge of the layer board of the circuit board. Specifically, the preset copper deficiency value corresponds to the copper deficiency amount when there is no etching at the edge of the copper layer. If the preset copper deficiency value matches the preset copper deficiency value, it indicates that the etching amount at the edge of the current layer board of the circuit board is lower than the standard etching amount, meaning that the etching amount of the copper layer at the edge of the current layer board of the circuit board is less, and therefore, the copper layer at the edge of the current layer board of the circuit board is complete. At this time, the sampled layer board is the oriented inner layer board in the circuit board. An edge orientation acquisition signal is sent to the circuit board pressing system to collect the lamination orientation parameters for each edge of the circuit board, facilitating the determination of the specific sorting position of the oriented inner layer board in the circuit board.

[0055] Further, the step of detecting whether the copper defect value at the board edge matches a preset copper defect value includes the following steps:

[0056] When the copper defect value at the board edge does not match the preset copper defect value, the average gray value of the copper defect at the board edge is obtained based on the copper corrosion image at the board edge.

[0057] Detect whether the uniform gray value of the copper defect at the board edge is less than the preset uniform gray value;

[0058] When the average gray value of copper deficiency at the board edge is less than the preset average gray value, a board edge acquisition early warning signal is sent to the circuit board pressure plate system.

[0059] In this embodiment, the copper defect value at the board edge does not match the preset copper defect value. In this case, the copper layer at the board edge may be missing. For example, excessive PP adhesive may obscure the board edge, easily leading to the board being mistakenly identified as a layer board, i.e., the inner oriented layer board may be mistaken for a layer board. The copper etching image at the board edge not only shows the defects caused by copper etching but also the grayscale reflected back from the copper layer, i.e., the average grayscale value of the copper defect at the board edge. The average grayscale value of the copper defect at the board edge is used to reflect the grayscale situation caused by the defects in the layer board after the etching process, and can be distinguished from the grayscale corresponding to the PP adhesive. The preset average gray value is the average gray value of the copper layer at the edge of each layer in the circuit board. In other words, the preset average gray value is the average gray value exhibited by each layer in the circuit board. If the average gray value of the copper layer at the edge is less than the preset average gray value, it indicates that the gray value of the edge of the currently collected layer in the circuit board is less than the standard average gray value. This indicates that the gray value of the edge of the currently collected layer in the circuit board is too small, which also indicates that there is PP glue covering the edge of the circuit board. At this time, an edge acquisition warning signal is sent to the circuit board pressing system to collect and alarm the side of the circuit board, so as to avoid mistaking the inner layer board of the orientation as a layer board, thereby avoiding misjudgment of the arrangement order between the layers in the circuit board.

[0060] All the aforementioned preset variables are set in the database for easy retrieval, and different preset variables are placed in different storage units, i.e. in different storage stacks. Furthermore, the pressing orientation parameters and the copper etching images on the board edge can be acquired by the corresponding detectors, for example, by a pressing orientation acquisition device.

[0061] In one embodiment, this application also provides a circuit board lamination anti-mixing monitoring device, which is implemented using the circuit board lamination anti-mixing monitoring method described in any of the above embodiments. In one embodiment, the circuit board lamination anti-mixing monitoring device has functional modules for implementing each step of the circuit board lamination anti-mixing monitoring method. The circuit board lamination anti-mixing monitoring device includes a lamination orientation acquisition unit and a circuit board anti-mixing detection main board; the lamination orientation acquisition unit is used to acquire the lamination orientation parameters of the circuit board; the input end of the circuit board anti-mixing detection main board is connected to the output end of the lamination orientation acquisition unit, and the circuit board anti-mixing detection main board is used to perform lamination sequence processing on the lamination orientation parameters and preset orientation parameters to obtain a lamination sequence difference; and send a lamination mixing monitoring signal to the circuit board lamination system according to the lamination sequence difference to adjust the lamination sorting warning of the circuit board.

[0062] In this embodiment, the lamination orientation parameters are collected by the lamination orientation acquisition device to determine the current lamination order of each layer of the circuit board. The circuit board anti-mixing detection motherboard compares the lamination orientation parameters with the preset orientation parameters to compare the differences in the pre-arrangement order of each layer of the circuit board, thereby determining the current order of each layer of the circuit board. Finally, the circuit board anti-mixing detection motherboard monitors the lamination mixing problem of the circuit board according to the degree of difference in the pre-arrangement order, so as to provide timely warning when the wrong layer board is placed, effectively improving the anti-mixing performance of each lamination layer board.

[0063] Each module in the aforementioned circuit board lamination anti-mixing monitoring device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in the processor of a computer device in hardware form or independent of it, or stored in the memory of a computer device in software form, so that the processor can call and execute the corresponding operations of each module.

[0064] In one embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 2 As shown, the computer device includes a processor, memory, and a network interface connected via a system bus. The processor provides computing and control capabilities. The memory includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores the operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The database stores data such as lamination orientation parameters, lamination sequence differences, and lamination mixing monitoring signals. The network interface is used for communication with external terminals via a network connection. When the computer program is executed by the processor, it implements a method for monitoring circuit board lamination mixing prevention.

[0065] Those skilled in the art will understand that Figure 2 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0066] In one embodiment, this application also provides a computer device including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above-described method embodiments.

[0067] In one embodiment, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps in the above-described method embodiments.

[0068] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the methods described above. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, or optical storage, etc. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc.

[0069] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A method for monitoring circuit board lamination anti-mixing, characterized in that, include: Obtain the bonding orientation parameters of the circuit board; The lamination orientation parameters and the preset orientation parameters are subjected to lamination sequencing processing to obtain the lamination sequencing difference. Based on the pressing sequence difference, a pressing mix monitoring signal is sent to the circuit board pressing system to adjust the pressing sequence warning for the circuit board; The process of obtaining the bonding orientation parameters of the circuit board includes the following steps: Obtain the copper etching image of the circuit board edge; The copper defect value at the edge of the board is obtained based on the copper corrosion image at the edge of the board. Detect whether the copper defect value at the board edge matches the preset copper defect value; When the copper deficiency value at the board edge matches the preset copper deficiency value, the sampled layer board is the oriented inner layer board in the circuit board. The board edge orientation acquisition signal is sent to the circuit board pressing system to acquire the pressing orientation parameters of each board edge of the circuit board.

2. The circuit board lamination anti-mixing monitoring method according to claim 1, characterized in that, The process of obtaining the lamination orientation parameters of the circuit board includes: Obtain the orientation sorting parameters of the orientation inner layer board of the circuit board.

3. The circuit board lamination anti-mixing monitoring method according to claim 2, characterized in that, The step of obtaining the orientation sorting parameters of the orientation inner layer board of the circuit board includes: Obtain the pre-arrangement code of the oriented inner layer plate.

4. The circuit board lamination anti-mixing monitoring method according to claim 2, characterized in that, The step of obtaining the orientation sorting parameters of the orientation inner layer board of the circuit board includes: Obtain the number of edge-mounted layers of the oriented inner layer plate.

5. The circuit board lamination anti-mixing monitoring method according to claim 4, characterized in that, The step of performing lamination sequence processing on the lamination orientation parameters and preset orientation parameters to obtain the lamination sequence difference includes: The difference between the number of injection layers on the plate edge and the preset number of injection layers is calculated to obtain the difference in the pressing sequence layers.

6. The circuit board lamination anti-mixing monitoring method according to claim 5, characterized in that, The step of sending a lamination mixing monitoring signal to the circuit board lamination system based on the lamination sequence difference to adjust the lamination sorting warning for the circuit boards includes: Detect whether the pressing sequence layer difference matches the preset layer difference; When the lamination sequence difference matches the preset layer difference, a lamination sequence signal is sent to the circuit board lamination system.

7. The circuit board lamination anti-mixing monitoring method according to claim 6, characterized in that, The step of detecting whether the pressing sequence layer difference matches the preset layer difference includes: When the lamination sequence difference does not match the preset layer difference, a lamination mis-sequence alarm signal is sent to the circuit board lamination system.

8. A circuit board lamination anti-mixing monitoring device for implementing the circuit board lamination anti-mixing monitoring method as described in any one of claims 1 to 7, characterized in that, include: A lamination orientation acquisition device is used to acquire the lamination orientation parameters of the circuit board; A circuit board anti-mixing detection main board is provided, the input end of which is connected to the output end of the lamination orientation acquisition device. The circuit board anti-mixing detection main board is used to perform lamination sequence processing on the lamination orientation parameters and preset orientation parameters to obtain the lamination sequence difference; and to send a lamination mixing monitoring signal to the circuit board lamination system according to the lamination sequence difference to adjust the lamination sorting warning of the circuit board.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 7.

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