Method for forming an electroplated layer on a battery sheet and use thereof

Abstract

The application provides a method for forming an electroplated layer on a battery piece and application thereof, and the method comprises the following steps: adopting a first anode to perform first electroplating treatment on the battery piece, so as to form an electroplated layer to be compensated on the battery piece, the electroplated layer to be compensated comprises a first thickness area and a second thickness area, the first thickness area is arranged around the second thickness area, and the average thickness of the first thickness area is greater than the average thickness of the second thickness area; and adopting a second anode to perform second electroplating treatment on the battery piece, so as to form an electroplated layer compensation layer on the surface of the electroplated layer to be compensated, and the average thickness of the electroplated layer compensation layer formed on the surface of the second thickness area is greater than the average thickness of the electroplated layer compensation layer formed on the surface of the first thickness area, and the electroplated layer comprises the electroplated layer to be compensated and the electroplated layer compensation layer. Therefore, the electroplated layer compensation can be performed on the area with thinner thickness on the battery piece, the electroplated layer with uniform thickness distribution is obtained, and the conversion efficiency of the battery piece is improved.

Description

Technical Field

[0001] This invention relates to the field of battery technology, and more specifically, to a method for forming an electroplated layer on a battery cell and its application. Background Technology

[0002] Rear Emitter Si Heterojunction (RESH) cells currently utilize copper interconnect technology to electroplate copper and tin grid lines onto an ITO (TCO) conductive film, replacing screen printing of the grid lines. This technology represents an organic integration of RSH cell fabrication and metal plating techniques. The copper electrode grid lines in copper interconnect solar cell technology are achieved through pattern transfer, electroplating, and film removal on a photosensitive adhesive. Horizontal electroplating offers advantages such as high efficiency, high precision, and low cost; therefore, horizontal pattern electroplating lines can be used to produce copper grid lines. However, during horizontal electroplating, uneven thickness distribution of the copper grid line layer (i.e., the electroplated layer) can occur, leading to lower cell conversion efficiency. This invention aims to propose a method for forming an electroplated layer on a solar cell to solve the aforementioned problems. Summary of the Invention

[0003] This invention aims to at least partially solve one of the technical problems in related technologies. Therefore, the object of this invention is to provide a method for forming an electroplated layer on a solar cell and its application. This invention, by compensating for thinner areas on the solar cell with electroplating, obtains an electroplated layer with uniform thickness distribution, thereby reducing the bulk resistivity of the final solar cell, improving its current collection capability, enhancing its conversion efficiency and conductivity, and broadening the process window for copper interconnect RESS solar cells.

[0004] In one aspect of the invention, a method for forming an electroplated layer on a battery cell is provided. According to an embodiment of the invention, the method includes:

[0005] The first anode is used to perform a first electroplating treatment on the battery cell to form an electroplating layer to be compensated on the battery cell. The electroplating layer to be compensated includes a first thickness region and a second thickness region. The first thickness region is arranged around the second thickness region, and the average thickness of the first thickness region is greater than the average thickness of the second thickness region.

[0006] The battery cell is subjected to a second electroplating process using a second anode to form an electroplating compensation layer on the surface of the electroplating layer to be compensated. The average thickness of the electroplating compensation layer formed on the surface of the second thickness region is greater than the average thickness of the electroplating compensation layer formed on the surface of the first thickness region. The electroplating layer includes the electroplating layer to be compensated and the electroplating compensation layer.

[0007] The method for forming an electroplated layer on a solar cell according to an embodiment of the present invention combines a first electroplating process and a second electroplating process to ultimately reduce the unevenness of the thickness of the electroplated layer on the solar cell, greatly improving the uniformity of the electroplated layer thickness, thereby reducing the bulk resistivity of the final solar cell, improving the solar cell's current collection capability, improving the solar cell's conversion efficiency and conductivity, and broadening the process window for copper interconnect RESH solar cells.

[0008] In addition, the method for forming an electroplated layer on a battery cell according to the above embodiments of the present invention may also have the following additional technical features:

[0009] In some embodiments of the present invention, the minimum thickness of the first thickness region is greater than the maximum thickness of the second thickness region; and / or, the minimum thickness of the electroplated compensation layer formed on the surface of the second thickness region is greater than the maximum thickness of the electroplated compensation layer formed on the surface of the first thickness region.

[0010] In some embodiments of the present invention, the method for determining the first thickness region and the second thickness region includes: obtaining a thickness distribution contour map of the electroplated layer to be compensated; marking the boundary points of the region whose thickness needs to be improved in the thickness distribution contour map; determining the region whose thickness needs to be improved as the second thickness region based on each boundary point, and the remaining region as the first thickness region.

[0011] In some embodiments of the present invention, the method for determining the second anode includes: forming the second anode according to the second thickness region, such that the orthographic projection of the second anode on the battery cell covers the second thickness region, and the size of the second anode is the same as the size of the second thickness region along the direction of movement of the battery cell.

[0012] In some embodiments of the present invention, the electroplating rate of the second electroplating process on the surface of the second thickness region is greater than the electroplating rate of the second electroplating process on the surface of the first thickness region; and / or, the electroplating rate of the first electroplating process forming the first thickness region is greater than the electroplating rate of the first electroplating process forming the second thickness region; and / or, the first electroplating process and the second electroplating process are performed alternately.

[0013] In some embodiments of the present invention, the first anode is rectangular, the orthographic projection of the first anode covers the battery cell, and along the moving direction of the battery cell, the size of the first anode is not greater than the size of the battery cell.

[0014] In another aspect of the invention, a method for preparing a solar cell is provided. According to an embodiment of the invention, the electroplated layer of the solar cell is prepared using the method described in the above embodiments. This significantly improves the uniformity of the electroplated layer thickness on the solar cell, thereby reducing the bulk resistivity of the final solar cell, improving its current collection capability, enhancing its conversion efficiency and conductivity, and broadening the process window for copper interconnect RESS solar cells.

[0015] In addition, the method according to the above embodiments of the present invention may also have the following technical solutions:

[0016] In some embodiments of the present invention, the method includes:

[0017] Provide semiconductor substrates;

[0018] A first passivation layer is formed on one side of the semiconductor substrate, and a second passivation layer is formed on the side of the semiconductor substrate away from the first passivation layer;

[0019] An N-type doped layer is formed on the side of the first passivation layer away from the semiconductor substrate, and a P-type doped layer is formed on the side of the second passivation layer away from the semiconductor substrate.

[0020] A first conductive layer is formed on the side of the N-type doped layer away from the first passivation layer, and a second conductive layer is formed on the side of the P-type doped layer away from the second passivation layer.

[0021] A first metallization layer is formed on the side of the first conductive layer away from the N-type doped layer, and a second metallization layer is formed on the side of the second conductive layer away from the P-type doped layer;

[0022] The electroplated layer is formed on the side of the first metallization layer away from the first conductive layer using the method described in the above embodiments;

[0023] And / or, the electroplated layer is formed on the side of the second metallization layer away from the second conductive layer using the method described in the above embodiments.

[0024] In a third aspect, the present invention provides a battery cell. According to an embodiment of the present invention, the battery cell is prepared by the method described in the above embodiments. This greatly improves the uniformity of the electroplated layer thickness on the battery cell, thereby reducing the bulk resistivity of the battery cell, improving the battery cell's current collection capability, and enhancing the battery cell's conversion efficiency and conductivity.

[0025] In a fourth aspect, the present invention provides a battery assembly. According to an embodiment of the invention, the battery assembly has the battery cells described in the above embodiments. Thus, the battery assembly possesses all the advantages of the aforementioned battery cells, which will not be repeated here.

[0026] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0027] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0028] Figure 1 This shows a front view of the fabrication process of the copper grid layer on a solar cell in the related technology;

[0029] Figure 2 Showing Figure 1 A top view of the preparation process;

[0030] Figure 3 A schematic diagram of the electroplating process in related technologies is shown;

[0031] Figure 4 A schematic diagram showing the preparation process of an electroplated layer according to an embodiment of the present invention is displayed;

[0032] Figure 5 This shows a contour plot of the thickness distribution of the electroplated layer according to an embodiment of the present invention;

[0033] Figure 6 This shows a schematic diagram of the structure of a battery cell during the fabrication process of an embodiment of the present invention;

[0034] Figure 7 A schematic diagram of the structure of a battery cell according to another embodiment of the present invention is shown;

[0035] Figure 8 The thickness distribution contour plot of the copper gate line layer in an embodiment of the present invention is shown;

[0036] Figure 9 The diagram shows a contour plot of the thickness distribution of the copper grid layer in the comparative example of the present invention.

[0037] Figure label:

[0038] 1-Battery cell; 11-Semiconductor substrate; 12-First passivation layer; 13-Second passivation layer; 14-N-type doped layer; 15-P-type doped layer; 16-First conductive layer; 17-Second conductive layer; 18-First metallization layer; 19-Second metallization layer; 20-Photosensitive adhesive; 21-Electroplating layer; 22-Electroplating layer protective layer; 31-First anode; 32-Second anode. Detailed Implementation

[0039] The embodiments of the present invention are described in detail below. These embodiments are exemplary and are only used to explain the present invention, and should not be construed as limiting the invention. Where specific techniques or conditions are not specified in the embodiments, they are performed according to the techniques or conditions described in the literature in the art or according to the product instructions. Reagents or instruments used, unless otherwise specified, are all commercially available conventional products.

[0040] The grid lines (i.e., the electroplated layer) of a RESH battery can be formed through horizontal electroplating, as shown in the reference. Figure 1 and Figure 2 In the horizontal electroplating process, the cathode (i.e., the solar cell) is moved within the electroplating solution. The anode is fixedly and symmetrically distributed on the N and P sides of the solar cell. For specific electroplating methods, see [link to electroplating process description]. Figure 3 ,Depend on Figure 3 It can be seen that during the electroplating process, the distribution of electric field lines is concentrated in the edge area of ​​the battery cell and slightly weaker in the central area. Moreover, the circulation capacity of the chemical solution around the battery cell is better than that in the center. The superposition of these two factors leads to uneven distribution of the thickness of the grid line layer (i.e., the electroplated layer) of the battery cell. This results in a thicker grid line layer (i.e., the electroplated layer) formed in the edge area of ​​the battery cell and a thinner grid line layer (i.e., the electroplated layer) formed in the central area of ​​the battery cell. After electroplating, the unevenness of the grid line layer thickness is as high as 37.5%, which will lead to the following consequences: (1) the electroplating parameters cannot be controlled and cannot reach the theoretical value; (2) the inconsistent thickness of the grid line layer affects the conductivity of the grid line electrode, and thus affects the line resistance; (3) the grid line layer (i.e., the electroplated layer) is the conductive base layer of the electroplated protective layer. The unevenness of the grid line layer thickness directly affects the uniformity of the thickness of the electroplated protective layer, resulting in poor solderability. The formula for calculating the unevenness is: unevenness = ((maximum thickness - minimum thickness) / average thickness / 2) * 100%. It should be noted that, in order to show the grid lines on the solar cells, Figure 2 The top view only shows the anode on one side of the RESH cell during the electroplating process; the anode on the other side of the cell is not shown.

[0041] In view of this, in one aspect of the present invention, reference is made to Figure 4A method for forming an electroplated layer 21 on a solar cell is proposed, comprising: performing a first electroplating treatment on the solar cell 1 using a first anode 31 to form an electroplating layer to be compensated on the solar cell 1, the electroplating layer to be compensated including a first thickness region and a second thickness region, the first thickness region surrounding the second thickness region, the average thickness of the first thickness region being greater than the average thickness of the second thickness region; and performing a second electroplating treatment on the solar cell using a second anode 32 to form an electroplating compensation layer on the surface of the electroplating layer to be compensated, wherein the average thickness of the electroplating compensation layer formed on the surface of the second thickness region is greater than the average thickness of the electroplating compensation layer formed on the surface of the first thickness region, the electroplating layer including the electroplating layer to be compensated and the electroplating compensation layer. This allows for compensating electroplating in thinner areas of the solar cell, resulting in an electroplating layer with uniform thickness distribution, thereby reducing the bulk resistivity of the final solar cell, improving the solar cell's current collection capability, improving the solar cell's conversion efficiency and conductivity, and broadening the process window for copper interconnect RESS solar cells.

[0042] The principle behind the method for forming an electroplated layer on the battery cell 1 proposed in this invention, which enables the above-mentioned beneficial effects, will be explained in detail below:

[0043] First, the first anode 31 is used to perform a first electroplating treatment on the solar cell 1. After the first electroplating treatment, the central area of ​​the electroplated layer to be compensated is thinner, while the edge area is thicker. To solve this problem, a second anode 32 is used to perform a second electroplating treatment on the solar cell 1. The second electroplating treatment ensures that the electroplating rate on the thinner area (second thickness area) of the electroplated layer to be compensated is greater than the electroplating rate on the thicker area (first thickness area), thus compensating for the thickness of the thinner area (second thickness area). This results in a thicker electroplated compensation layer on the thinner area of ​​the electroplated layer to be compensated than the thicker area. Therefore, by combining the first and second electroplating treatments, the unevenness of the electroplated layer thickness on the solar cell is reduced, greatly improving the uniformity of the electroplated layer thickness. This reduces the bulk resistivity of the final solar cell, improves its current collection capacity, conversion efficiency, and conductivity, and broadens the process window for copper interconnect RESS solar cells.

[0044] It should be noted that there are no particular restrictions on the types of metals that can be electroplated; any metal that can be electroplated can be electroplated using the method proposed in this invention.

[0045] According to some embodiments of the present invention, the minimum thickness of the first thickness region is greater than the maximum thickness of the second thickness region; and / or, the minimum thickness of the electroplated compensation layer formed on the surface of the second thickness region is greater than the maximum thickness of the electroplated compensation layer formed on the surface of the first thickness region. This further improves the thickness uniformity of the electroplated layer 21.

[0046] According to some embodiments of the present invention, a method for determining a first thickness region and a second thickness region includes:

[0047] (a) The thickness of the electroplated layer to be compensated is measured to obtain a contour map of the thickness distribution of the electroplated layer to be compensated.

[0048] As can be seen from the thickness distribution contour map, the central region of the electroplated layer to be compensated is thinner, while the edge region is thicker. For example, the minimum thickness of the first thickness region is greater than the maximum thickness of the second thickness region.

[0049] (b) Mark the boundary points of the areas where the thickness needs to be improved on the thickness distribution contour map;

[0050] This invention is results-oriented, and through multiple experiments, it determines the areas where the thickness needs to be improved, so as to greatly improve the uniformity of the electroplated layer thickness after the first electroplating treatment and the second electroplating treatment.

[0051] (c) The area where the thickness needs to be improved is determined based on each boundary point as the second thickness area. Specifically, the shape and size of the second thickness area can be obtained by connecting the coordinates of the boundary points, and the remaining area is the first thickness area.

[0052] According to some embodiments of the present invention, the first anode is rectangular, and its orthographic projection covers the solar cell (i.e., the first anode is positioned directly opposite the solar cell). Furthermore, along the direction of movement of the solar cell, the size of the first anode is no larger than the size of the solar cell. It should be noted that the first anode can be rectangular or square, and those skilled in the art can choose flexibly according to actual needs.

[0053] According to some embodiments of the present invention, the method for determining the second anode includes: forming the second anode according to the pattern and size of the second thickness region, such that the orthographic projection of the second anode on the battery cell covers the second thickness region, that is, the second anode is disposed directly facing the second thickness region, and the size of the second anode is the same as the size of the second thickness region, that is, the shape and size of the second anode 32 are the same as those of the second thickness region. Thus, while compensating for the second thickness region, the formation of an electroplating compensation layer in the first thickness region is reduced, further improving the thickness uniformity of the electroplating layer 21.

[0054] As a concrete example, see reference Figure 5First, obtain a contour map of the thickness distribution of the electroplated layer to be compensated, and assign 5mm as the smallest unit of the coordinate axis. This contour map shows that the thickness of the electroplated layer around the solar cell is significantly higher than that inside the cell. Then, determine point A (52mm, 47mm) based on the thickness of the electroplated layer to be compensated, and so on, find the coordinates of other boundary points. Connecting the coordinates of these boundary points yields the shape and dimensions of the second thickness region. The remaining areas constitute the first thickness region. (See attached diagram.) Figure 5 In the process, the area within the frame is the second thickness region, and the area outside the frame is the first thickness region. Finally, a second anode is formed based on the second thickness region, so that the orthographic projection of the second anode on the solar cell covers the second thickness region, and the size of the second anode is the same as the size of the second thickness region. During the second electroplating process, when the solar cell is moved to a position directly opposite the second anode 32, the thickness compensation layer of the electroplated layer to be compensated in the second thickness region can be performed.

[0055] In an embodiment of the present invention, during the first electroplating process of the battery cell using the first anode, since the size of the first anode is generally equal to or slightly smaller than the size of the battery cell, the distribution of the electric field lines of the first anode will be concentrated in the edge region of the battery cell and slightly weaker in the central region of the battery cell. Furthermore, the circulation capacity of the chemical solution around the battery cell is better than that in the central region of the battery cell. The superposition of these two factors results in the electroplating rate of the first electroplating process forming the first thickness region being greater than the electroplating rate of the first electroplating process forming the second thickness region. Consequently, the thickness of the grid line layer formed in the edge region of the battery cell is larger, i.e., the first thickness region, while the thickness of the grid line layer formed in the central region of the battery cell is smaller, i.e., the second thickness region.

[0056] As some specific examples, along the direction of cell movement, the ratio of the size of the first anode to the size of the cell is (0.8-1):1.

[0057] In an embodiment of the present invention, during the second electroplating process of the battery cell using the second anode, since the size of the second anode is significantly smaller than the size of the battery cell, the distribution of the electric field lines of the second anode in the edge region of the battery cell does not have an edge effect. Instead, the distribution in the edge region is relatively loose, and the distance between the battery cell and the second anode in the edge region is relatively far, while the distance between the battery cell and the second anode in the middle region is relatively close. Therefore, the electroplating rate of the second electroplating process on the surface of the middle region (i.e., the second thickness region) is greater than the electroplating rate of the second electroplating process on the surface of the first thickness region (i.e., the edge region).

[0058] In embodiments of the present invention, the order of the first electroplating treatment and the second electroplating treatment is not particularly limited. The existing electroplated layer 21 can be directly subjected to the second electroplating treatment to compensate for thinner areas, followed by the first electroplating treatment to obtain a battery cell with a uniform thickness distribution of the electroplated layer 21. Alternatively, a pre-treated electroplated layer can be formed on the battery cell through the first electroplating treatment, and then the thinner areas of the pre-treated electroplated layer 21 can be compensated through the second electroplating treatment to obtain an electroplated layer 21 with a uniform thickness distribution. Furthermore, the number of first and second electroplating treatments is not particularly limited; those skilled in the art can select the number of first and second electroplating treatments based on the thickness distribution of the pre-treated electroplated layer. For example, after forming a pre-treated electroplated layer on the battery cell through the first electroplating treatment, and then compensating for thinner areas of the pre-treated electroplated layer through the second electroplating treatment, if the thickness distribution of the formed film is still uneven, the above steps can be repeated until a uniformly thick electroplated layer is obtained.

[0059] According to some embodiments of the present invention, the first electroplating treatment and the second electroplating treatment can be performed alternately, that is, the first anode 31 and the second anode 32 are arranged alternately. It should be noted that the alternating arrangement is not particularly limited. For example, during the horizontal electroplating process of the battery cell, the first electroplating treatment can be performed first via the first anode 31, or the second electroplating treatment can be performed first via the second anode 32. The number of second anodes 32 between two adjacent first anodes 31 in the electrolytic cell can be one or more, and those skilled in the art can design it according to actual conditions. Similarly, the number of first anodes 31 between two adjacent second anodes 32 in the electrolytic cell can also be one or more, and those skilled in the art can design it according to actual conditions. Similarly, during the final electroplating of the battery cell, the final first electroplating treatment can be performed via the first anode 31, or the final second electroplating treatment can be performed via the second anode 32, and those skilled in the art can design it according to actual conditions. In general, the arrangement of the first anode 31 and the second anode 32 can be flexibly designed, as long as it can compensate for the second thickness region and form an electroplated layer 21 with a uniform thickness distribution.

[0060] According to some embodiments of the present invention, a protective layer for the electroplated layer can also be formed on the side of the electroplated layer 21 away from the battery cell, the protective layer covering at least a portion of the surface of the electroplated layer 21. Preferably, the protective layer 22 covers the entire electroplated layer 21. For example, when the electroplated layer 21 is copper, the protective layer 22 can be tin. The electroplated layer 21 serves as the base of the protective layer 22, and the uniform thickness distribution of the electroplated layer 21 can improve the uniformity and solderability of the protective layer 22.

[0061] In another aspect, the present invention provides a method for preparing a battery cell. The structure and preparation method of the battery cell are described below:

[0062] According to some embodiments of the present invention, reference Figure 6 Methods for preparing battery cells include:

[0063] S100: Provides a semiconductor substrate;

[0064] In this step, the material of the semiconductor substrate 11 can be selected from materials such as silicon (Si), germanium (Ge), or gallium arsenide (GaAs). For example, the semiconductor substrate can be an amorphous silicon substrate. In terms of conductivity type, the semiconductor substrate can be an N-type semiconductor substrate 11 or a P-type semiconductor substrate 11.

[0065] According to some embodiments of the present invention, the semiconductor substrate 11 may also be texturized to remove impurities and mechanical damage layers from its surface, forming a positive pyramid textured surface. Specifically, the distance between the top and bottom of the pyramid can be 2 μm to 8 μm.

[0066] S200: A first passivation layer is formed on one side of the semiconductor substrate, and a second passivation layer is formed on the side of the semiconductor substrate away from the first passivation layer;

[0067] In this step, the specific types of the first passivation layer 12 and the second passivation layer 13 are not particularly limited; for example, they can be intrinsic amorphous silicon layers, respectively. The methods for preparing the first and second passivation layers are also not particularly limited. For example, the first passivation layer 12 and the second passivation layer 13 can be prepared by PECVD (plasma-enhanced chemical vapor deposition). Specifically, the thickness of the first passivation layer can be 3 nm to 9 nm; and / or, the thickness of the second passivation layer can be 3 nm to 6 nm.

[0068] S300: An N-type doped layer is formed on the side of the first passivation layer away from the semiconductor substrate, and a P-type doped layer is formed on the side of the second passivation layer away from the semiconductor substrate.

[0069] In this step, the method for preparing the N-type doped layer 14 and the P-type doped layer 15 is not particularly limited. For example, the N-type doped layer 14 and the P-type doped layer 15 can be prepared by PECVD, and the specific process parameters can be found in the preparation methods of the N-type doped layer 14 and the P-type doped layer 15 in related technologies. According to some specific embodiments of the present invention, the thickness of the N-type doped layer 14 can be 5 nm to 10 nm; and / or, the thickness of the P-type doped layer 15 can be 5 nm to 15 nm.

[0070] S400: A first conductive layer is formed on the side of the N-type doped layer away from the first passivation layer, and a second conductive layer is formed on the side of the P-type doped layer away from the second passivation layer;

[0071] In this step, the method for preparing the first conductive layer 16 and the second conductive layer 17 is not particularly limited. For example, the first conductive layer 16 and the second conductive layer 17 can be formed by physical vapor deposition. The first conductive layer 16 and the second conductive layer 17 can be ITO (indium tin oxide) transparent conductive films. Specific process parameters can be found in the preparation methods of the first conductive layer 16 and the second conductive layer 17 in related art. According to some specific embodiments of the present invention, the thickness of the first conductive layer 16 and the second conductive layer 17 can be independently 90 nm to 110 nm.

[0072] S500: A first metallization layer is formed on the side of the first conductive layer away from the N-type doped layer, and a second metallization layer is formed on the side of the second conductive layer away from the P-type doped layer.

[0073] In this step, the method for preparing the first metallization layer 18 and the second metallization layer 19 is not particularly limited; for example, the first metallization layer 18 and the second metallization layer 19 can be formed by PVD. According to some specific embodiments of the present invention, the thicknesses of the first metallization layer 18 and the second metallization layer 19 are independently 150 nm to 250 nm. Furthermore, a mask can be applied to the edge of the semiconductor substrate 11, specifically, the adhesive thickness can be 30 μm to 60 μm and the adhesive thickness can be 10 μm to 14 μm.

[0074] S600: Forms an electroplated layer

[0075] In this step, an electroplated layer is formed on the side of the first metallization layer away from the first conductive layer using the above-described electroplating method; and / or, an electroplated layer is formed on the side of the second metallization layer away from the second conductive layer using the above-described electroplating method. This allows for the formation of an electroplated layer 21 with uniform thickness distribution on both the N-side and P-side of the RESS battery. For example, the electroplated layer 21 can be a copper grid layer. Thus, a grid layer with uniform thickness distribution can be formed on both the N-side and P-side of the RESS battery, reducing the bulk resistivity of the RESS battery, improving its current collection capability, and enhancing its efficiency and conductivity.

[0076] According to some embodiments of the present invention, when the electroplated layer 21 is a copper grid line layer, the formation process of the copper grid line layer can refer to the following steps: photosensitive adhesive 20 is coated on the side of the first metallization layer 18 away from the first conductive layer 16 and the side of the second metallization layer 19 away from the second conductive layer 17, respectively, and the photosensitive adhesive 20 completely covers the exposed first metallization layer 18 and the second metallization layer 19; the grid line pattern is laser-printed onto the photosensitive adhesive 20 and exposed according to the design; the exposed photosensitive adhesive 20 is removed by developing solution to form a groove, exposing the underlying metallization layer; the metallization layer is used as the cathode in the electroplating process, and a copper grid line layer can be formed in the groove; furthermore, an electroplated protective layer 22 is formed on the side of the copper grid line layer away from the metallization layer.

[0077] According to some specific embodiments of the present invention, the developing solution can be a Na2CO3 solution, and the concentration of the Na2CO3 solution can be 8-13 g / L.

[0078] According to some embodiments of the present invention, during the copper electroplating process, the electrolyte can be a CuSO4 solution with a concentration of 20–100 g / L. Further, additives can be added to the CuSO4 solution. According to some specific embodiments of the present invention, the thickness of the formed copper grid layer can be 8–10 μm.

[0079] According to some embodiments of the present invention, during the formation of the electroplated protective layer 22, when the metal forming the electroplated protective layer 22 is tin, Sn in the electrolyte... 2+ The concentration of the electrolyte can be 10–50 g / L, and the concentration of methanesulfonic acid can be 100–300 g / L. Furthermore, additives can be added to the electrolyte. According to some specific embodiments of the present invention, the thickness of the formed tin layer can be 2 μm–5 μm.

[0080] According to some embodiments of the present invention, reference Figure 7 After forming the electroplated protective layer 22, excess photosensitive adhesive 20, the first metallization layer 18, and the second metallization layer 19 are removed. Specifically, the remaining photosensitive adhesive 20 and side-sealing adhesive on the surface of the battery cell are removed by NaOH solution, and the exposed first metallization layer 18 and second metallization layer 19 are removed by immersion in a back-etching solution. According to some specific embodiments of the present invention, the concentration of NaOH solution can be 10-20 g / L; the concentration of H2SO4 in the back-etching solution can be 2.5 g / L, and the concentration of H2O2 in the back-etching solution can be 10 g / L.

[0081] According to some embodiments of the present invention, the solar cell can also be subjected to light injection treatment, and the light injection temperature can be 200-220°C and the time can be 60-120s.

[0082] In a third aspect, the present invention provides a battery cell, such as a solar cell. According to an embodiment of the invention, the battery cell is prepared by the method described in the above embodiments. This greatly improves the uniformity of the electroplated layer thickness on the battery cell, thereby reducing the bulk resistivity of the battery cell, improving the battery cell's current collection capability, and enhancing the battery cell's conversion efficiency and conductivity.

[0083] In a fourth aspect, the present invention provides a battery module. According to an embodiment of the present invention, the battery module has the battery cells described in the above embodiments. Therefore, the battery module possesses all the advantages of the aforementioned battery cells, which will not be repeated here. The battery module is a finished module with power generation output function, produced by welding battery cells in series and manufacturing processes such as lamination and encapsulation. Specifically, the battery module includes photovoltaic glass, encapsulation film, battery cells, encapsulation film, backsheet, etc.

[0084] Example

[0085] A copper grid layer is electroplated on the RESH cell, with a target thickness of 14 μm. A pre-treated electroplated layer is obtained through a first electroplating process. A thickness distribution contour map is drawn based on the thickness of the pre-treated electroplated layer to determine the area with a thickness less than 10.8 μm as the second thickness region. A second anode is set according to the size and shape of the second thickness region. A second anode is set between two adjacent first anodes in the electrolytic cell. The total number of anodes in the electrolytic cell is 57. Both the first and second anodes are conductive titanium meshes.

[0086] Comparative Example

[0087] A copper grid layer is electroplated on the RESH cell, with a target thickness of 14 μm. All anodes in the electrolytic cell are primary anodes, with a total of 57 anodes, and all anodes are conductive titanium mesh.

[0088] Thickness tests were performed on the copper gate layer obtained in the examples and comparative examples. The thickness distribution contour plot of the copper gate layer in the examples is attached. Figure 8 The thickness distribution contour map of the copper grid layer in the comparative example is attached. Figure 9 The thickness non-uniformity was calculated based on the maximum and minimum thickness values. The non-uniformity degree was calculated as ((maximum thickness - minimum thickness) / 2 / average thickness) * 100%. The test results are shown in Table 1.

[0089] Table 1

[0090] Example 15.30 13.48 14.27 6.4％ Comparative Example 17.74 7.72 13.36 37.5％

[0091] As can be seen from the table above, the use of the first electroplating treatment and the second electroplating treatment in the embodiment can significantly reduce the thickness unevenness of the copper grid layer.

[0092] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0093] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0094] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0095] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0096] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0097] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A method for forming an electroplated layer on a battery cell, characterized in that, include: The first anode is used to perform a first electroplating treatment on the battery cell to form an electroplating layer to be compensated on the battery cell. The electroplating layer to be compensated includes a first thickness region and a second thickness region. The first thickness region is arranged around the second thickness region, and the average thickness of the first thickness region is greater than the average thickness of the second thickness region. The battery cell is subjected to a second electroplating process using a second anode to form an electroplating compensation layer on the surface of the electroplating layer to be compensated. The average thickness of the electroplating compensation layer formed on the surface of the second thickness region is greater than the average thickness of the electroplating compensation layer formed on the surface of the first thickness region. The electroplating layer includes the electroplating layer to be compensated and the electroplating compensation layer. The method for determining the first thickness region and the second thickness region includes: obtaining a thickness distribution contour map of the electroplated layer to be compensated; marking the boundary points of the region whose thickness needs to be improved in the thickness distribution contour map; determining the region whose thickness needs to be improved as the second thickness region based on each boundary point, and the remaining region as the first thickness region; The method for determining the second anode includes: forming the second anode according to the second thickness region, such that the orthographic projection of the second anode on the solar cell covers the second thickness region; The electroplating rate of the second electroplating process on the surface of the second thickness region is greater than the electroplating rate of the second electroplating process on the surface of the first thickness region.

2. The method according to claim 1, characterized in that, The minimum thickness of the first thickness region of the electroplated layer to be compensated is greater than the maximum thickness of the second thickness region of the electroplated layer to be compensated. And / or, the minimum thickness of the electroplated compensation layer formed on the surface of the second thickness region is greater than the maximum thickness of the electroplated compensation layer formed on the surface of the first thickness region.

3. The method according to claim 1, characterized in that, Along the direction of movement of the battery cell, the size of the second anode is the same as the size of the second thickness region.

4. The method according to claim 1, characterized in that, The electroplating rate at which the first electroplating process forms the first thickness region is greater than the electroplating rate at which the first electroplating process forms the second thickness region. And / or, the first electroplating treatment and the second electroplating treatment are performed alternately.

5. The method according to claim 1, characterized in that, The first anode is rectangular and is positioned directly opposite the battery cell along the direction of movement of the battery cell. The size of the first anode is not greater than the size of the battery cell.

6. A method for preparing a battery cell, characterized in that, The electroplated layer of the battery cell is prepared by the method described in any one of claims 1 to 5.

7. The method according to claim 6, characterized in that, The method includes: Provide semiconductor substrates; A first passivation layer is formed on one side of the semiconductor substrate, and a second passivation layer is formed on the side of the semiconductor substrate away from the first passivation layer; An N-type doped layer is formed on the side of the first passivation layer away from the semiconductor substrate, and a P-type doped layer is formed on the side of the second passivation layer away from the semiconductor substrate. A first conductive layer is formed on the side of the N-type doped layer away from the first passivation layer, and a second conductive layer is formed on the side of the P-type doped layer away from the second passivation layer. A first metallization layer is formed on the side of the first conductive layer away from the N-type doped layer, and a second metallization layer is formed on the side of the second conductive layer away from the P-type doped layer; The electroplated layer is formed on the side of the first metallization layer away from the first conductive layer using the method of any one of claims 1 to 5; And / or, the electroplated layer is formed on the side of the second metallization layer away from the second conductive layer using the method of any one of claims 1 to 5.

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