Method for producing damascene structures

Abstract

The application provides a preparation method of a damascene structure, comprising the following steps: providing a semiconductor structure with a metal structure embedded on a surface, sequentially forming an interlayer barrier layer, an interlayer insulating medium layer, a sacrificial layer and a hard mask layer on the semiconductor structure; forming a plurality of grooves; forming a plurality of contact holes; forming a photoresist layer; removing the photoresist layer on the surface of the hard mask layer and the photoresist layer with a partial thickness in the grooves and the contact holes; removing the hard mask layer; removing the photoresist layer with a remaining thickness in the contact holes and the grooves; forming a diffusion barrier layer; and forming a metal interconnection layer. The application removes the hard mask layer before forming the metal interconnection layer for filling the contact holes and the grooves, reduces the aspect ratio of the contact holes and the grooves which need to be filled with metal materials, avoids the situation that the metal materials filled in the high-aspect-ratio through holes are prone to hole / hollow defects, and improves the reliability and effectiveness of the device.

Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology, specifically to a method for preparing a damascus structure. Background Technology

[0002] As critical dimensions shrink, back-end processes have shifted from aluminum wire interconnects to copper wire interconnects. Furthermore, due to the properties of copper, double damascene processes are now being adopted in these processes. With further reductions in copper linewidth, the filling capability of copper in the double damascene process faces challenges. Smaller linewidths and larger aspect ratios result in smaller copper fill windows, making it easier to generate voids during the process.

[0003] The presence of voids / holes in copper interconnects can lead to two main problems: firstly, the copper wires may break, causing the entire chip to fail; secondly, even if the copper wires remain connected near the voids, electromigration and stress migration can still cause the wires to break over time, significantly shortening their lifespan and leading to reliability failure. Summary of the Invention

[0004] This application provides a method for preparing a damascus structure, which can solve the problem that in the current damascus process, the filling of high aspect ratio through holes with metal materials easily results in voids / cavities.

[0005] On one hand, embodiments of this application provide a method for preparing a damascus structure, including: A semiconductor structure with a metal structure embedded on its surface is provided, wherein an interlayer barrier layer, an interlayer insulating dielectric layer, a sacrificial layer and a hard mask layer are sequentially formed on the semiconductor structure. The hard mask layer, the sacrificial layer, and a portion of the thickness of the interlayer insulating dielectric layer are etched to obtain multiple trenches; The remaining thickness of the interlayer insulating dielectric layer and the interlayer barrier layer is etched into a portion of the trench to the surface of the metal structure to obtain a plurality of contact holes; A photoresist layer is formed, which fills the contact holes and the trenches, and covers the hard mask layer; Remove the photoresist layer on the upper surface of the hard mask layer and a portion of the photoresist layer in the trench and the contact hole, wherein the upper surface of the remaining photoresist layer is not higher than the lower surface of the hard mask layer; Remove the hard mask layer; Remove the remaining photoresist layer in the contact holes and the trenches; A diffusion barrier layer is formed, which covers the sidewalls of the contact hole and the bottom and sidewalls of the trench; A metal interconnect layer is formed, which fills the contact holes and the trenches.

[0006] Optionally, in the method for preparing the damascus structure, the thickness of the sacrificial layer is 200 Å to 500 Å.

[0007] Optionally, in the method for fabricating the damascus structure, after removing the hard mask layer and before removing the remaining photoresist layer in the contact holes and the trenches, the method further includes: An isotropic dry etching process is used to etch away a portion of the sacrificial layer.

[0008] Optionally, in the method for preparing the damascus structure, the thickness of the portion of the sacrificial layer removed by etching is 100 Å to 200 Å.

[0009] Optionally, in the method for fabricating the damascus structure, a dry etching process is used to remove the photoresist layer on the upper surface of the hard mask layer and a portion of the photoresist layer in the trench and the contact hole.

[0010] Optionally, in the method for preparing the damascus structure, an ashing process is used to remove the remaining thickness of the photoresist layer in the contact holes and the trenches.

[0011] Optionally, in the method for preparing the damascus structure, a dry etching process is used to remove the hard mask layer.

[0012] Optionally, in the method for preparing the damascus structure, the metal interconnect layer is formed by an electroplating process.

[0013] Optionally, in the method for preparing the damascus structure, after forming the diffusion barrier layer and before forming the metal interconnect layer, the method further includes: A metal buffer layer is formed, which covers the diffusion barrier layer.

[0014] Optionally, in the method for preparing the damascus structure, the thickness of the metal buffer layer is 300 Å to 500 Å.

[0015] Optionally, in the method for preparing the damascus structure, the metal buffer layer is formed using a physical vapor deposition process.

[0016] Optionally, in the method for preparing the damascus structure, after forming the metal interconnect layer, the method further includes: The sacrificial layer and the metal interconnect layer extending beyond the upper surface of the interlayer insulating dielectric layer are removed using a chemical mechanical polishing process.

[0017] The technical solution of this application has at least the following advantages: This application reduces the aspect ratio of contact holes and trenches that require metal filling by forming a photoresist layer before forming the metal interconnect layer that fills the contact holes and trenches, removing the photoresist layer on the upper surface of the hard mask layer and a portion of the photoresist layer in the trenches and contact holes, removing the hard mask layer and the remaining thickness of the photoresist layer in the contact holes and trenches, thereby avoiding the occurrence of hole / void defects when filling high aspect ratio vias with metal material, and improving the reliability and effectiveness of the device. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0019] Figure 1 This is a flowchart of the method for preparing the damascus structure according to an embodiment of the present invention; Figures 2-10 This is a schematic diagram of the semiconductor structure in each process step of preparing the damascus structure according to an embodiment of the present invention; The reference numerals in the attached figures are explained as follows: 10-Substrate, 11-Semiconductor structure, 21-Interlayer insulating dielectric layer, 22-Metal structure, 30-Interlayer barrier layer, 40-Interlayer insulating dielectric layer, 50-Sacrificial layer, 51-Sacrificial layer with remaining thickness, 60-Hard mask layer, 71-Trench, 72-Contact hole, 80-Photoresist layer, 91-Diffusion barrier layer, 92-Metal interconnect layer. Detailed Implementation

[0020] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0021] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0022] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0023] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0024] This application provides a method for preparing a damascus steel structure, referencing... Figure 1 , Figure 1 This is a flowchart of the method for preparing the damascus structure according to an embodiment of the present invention.

[0025] Further reference Figures 2-10 , Figures 2-10 This is a schematic diagram of the semiconductor structure in each process step of preparing the damascus structure according to an embodiment of the present invention.

[0026] The method for preparing the damascus structure provided in this application includes: First, step S1: as Figure 2 As shown, a semiconductor structure 11 with a metal structure 22 embedded on its surface is provided. An interlayer barrier layer 30, an interlayer insulating dielectric layer 40, a sacrificial layer 50, and a hard mask layer 60 are sequentially formed on the semiconductor structure 11. Specifically, the semiconductor structure 11 may include a substrate 10 and an interlayer insulating dielectric layer 21, with the metal structure 22 formed within the interlayer insulating dielectric layer 21. A diffusion barrier layer (not shown) may also be present between the metal structure 22 and the interlayer insulating dielectric layer 21 to prevent metal ions from the metal structure 22 from diffusing into the interlayer insulating dielectric layer 21.

[0027] It is worth noting that conventional film layers required by some devices, such as metal layers, insulating layers, etc., may also be formed between the substrate 10 and the interlayer insulating dielectric layer 21. This application does not impose any limitations on the film layers between the substrate 10 and the interlayer insulating dielectric layer 21.

[0028] In this embodiment, the interlayer insulating dielectric layer 21 and the interlayer insulating dielectric layer 40 can both be made of SiCOH; the interlayer barrier layer 30 can be made of SiCN; the sacrificial layer 50 can be made of TEOS; and the hard mask layer 60 can be made of TiN.

[0029] Preferably, the thickness of the interlayer insulating dielectric layer 40 can be 1000 Å to 3000 Å; the thickness of the sacrificial layer 50 can be 200 Å to 500 Å; and the thickness of the hard mask layer 60 can be 500 Å to 1000 Å.

[0030] Then, step S2: as Figure 3 As shown, the hard mask layer 60, the sacrificial layer 50, and a portion of the interlayer insulating dielectric layer 40 are etched to obtain a plurality of trenches 71. Specifically, photolithography or dry etching processes can be used to etch the hard mask layer 60, the sacrificial layer 50, and a portion of the interlayer insulating dielectric layer 40 to obtain a plurality of trenches 71.

[0031] Next, step S3: as follows Figure 3 As shown, the remaining thickness of the interlayer insulating dielectric layer 40 and the interlayer barrier layer 30 is etched into the surface of the metal structure 22 within a portion of the trench 71 to obtain a plurality of contact holes 72. Specifically, photolithography or dry etching processes can be used to continue etching the remaining thickness of the interlayer insulating dielectric layer 40 and the interlayer barrier layer 30 into the surface of the metal structure 22 within a portion of the trench 71 to obtain a plurality of contact holes 72.

[0032] In this embodiment, steps S2 and S3 can be completed in the same photolithography and dry etching process, without needing to be divided into two separate photolithography and dry etching processes.

[0033] Further, step S4: as Figure 4 As shown, a photoresist layer 80 is formed, which fills the contact hole 72 and the trench 71, and covers the hard mask layer 60.

[0034] Next, step S5: as follows Figure 5 As shown, a portion of the photoresist layer 80 of the hard mask layer 60, the trench 71, and the contact hole 72 is removed from the upper surface of the photoresist layer 80, wherein the upper surface of the remaining photoresist layer 80 is not higher than the lower surface of the hard mask layer 60.

[0035] Specifically, a dry etching process is used to remove a portion of the photoresist layer 80 on the upper surface of the hard mask layer 60, as well as a portion of the photoresist layer 80 in the trenches 71 and the contact holes 72. During the dry etching process to remove the portion of the photoresist layer 80, the reactive gases involved in the dry etching include, but are not limited to, CF4.

[0036] Next, step S6: as follows Figure 6 As shown, the hard mask layer 60 is removed. Specifically, the hard mask layer 60 can be removed using a dry etching process.

[0037] Furthermore, after removing the hard mask layer 60, as... Figure 7 As shown, the method for preparing the damascus structure may further include: using an isotropic dry etching process to etch away a portion of the sacrificial layer 50 to obtain a sacrificial layer 51 of remaining thickness.

[0038] Preferably, the thickness of the portion of the sacrificial layer 50 removed by etching can be 100 Å to 200 Å.

[0039] Next, step S7: as follows Figure 8 As shown, the remaining thickness of the photoresist layer 80 in the contact hole 72 and the trench 71 is removed. Specifically, an ashing process can be used to remove the remaining thickness of the photoresist layer 80 in the contact hole 72 and the trench 71.

[0040] Furthermore, after removing the remaining photoresist layer 80 in the contact hole 72 and the trench 71 using an ashing process, a wet cleaning process can be used to clean the semiconductor structure with the formed trench 71 and contact hole 72 to thoroughly remove the residual photoresist layer 80 and other polymer impurities on the semiconductor structure.

[0041] Next, step S8: as Figure 9 As shown, a diffusion barrier layer 91 is formed, which covers the sidewalls of the contact hole 72 and the bottom and sidewalls of the trench 71. Forming the diffusion barrier layer 91 effectively prevents the diffusion of metal ions from the metal material subsequently filling the contact hole 72 and the trench 71, thus improving the reliability of the device.

[0042] Preferably, the diffusion barrier layer 91 is made of tan nitride, and the thickness of the diffusion barrier layer 91 is between 200 Å and 300 Å.

[0043] Furthermore, after forming the diffusion barrier layer 91, the method for fabricating the damascus structure may further include: forming a metal buffer layer (not shown), which covers the diffusion barrier layer 91. The formation of this metal buffer layer facilitates the subsequent deposition of the metal interconnect layer 92, improves the thickness uniformity and deposition quality of the metal interconnect layer 92, and provides a better fit with the sidewalls of the trench 71 and contact hole 72, thus providing a prerequisite for avoiding voids / cavities in the metal material of the trench 71 and contact hole 72.

[0044] Preferably, the thickness of the metal buffer layer is 300 Å to 500 Å.

[0045] Preferably, the metal buffer layer can be made of copper.

[0046] In this embodiment, the metal buffer layer can be formed using a physical vapor deposition (PVD) process.

[0047] Next, step S9: as Figure 10 As shown, a metal interconnect layer 92 is formed, which fills the contact hole 72 and the trench 71.

[0048] Preferably, the metal interconnect layer 92 is formed by electroplating.

[0049] Preferably, the metal interconnect layer 92 can be made of copper.

[0050] Furthermore, after forming the metal interconnect layer 92, the method for preparing the damascus structure further includes: using a chemical mechanical polishing process to remove the sacrificial layer 50, the diffusion barrier layer 91, and the metal interconnect layer 92 that extend beyond the upper surface of the interlayer insulating dielectric layer 40.

[0051] Furthermore, in an embodiment where a portion of the thickness of the sacrificial layer 50 is etched away to obtain the remaining thickness of the sacrificial layer 51, after the metal interconnect layer 92 is formed, the method for preparing the damascus structure further includes: using a chemical mechanical polishing process to remove the remaining thickness of the sacrificial layer 51, the diffusion barrier layer 91, and the metal interconnect layer 92 that extends beyond the upper surface of the interlayer insulating dielectric layer 40.

[0052] In this application, before forming the metal interconnect layer 92 filling the contact holes 72 and trenches 71, a photoresist layer 80 is first formed; the photoresist layer 80 and a portion of the photoresist layer 80 in the trenches 71 and contact holes 72 are removed from the upper surface of the hard mask layer 60; the hard mask layer 60 and the remaining photoresist layer 90 in the contact holes 72 and trenches 71 are removed; after the above process steps are completed, the metal interconnect layer 92 filling the contact holes 72 and trenches 71 is formed; finally, the sacrificial layer 50, the diffusion barrier layer 91, and the metal interconnect layer 92 extending beyond the upper surface of the interlayer insulating dielectric layer 40 are removed by grinding. This application provides an embodiment... The fabrication method of the damascus structure can reduce the aspect ratio of the metal material to be filled. This is mainly because it reduces the thickness of the hard mask layer 60 and part of the thickness of the sacrificial layer 51 before filling the contact holes 72 and trenches 71 with metal material. This avoids the occurrence of hole / void defects when filling the high aspect ratio vias (trenches 71, especially contact holes 72) with metal material. This avoids the failure of the entire chip due to the breakage of the copper wires (metal interconnect layer 92) in the contact holes 72 and trenches 71. It also avoids the open circuit of the copper wires (metal interconnect layer 92) due to electromigration and stress migration during subsequent long-term use, thereby improving the lifespan of the device and improving the reliability and effectiveness of the device.

[0053] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.

Claims

1. A method for preparing a damascus structure, characterized in that, include: A semiconductor structure with a metal structure embedded on its surface is provided, wherein an interlayer barrier layer, an interlayer insulating dielectric layer, a sacrificial layer and a hard mask layer are sequentially formed on the semiconductor structure. The hard mask layer, the sacrificial layer, and a portion of the thickness of the interlayer insulating dielectric layer are etched to obtain multiple trenches; The remaining thickness of the interlayer insulating dielectric layer and the interlayer barrier layer is etched into a portion of the trench to the surface of the metal structure to obtain a plurality of contact holes; A photoresist layer is formed, which fills the contact holes and the trenches, and covers the hard mask layer; Remove the photoresist layer on the upper surface of the hard mask layer and a portion of the photoresist layer in the trench and the contact hole, wherein the upper surface of the remaining photoresist layer is not higher than the lower surface of the hard mask layer; Remove the hard mask layer; Remove the remaining photoresist layer in the contact holes and the trenches; A diffusion barrier layer is formed, which covers the sidewalls of the contact hole and the bottom and sidewalls of the trench; A metal interconnect layer is formed, which fills the contact holes and the trenches; The method for fabricating the damascus structure, after removing the hard mask layer and before removing the remaining photoresist layer in the contact holes and trenches, further includes: An isotropic dry etching process is used to etch away a portion of the sacrificial layer.

2. The method for preparing the damascus structure according to claim 1, characterized in that, The thickness of the sacrificial layer is 200 Å to 500 Å.

3. The method for preparing the damascus structure according to claim 1, characterized in that, The thickness of the portion of the sacrificial layer removed by etching is 100 Å to 200 Å.

4. The method for preparing the damascus structure according to claim 1, characterized in that, The photoresist layer on the upper surface of the hard mask layer and a portion of the photoresist layer in the trench and the contact hole are removed by a dry etching process.

5. The method for preparing the damascus structure according to claim 1, characterized in that, The remaining photoresist layer in the contact holes and trenches is removed using an ashing process.

6. The method for preparing the damascus structure according to claim 1, characterized in that, The hard mask layer is removed using a dry etching process.

7. The method for preparing the damascus structure according to claim 1, characterized in that, The method for fabricating the damascus structure, after forming the diffusion barrier layer and before forming the metal interconnect layer, further includes: A metal buffer layer is formed, which covers the diffusion barrier layer.

8. The method for preparing the damascus structure according to claim 7, characterized in that, The thickness of the metal buffer layer is 300 Å to 500 Å.

9. The method for preparing the damascus structure according to claim 1, characterized in that, After forming the metal interconnect layer, the method for preparing the damascus structure further includes: The sacrificial layer and the metal interconnect layer extending beyond the upper surface of the interlayer insulating dielectric layer are removed using a chemical mechanical polishing process.

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