Method and circuit assembly for operating a semiconductor switch of at least one half-bridge

Abstract

The invention relates to a method for operating semiconductor switches (HS, LS) of at least one half-bridge (3), wherein the two semiconductor switches (HS, LS) of at least one half-bridge (3) with a corresponding reverse diode (HSD, LSD) are operated by means of a gate drive circuit (2), wherein the operating voltage (11) of a corresponding one of the semiconductor switches (HS, LS) changes from a blocking voltage (12) to at least one intermediate voltage (14) in consideration of a switching point in time at which the corresponding other semiconductor switch (HS, LS) is switched to pass by means of a pass voltage (13). Furthermore, the invention relates to a circuit assembly (1).

Description

Technical Field

[0001] The present invention relates to a method for controlling a semiconductor switch of at least one half-bridge and a circuit assembly. Background Technology

[0002] The pulse converter (or pulse inverter, Pulswechselrichter) is a key component of electric mobility (or electric vehicle, E-Mobilität). Optimization of this component affects the entire drive system of the vehicle, leading to real added value for the end user. The core component of the pulse converter is the so-called rectifier unit, which includes an intermediate circuit and a half-bridge. Optimization of the pulse converter can be performed not only mechanically (half-bridge layout, connections to the intermediate circuit, etc.) but also electrically (optimization of the gate drive circuit, optimization of semiconductor characteristics, etc.).

[0003] A power semiconductor system with a wide bandgap (WBG) is known from US2021 / 0152158A1. In one aspect, the system includes a controller configured to generate a switching control signal and a gate driver configured to receive the switching control signal and generate a switching drive signal in response to the switching control signal. The system also includes a WBG power semiconductor structure element coupled to the gate driver and including a gate terminal for receiving the switching drive signal and configured to be switched in response to the switching drive signal. The switching drive signal has one of three signal levels: a first voltage level above zero, a second voltage level below zero, and a zero voltage level at any given time. As a result, the gate driver controls the WBG power semiconductor structure element with three voltage levels. Summary of the Invention

[0004] The present invention aims to provide a method for controlling a semiconductor switch of at least one half-bridge and a circuit assembly therein that improves the control.

[0005] This objective is achieved according to the invention by means of a method and circuit components. Advantageous designs of the invention are derived from the invention.

[0006] In particular, a method for controlling at least one half-bridge semiconductor switch is provided, wherein two semiconductor switches of at least one half-bridge with corresponding reverse diodes are controlled by means of a gate drive circuit, wherein the control voltage of a corresponding semiconductor switch changes from a blocking voltage to at least one intermediate voltage in consideration of the switching time point at which the corresponding other semiconductor switch switches through by means of a through voltage.

[0007] Furthermore, a circuit assembly is proposed, comprising at least one half-bridge having two semiconductor switches with corresponding reverse diodes, and a gate drive circuit configured to operate the semiconductor switches, wherein the gate drive circuit is further configured to change the operating voltage of the corresponding semiconductor switch from a blocking voltage to at least one intermediate voltage, taking into account the switching time point at which the corresponding other semiconductor switch switches to pass by means of a pass voltage.

[0008] This method and circuit components enable improved control of at least one half-bridge semiconductor switch, reducing oscillations that occur when the semiconductor switch is turned on. This reduces overvoltages caused by oscillations. Furthermore, overall oscillations are reduced, causing them to decay particularly quickly. The underlying idea is to reduce the resistance of the reverse diode of the blocking semiconductor switch by changing the control voltage of the blocking semiconductor switch from the blocking voltage to at least one intermediate voltage, considering the switching time at which the semiconductor switch should be switched to pass or conduction. Because this reduces the resistance of the reverse diode of the blocking semiconductor switch, the oscillation amplitude can be reduced, and thus the overvoltage can be reduced. For example, if the blocking voltage (gate voltage) is -4V and the pass voltage is +15V, an intermediate voltage of 0V can be chosen. For example, the switching sequence would be as follows: both semiconductor switches are in the blocking state (in the case of a gate voltage of -4V). One of the semiconductor switches should be switched to pass, that is, conduction (in the case of a gate voltage of +15V). Taking into account the switching time of the semiconductor switch, the operating voltage of the corresponding semiconductor switch changes from the blocking voltage (-4V) to the intermediate voltage (0V). Simultaneously or immediately afterward, the operating voltage of the semiconductor switch that should be switched to pass can then change from the blocking voltage (-4V) to the pass voltage (+15V). After the pulse duration (in the corresponding pulse mode) set accordingly, the operating voltage of the semiconductor switch returns to the blocking voltage. In particular, this process is then repeated for the other of the two semiconductor switches in a corresponding manner, wherein the corresponding "roles" are exchanged during operation.

[0009] By changing the control voltage of one semiconductor switch from the blocking voltage to an intermediate voltage, the resistance of the reverse diode of that semiconductor switch is reduced in particular. As a result, oscillations and initial overvoltages that occur when the (corresponding) other semiconductor switch is turned on are reduced. Each time one semiconductor switch in the half-bridge is (alternatingly) turned on (or switched to pass), the control voltage of the corresponding other semiconductor switch is switched from the blocking voltage to at least one intermediate voltage. In other respects, the control of at least one half-bridge semiconductor switch is performed in a manner known per se.

[0010] The advantages of this invention are that, due to the reduced overvoltage, the semiconductor switch can be designed to be smaller overall. Furthermore, power loss can be reduced because the value of the overlap integral of current and voltage (or superposition integral, i.e., Überlappintegrals) can be decreased by reducing oscillations. This results in reduced requirements for structural space and heat dissipation. Overall, costs can be reduced. In addition, the reduced oscillations also lead to better electromagnetic compatibility (EMV) characteristics.

[0011] Semiconductor switches, especially metal-oxide-semiconductor field-effect transistors (MOSFETs). Specifically, a semiconductor switch is a MOSFET constructed from a semiconductor material with a wide bandgap (e.g., GaN, SiC). In particular, a semiconductor switch is a SiC-MOSFET. A body diode is a diode constructed from the MOSFET itself between the source and drain contacts.

[0012] The blocking state specifically refers to the non-conductive state of a semiconductor switch. The blocking state is set by applying a blocking voltage to the gate of the semiconductor switch. "Pass" specifically refers to the state in which the semiconductor switch is conductive. The pass (state) is set by applying a pass voltage to the gate of the semiconductor switch.

[0013] Intermediate voltage is especially a voltage with a value between blocking voltage and through voltage. Intermediate voltage can be 0V.

[0014] In particular, the gate drive circuit may include a control device and multiple gate drivers. The control device provides a control voltage for operating the gate drivers. Specifically, the control voltage is configured to operate a pulse pattern (e.g., in the form of pulse width modulation) for manipulating the semiconductor switches of the multiple half-bridges. The gate drivers receive the control voltage and generate gate voltages corresponding to the control voltages, which are supplied to the respective gate contacts of the semiconductor switches. The control device and the gate drivers may also be configured together as an integrated circuit.

[0015] Circuit components, particularly control devices, can be constructed individually or collectively as a combination of hardware and software, for example, as program code implemented on a microcontroller or microprocessor. Alternatively, these components can be configured individually or collectively as application-specific integrated circuits (ASICs) and / or field-programmable gate arrays (FPGAs).

[0016] In one embodiment, the operating voltage of a semiconductor switch is configured to undergo a sequence of intermediate voltages, taking into account the switching time points. This can further reduce the occurrence of oscillations. The quantity, value, and duration of the intermediate voltages can be specified and / or determined, for example, empirically and / or by means of simulation.

[0017] In one embodiment, the control voltage of a semiconductor switch is configured such that, before or after a predetermined time interval when the corresponding other semiconductor switch is switched to pass, the control voltage changes from a blocking voltage to at least one intermediate voltage and / or begins to experience an intermediate voltage sequence before or after the switching time. Thus, when the other semiconductor switch switches to pass, the control voltage of the non-conductive semiconductor switch is already at an intermediate voltage. This can particularly effectively reduce oscillations because the resistance of the reverse diode of one semiconductor switch has already decreased when the other semiconductor switch is turned on. Alternatively, the control voltage can be set to an intermediate voltage at a predetermined time interval after the switching time. For example, the predetermined time interval can be specified empirically based on test sequence and / or from simulation to effectively reduce oscillations and overvoltages.

[0018] In one embodiment, at least one intermediate voltage and / or a sequence of intermediate voltages is configured to exist for a predetermined duration. For example, the predetermined duration can be specified empirically based on test sequence and / or from simulation to effectively reduce oscillations and overvoltages. The predetermined duration includes, for example, at least one time period during which another semiconductor switch is switched on. However, in principle, the predetermined duration can also be shorter or longer.

[0019] In one embodiment, the blocking voltage is configured to be changed to at least one intermediate voltage and / or a sequence of intermediate voltages, taking into account the junction temperature and / or intermediate loop voltage and / or phase current of a semiconductor switch in a half-bridge. This allows selection of at least one intermediate voltage and / or a sequence of intermediate voltages based on the state of a semiconductor switch and / or the state of circuit components (intermediate loop, half-bridge, etc.). This enables dynamic matching to the current state. In particular, the timing and / or value and / or duration of the intermediate voltage and / or the sequence of intermediate voltages can be determined considering the junction temperature and / or intermediate loop voltage and / or phase current of a semiconductor switch in a half-bridge. For example, the timing, height, and / or duration of one or more intermediate voltages can be set based on a characteristic curve (or characteristic domain, i.e., Kennfeld) (e.g., a lookup table), where the corresponding values ​​in the characteristic curve depend on the phase current, intermediate loop voltage, and / or junction temperature, which are stored and can be retrieved.

[0020] In one improved embodiment, the value of at least one intermediate voltage and / or the value of a sequence of intermediate voltages is determined from the value of the junction temperature and / or the value of the intermediate loop voltage and / or the value of the phase current of a semiconductor switch. Thus, the value of at least one intermediate voltage and / or the value of the sequence of intermediate voltages can be directly influenced by the state of the circuit components. The type of influence can be stored, for example, in the form of one or more characteristic lines and / or in the form of a function in the gate drive circuit. Then, in one or more characteristic lines and / or one or more functions, the value of at least one intermediate voltage and / or the value of the sequence of intermediate voltages, depending on the value of the junction temperature and / or the value of the intermediate loop voltage and / or the value of the phase current of a semiconductor, is stored and can be retrieved. The characteristic lines and / or functions can be specified and / or determined, for example, based on experience and / or by means of simulation.

[0021] In another embodiment, the sequence of changing the blocking voltage to at least one intermediate voltage or intermediate voltage is executed only if the junction temperature of a semiconductor switch is below a predetermined temperature threshold and / or if the intermediate loop voltage is below a predetermined intermediate loop voltage threshold and / or if the phase current is below a predetermined current threshold. This improves safety. In particular, it prevents bridge short circuits under certain boundary conditions. In a pulse converter including circuit components operating at a low current with a defined efficiency under partial load, a sequence of changes from the blocking voltage to at least one intermediate voltage and / or intermediate voltage can then occur; in the case of higher currents, where the risk of bridge short circuits increases, the control voltage can, however, remain at the blocking voltage. The corresponding thresholds can be specified here empirically and / or through simulation.

[0022] In one embodiment of the circuit assembly, the circuit assembly is configured to have at least three half-bridges, wherein the gate drive circuit manipulates at least three half-bridges according to a predetermined pulse pattern, thereby constructing a multiphase pulse converter. In principle, more half-bridges can also be provided, such as six half-bridges, thereby constructing a six-phase pulse converter.

[0023] Other features of the circuit component design scheme are derived from the description of the method's design scheme. The advantages of the circuit component are the same here as in the case of the method's design scheme.

[0024] Additionally, a means of transportation is proposed, comprising at least one circuit component according to one of the described embodiments. The means of transportation is particularly a motor vehicle, such as an electric vehicle or a hybrid vehicle. However, in principle, the means of transportation can also be other land, rail, water, air, or space vehicles, such as drones or air taxis. Attached Figure Description

[0025] The invention will then be explained in more detail with reference to the accompanying drawings and preferred embodiments. Herein: Figure 1 A schematic diagram of an implementation of the circuit components is shown; Figure 2 A schematic diagram illustrating an implementation of the circuit components and method is shown; Figure 3 A schematic diagram illustrating another embodiment of the circuit components and method is shown; Figure 4 A schematic equivalent circuit diagram is shown for illustrating the methods described in this disclosure based on simulation; Figure 5 This illustrates a case where the methods described in this disclosure are not used (prior art). Figure 4 Simulation of the time-varying electrical parameters of the equivalent circuit diagram; Figure 6 Examples of cases in which the methods described in this disclosure are used are shown. Figure 4 Simulation of the time-varying electrical parameters of the equivalent circuit diagram; Figure 7 A schematic flowchart illustrating an embodiment of a method for manipulating a semiconductor switch of at least one half-bridge is shown. Detailed Implementation

[0026] exist Figure 1 The diagram shows a schematic representation of an embodiment of circuit component 1. Circuit component 1 is arranged, for example, in a vehicle 50, particularly a motor vehicle, and there is, for example, part of a pulse converter 51. However, in principle, circuit component 1 can also be used in other fields.

[0027] Circuit assembly 1 includes a half-bridge 3 and a gate drive circuit 2. Gate drive circuit 2 includes a control device 2-1 and a gate driver 2-2. Control device 2-1 provides a control signal 10 for controlling the gate driver 2-2. Gate driver 2-2 converts the control signal 10 into a control voltage 11 and provides it. Half-bridge 3 includes two semiconductor switches HS,LS, configured, for example, as SiC-MOSFETs. The gates of the semiconductor switches HS,LS are controlled by means of the provided control voltage 11. The methods described in this disclosure are then explained based on circuit assembly 1.

[0028] In the blocking state, the control voltage 11 of the corresponding semiconductor switches HS,LS is set to the blocking voltage (e.g., -4V). To switch to the pass (pass state), the control voltage 11 of the corresponding semiconductor switches HS,LS is set to the pass voltage (e.g., +15V). In addition, at least one intermediate voltage (e.g., 0V) is provided, to which the control voltage 11 can be set.

[0029] The control voltage 11 of one of the semiconductor switches HS,LS changes from a blocking voltage to at least one intermediate voltage when the corresponding semiconductor switch HS,LS switches from a blocking voltage to a passing voltage at a switching time point. This is achieved by means of the corresponding control of the gate drive circuit 2 and the corresponding change of the control voltage 11.

[0030] Circuit component 1 may have additional half-bridges. For the additional half-bridges, the structure and flow during operation are similar to those in the illustrated half-bridge 3. In particular, circuit component 1 may have three half-bridges 3, wherein the gate drive circuit 2 controls the three half-bridges 3 according to a predetermined pulse pattern, thereby constructing a multiphase pulse converter 51.

[0031] Figure 2 The diagram illustrates circuit component 1 ( Figure 1 This diagram illustrates the method described in this disclosure. The diagram is for illustrative purposes only, showing the disclosed method and circuit components. In particular, the corresponding control voltage 11 can have another, particularly more complex, temporal path. A schematic temporal path of the control voltage 11 (in V) of the high-side (HS) semiconductor switch HS and the low-side (LS) semiconductor switch LS is shown. At time point t0, the control voltage 11 of both semiconductor switches HS and LS is set to a blocking voltage 12 (-4V). At time point t1, the low-side semiconductor switch LS should be switched to pass. For this purpose, the control voltage 11 of the low-side semiconductor switch LS is set from the blocking voltage (-4V) to a pass voltage 13 (+15V). Considering this switching time point t1, the control voltage 11 of the high-side semiconductor switch HS is set from the blocking voltage 12 (-4V) to an intermediate voltage 14 (0V). At time point t2, the control voltage 11 of both semiconductor switches HS and LS is again set to the blocking voltage 12 (-4V). At time point t3, the opposite situation exists: the high-side semiconductor switch HS should be switched to pass. Therefore, the operating voltage 11 of the high-side semiconductor switch HS is set from the blocking voltage 12 (-4V) to the pass voltage 13 (+15V). Considering this switching time point t3, the operating voltage 11 of the low-side semiconductor switch LS is set from the blocking voltage 12 (-4V) to the intermediate voltage 14 (0V). This process is then repeated for other time points t4, t5, t6, t7, ..., where time point t4 corresponds to time point t0.

[0032] It can be configured such that, considering switching times t1 and t5, the control voltage 11 of the semiconductor switches HS and LS experiences a sequence of intermediate voltages 14. For example, in addition to an intermediate voltage 14 of 0V, an additional intermediate voltage 14 of 1V can be set. The intermediate voltage 14 of 1V is experienced first, followed by an intermediate voltage 14 of 0V.

[0033] It can be configured such that the operating voltage 11 of a semiconductor switch HS,LS changes from a blocking voltage 12 to at least an intermediate voltage 14 at a predetermined time interval before the corresponding switching time point of another semiconductor switch HS,LS, is switched to the passing switching time point, and / or the sequence of intermediate voltages 14 begins to be experienced at a predetermined time interval Δt before the switching time point. This embodiment is in Figure 3 This is schematically illustrated. This ensures that when the low-side power semiconductor LS switches to pass voltage 13, the high-side power semiconductor HS (HS) is reduced by changing the control voltage 11 from block voltage 12 to intermediate voltage 14. Figure 1 The resistance of the reverse diode (and vice versa). The value of the predetermined time interval Δt can be specified empirically or by simulation. Alternatively, the intermediate loop voltage can also be set at a predetermined time interval after the switching point.

[0034] It can be configured such that at least one intermediate voltage 14 and / or the sequence of intermediate voltages 14 exists for a predetermined duration.

[0035] It can be configured to transform the blocking voltage 12 into at least one intermediate voltage 14 and / or a sequence of intermediate voltages 14 taking into account the phase current I of half-bridge 3 and / or the intermediate loop voltage U and / or the junction temperature T-HS,T-LS of a semiconductor switch HS,LS. Figure 1 The current values ​​of the junction temperatures T-HS, T-LS, one or more intermediate loop voltages U, and one or more phase currents I are supplied to the gate drive circuit 2 by the inverter regulation unit, and / or acquired by means of a suitable sensor.

[0036] Improvedly, the value of at least one intermediate voltage 14 and / or the value of a sequence of intermediate voltages 14 can be determined from the value of the junction temperature T-HS,T-LS of a semiconductor switch HS,LS and / or the value of the intermediate loop voltage U and / or the value of the phase current I. This can be achieved, in particular, by means of characteristic lines and / or functions, wherein the value of one or more intermediate voltages 14 depends on the value of the junction temperature T-HS,T-LS and / or the intermediate loop voltage U and / or the phase current I stored and retrieved when needed.

[0037] Furthermore, it can be configured such that the blocking voltage 12 is changed to at least one intermediate voltage 14 or a sequence of intermediate voltages 14 only when the junction temperature T-HS, T-LS of a semiconductor switch HS is below a predetermined temperature threshold Tmax and / or if the intermediate loop voltage U is below a predetermined intermediate loop voltage threshold Umax and / or if the phase current I is below a predetermined current threshold. The thresholds Tmax, Umax, and Imax can also be predetermined for the gate drive circuit 2, for example.

[0038] exist Figure 4 A schematic equivalent circuit diagram is shown. A rectifier unit is shown, comprising an intermediate circuit 4 with an intermediate circuit capacitor 5 and a half-bridge 3. Half-bridge 3 includes a high-side semiconductor switch HS configured as a MOSFET and a low-side semiconductor switch LS configured as a MOSFET. Each of the two semiconductor switches HS and LS is connected in anti-parallel to a reverse diode HSD,LSD (body diode). Gate drivers 2-2 are also shown on the high and low sides. A motor inductor L connected to half-bridge 3 is also shown.

[0039] A simulation is performed starting from this equivalent circuit diagram to illustrate the method described in this disclosure. Here, Figure 5 The following scenario illustrates a case where the methods described in this disclosure (prior art) are not used. Figure 5 A schematic diagram of the time path when manipulating power semiconductors is shown. The top shows the path of the voltage U-GHS between the gate and source, or at the high-side gate driver 2-2. The bottom shows the path of the phase current I, the voltage U-HSD at the high-side reverse diode HSD, and the voltage U-LSD at the low-side reverse diode LSD. The manipulation voltage between the gate and source of the high-side semiconductor switch HS remains at -4V throughout the path. At 6.05µs, the manipulation voltage of the low-side semiconductor switch LS changes from the blocking voltage (-4V) to the through voltage (+15V). It can be clearly seen that the voltage U-HSD at the high-side reverse diode HSD and the phase current I exhibit strong oscillations. Due to the oscillations, the voltage U-HSD briefly reaches a peak exceeding 600V. Therefore, a strong overvoltage exists. Furthermore, due to the strong oscillations that persist even after 400ns, the EMV (electromagnetic compatibility) performance of the circuit component is also degraded.

[0040] Figure 6 The illustration shows a scenario using the methods described in this disclosure. It illustrates a situation with... Figure 5The same curves are shown. Shortly before the control voltage of the low-side semiconductor switch LS changes from the blocking voltage (-4V) to the pass voltage (+15V), the control voltage of the high-side semiconductor switch HS changes from the blocking voltage (-4V) to the intermediate voltage (0V in this example), which can be clearly seen from the voltage jump U-GHS in the above figure over a time of 6.005µs. Figure 5 Compared to the situation shown, the reduced resistance of the high-side reverse diode HSD results in a significant reduction in both overvoltage and oscillation. After changing the control voltage of the low-side semiconductor switch LS, the voltage U-HSD remains below 450V. The oscillations that occur decay again within approximately 50ns. Therefore, the method and circuit components described in this disclosure result in a significant reduction in overvoltage (“overshoot”) when the semiconductor switches HS,LS are turned on, and the oscillations that occur after turn-on decay significantly faster. Overall, efficiency can be improved during half-bridge operation because it is particularly unnecessary to design the structure for overvoltage, as it does in Figure 5 As shown in the example.

[0041] Figure 7 A schematic flowchart illustrating one embodiment of a method for controlling semiconductor switches of at least one half-bridge is shown. This method is described in relation to a half-bridge, but in principle, multiple half-bridges can be controlled in the same manner, especially in the operation of a pulse converter. The two semiconductor switches of the half-bridge, each with a corresponding reverse diode, are controlled by means of a gate drive circuit. This is achieved, in particular, according to a predetermined pulse pattern, in which one of the two semiconductor switches alternately (or in different ways) switches to conductive (pass-through).

[0042] In measure 100, the control voltage of the high-side semiconductor switch (especially the MOSFET) is changed from the blocking voltage to the intermediate voltage.

[0043] In measure 101, the control voltage of the low-side semiconductor switch (especially the MOSFET) is changed from the blocking voltage to the pass voltage.

[0044] In measure 102, the control voltage of the two semiconductor switches returns to the blocking voltage after the set pulse duration.

[0045] In measure 103, the control voltage of the low-side semiconductor switch is changed from the blocking voltage to the intermediate voltage.

[0046] In measure 104, the control voltage of the high-side semiconductor switch is changed from the blocking voltage to the passing voltage.

[0047] In measure 105, the control voltage of the two semiconductor switches returns to the blocking voltage after the set pulse duration.

[0048] Then repeat steps 100-105.

[0049] Measures 100 and 103 can be configured to be implemented simultaneously with measures 101 and 104. However, measures 100 and 103 can be configured to be implemented before (or alternatively after) measures 101 or 104, or before (or after) the corresponding switching point of these measures, at a predetermined time interval.

[0050] It can be configured to execute a blocking voltage becoming at least one intermediate voltage or a sequence of intermediate voltages only if the junction temperature of a semiconductor switch is below a predetermined temperature threshold and / or if the intermediate loop voltage is below a predetermined intermediate loop voltage threshold and / or if the phase current is below a predetermined current threshold. For this purpose, measure 99 checks, for example, whether one of the thresholds has been exceeded. If this is not the case, measures 100 to 105 are implemented; otherwise, measure 99 is repeated.

[0051] Reference Symbol List 1. Circuit components 2 Gate drive circuit 2-1 Control Equipment 2-2 Gate Driver 3. Half-bridge 11 Controlling Voltage 12 Blocking Voltage 13 Through voltage 14. Intermediate voltage 50 means of transportation 51 Pulse Converter Measures of the methods 99-105 HS High-Side Semiconductor Switch HSD high-side reverse diode LS low-side semiconductor switch LSD low-side reverse diode Phase I current Imax current threshold L Motor Inductance t Time (axis) t0…t7 (Switch) Time Points Δt time interval T-HS Junction Temperature (High-Side Semiconductor Switch) T-LS junction temperature (low-side semiconductor switch) Tmax temperature threshold U Intermediate circuit voltage Umax intermediate loop voltage threshold The voltage between the gate and source of U-GHS (gate drive voltage) Voltage at the U-HSD HS reverse diode The voltage at the U-LSD LS reverse diode.

Claims

1. A method for driving a semiconductor switch (HS,LS) of at least one half-bridge (3), in, Two semiconductor switches (HS, LS) of at least one half-bridge (3) with corresponding reverse diodes (HSD, LSD) are controlled by means of a gate drive circuit (2). In this process, the operating voltage (11) of a corresponding semiconductor switch in the semiconductor switches (HS, LS) changes from the blocking voltage (12) to at least one intermediate voltage (14) when the corresponding other semiconductor switch (HS, LS) switches to the pass position by means of the pass voltage (13). The invention is characterized in that the blocking voltage (12) is transformed into the at least one intermediate voltage (14) or a sequence of intermediate voltages (14) in consideration of at least one of the phase current (I) of the half-bridge (3), the intermediate circuit voltage (U) of the intermediate circuit (4) with the intermediate circuit capacitor (5), and the junction temperature (T-HS,T-LS) of the semiconductor switch (HS,LS).

2. The method according to claim 1, characterized in that, The control voltage (11) of the semiconductor switch (HS,LS) undergoes a sequence of intermediate voltages (14) taking into account the switching time.

3. The method according to claim 1 or 2, characterized in that, The operating voltage (11) of one semiconductor switch (HS,LS) changes from the blocking voltage (12) to at least one intermediate voltage (14) at a predetermined time interval (Δt) before or after the switching time point when the corresponding other semiconductor switch (HS,LS) switches to pass, and / or begins to experience the intermediate voltage (14) at a predetermined time interval (Δt) before or after the switching time point.

4. The method according to claim 1 or 2, characterized in that, The at least one intermediate voltage (14) and / or the sequence of the intermediate voltage (14) are applied for a predetermined duration.

5. The method according to claim 1, characterized in that, The value of at least one intermediate voltage (14) and / or the value of the sequence of intermediate voltages (14) are determined based on the value of the junction temperature (T-HS,T-LS) of the semiconductor switch (HS,LS) and / or the value of the intermediate loop voltage (U) and / or the value of the phase current (I).

6. The method according to claim 1 or 5, characterized in that, The blocking voltage (12) is changed to the at least one intermediate voltage (14) or a sequence of intermediate voltages (14) only when the junction temperature (T-HS, T-LS) of the semiconductor switch (HS, LS) is lower than a predetermined temperature threshold (Tmax) and / or the intermediate loop voltage (U) is lower than a predetermined intermediate loop voltage threshold (Umax) and / or the phase current (I) is lower than a predetermined current threshold (Imax).

7. A circuit assembly (1), comprising: At least one half-bridge (3), with two semiconductor switches (HS, LS) having corresponding reverse diodes (HSD, LSD), and A gate drive circuit (2) is provided for controlling the semiconductor switches (HS, LS). The gate drive circuit (2) further includes a mechanism for changing the control voltage (11) of one of the semiconductor switches (HS, LS) from the blocking voltage (12) to at least one intermediate voltage (14) while taking into account the switching time point at which the other semiconductor switch (HS, LS) switches to pass by means of the pass voltage (13). The invention is characterized in that the blocking voltage (12) is transformed into the at least one intermediate voltage (14) or a sequence of intermediate voltages (14) in consideration of at least one of the phase current (I) of the half-bridge (3), the intermediate circuit voltage (U) of the intermediate circuit (4) with the intermediate circuit capacitor (5), and the junction temperature (T-HS,T-LS) of the semiconductor switch (HS,LS).

8. The circuit assembly (1) according to claim 7, characterized in that, The circuit assembly (1) has at least three half-bridges (3), wherein the gate drive circuit (2) manipulates the at least three half-bridges (3) according to a predetermined pulse pattern to construct a multiphase pulse converter (51).

9. A means of transport (50) comprising at least one circuit component (1) according to any one of claims 7 or 8.

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