Minimizing latency while migrating direct memory access (DMA) mapped pages

Abstract

During a memory reallocation process, a set of memory pages being reallocated are each determined to be enabled for direct memory access (DMA) operations. A pre-access delay is performed concurrently for each memory page in the set of memory pages prior to writing initial data to the set of memory pages.

Description

Technical Field

[0001] This invention generally relates to methods, systems, and computer program products for memory management in computer systems. More specifically, this invention relates to methods, systems, and computer program products for minimizing latency while migrating Direct Memory Access (DMA) mapped pages. Background Technology

[0002] A page is a unit of physical or virtual memory. Some combinations of hardware and operating systems support only one page size, while others support multiple page sizes, such as 16 kilobytes, 64 kilobytes, 16 megabytes, 64 megabytes, and 16 gigabytes. A segment is a unit of physical or virtual memory that comprises one or more pages.

[0003] DMA allows certain hardware devices to directly access physical system memory. Typically, the processor initiates a data transfer and then performs other operations while the transfer is in progress. Mapping a device for DMA access means allocating a buffer in system memory and associating a range of system memory addresses within the buffer with corresponding addresses in the device's memory. Therefore, reading or writing to addresses within the allocated system memory address range actually accesses the DMA-mapped device.

[0004] Interrupts are typically used to signal to the processor that a DMA operation has completed. However, when an interrupt occurs, the operation may not have actually completed, and some data may not have reached its destination. Therefore, when reallocating system memory, some computer systems implement a reallocation delay of a predetermined length before freeing up DMA-mapped memory pages for another use.

[0005] Exemplary embodiments recognize that computer systems implementing predetermined reallocation latency do so as currently implemented when reallocating each DMA-mapped memory page. Therefore, if the memory being reallocated comprises multiple DMA-mapped pages, a separate latency is applied to each DMA-mapped page, resulting in a total latency that is the sum of each individual latency. When reallocating a large amount of memory, for example, in a system with 32 terabytes of memory, the resulting total latency degrades system performance and leads to customer complaints. Therefore, exemplary embodiments recognize an unmet need to reduce the total reallocation latency while still maintaining data integrity. Summary of the Invention

[0006] Exemplary embodiments provide a method, system, and computer program product. One embodiment includes a method that determines, during a memory reallocation process, that each of a set of reallocated memory pages is enabled for DMA operations. The embodiment performs a pre-access delay before writing initial data to the set of memory pages, the pre-access delay being performed concurrently for each memory page in the set.

[0007] The embodiments include a computer-usable program product. The computer-usable program product includes one or more computer-readable storage devices, and program instructions stored on at least one of the one or more storage devices.

[0008] The embodiments include a computer system. The computer system includes one or more processors, one or more computer-readable memories, and one or more computer-readable storage devices, as well as program instructions stored on at least one of the one or more storage devices for execution by at least one of the one or more processors via at least one of the one or more memories.

[0009] From a first aspect, the present invention provides a computer-implemented method comprising: during a memory reallocation process, determining that a set of memory pages to be reallocated are each enabled for direct memory access (DMA) operations; and after the memory reallocation process is completed, performing a pre-access delay before writing initial data to the set of memory pages, the pre-access delay being performed simultaneously for each memory page in the set of memory pages.

[0010] Preferably, the present invention provides a computer-implemented method, further comprising: setting a DMA delay flag for memory pages enabled for DMA operations.

[0011] Preferably, the present invention provides a computer-implemented method wherein a pre-access delay is performed in response to determining that a DMA delay flag is set for a memory page in a set of memory pages.

[0012] Preferably, the present invention provides a computer-implemented method, further comprising: setting a DMA delay flag for a set of memory pages enabled for DMA operations.

[0013] Preferably, the present invention provides a computer-implemented method in which a pre-access delay is performed in response to determining that a DMA delay flag is set for a set of memory pages.

[0014] Preferably, the present invention provides a computer-implemented method in which a pre-access delay is performed by delaying the execution of program instructions by a predetermined amount of time.

[0015] Preferably, the present invention provides a computer-implemented method, further comprising: during a second memory reallocation process, determining that each of the reallocated second set of memory pages is enabled for direct memory access (DMA) operations; and in response to determining that no time period greater than a threshold time period has elapsed since the reallocation of the memory pages enabled for DMA operations in the set of memory pages, after the memory reallocation process is completed, performing a pre-access delay before writing second initial data to the second set of memory pages, the pre-access delay being performed simultaneously for each memory page in the second set of memory pages.

[0016] In another aspect, the present invention provides a computer program product for minimizing latency when migrating DMA-mapped pages. The computer program product includes: one or more computer-readable storage media, and program instructions co-stored on the one or more computer-readable storage media. The program instructions include: program instructions for determining, during a memory reallocation process, that each of a set of reallocated memory pages is enabled for direct memory access (DMA) operations; and program instructions for performing a pre-access delay after the memory reallocation process is completed but before writing initial data to the set of memory pages, the pre-access delay being performed simultaneously for each memory page in the set of memory pages.

[0017] Preferably, the present invention provides a computer program product, further comprising: program instructions for setting a DMA delay flag for a memory page enabled for DMA operation.

[0018] Preferably, the present invention provides a computer program product in which a pre-access delay is performed in response to determining that a DMA delay flag is set for a memory page in a set of memory pages.

[0019] Preferably, the present invention provides a computer program product, further comprising: program instructions for setting DMA delay flags for a set of memory pages enabled for DMA operation.

[0020] Preferably, the present invention provides a computer program product in which a pre-access delay is performed in response to determining that a DMA delay flag is set for a set of memory pages.

[0021] Preferably, the present invention provides a computer program product in which a pre-access delay is performed by delaying the execution of program instructions by a predetermined amount of time.

[0022] Preferably, the present invention provides a computer program product, further comprising: during a second memory reallocation process, determining that each of the reallocated second set of memory pages is enabled for direct memory access (DMA) operations; and in response to determining that no time period greater than a threshold time period has elapsed since the reallocation of the memory pages enabled for DMA operations in the set of memory pages, after the memory reallocation process is completed, performing a pre-access delay before writing second initial data to the second set of memory pages, the pre-access delay being performed simultaneously for each memory page in the second set of memory pages.

[0023] Preferably, the present invention provides a computer program product, wherein the stored program instructions are stored in at least one of one or more storage media of a local data processing system, and wherein the stored program instructions are transmitted from a remote data processing system via a network.

[0024] Preferably, the present invention provides a computer program product in which the stored program instructions are stored in at least one of one or more storage media of a server data processing system, and wherein the stored program instructions are downloaded via a network to a remote data processing system for use in a computer-readable storage device associated with the remote data processing system.

[0025] Preferably, the present invention provides a computer program product, wherein the computer program product is provided as a service in a cloud environment.

[0026] In another aspect, the present invention provides a computer system comprising one or more processors, one or more computer-readable memories, one or more computer-readable storage devices, and program instructions stored on at least one of the one or more storage devices, the program instructions being executable by at least one of the one or more processors via at least one of the one or more memories, the stored program instructions including: program instructions for determining, during a memory reallocation process, that a set of memory pages to be reallocated is each enabled for direct memory access (DMA) operations; and program instructions for performing a pre-access delay after the memory reallocation process is completed but before initial data is written to the set of memory pages, the pre-access delay being performed simultaneously for each memory page in the set of memory pages.

[0027] Preferably, the present invention provides a computer, further comprising: program instructions for setting a DMA delay flag for a memory page enabled for DMA operation.

[0028] Preferably, the present invention provides a computer system in which a pre-access delay is performed in response to determining that a DMA delay flag is set for a memory page in a set of memory pages.

[0029] Preferably, the present invention provides a computer system that further includes: setting a DMA delay flag for a set of memory pages that are enabled for DMA operations.

[0030] Preferably, the present invention provides a computer system in which a pre-access delay is performed in response to determining that a DMA delay flag is set for a set of memory pages.

[0031] Preferably, the present invention provides a computer system further comprising: program instructions for determining, during a second memory reallocation process, that each of the reallocated second set of memory pages is enabled for direct memory access (DMA) operations; and program instructions for performing a pre-access delay after the memory reallocation process is completed and before writing second initial data to the second set of memory pages, in response to determining that no time period greater than a threshold time period has elapsed since the reallocation of memory pages enabled for DMA operations in the set of memory pages, the pre-access delay being performed simultaneously for each memory page in the second set of memory pages.

[0032] In another aspect, the present invention provides a data processing environment including one or more processors, one or more computer-readable memories, and one or more computer-readable storage devices, and program instructions stored on at least one of the one or more storage devices, the program instructions being executable by at least one of the one or more processors via at least one of the one or more memories, the stored program instructions including: program instructions for determining, during a memory reallocation process, that a set of memory pages to be reallocated is each enabled for direct memory access (DMA) operations; and program instructions for performing a pre-access delay after the memory reallocation process is completed but before writing initial data to the set of memory pages, the pre-access delay being performed simultaneously for each memory page in the set of memory pages.

[0033] In another aspect, the present invention provides a memory management subsystem, comprising: a memory controller; and a memory manager configured to cause the memory controller to perform operations including: during a memory reallocation process, determining that each of a set of reallocated memory pages is enabled for direct memory access (DMA) operations; and after the memory reallocation process is completed, performing a pre-access delay before writing initial data to the set of memory pages, the pre-access delay being performed simultaneously for each memory page in the set of memory pages. Attached Figure Description

[0034] Certain novel features considered characteristic of the invention are set forth in the appended claims. However, the invention itself, its preferred modes of use, further objects and advantages, can be best understood by referring to the following detailed description of exemplary embodiments, taken in conjunction with the accompanying drawings:

[0035] Figure 1 A block diagram of a network that can implement exemplary embodiments of a data processing system is depicted;

[0036] Figure 2 A block diagram depicts a data processing system that can implement exemplary embodiments;

[0037] Figure 3 A block diagram depicts an example configuration for minimizing latency when migrating DMA-mapped pages, according to an exemplary embodiment.

[0038] Figure 4 An example of minimizing latency when migrating DMA-mapped pages according to an exemplary embodiment is depicted;

[0039] Figure 5 An example of minimizing latency during the migration of DMA-mapped pages, according to an exemplary embodiment, is depicted;

[0040] Figure 6 A flowchart is depicted illustrating an example process for minimizing latency when migrating DMA-mapped pages, according to an exemplary embodiment.

[0041] Figure 7 A cloud computing environment according to an embodiment of the present invention is described; and

[0042] Figure 8 An abstract model layer according to an embodiment of the present invention is described. Detailed Implementation

[0043] Exemplary embodiments recognize an unmet need to reduce total reallocation latency while maintaining data integrity. Exemplary embodiments also recognize that currently available tools or solutions do not address these needs or provide sufficient solutions for them. Exemplary embodiments used to describe the invention generally address and resolve the aforementioned problems and other issues related to minimizing DMA memory latency.

[0044] The embodiments can be implemented as software applications. Applications implementing the embodiments can be configured as modifications to existing memory management systems, standalone applications operating in conjunction with existing memory management, independent applications, or some combination thereof.

[0045] Specifically, some exemplary embodiments provide a method for determining, during a memory reallocation process, that each of a set of memory pages being reallocated is enabled for DMA operations. The method simultaneously performs a pre-access delay for each DMA-enabled memory page, and then writes initial data to that set of memory pages.

[0046] The embodiment receives a memory reallocation request. A memory reallocation request is a request to move or migrate the contents of a portion of currently used memory to a different location. An example reason for moving a portion of memory contents is to assemble a contiguous region of memory that includes the original portion of the memory. For example, to satisfy an application's request for an adjacent 16-megabyte portion of memory, the memory management system may identify a suitable starting location. However, the proposed contiguous 16-megabyte portion may already be in use, and therefore its contents need to be relocated to another location to free up the required contiguous 16 megabytes for use.

[0047] As part of the memory reallocation process, embodiments determine whether memory pages within a contiguous region of the assembled memory are enabled for use as objects of DMA mapping for DMA operations. Embodiments use any suitable techniques to detect the presence of DMA mappings and save the results of the DMA mapping determination. One embodiment uses metadata maintained by the operating system to detect the presence of DMA mappings. For example, the AIX operating system maintains metadata describing the state of each memory page, including the page size and state (e.g., free, in use, page-in, or page-out), which paging device the page belongs to if it is in the paging space, and whether a DMA mapper is enabled for that page. Other operating systems maintain similar page-related metadata.

[0048] To record the DMA operation status of pages, one embodiment maintains a flag for each page being reallocated or for other subsets of memory. If a page requires latency due to DMA mapping, the flag for that page is set; otherwise, it is cleared. Another embodiment maintains a flag for the entire merged portion of memory. If any page in the entire portion requires latency due to DMA mapping, the flag is set; otherwise, it is cleared. Yet another embodiment uses another currently known technique to record the necessity of latency.

[0049] When recording the DMA operation status of a page, one embodiment also records the time when migration from that page occurs, using any currently known techniques. Then, after the memory reallocation process is complete, the embodiment also references the time when data migration from a particular DMA-mapped page occurred. If sufficient time has elapsed since the migration, the delay has essentially been executed and does not need to be executed again. For example, consider an embodiment that encounters a memory reallocation process for a DMA-mapped page early in the process. By the time the reallocation process is complete, the delay time may have naturally passed, and no additional delay is needed. Therefore, if no delay is required, the embodiment clears any appropriate DMA flags.

[0050] Before releasing a newly assembled contiguous area of ​​memory for use, the memory region can be set to a predetermined initial value. Setting a memory region to its initial value overwrites data previously stored in that region by different applications, preventing previously stored data from being accessed in an unauthorized manner. The initial value is usually zero, but other initial values ​​or patterns of values ​​are also possible. Because the initial value is usually zero, the component that sets one or more initial values ​​is also called a zeroing engine. Additionally, some applications incorrectly assume that newly allocated memory is set to zero or another predetermined value, leading to software errors. Setting a memory region to zero helps prevent these errors. Furthermore, if an application has memory that has already been set to the desired value (e.g., zero), the application itself does not need to perform initialization, resulting in improved application efficiency. Some operating systems also include memory allocation functions that set newly allocated memory to specific values ​​or patterns.

[0051] Current known implementations of systems that set memory regions to predetermined initial values ​​receive one or more memory address ranges, optionally subdividing the ranges into smaller ranges, and use a set of worker threads executing in parallel to set each memory range to its initial value. In one currently known implementation, each memory address range is a 16-megabyte memory page. In another currently known implementation, each memory address range is a memory page smaller than or larger than 16 megabytes. In yet another currently known implementation, each memory address range is a memory segment comprising multiple memory pages. Some currently known implementations receive one or more starting addresses of the memory range to be set, and the ending address or size of the range is a predetermined constant.

[0052] This embodiment modifies a currently known implementation by determining, in the manner described herein, whether any of the input ranges of a memory address has been marked as requiring a pre-access delay. If one or more input ranges of a memory address page require a pre-access delay, the embodiment performs the delay for each memory range simultaneously. One embodiment performs the delay by delaying the process execution by a predetermined amount of time (e.g., 250 ms).

[0053] After the delay (if executed) is complete, the embodiment uses a set of worker threads that execute in parallel with each other to set each memory range to the desired initial value. Finally, the embodiment provides the requester with the requested contiguous memory region that is now allocated and initialized.

[0054] In the field of memory management, the method described herein for minimizing latency while migrating DMA-mapped pages is not available using currently available methods. When the methods of the embodiments described herein are implemented on a device or data processing system, the method includes determining, during a memory reallocation process, the substantial advancement of the functionality of the device or data processing system when each of a set of reallocated memory pages is enabled for DMA operation. The method concurrently performs a pre-access delay for each DMA-enabled memory page and then writes initial data to that set of memory pages.

[0055] Exemplary embodiments are described by way of example only, relating to certain types of parts of memory, latency, initial values, operation, mapping, determination, measurement, devices, data processing systems, environments, components, and applications. Any particular manifestation of these and other similar human factors is not intended to limit the invention. Any suitable manifestation of these and other similar products may be chosen within the scope of the exemplary embodiments.

[0056] Furthermore, exemplary embodiments can be implemented for any type of data, data source, or access to a data source via a data network. Within the scope of this invention, any type of data storage device can provide data locally at a data processing system or via a data network to embodiments of the invention. When embodiments are described using mobile devices, within the scope of exemplary embodiments, any type of data storage device suitable for use with mobile devices can provide data locally at the mobile device or via a data network to that embodiment.

[0057] The exemplary embodiments are described using specific code, designs, architectures, protocols, layouts, diagrams, and tools, which are merely examples and not limitations on the exemplary embodiments. Furthermore, for clarity, specific software, tools, and data processing environments are used in some instances as examples to describe the exemplary embodiments. The exemplary embodiments may be used in conjunction with other equivalent or similar purpose structures, systems, applications, or architectures. For example, within the scope of this invention, other comparable mobile devices, structures, systems, applications, or architectures may be used in conjunction with this embodiment of the invention. The exemplary embodiments may be implemented in hardware, software, or a combination thereof.

[0058] The examples in this disclosure are for illustrative purposes only and are not intended to limit us to the exemplary embodiments. Additional data, operations, actions, tasks, activities, and manipulations may be conceived from this disclosure, and such additional data, operations, actions, tasks, activities, and manipulations may be envisioned within the scope of the exemplary embodiments.

[0059] Any advantages listed herein are merely examples and are not intended to limit the exemplary embodiments. Additional or different advantages may be achieved through specific exemplary embodiments. Furthermore, specific exemplary embodiments may have some, all, or none of the advantages listed above.

[0060] It should be understood that although this disclosure includes a detailed description of cloud computing, the implementation of the teachings set forth herein is not limited to a cloud computing environment. Rather, embodiments of the invention can be implemented in conjunction with any other type of computing environment now known or developed hereafter.

[0061] Cloud computing is a service delivery model that enables convenient, on-demand network access to a shared pool of configurable computing resources (e.g., networks, network bandwidth, servers, processing, storage, applications, virtual machines, and services) that can be rapidly provisioned and released with minimal management effort or interaction with service providers. This cloud model may include at least five features, at least three service models, and at least four deployment models.

[0062] The characteristics are as follows:

[0063] On-demand self-service: Cloud consumers can unilaterally and automatically provide computing power, such as server time and network storage, as needed, without requiring manual interaction with the service provider.

[0064] Wide Area Network (WAN) Access: Capabilities are available on the network and accessed through standard mechanisms that facilitate the use of heterogeneous thin or thick client platforms (e.g., mobile phones, laptops, and PDAs).

[0065] Resource pooling: A provider's computing resources are pooled to serve multiple consumers using a multi-tenant model, where different physical and virtual resources are dynamically allocated and reallocated based on demand. Location independence has significance because consumers typically do not control or know the exact location of the resources provided, but can specify the location at a higher level of abstraction (e.g., country, state, or data center).

[0066] Rapid Flexibility: In some cases, the ability to scale outwards and inwards quickly and flexibly can be provided. For consumers, the available capacity often appears unlimited and can be purchased in any quantity at any time.

[0067] Measurement services: Cloud systems automatically control and optimize resource usage by leveraging metering capabilities at a level of abstraction appropriate to the service type (e.g., storage, processing, bandwidth, and active user accounts). Resource usage can be monitored, controlled, and reported, providing transparency to both the providers and consumers of the services being utilized.

[0068] The service model is as follows:

[0069] Software as a Service (SaaS): The capability offered to consumers is the ability to use the provider's applications running on cloud infrastructure. Applications can be accessed from various client devices through thin client interfaces such as web browsers (e.g., web-based email). Consumers do not manage or control the underlying cloud infrastructure, including the network, servers, operating system, storage, or even individual application capabilities, with the possible exception of limited user-specific application configuration settings.

[0070] Platform as a Service (PaaS): This provides consumers with the ability to deploy consumer-created or acquired applications onto cloud infrastructure using programming languages ​​and tools supported by the provider. Consumers do not manage or control the underlying cloud infrastructure, including networks, servers, operating systems, or storage, but they have control over the deployed applications and the configuration of any application hosting environments.

[0071] Infrastructure as a Service (IaaS): This provides consumers with the capability to deliver processing, storage, networking, and other basic computing resources that enable them to deploy and run any software, which may include operating systems and applications. Consumers do not manage or control the underlying cloud infrastructure, but they do have control over the operating system, storage, deployed applications, and possibly limited control over chosen networking components (e.g., host firewalls).

[0072] The deployment model is as follows:

[0073] Private cloud: Cloud infrastructure operated solely by an organization. It can be managed by the organization or a third party and can exist on-site or off-site.

[0074] Community cloud: Cloud infrastructure shared by several organizations and supporting a specific community with shared concerns (e.g., tasks, security requirements, policies, and compliance considerations). It can be managed by an organization or a third party and can exist on-site or off-site.

[0075] Public cloud: Cloud infrastructure available to the general public or large industrial groups and owned by organizations that sell cloud services.

[0076] Hybrid cloud: A cloud infrastructure is a combination of two or more clouds (private, community, or public) that remain a single entity but are bound together by standardized or proprietary technologies that enable data and applications to be ported together (e.g., cloud bursting for load balancing between clouds).

[0077] Cloud computing environments are service-oriented, focusing on statelessness, loose coupling, modularity, and semantic interoperability. At the heart of cloud computing is the infrastructure of a network of interconnected nodes.

[0078] Refer to the attached diagram, and specifically refer to... Figure 1 and 2 These figures are example diagrams of a data processing environment in which exemplary embodiments can be implemented. Figure 1 and 2 This is merely an example and is not intended to assert or imply any limitation regarding the environment in which different embodiments may be implemented. Specific implementations may make many modifications to the depicted environment based on the following description.

[0079] Figure 1 A block diagram depicts a network in which exemplary embodiments of a data processing system can be implemented. Data processing environment 100 is a computer network in which exemplary embodiments can be implemented. Data processing environment 100 includes network 102. Network 102 is a medium for providing communication links between various devices and computers connected together within data processing environment 100. Network 102 may include connections such as wired, wireless communication links, or fiber optic cables.

[0080] The client or server are merely example roles of certain data processing systems connected to network 102 and are not intended to exclude other configurations or roles of these data processing systems. Servers 104 and 106 are coupled to network 102 along with storage unit 108. Software applications can execute on any computer in data processing environment 100. Clients 110, 112, and 114 are also coupled to network 102. Data processing systems such as server 104 or 106 or clients 110, 112, or 114 may include data and may have software applications or software tools executing on them.

[0081] This is merely an example and does not imply any limitation on this architecture. Figure 1Certain components that may be used in example implementations of the embodiments are depicted. For example, servers 104 and 106 and clients 110, 112, and 114 are depicted as servers and clients only, and are not intended to imply a limitation on the client-server architecture. As another example, within the scope of the exemplary embodiments, the embodiments may be distributed across several data processing systems and data networks as shown, while another embodiment may be implemented on a single data processing system. Data processing systems 104, 106, 110, 112, and 114 also represent example nodes in clusters, partitions, and other configurations suitable for implementing the embodiments.

[0082] Device 132 is an example of the device described herein. For example, device 132 may take the form of a smartphone, tablet computer, laptop computer, client 110 in fixed or portable form, wearable computing device, or any other suitable device. Figure 1 Any software application executing in another data processing system within the device can be configured to execute in a similar manner in device 132. Figure 1 Any data or information stored or generated in another data processing system can be configured to be stored or generated in device 132 in a similar manner.

[0083] Application 105 implements the embodiments described herein. Application 105 is executed in any of servers 104 and 106, clients 110, 112 and 114, and device 132.

[0084] Servers 104 and 106, storage unit 108, clients 110, 112 and 114, and device 132 can be coupled to network 102 using wired connections, wireless communication protocols, or other suitable data connections. Clients 110, 112, and 114 can be, for example, personal computers or network computers.

[0085] In the depicted example, server 104 can provide data, such as boot files, operating system images, and applications, to clients 110, 112, and 114. In this example, clients 110, 112, and 114 can be clients of server 104. Clients 110, 112, 114, or some combination thereof, can include their own data, boot files, operating system images, and applications. Data processing environment 100 can include additional servers, clients, and other devices not shown.

[0086] In the depicted example, data processing environment 100 can be the Internet. Network 102 can represent a collection of networks and gateways that communicate with each other using Transmission Control Protocol / Internet Protocol (TCP / IP) and other protocols. At the heart of the Internet is the backbone of data communication links between master nodes or host computers, including thousands of commercial, government, educational, and other computer systems that route data and messages. Of course, data processing environment 100 can also be implemented as many different types of networks, such as intranets, local area networks (LANs), or wide area networks (WANs). Figure 1 This is intended as an example, not as an architectural limitation on different exemplary embodiments.

[0087] Among other uses, the data processing environment 100 can be used to implement a client-server environment in which exemplary embodiments can be implemented. The client-server environment enables software applications and data to be distributed across a network, allowing applications to function by using interoperability between client-side and server-side data processing systems. The data processing environment 100 can also employ a service-oriented architecture, where interoperable software components distributed across the network can be packaged together as a consistent business application. The data processing environment 100 can also take the form of a cloud and employ a service-delivered cloud computing model to enable convenient, on-demand network access to a shared pool of configurable computing resources (e.g., networks, network bandwidth, servers, processing, memory, storage, applications, virtual machines, and services), which can be rapidly provisioned and released with minimal management effort or interaction with service providers.

[0088] refer to Figure 2 This figure depicts a block diagram of a data processing system that can implement exemplary embodiments. Data processing system 200 is an example of a computer, such as... Figure 1 The servers 104 and 106, or clients 110, 112 and 114, or another type of device in which computer-usable program code or instructions for implementing processing can be configured for exemplary embodiments.

[0089] Data processing system 200 also represents a data processing system or a configuration thereof, such as Figure 1 The data processing system 132 contains computer-usable program code or instructions for implementing the processing of exemplary embodiments. The data processing system 200 is described as a computer by way of example only and is not limited thereto. Without departing from the general description of the operation and function of the data processing system 200 described herein, terms such as... Figure 1 The implementation of device 132 in the form of other devices can be achieved by modifying the data processing system 200, such as by adding a touch interface, and even by removing certain depicted components from the data processing system 200.

[0090] In the depicted example, the data processing system 200 employs a hub architecture, including a Northbridge and memory controller hub (NB / MCH) 202 and a Southbridge and input / output (I / O) controller hub (SB / ICH) 204. A processing unit 206, main memory 208, and graphics processor 210 are coupled to the Northbridge and memory controller hub (NB / MCH) 202. The processing unit 206 may include one or more processors and may be implemented using one or more heterogeneous processor systems. The processing unit 206 may be a multi-core processor. In some implementations, the graphics processor 210 may be coupled to the NB / MCH 202 via an Accelerated Graphics Port (AGP).

[0091] In the depicted example, a local area network (LAN) adapter 212 is coupled to the Southbridge and I / O controller hub (SB / ICH) 204. An audio adapter 216, a keyboard and mouse adapter 220, a modem 222, a read-only memory (ROM) 224, a universal serial bus (USB) and other ports 232, and a PCI / PCIe device 234 are coupled to the Southbridge and I / O controller hub 204 via bus 238. A hard disk drive (HDD) or solid-state drive (SSD) 226 and a CD-ROM 230 are coupled to the Southbridge and I / O controller hub 204 via bus 240. The PCI / PCIe device 234 may include, for example, an Ethernet adapter, an add-in card, and a PC card for a notebook computer. PCI uses a card bus controller, while PCIe does not. The ROM 224 may be, for example, a flash binary input / output system (BIOS). Hard disk drive 226 and CD-ROM 230 may use, for example, integrated drive electronics (IDE), Serial Advanced Technology Attachment (SATA) interface, or variants such as external SATA (eSATA) and micro SATA (mSATA). Super I / O (SIO) device 236 may be coupled to the southbridge and I / O controller hub (SB / ICH) 204 via bus 238.

[0092] Memory, such as main memory 208, ROM 224, or flash memory (not shown), is some example of computer-usable storage devices. Hard disk drives or solid-state drives 226, CD-ROMs 230, and other similar available devices are some examples of computer-usable storage devices that include computer-usable storage media.

[0093] The operating system runs on the processing unit 206. The operating system coordinates and provides services to... Figure 2The data processing system 200 controls various components within it. The operating system can be a commercially available operating system for any type of computing platform, including but not limited to server systems, personal computers, and mobile devices. Object-oriented or other types of programming systems can operate alongside the operating system and provide calls to the operating system from programs or applications executing on the data processing system 200.

[0094] For use in operating systems, object-oriented programming systems, and applications or programs (such as...) Figure 1 The instructions for application 105 are located on a storage device (such as in the form of code 226A on hard disk drive 226) and can be loaded into at least one of one or more memories (such as main memory 208) for execution by processing unit 206. The processes of the exemplary embodiment can be executed by processing unit 206 using computer-implemented instructions that may reside in memory, such as main memory 208, read-only memory 224, or in one or more peripheral devices.

[0095] Furthermore, in one scenario, code 226A can be downloaded from a remote system 201B via network 201A, where a similar code 201C is stored on storage device 201D. In another scenario, code 226A can be downloaded to a remote system 201B via network 201A, where the downloaded code 201C is stored on storage device 201D.

[0096] Figure 1-2 The hardware within it can vary depending on the implementation. Besides... Figure 1-2 In addition to the hardware described herein, or as an alternative, other internal hardware or peripheral devices such as flash memory, equivalent non-volatile memory, or optical disc drives may be used.

[0097] In some illustrative examples, the data processing system 200 may be a personal digital assistant (PDA), which is typically configured with flash memory to provide non-volatile memory for storing operating system files and / or user-generated data. The bus system may include one or more buses, such as a system bus, I / O bus, and PCI bus. Of course, the bus system can be implemented using any type of communication architecture or structure that provides data transfer between different components or devices attached to that architecture or structure.

[0098] The communication unit may include one or more devices for sending and receiving data, such as a modem or network adapter. The memory may be, for example, main memory 208 or a cache, such as the cache found in the Northbridge and memory controller hub 202. The processing unit may include one or more processors or CPUs.

[0099] Figure 1-2 The examples described herein and the examples above are not intended to imply architectural limitations. For example, the data processing system 200 may take the form of a tablet computer, laptop computer, or telephone device, in addition to being a mobile or wearable device.

[0100] When a computer or data processing system is described as a virtual machine, virtual device, or virtual component, the virtual machine, virtual device, or virtual component operates in a manner similar to that of the data processing system 200 using virtualized representations of some or all of the components depicted in the data processing system 200. For example, in a virtual machine, virtual device, or virtual component, processing unit 206 is represented as a virtualized instance of all or some of the hardware processing units 206 available in the host data processing system, main memory 208 is represented as a virtualized instance of all or some portions of the main memory 208 available in the host data processing system, and disk 226 is represented as a virtualized instance of all or some portions of the disk 226 available in the host data processing system. In this case, the host data processing system is represented by data processing system 200.

[0101] refer to Figure 3 The figure illustrates a block diagram of an example configuration for minimizing latency when migrating DMA-mapped pages, according to an exemplary embodiment. Application 300 is... Figure 1 Example of application 105, and in Figure 1 It can be executed in any of the servers 104 and 106, clients 110, 112 and 114, and device 132.

[0102] The reallocation module 310 receives a memory reallocation request, such as moving the contents of a portion of memory to assemble a contiguous region of memory including the original portion. As part of the memory reallocation process, module 310 determines whether memory pages within the contiguous region of the assembled memory are enabled for use in DMA operations as objects of DMA mapping. Module 310 saves the result of the DMA mapping determination. One implementation of module 310 maintains a flag for each page of memory being reallocated. If a page requires latency due to DMA mapping, the page flag is set; otherwise, it is cleared. Another implementation of module 310 maintains a flag for the entire portion of the merged memory. If any page in the entire portion requires latency due to DMA mapping, the flag is set; otherwise, it is cleared. Yet another implementation of module 310 uses another suitable technique to record the necessity of latency.

[0103] When recording the DMA operation status of a page, one implementation of module 310 also records the time when a migration from that page occurred. Then, after the memory reallocation process is complete, the implementation also references the time when a data migration from a particular DMA-mapped page occurred. If sufficient time has elapsed since the migration, the delay has actually been executed and does not need to be executed again. Therefore, if the delay is not required, the implementation of module 310 clears any appropriate DMA flags.

[0104] The initial data writing module 320 modifies a known implementation in the manner described herein by determining whether any of the input ranges of the memory address has been marked as requiring a pre-access delay. If one or more input ranges of a memory address page require a pre-access delay, module 320 performs the delay simultaneously for each memory range. One implementation of module 320 performs the delay by delaying the process execution by a predetermined amount of time (e.g., 250 ms). After the delay is complete, module 320 uses a set of worker threads executing in parallel with each other to set each memory range to the desired initial value. Finally, module 320 provides the requester with the currently allocated and initialized contiguous memory region.

[0105] refer to Figure 4 This figure depicts an example of minimizing latency when migrating DMA-mapped pages according to an exemplary embodiment. This example can be used... Figure 3 The application 300 is used to execute.

[0106] As shown in the figure, application 300 receives a memory reallocation request 402. As part of the memory reallocation process within memory 410, the application determines that page 412 is not an object of DMA mapping, but pages 414 and 416 are. As a result, application 300 constructs a page list 420. In page list 420, a flag for page 412 is cleared, indicating that page 412 will not require latency due to DMA mapping. Flags for pages 414 and 416 are set, indicating that pages 414 and 416 do require latency due to DMA mapping. In another implementation of application 300, page list 420 is replaced by a single flag, which is set if any of pages 412, 414, and 416 are objects of DMA mapping, and cleared otherwise.

[0107] refer to Figure 5 This figure depicts a further example of minimizing latency when migrating DMA-mapped pages according to an exemplary embodiment. The initial data writing module 320 and... Figure 3 The initial data writing module 320 is the same as that in pages 412, 414, and 416 and page list 420. Figure 4 Pages 412, 414, and 416 in the table of contents are the same as page list 420.

[0108] As depicted, in page list 420, flags are set for pages 414 and 416 indicating that pages 414 and 416 do indeed require a delay due to DMA mapping. Note that pages 414 and 416 may be subsets of a larger memory range received by the initial data write module 320. Furthermore, page list 420 depicts the state of only a portion of one or more memory address ranges received by module 320. Because pages 414 and 416 require a delay, the initial data write module 320 performs a pre-allocation delay 510. After delay 510 is complete, module 320 uses a set of worker threads executing in parallel with each other to perform operations 512, 514, and 516. Operation 512 zeros page 412, operation 514 zeros page 414, and operation 516 zeros page 416. After the memory pages are set to the desired values, application 300 provides memory reallocation 520 to the reallocation requester.

[0109] refer to Figure 6 This figure depicts a flowchart of an example process for minimizing latency when migrating DMA-mapped pages, according to an exemplary embodiment. Process 600 can be... Figure 3 The application is implemented in 300.

[0110] In box 602, the application identifies the memory page to be reallocated and migrates the data in that page to another location. In box 604, the application determines whether to enable the reallocated page for DMA operations. If yes (the "Yes" path in box 604), then in box 606, the application sets the DMA delay flag for that page. If no (the "No" path in box 604), or after box 606, in box 608, the application determines whether to reallocate another page. If yes (the "Yes" path in box 608), the application returns to box 602. If no (the "No" path in box 608), then in box 610, the application determines whether to set the DMA flag for memory pages in a set of reallocated pages. If yes (the "Yes" path in box 610), then in box 612, the application performs a pre-access delay. If not (the "No" path in box 610), or after box 612, in box 614, the application writes the initial data to the group of pages and releases the group for use. Then, the application terminates.

[0111] Now for reference Figure 7The figure depicts an exemplary cloud computing environment 50. As shown, the cloud computing environment 50 includes one or more cloud computing nodes 10 to which local computing devices used by cloud consumers can communicate, such as personal digital assistants (PDAs) or cellular phones 54A, desktop computers 54B, laptop computers 54C, and / or automotive computer systems 54N. Nodes 10 can communicate with each other. They can be physically or virtually grouped (not shown) in one or more networks, such as private clouds, community clouds, public clouds, or hybrid clouds or combinations thereof as described above. This allows the cloud computing environment 50 to provide infrastructure, platforms, and / or software as a service, without requiring cloud consumers to maintain resources on their local computing devices. It is understood that the types of computing devices 54A-N depicted are for illustrative purposes only, and that computing nodes 10 and the cloud computing environment 50 can communicate with any type of computerized device via any type of network and / or network-addressable connectivity (e.g., using a web browser).

[0112] Now for reference Figure 8 This demonstrates a cloud computing environment of 50 ( Figure 7 This provides a set of functional abstraction layers. It is to be understood beforehand that the described components, layers, and functions are intended for illustration only, and embodiments of the invention are not limited thereto. As depicted, the following layers and corresponding functions are provided:

[0113] The hardware and software layer 60 includes hardware and software components. Examples of hardware components include: a host 61; a server 62 based on a RISC (Reduced Instruction Set Computer) architecture; a server 63; a blade server 64; a storage device 65; and a network and network components 66. In some embodiments, software components include network application server software 67 and database software 68.

[0114] The virtualization layer 70 provides an abstraction layer from which the following examples of virtual entities can be provided: virtual server 71; virtual storage 72; virtual network 73, including virtual private network; virtual application and operating system 74; and virtual client 75.

[0115] In one example, management layer 80 may provide the following functionalities: Resource Provisioning 81 provides dynamic procurement of computing resources and other resources used to perform tasks within the cloud computing environment. Metering and Pricing 82 provides cost tracking when utilizing resources in the cloud computing environment, as well as billing or invoicing for consuming these resources. In one example, these resources may include application software licenses. Security provides authentication for cloud consumers and tasks, and protection for data and other resources. User Portal 83 provides access to the cloud computing environment for consumers and system administrators. Service Level Management 84 provides cloud resource allocation and management to ensure the required service level is met. Service Level Agreement (SLA) Planning and Fulfillment 85 provides pre-scheduling and procurement of cloud resources, where future needs are anticipated according to the SLA.

[0116] Workload tier 90 provides examples of functionalities that can be leveraged in a cloud computing environment. Examples of workloads and functionalities that can be provided from this tier include: mapping and navigation 91; software development and lifecycle management 92; virtual classroom education delivery 93; data analytics and processing 94; transaction processing 95; and application selection based on cumulative vulnerability risk assessment 96.

[0117] Therefore, in exemplary embodiments, a computer-implemented method, system, or apparatus, and a computer program product are provided for minimizing latency when migrating DMA-mapped pages and other associated features, functions, or operations. Where an embodiment or part thereof is described with respect to a type of device, the computer-implemented method, system, or apparatus, computer program product, or part thereof is adapted or configured for use with appropriate and comparable performance to that type of device.

[0118] Where embodiments are described as being implemented within an application, the delivery of applications in a Software as a Service (SaaS) model is conceivable within the scope of exemplary embodiments. In a SaaS model, the ability to implement an application in an embodiment is provided to a user by executing the application within a cloud infrastructure. Users can access the application using various client devices via a thin client interface such as a web browser (e.g., web-based email) or other lightweight client applications. Users do not manage or control the underlying cloud infrastructure, including the network, servers, operating system, or storage of the cloud infrastructure. In some cases, users may not even have the ability to manage or control the SaaS application. In some other cases, the SaaS implementation of the application may allow for possible exceptions to limited user-specific application configuration settings.

[0119] This invention can be a system, method, and / or computer program product at any possible level of technical detail integration. The computer program product may include a computer-readable storage medium (or media) having computer-readable program instructions thereon for causing a processor to perform aspects of the invention.

[0120] Computer-readable storage media can be tangible devices capable of retaining and storing instructions for use by an instruction execution device. Computer-readable storage media can be, for example, but not limited to, electronic storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer-readable storage media includes the following: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable optical disc read-only memory (CD-ROM), digital multifunction disc (DVD), memory sticks, floppy disks, mechanical encoding devices such as punch cards or recessed structures with instructions recorded thereon, and any suitable combination of the foregoing. As used herein, computer-readable storage media should not be construed as transient signals themselves, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses through fiber optic cables), or electrical signals transmitted through wires.

[0121] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to a suitable computing / processing device, or via a network, such as the Internet, a local area network (LAN), a wide area network (WAN), and / or a wireless network, to an external computer or external storage device. The network may include copper cables, optical fibers, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to a computer-readable storage medium within the respective computing / processing device.

[0122] Computer-readable program instructions used to perform the operations of this invention may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, status setting data, integrated circuit configuration data, or source code or object code written in any combination of one or more programming languages ​​(including object-oriented programming languages ​​such as Smalltalk, C++, etc.) and procedural programming languages ​​(such as the "C" programming language or similar programming languages). The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, to perform aspects of this invention, electronic circuits, including, for example, programmable logic circuits, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), may execute computer-readable program instructions to personalize the electronic circuits by utilizing the status information of the computer-readable program instructions.

[0123] Various aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0124] These computer-readable program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions / actions specified in one or more blocks of a flowchart and / or block diagram. These computer-readable program instructions may also be stored in a computer-readable storage medium that can direct a computer, programmable data processing apparatus, and / or other device to operate in a particular manner, such that the computer-readable storage medium in which the instructions are stored includes an article of writing comprising instructions for implementing aspects of the functions / actions specified in one or more blocks of a flowchart and / or block diagram.

[0125] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer-implemented process, such that the instructions, which execute on the computer, other programmable apparatus or other device, perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0126] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of instructions comprising one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions indicated in the blocks may occur in a different order than indicated in the figures. For example, two blocks shown consecutively may actually be executed substantially simultaneously, or these blocks may sometimes be executed in reverse order, depending on the functions involved. It will also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a dedicated hardware-based system that performs the specified function or action or executes a combination of dedicated hardware and computer instructions.

Claims

1. A computer-implemented method, comprising: During the memory reallocation process, it is determined that each of the reallocated set of memory pages is enabled for direct memory access operations. as well as After the memory reallocation process is completed, a pre-access delay is performed before the initial data is written to the set of memory pages. The pre-access delay is performed simultaneously for each memory page in the set of memory pages.

2. The computer-implemented method according to claim 1 further includes: Set the direct memory access delay flag for memory pages that are enabled for direct memory access operations.

3. The computer-implemented method according to claim 2, wherein, The pre-access delay is executed in response to determining that the direct memory access delay flag is set for a memory page in the set of memory pages.

4. The computer-implemented method according to claim 1 further includes: Set the direct memory access delay flag for the set of memory pages that are enabled for direct memory access operations.

5. The computer-implemented method according to claim 4, wherein, The pre-access delay is executed in response to determining that the direct memory access delay flag is set for the set of memory pages.

6. The computer-implemented method according to claim 1, wherein, The pre-access delay is performed by delaying the execution of program instructions by a predetermined amount of time.

7. The computer-implemented method according to claim 1, further comprising: During the second memory reallocation process, it is determined that each of the second set of memory pages that are reallocated is enabled for direct memory access operations; as well as In response to determining that no time period greater than a threshold time period has elapsed since the reallocation of memory pages enabled for direct memory access operations in the set of memory pages, the pre-access delay is performed after the memory reallocation process is completed and before the second initial data is written to the second set of memory pages. The pre-access delay is performed simultaneously for each memory page in the second set of memory pages.

8. A computer program product for minimizing latency when migrating direct memory access mapped pages, the computer program product comprising: One or more computer-readable storage media, and program instructions commonly stored on the one or more computer-readable storage media, the program instructions comprising: Program instructions for determining, during the memory reallocation process, which enable a set of reallocated memory pages for direct memory access operations; and Program instructions for performing a pre-access delay after the memory reallocation process is completed and before writing initial data to the set of memory pages, the pre-access delay being performed simultaneously for each memory page in the set of memory pages.

9. The computer program product according to claim 8, further comprising: Program instructions for setting the direct memory access delay flag for memory pages that are enabled for direct memory access operations.

10. The computer program product according to claim 9, wherein, The pre-access delay is executed in response to determining that a direct memory access delay flag is set for a memory page in the set of memory pages.

11. The computer program product according to claim 8, further comprising: Program instructions for setting the direct memory access delay flag for the set of memory pages that are enabled for direct memory access operations.

12. The computer program product according to claim 11, wherein, The pre-access delay is executed in response to determining that the direct memory access delay flag is set for the set of memory pages.

13. The computer program product according to claim 8, wherein, The pre-access delay is performed by delaying the execution of program instructions by a predetermined amount of time.

14. The computer program product according to claim 8, further comprising: During the second memory reallocation process, it is determined that each of the second set of memory pages that are reallocated is enabled for direct memory access operations; as well as In response to determining that no time period greater than a threshold time period has elapsed since the reallocation of memory pages enabled for direct memory access operations in the set of memory pages, the pre-access delay is performed after the memory reallocation process is completed and before the second initial data is written to the second set of memory pages. The pre-access delay is performed simultaneously for each memory page in the second set of memory pages.

15. The computer program product according to claim 8, wherein, The stored program instructions are stored in at least one of one or more storage media of the local data processing system, and the stored program instructions are transmitted from a remote data processing system via a network.

16. The computer program product according to claim 8, wherein, The stored program instructions are stored in at least one of one or more storage media of the server data processing system, and wherein the stored program instructions are downloaded via a network to a remote data processing system for use in a computer-readable storage device associated with the remote data processing system.

17. The computer program product according to claim 8, wherein, The computer program product is provided as a service in a cloud environment.

18. A computer system comprising one or more processors, one or more computer-readable memories, and one or more computer-readable storage devices, and program instructions stored on at least one of the one or more storage devices, the program instructions being executable by at least one of the one or more processors via at least one of the one or more memories, the stored program instructions comprising: Program instructions used to determine, during the memory reallocation process, which each of a set of reallocated memory pages is enabled for direct memory access operations. as well as Program instructions for performing a pre-access delay after the memory reallocation process is completed and before writing initial data to the set of memory pages, the pre-access delay being performed simultaneously for each memory page in the set of memory pages.

19. The computer system of claim 18, further comprising: Program instructions for setting the direct memory access delay flag for memory pages that are enabled for direct memory access operations.

20. The computer system according to claim 19, wherein, The pre-access delay is executed in response to determining that a direct memory access delay flag is set for a memory page in the set of memory pages.

21. The computer system according to claim 18, further comprising: Set the direct memory access delay flag for the set of memory pages that are enabled for direct memory access operations.

22. The computer system according to claim 21, wherein, The pre-access delay is executed in response to determining that the direct memory access delay flag is set for the set of memory pages.

23. The computer system according to claim 18, further comprising: Program instructions used to determine, during the second memory reallocation process, that each of the second set of memory pages being reallocated is enabled for direct memory access operations; as well as The program instructions for executing the pre-access delay in response to determining that no time period greater than a threshold period has elapsed since the reallocation of memory pages enabled for direct memory access operations in the second set of memory pages, after the memory reallocation process is completed and before the second initial data is written to the second set of memory pages, the pre-access delay being executed simultaneously for each memory page in the second set of memory pages.

24. A data processing environment comprising one or more processors, one or more computer-readable memories, and one or more computer-readable storage devices, and program instructions stored on at least one of the one or more storage devices, the program instructions being executable by at least one of the one or more processors via at least one of the one or more memories, the stored program instructions comprising: Program instructions used to determine, during the memory reallocation process, which each of a set of reallocated memory pages is enabled for direct memory access operations. as well as Program instructions for performing a pre-access delay after the memory reallocation process is completed and before writing initial data to the set of memory pages, the pre-access delay being performed simultaneously for each memory page in the set of memory pages.

25. A memory management subsystem, comprising: Memory controller; A memory manager is configured to cause the memory controller to perform operations, including: During the memory reallocation process, it is determined that each of the reallocated set of memory pages is enabled for direct memory access operations. as well as After the memory reallocation process is completed, a pre-access delay is performed before the initial data is written to the set of memory pages. The pre-access delay is performed simultaneously for each memory page in the set of memory pages.

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