Display panel, preparation method thereof and display device

CN116096173BActive Publication Date: 2026-08-18KUNSHAN GO VISIONOX OPTO ELECTRONICS CO LTD
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Patent Information

Application Number
CN202310172031.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-02-27
Publication Date
2026-08-18
Estimated Expiration
2043-02-27

AI Technical Summary

Technical Problem

[0003]有鉴于此,本申请实施例提供了一种显示面板及其制备方法、显示装置,以解决现有技术中显示面板的功耗较高的问题

Benefits of technology

[0013] A third aspect of this application provides a display device, including the display panel provided in any of the above embodiments.

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Abstract

The application provides a display panel, a preparation method thereof and a display device, and solves the problem of high power consumption of the display panel in the prior art. The display panel comprises a display area, and the display area comprises, in sequence: a first metal layer comprising a plurality of first metal lines; a first insulating layer, a plurality of first conductive vias being arranged in the first insulating layer; a second metal layer comprising a plurality of second metal lines; a second insulating layer, a plurality of second conductive vias being arranged in the second insulating layer; and a light-emitting device layer comprising a cathode layer and a plurality of conductive holes. The plurality of second metal lines and the plurality of first metal lines are electrically connected to form a first mesh structure through the plurality of first conductive vias, the first mesh structure is electrically connected to the first end of the second conductive via, the second end of the second conductive via is electrically connected to the first end of the conductive hole, and the second end of the conductive hole is electrically connected to the cathode layer.
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Description

Technical Field

[0001] This application relates to the field of display technology, specifically to a display panel and its manufacturing method, and a display device. Background Technology

[0002] In the display field, Organic Light-Emitting Diode (OLED) display panels possess characteristics such as self-illumination, high contrast, wide viewing angle, fast response speed, and simple manufacturing, and have broad development prospects. How to reduce the power consumption of OLED panels has always been a hot topic in the panel industry. Summary of the Invention

[0003] In view of this, embodiments of this application provide a display panel and its manufacturing method, as well as a display device, to solve the problem of high power consumption of display panels in the prior art.

[0004] This application provides a display panel, including a display area comprising, in sequence: a first metal layer including multiple first metal lines; a first insulating layer having multiple first conductive vias; a second metal layer including multiple second metal lines; a second insulating layer having multiple second conductive vias; and a light-emitting device layer including a cathode layer and multiple conductive vias. The multiple second metal lines and the multiple first metal lines are electrically connected through the multiple first conductive vias to form a first mesh structure. The first mesh structure is electrically connected to a first end of each of the second conductive vias, the second end of each second conductive via is electrically connected to the first end of each conductive via, and the second end of each conductive via is electrically connected to the cathode layer. By implementing the cathode signal traces electrically connected to the cathode layer, i.e., the first mesh structure, as a mesh structure, compared to linear cathode signal traces, the current in a pixel unit can flow into the cathode signal trace through the cathode layer at the location of the pixel unit, without needing to flow through the entire cathode layer. Since the impedance of the cathode signal traces is lower than that of the cathode layer, power consumption can be reduced.

[0005] In one embodiment, the light-emitting device layer further includes an anode layer and a light-emitting layer stacked sequentially, with the anode layer in contact with the second insulating layer; the anode layer, the light-emitting layer, and the cathode layer constitute a plurality of sub-pixels; the plurality of sub-pixels includes a plurality of redundant sub-pixels, which do not emit light; in a direction perpendicular to the display panel, the orthographic projection of the second metal line and the orthographic projection of the redundant sub-pixels at least partially overlap. Preferably, the plurality of redundant sub-pixels are arranged along a first direction. By providing redundant sub-pixels, a reserved position can be made in the second metal layer to accommodate the second metal line.

[0006] In one embodiment, the anode layer includes multiple anodes; the second end of the second conductive via is electrically connected to the first end of the conductive via through the anode of the redundant sub-pixel. In this case, the anode of the redundant sub-pixel can act as a conductive block, and the fabrication process of the anode layer is compatible with existing processes.

[0007] In one embodiment, the light-emitting layer includes multiple light-emitting units; conductive holes are disposed in the light-emitting units of redundant sub-pixels. In this case, pixel pits can be used to locate the conductive holes, which facilitates fabrication.

[0008] In one embodiment, the light-emitting device layer includes a pixel definition layer located between the second insulating layer and the cathode layer; a conductive via is disposed in the pixel definition layer. In this case, the second conductive via can be directly electrically connected to the conductive via, or it can be electrically connected to the conductive via through the anode of a redundant sub-pixel.

[0009] In one embodiment, multiple sub-pixels constitute a pixel unit, and the pixel unit includes redundant sub-pixels. In this case, a first conductive via and a second conductive via can be provided for each pixel unit.

[0010] In one embodiment, the display panel further includes a pad area adjacent to the display area; multiple first metal lines are arranged parallel to each other along a first direction, and the first metal lines extend to the pad area along a second direction perpendicular to the first direction, and are electrically connected to the pins of the pad area. This achieves the electrical connection between the first metal lines and the pins.

[0011] In one embodiment, the light-emitting device layer further includes an anode layer located between the second insulating layer and the cathode layer; the first metal layer further includes multiple third metal lines, and the second metal layer further includes multiple fourth metal lines; the first insulating layer also has multiple third conductive vias, and the second insulating layer also has multiple fourth conductive vias; the multiple third metal lines and the multiple fourth metal lines are electrically connected through the multiple third conductive vias to form a second mesh structure, and the second mesh structure is electrically connected to the anode layer through the multiple fourth conductive vias. In this case, both the cathode signal trace and the anode signal trace are mesh structures formed by two layers of metal lines, and the two layers of metal lines of the cathode signal trace and the two layers of metal lines of the anode signal trace share a common metal layer. In this case, the cathode signal trace and the anode signal trace can be fabricated simultaneously, simplifying the fabrication process.

[0012] A second aspect of this application provides a method for fabricating a display panel, comprising: fabricating a first metal layer on a substrate, the first metal layer including a plurality of first metal lines; fabricating a first insulating layer on the first metal layer, the first insulating layer having a plurality of first conductive vias; fabricating a second metal layer on the first insulating layer, the second metal layer including a plurality of second metal lines, the plurality of second metal lines and the plurality of first metal lines being electrically connected through the plurality of first conductive vias to form a first mesh structure; fabricating a second insulating layer on the second metal layer, the second insulating layer having a plurality of second conductive vias, the first end of the second conductive vias being electrically connected to the first mesh structure; and fabricating a light-emitting device layer on the second insulating layer, the light-emitting device layer including a cathode layer and a plurality of conductive vias, the first end of the conductive vias being electrically connected to the second end of the second conductive vias, and the second end of the conductive vias being electrically connected to the cathode layer. In the display panel obtained according to this method, the cathode signal traces are in a mesh structure. Compared to linear cathode signal traces, the current in a pixel unit can flow into the cathode signal trace at the location of the pixel unit through the cathode layer, without needing to flow through the entire cathode layer. Since the impedance of the cathode signal trace is lower than that of the cathode layer, power consumption can be reduced.

[0013] A third aspect of this application provides a display device, including the display panel provided in any of the above embodiments.

[0014] According to the display panel and its manufacturing method and display device provided in the embodiments of this application, by implementing the cathode signal traces electrically connected to the cathode layer as a mesh structure, i.e., a first mesh structure, compared with the linear structure of the cathode signal traces, the current in the pixel unit can flow into the cathode signal trace through the cathode layer at the location of the pixel unit, instead of flowing through the entire cathode layer. Since the impedance of the cathode signal traces is less than that of the cathode layer, power consumption can be reduced. Attached Figure Description

[0015] Figure 1 This is a top-view structural diagram of a display panel in related technologies.

[0016] Figure 2 This is a schematic cross-sectional view of a display panel provided in an embodiment of this application.

[0017] Figure 3 Provided for an embodiment of this application Figure 2 The diagram shows a top view of the display panel.

[0018] Figure 4 Provided for an embodiment of this application Figure 2 The diagram shows the film structure of the display panel.

[0019] Figure 5 A flowchart illustrating a method for fabricating a display panel according to an embodiment of this application. Detailed Implementation

[0020] Figure 1 This is a top-view structural diagram of a display panel in related technologies. (Example) Figure 1 As shown, the display panel 10 includes pixel units 11, each including an anode and a cathode disposed opposite to each other. The anode of the pixel unit 11 is electrically connected to the driver chip via an anode signal trace 12, and the cathode is electrically connected to the driver chip via a cathode signal trace 13. The driver chip provides an anode driving voltage to the anode via the anode signal trace 12 and a cathode driving voltage to the cathode via the cathode signal trace 13, thereby illuminating the pixel unit 11.

[0021] Through long-term research, the inventors discovered that in the display panel 10, multiple pixel units 11 share a single cathode layer 14, meaning the cathodes of multiple pixel units 11 are connected to form a single layer. Cathode signal traces 13 are located in the bezel area B surrounding the display area AA; the rectangular dashed line in the figure indicates the boundary between the display area AA and the bezel area B. The cathode layer 14 is electrically connected to the cathode signal traces 13 via an overlapping connection. In this case, the current flowing from any pixel unit 11 must pass through the entire cathode layer 14 before flowing into the cathode signal traces 13. Due to the high impedance of the cathode layer 14, a significant amount of useless power is lost within it.

[0022] In view of this, embodiments of this application provide a display panel, a method for manufacturing the same, and a display device thereof. The display panel includes a display area, which comprises, in sequence: a first metal layer including multiple first metal lines; a first insulating layer having multiple first conductive vias; a second metal layer including multiple second metal lines; a second insulating layer having multiple second conductive vias; and a light-emitting device layer including a cathode layer and multiple conductive vias. The multiple second metal lines and the multiple first metal lines are electrically connected through the multiple first conductive vias to form a first mesh structure. The first mesh structure is electrically connected to a first end of each of the second conductive vias, the second end of each second conductive via is electrically connected to the first end of each conductive via, and the second end of each conductive via is electrically connected to the cathode layer. According to the display panel, its manufacturing method, and the display device provided in this application, by implementing the cathode signal traces electrically connected to the cathode layer, i.e., the first and second metal lines, as a mesh structure, compared to linear cathode signal traces, the current in the pixel unit of this application can flow into the cathode signal trace through the cathode layer at the location of the pixel unit, without needing to flow through the entire cathode layer. Since the impedance of the cathode signal trace is lower than that of the cathode layer, power consumption can be reduced.

[0023] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0024] Figure 2 This is a schematic cross-sectional view of a display panel provided in an embodiment of this application. Figure 3 Provided for an embodiment of this application Figure 2 The diagram shows a top view of the display panel's structure. (Combined with...) Figure 2 and Figure 3 As shown, the display panel 20 includes a display area AA, which includes a first metal layer 21, a first insulating layer 22, a second metal layer 23, a second insulating layer 24, and a light-emitting device layer 25 stacked sequentially.

[0025] The first metal layer 21 includes multiple first metal lines 211, such as... Figure 3 As shown. Multiple first metal lines 211 are arranged in parallel along the first direction x. The second metal layer 23 includes multiple second metal lines 231, as shown... Figure 3 As shown, multiple second metal wires 231 are arranged in parallel along a second direction y, which is perpendicular to the first direction x. It should be understood that the arrangement of the first metal wires 211 and the second metal wires 231 is merely exemplary. The first metal wires 211 and the second metal wires 231 may also be arranged at relative angles.

[0026] The first insulating layer 22 is located between the first metal layer 21 and the second metal layer 23. The first insulating layer 22 has a plurality of first conductive vias 221. A plurality of first metal wires 211 and a plurality of second metal wires 231 are electrically connected through the plurality of first conductive vias 221 to form a first mesh structure.

[0027] The second insulating layer 24 is located between the second metal layer 23 and the light-emitting device layer 25. A plurality of second conductive vias 241 are provided in the second insulating layer 24, and the first end of the second conductive via 241 is electrically connected to the first mesh structure.

[0028] The first mesh structure serves as the cathode signal trace. In this case, the light-emitting device layer 25 includes a cathode layer 251 and a plurality of conductive vias 252. The first end of the conductive via 252 is electrically connected to the second end of the second conductive via 241, and the second end of the conductive via 252 is electrically connected to the cathode layer 251.

[0029] like Figure 3As shown, the display panel 20 also includes a bezel area B surrounding the display area AA. The bezel area B includes a pad area D, and a second metal line 231 in the second metal layer 23 extends along a first direction x to the pad area D and is electrically connected to a terminal block of the pad area D. The terminal block is used to electrically connect to a driver chip to receive a cathode drive voltage from the driver chip.

[0030] According to the display panel provided in the embodiments of this application, by implementing the cathode signal traces electrically connected to the cathode layer 251 as a mesh structure, i.e., a first mesh structure, compared to a linear cathode signal trace, the current in the pixel unit can flow into the cathode signal trace through the cathode layer 251 at the location of the pixel unit, without needing to flow through the entire cathode layer 251. Since the impedance of the cathode signal trace is less than that of the cathode layer 251, power consumption can be reduced.

[0031] Figure 4 Provided for an embodiment of this application Figure 2 The diagram shows the film layer structure of the display panel. Please refer to [the relevant documentation / reference]. Figure 2 The light-emitting device layer 25 also includes an anode layer 253, which is located between the second insulating layer 24 and the cathode layer 251. (See also...) Figure 4 The first metal layer 21 also includes multiple third metal lines 212. These third metal lines 212 are arranged parallel to each other along a first direction x, and are alternately arranged with multiple first metal lines 211 along the first direction x. The second metal layer 23 also includes multiple fourth metal lines 232. These fourth metal lines 232 are arranged parallel to each other along a second direction y, and are alternately arranged with multiple second metal lines 231 along the second direction y. The first insulating layer 22 also has multiple third conductive vias 222, through which the multiple third metal lines 212 and the multiple fourth metal lines 232 are electrically connected, forming a second mesh structure. The second insulating layer 24 also has multiple fourth conductive vias 242, through which the second mesh structure is electrically connected to the anode layer 253, i.e., the second mesh structure is the anode signal trace. The anode signal trace is a mesh structure located in the display area.

[0032] In other embodiments, the display panel further includes multiple data voltage signal traces, all of which extend along a first direction x and are arranged parallel to each other along a second direction y.

[0033] According to the display panel provided in the embodiments of this application, both the cathode signal traces and the anode signal traces are mesh structures formed by two layers of metal lines. Furthermore, the two layers of metal lines for the cathode signal traces and the two layers of metal lines for the anode signal traces share a common metal layer, such as the second and third metal layers in a TFT array substrate. In this case, the cathode signal traces and the anode signal traces can be fabricated simultaneously, simplifying the fabrication process. It should be understood that the anode signal traces and the cathode signal traces can also each occupy two separate metal layers, or share a single metal layer.

[0034] like Figure 2 As shown, the light-emitting device layer 25 also includes a light-emitting layer 254 located between the anode layer 253 and the cathode layer 251. The anode layer 253, the light-emitting layer 254, and the cathode layer 251 constitute a plurality of sub-pixels. The plurality of sub-pixels includes a plurality of redundant sub-pixels 200, which are sub-pixels that do not emit light. For example, the anode of a sub-pixel is not electrically connected to the pixel driving circuit, forming a redundant sub-pixel 200. In the direction perpendicular to the display panel 20, the orthographic projection of the second metal line 231 and the orthographic projection of the redundant sub-pixel 200 at least partially overlap, that is, the second metal line 231 is disposed in the region of the corresponding redundant sub-pixel 200 in the second metal layer 23. For example, as Figure 4 As shown, the display panel 20 includes a plurality of redundant subpixels 200, which are linearly arranged. In a direction perpendicular to the display panel 20, the orthographic projection of the plurality of redundant subpixels 200 overlaps the orthographic projection of the second metal line 231. By providing redundant subpixels 200, a reserved space can be provided in the second metal layer 23 to accommodate the second metal line 231. It should be understood that redundant subpixels 200 may also be omitted from the display panel 20. In this case, the spacing between the fourth metal lines 232 in the second metal layer 23 can be reduced to accommodate the second metal line 231.

[0035] like Figure 2 As shown, the anode layer 253 includes multiple anodes, each corresponding to a sub-pixel. The second end of the second conductive via 241 is electrically connected to the first end of the conductive via 252 through the anode of the redundant sub-pixel 200. That is, the second end of the second conductive via 241 is in contact with the anode, the anode is in contact with the first end of the conductive via 252, and the second end of the conductive via 252 is in contact with the cathode layer 251. In this case, the anode of the redundant sub-pixel 200 can act as a conductive block, and the fabrication process of the anode layer 253 is compatible with existing processes.

[0036] like Figure 2As shown, the light-emitting layer 254 includes multiple light-emitting units. Multiple conductive holes 252 are disposed in the light-emitting units of the redundant sub-pixel 200. In this case, pixel pits can be used to locate the conductive holes 252, facilitating fabrication and simplifying the process. In other embodiments, the light-emitting units of the redundant sub-pixel 200 are used as conductive holes. In this case, there is no need to fabricate additional conductive holes 252, and the process is not increased. It should be understood that the conductive holes 252 can also be disposed in the pixel definition layer 255. In this case, the second conductive via 241 can be directly electrically connected to the conductive hole 252, or it can be electrically connected to the conductive hole 252 through the anode of the redundant sub-pixel 200.

[0037] Multiple sub-pixels in the display panel 20 constitute a pixel unit. For example, as Figure 4 The four sub-pixels arranged horizontally as shown constitute a pixel unit. Each pixel unit includes a redundant sub-pixel 200. For each pixel unit, a first conductive via 221 and a second conductive via 241 can be provided. In the direction perpendicular to the display panel, the orthographic projections of the first conductive via 221 and the second conductive via 241 both fall within the orthographic projection range of the redundant sub-pixel 200.

[0038] This application also provides a method for manufacturing a display panel, used to manufacture the display panel provided in any of the above embodiments. Figure 5 This is a flowchart illustrating a method for fabricating a display panel according to an embodiment of this application. Figure 5 As shown, the preparation method 500 includes:

[0039] Step S510, see Figure 2 A first metal layer 21 is prepared on the substrate, and the first metal layer 21 includes multiple first metal lines.

[0040] The substrate can be a base substrate, such as a glass substrate. The substrate can also be a pre-formed substrate, which includes a base substrate and at least one functional film layer stacked on the base substrate, such as... Figure 2 As shown.

[0041] Step S520, see Figure 2 A first insulating layer 22 is prepared on the first metal layer 21, and a plurality of first conductive vias 221 are provided in the first insulating layer 22.

[0042] The material of the first insulating layer 22 can be silicon carbide or silicon nitride.

[0043] Step S530, see Figure 2 A second metal layer 23 is prepared on the first insulating layer 22. The second metal layer 23 includes multiple second metal lines. The multiple second metal lines and multiple first metal lines are electrically connected through multiple first conductive vias 221 to form a first mesh structure.

[0044] The first conductive via 221 refers to a conductive structure filled with conductive material. The second conductive via 241 and the third conductive via 222 mentioned below are similar.

[0045] Step S540, see Figure 2 A second insulating layer 24 is prepared on the second metal layer 23. A plurality of second conductive vias 241 are provided in the second insulating layer 24, and the first end of each second conductive via 241 is electrically connected to the first mesh structure. The second insulating layer may be an organic material layer.

[0046] Step S550, see Figure 2 A light-emitting device layer 25 is fabricated on the second insulating layer 24. The light-emitting device layer 25 includes a cathode layer 251 and a plurality of conductive holes 252. The first end of the conductive hole 252 is electrically connected to the second end of the second conductive via 241, and the second end of the conductive hole 252 is electrically connected to the cathode layer 251.

[0047] According to the display panel fabrication method provided in this application embodiment, by implementing the cathode signal traces electrically connected to the cathode layer 251 as a mesh structure, i.e., a first mesh structure, compared to a linear cathode signal trace, the current in the pixel unit can flow into the cathode signal trace through the cathode layer 251 at the location of the pixel unit, without needing to flow through the entire cathode layer 251. Since the impedance of the cathode signal traces is less than that of the cathode layer 251, power consumption can be reduced.

[0048] In one embodiment, see Figure 2 and Figure 4 The first metal layer 21 also includes multiple third metal lines 212. The first insulating layer 22 also has multiple third conductive vias 222. The second metal layer 23 also includes multiple fourth metal lines 232. The second insulating layer 24 also has multiple fourth conductive vias 242. The light-emitting device layer 25 also includes an anode layer 253, located between the second insulating layer 24 and the cathode layer 251. The multiple third metal lines 212 and the multiple fourth metal lines are electrically connected through the multiple third conductive vias 222 to form a second mesh structure. The second mesh structure is electrically connected to the anode layer 253 through the multiple fourth conductive vias 242. In this case, both the cathode signal traces and the anode signal traces are mesh structures formed by two layers of metal lines, and the two layers of metal lines of the cathode signal traces and the two layers of metal lines of the anode signal traces share a metal layer, such as the second and third metal layers in a TFT array substrate. In this case, the cathode signal traces and the anode signal traces can be fabricated simultaneously, simplifying the fabrication process. It should be understood that anode signal traces and cathode signal traces can each occupy two separate metal layers, or they can share a single metal layer.

[0049] In one embodiment, step S550 specifically includes: forming an anode layer 253 on the second insulating layer 24; forming a pixel definition layer 255 on the anode layer 253, the pixel definition layer 255 including a pixel opening; forming a light-emitting layer 254 within the pixel opening; forming a conductive hole 252 within a predetermined light-emitting unit of the light-emitting layer 254; the predetermined light-emitting unit corresponding to a redundant sub-pixel; and forming a cathode layer 251 on the light-emitting layer 254 and the pixel definition layer 255.

[0050] The method for manufacturing the display panel according to the embodiments of this application and the display panel provided in any of the above embodiments belong to the same inventive concept. Details not described in the manufacturing method embodiments can be found in the display panel embodiments, and will not be repeated here.

[0051] This application also provides a display device, including the display panel provided in any of the above embodiments. The display device may be, for example, a mobile phone, computer, television, smart meter, etc.

[0052] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this application to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

Claims

1. A display panel, characterized by, Includes a display area, which comprises sequentially stacked elements: The first metal layer includes multiple first metal lines; A first insulating layer, wherein a plurality of first conductive vias are provided in the first insulating layer; The second metal layer includes multiple second metal lines; A second insulating layer, wherein a plurality of second conductive vias are provided; as well as The light-emitting device layer includes a cathode layer, multiple conductive holes, and an anode layer and a light-emitting layer stacked sequentially. The anode layer, the light-emitting layer, and the cathode layer constitute multiple sub-pixels. The multiple sub-pixels include multiple redundant sub-pixels, and the anode layer includes multiple anodes. The plurality of second metal lines and the plurality of first metal lines are electrically connected through the plurality of first conductive vias to form a first mesh structure. The first mesh structure is electrically connected to the first end of the second conductive via. The second end of the second conductive via is electrically connected to the first end of the conductive via. The second end of the conductive via is electrically connected to the cathode layer. The second end of the second conductive via is electrically connected to the first end of the conductive via through the anode of the redundant sub-pixel.

2. The display panel of claim 1, wherein, The anode layer is in contact with the second insulating layer; the redundant sub-pixel does not emit light; in a direction perpendicular to the display panel, the orthographic projection of the second metal line and the orthographic projection of the redundant sub-pixel at least partially overlap.

3. The display panel of claim 2, wherein, The plurality of redundant sub-pixels are arranged along the first direction.

4. The display panel according to claim 2 or 3, characterized in that, The light-emitting layer includes multiple light-emitting units; the conductive hole is disposed in the light-emitting unit of the redundant sub-pixel.

5. The display panel according to claim 2 or 3, characterized in that, The light-emitting device layer includes a pixel definition layer located between the second insulating layer and the cathode layer; the conductive hole is disposed in the pixel definition layer.

6. The display panel according to claim 2 or 3, characterized in that, Multiple sub-pixels constitute a pixel unit, and the pixel unit includes the redundant sub-pixels.

7. The display panel according to any one of claims 1-3, characterized in that, It also includes a pad area adjacent to the display area; the plurality of first metal lines are arranged in parallel along a first direction, and the first metal lines extend to the pad area along a second direction perpendicular to the first direction, and are electrically connected to the pins of the pad area.

8. The display panel according to any one of claims 1-3, characterized in that, The anode layer is located between the second insulating layer and the cathode layer; the first metal layer further includes multiple third metal wires, the second metal layer further includes multiple fourth metal wires, the first insulating layer is also provided with multiple third conductive vias, and the second insulating layer is also provided with multiple fourth conductive vias; the multiple third metal wires and the multiple fourth metal wires are electrically connected through the multiple third conductive vias to form a second mesh structure, and the second mesh structure is electrically connected to the anode layer through the multiple fourth conductive vias.

9. A method for manufacturing a display panel, characterized in that, include: A first metal layer is fabricated on a substrate, the first metal layer comprising a plurality of first metal lines; A first insulating layer is prepared on the first metal layer, and a plurality of first conductive vias are provided in the first insulating layer; A second metal layer is prepared on the first insulating layer. The second metal layer includes a plurality of second metal lines. The plurality of second metal lines and the plurality of first metal lines are electrically connected through the plurality of first conductive vias to form a first mesh structure. A second insulating layer is prepared on the second metal layer, and a plurality of second conductive vias are provided in the second insulating layer, wherein the first end of the second conductive via is electrically connected to the first mesh structure. A light-emitting device layer is fabricated on the second insulating layer. The light-emitting device layer includes a cathode layer, a plurality of conductive vias, and an anode layer and a light-emitting layer stacked sequentially. The anode layer, the light-emitting layer, and the cathode layer constitute a plurality of sub-pixels. The plurality of sub-pixels include a plurality of redundant sub-pixels, and the anode layer includes a plurality of anodes. The second end of the second conductive via is electrically connected to the first end of the conductive via through the anode of the redundant sub-pixel. The first end of the conductive via is electrically connected to the second end of the second conductive via, and the second end of the conductive via is electrically connected to the cathode layer.

10. A display device comprising a display panel according to any one of claims 1-8.

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