A frequency modulation circuit based on mains power synchronous tracking

Abstract

The application relates to a frequency modulation circuit based on mains voltage synchronous tracking, which is applied to a hardware-controlled inverter, connected with a mains voltage waveform, a first inverter synchronization signal, a second inverter synchronization signal and a mains over-voltage and under-voltage shutdown signal, and comprising a first operational amplifier circuit, a precision detection circuit, a synchronous over-range shutdown circuit, a mains over-voltage and under-voltage shutdown circuit, a first analog switch circuit, a rectangular wave generation circuit, a second analog switch circuit, a second operational amplifier circuit and a pulse width modulation frequency conversion circuit. The frequency and phase of the reference sinusoidal wave in the hardware-controlled inverter application can follow the mains waveform, and the stability of the hardware-controlled inverter application is improved.

Description

Technical Field

[0001] This invention relates to the field of inverter technology, and in particular to a frequency modulation circuit based on mains synchronous tracking. Background Technology

[0002] In sine wave inverter applications, inverter control includes hardware control, MCU control, and DSP control. Among these three control methods, DSP control is expensive, so inverters using DSP control are uncommon. Hardware control and MCU control are relatively inexpensive, and these two control methods are the main ones in the market.

[0003] MCU control, due to its slow operating speed, often leads to inverter failures in complex application environments, highlighting its drawbacks. In practical applications, hardware-controlled inverters offer faster response times and significantly better stability than MCU-controlled inverters, maintaining a substantial market share.

[0004] In hardware-controlled inverter applications, the square wave used to modulate the reference sine wave is mostly a fixed frequency of 19.2kHz. The resulting reference sine wave is also fixed at 50Hz or 60Hz, and its frequency and phase are not synchronized with the mains power. During the switching between inverter and bypass modes, this may damage the output relay and cause relatively large load impact.

[0005] Currently, the technical problem of the modulated reference sine wave being out of sync with the mains power in existing hardware-controlled inverter applications, which can easily lead to damage to the output relay, has not yet been properly resolved. Summary of the Invention

[0006] To address the shortcomings of existing technologies, the purpose of this invention is to provide a frequency modulation circuit based on mains synchronous tracking, which solves the technical problem in existing hardware-controlled inverter applications where the modulated reference sine wave is out of sync with the mains power, easily leading to damage to the output relay. This invention enables the reference sine wave frequency and phase to follow the mains waveform, thereby improving the stability of hardware-controlled inverter applications.

[0007] The above-mentioned objective of this invention is achieved through the following technical solutions: This invention provides a frequency modulation circuit based on mains synchronous tracking, applied in a hardware-controlled inverter. It is connected to the mains voltage waveform, a first inverter synchronization signal, a second inverter synchronization signal, and a mains over / under voltage shutdown signal. The circuit includes a first operational amplifier circuit, a precision detector circuit, a synchronization over-range shutdown circuit, a mains over / under voltage shutdown circuit, a first analog switch circuit, a rectangular wave generator circuit, a second analog switch circuit, a second operational amplifier circuit, and a pulse width modulation frequency conversion circuit; wherein: The mains voltage waveform is connected to the input terminal of the first operational amplifier circuit; The first output terminal of the first operational amplifier circuit is connected to the first input terminal of the first analog switch circuit, and the second output terminal of the first operational amplifier circuit is connected to the first input terminal of the precision detector circuit. The first inverter synchronization signal is connected to the second input terminal of the precision detector circuit, the output terminal of the precision detector circuit is connected to the input terminal of the synchronization over-range shutdown circuit, and the output terminal of the synchronization over-range shutdown circuit is connected to the control terminal of the first analog switch circuit. The mains over / under voltage shutdown signal is connected to the input terminal of the mains over / under voltage shutdown circuit, and the output terminal of the mains over / under voltage shutdown circuit is connected to the control terminal of the first analog switch circuit. The output terminal of the first analog switch circuit is connected to the input terminal of the second analog switch circuit; The second inverter synchronization signal is connected to the input terminal of the rectangular wave generating circuit, and the output terminal of the rectangular wave generating circuit is connected to the control terminal of the second analog switch circuit. The output terminal of the second analog switch circuit is connected to the input terminal of the second operational amplifier circuit; The output terminal of the second operational amplifier circuit is connected to the input terminal of the pulse width modulation frequency conversion circuit. The output terminal of the pulse width modulation frequency conversion circuit outputs a frequency-modulated square wave signal, so that the frequency and phase of the reference sine wave modulated by the frequency-modulated square wave signal follow the mains waveform.

[0008] As one of the embodiments, the mains voltage waveform is formed as follows: the initial signal comes from AC power input terminal N and AC power input terminal L, and after passing through the isolation step-down transformer, a 19-21VAC sine wave is obtained, which is the mains voltage waveform. The first end of the mains voltage waveform is connected to the input terminal of the first operational amplifier, and the second end of the mains voltage waveform is connected to VREF, where VREF is the midpoint voltage of the power supply to ground.

[0009] As some embodiments, the first operational amplifier circuit includes a first resistor, a second resistor, a third resistor, a first potentiometer, a first capacitor, a second capacitor, a first diode, a second diode, and a first operational amplifier; wherein: The first end of the first resistor is the input terminal of the mains voltage waveform, the second end of the first resistor is connected to the anode of the first diode, and the cathode of the first diode is positively connected to the power supply. The second end of the first resistor is connected to the cathode of the second diode, and the anode of the second diode is grounded; The second end of the first resistor is connected to the first end of the first capacitor, and the second end of the first capacitor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The second end of the first resistor is connected to the first end of the first potentiometer, and the first end of the first potentiometer is connected to the movable contact end of the first potentiometer. The second terminal of the first potentiometer is connected to the non-inverting input terminal of the first operational amplifier, and the non-inverting input terminal of the first operational amplifier is connected to the first terminal of the second capacitor. The second terminal of the second capacitor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground; The second end of the first resistor is connected to the first end of the second resistor, the second end of the second resistor is connected to the inverting input of the first operational amplifier, and the inverting input of the first operational amplifier is connected to the first end of the third resistor. The first end of the third resistor is connected to the output end of the first operational amplifier.

[0010] As some embodiments, the system further includes a mains voltage judgment circuit, from which the mains over / under voltage shutdown signal originates. As some embodiments, the mains over / under voltage shutdown circuit includes a third diode, the cathode of which serves as the input terminal of the mains undervoltage shutdown signal, and the anode of which is connected to the control terminal of the first analog switch circuit.

[0011] In some embodiments, the first inverter synchronization signal is a square wave signal, which comes from the original code output of the frequency divider. The waveform of the first inverter synchronization signal is in phase and out of phase with the inverter output sine wave.

[0012] As some embodiments, the precision detection circuit includes a first comparator, a second comparator, a third comparator, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a sixth capacitor, a fourth diode, a fifth diode, a sixth diode, and a seventh diode, wherein: The output terminal of the first operational amplifier circuit is connected to the inverting input terminal of the first comparator; The non-inverting input of the first comparator is connected to the first terminal of the ninth resistor, and the second terminal of the ninth resistor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The non-inverting input of the first comparator is connected to the first terminal of the tenth resistor, and the second terminal of the tenth resistor is grounded. The non-inverting input of the first comparator is connected to the first terminal of the sixth capacitor, and the second terminal of the sixth capacitor is grounded. The output terminal of the first comparator is connected to the first terminal of the twelfth resistor, and the second terminal of the twelfth resistor is positively connected to the power supply. The output of the first comparator is connected to the anode of the fourth diode, the cathode of the fourth diode is connected to the cathode of the sixth diode, the anode of the sixth diode is connected to the cathode of the seventh diode, the anode of the seventh diode is connected to the anode of the fifth diode, and the cathode of the fifth diode is connected to the anode of the fourth diode. The non-inverting input of the first comparator is connected to the non-inverting input of the second comparator, and the non-inverting input of the second comparator is connected to the inverting input of the third comparator. The inverting input terminal of the second comparator is connected to the anode of the fifth diode, the inverting input terminal of the second comparator is connected to the first terminal of the thirteenth resistor, and the second terminal of the thirteenth resistor is connected to the positive power supply. The non-inverting input terminal of the third comparator is connected to the cathode of the fourth diode, the non-inverting input terminal of the third comparator is connected to the first terminal of the eleventh resistor, and the second terminal of the eleventh resistor is grounded. The anode of the sixth diode is the input terminal of the first inverter synchronization signal; The output of the second comparator is connected to the output of the third comparator; The output of the second comparator is connected to the first end of the fourteenth resistor, and the second end of the fourteenth resistor is positively connected to the power supply.

[0013] As some embodiments, the synchronous over-range shutdown circuit includes a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a seventh capacitor, an eighth capacitor, an eighth diode, and a fourth comparator, wherein: The output of the second comparator is connected to the first terminal of the fifteenth resistor; The inverting input terminal of the fourth comparator is connected to the second terminal of the fifteenth resistor; The inverting input terminal of the fourth comparator is connected to the first terminal of the seventh capacitor, and the second terminal of the seventh capacitor is grounded. The non-inverting input terminal of the fourth comparator is connected to the first terminal of the sixteenth resistor, and the second terminal of the sixteenth resistor is positively connected to the power supply. The non-inverting input terminal of the fourth comparator is connected to the first terminal of the seventeenth resistor, and the second terminal of the seventeenth resistor is grounded. The non-inverting input terminal of the fourth comparator is connected to the first terminal of the eighth capacitor, and the second terminal of the eighth capacitor is grounded. The non-inverting input terminal of the fourth comparator is connected to the first terminal of the eighteenth resistor, and the second terminal of the eighteenth resistor is connected to the output terminal of the fourth comparator. The output terminal of the fourth comparator is connected to the first terminal of the nineteenth resistor, and the second terminal of the nineteenth resistor is positively connected to the power supply. The output terminal of the fourth comparator is connected to the cathode of the eighth diode, and the anode of the eighth diode is connected to the control terminal of the first analog switch circuit.

[0014] As some embodiments, the first analog switch circuit includes a fourth resistor, a first analog switch, and an eighth resistor; wherein: The output terminal of the first operational amplifier circuit is connected to the input terminal of the first analog switch; The input terminal of the first analog switch is connected to the first terminal of the fourth resistor, and the output terminal of the first analog switch is connected to the second terminal of the fourth resistor. The control terminal of the first analog switch is connected to the first terminal of the eighth resistor, and the second terminal of the eighth resistor is positively connected to the power supply.

[0015] In some embodiments, the second inverter synchronization signal is a square wave signal, which comes from the inverted code output of the frequency divider, and the waveform of the second inverter synchronization signal is in phase and frequency with the inverter output sine wave.

[0016] As some embodiments, the rectangular wave generating circuit includes a third capacitor, a fifth capacitor, a first XOR gate, and a fifth resistor, wherein: The first terminal of the third capacitor is the input terminal of the second inverter synchronization signal; The second terminal of the third capacitor is connected to the first input terminal of the first XOR gate; The first input terminal of the first XOR gate is connected to the first terminal of the fifth resistor, and the second terminal of the fifth resistor is positively connected to the power supply. The second input of the first XOR gate is positively connected to the power supply.

[0017] As some embodiments, the second analog switch circuit includes a sixth resistor, a seventh resistor, and a second analog switch, wherein: The output terminal of the first analog switch circuit is connected to the first terminal of the sixth resistor, and the second terminal of the sixth resistor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The first end of the sixth resistor is connected to the first end of the seventh resistor, and the second end of the seventh resistor is connected to the input end of the second analog switch. The output terminal of the rectangular wave generator circuit is connected to the control terminal of the second analog switch.

[0018] As some embodiments, the second operational amplifier circuit includes a twentieth resistor, a second operational amplifier, a twenty-first resistor, a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a fourth capacitor, a ninth capacitor, a tenth capacitor, and a twelfth capacitor, wherein: The output terminal of the second analog switch circuit is connected to the first terminal of the fourth capacitor, and the second terminal of the fourth capacitor is grounded. The output terminal of the second analog switch circuit is connected to the first terminal of the second tenth resistor, and the second terminal of the second tenth resistor is connected to the non-inverting input terminal of the second operational amplifier. The non-inverting input of the second operational amplifier is connected to the first terminal of the 23rd resistor, the second terminal of the 23rd resistor is connected to the positive terminal of the 9th capacitor, and the negative terminal of the 9th capacitor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The inverting input terminal of the second operational amplifier is connected to the first terminal of the twenty-fourth resistor, and the second terminal of the twenty-fourth resistor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The inverting input terminal of the second operational amplifier is connected to the first terminal of the second fifteenth resistor, and the second terminal of the second fifteenth resistor is connected to the output terminal of the second operational amplifier. The inverting input terminal of the second operational amplifier is connected to the first terminal of the tenth capacitor, the second terminal of the tenth capacitor is connected to the output terminal of the second operational amplifier, and the output terminal of the second operational amplifier is connected to the first terminal of the eleventh resistor. The second end of the twentieth-first resistor is connected to the first end of the twelfth capacitor, and the second end of the twelfth capacitor is grounded.

[0019] As some embodiments, the pulse width modulation frequency conversion circuit includes a twenty-second resistor, a twenty-sixth resistor, an eleventh capacitor, a second potentiometer, and a time base chip, wherein: The control terminal of the time base chip is connected to the second operational amplifier circuit; The discharge terminal of the time base chip is connected to the first terminal of the second potentiometer; The discharge terminal of the time base chip is electrically connected to the movable contact terminal of the second potentiometer; The second terminal of the second potentiometer is connected to the first terminal of the second twelfth resistor, and the second terminal of the second twelfth resistor is positively connected to the power supply. The discharge terminal of the time base chip is connected to the first terminal of the 26th resistor, and the second terminal of the 26th resistor is connected to the threshold terminal of the time base chip. The threshold terminal of the time base chip is connected to the trigger terminal of the time base chip; The trigger terminal of the time base chip is connected to the first terminal of the eleventh capacitor, and the second terminal of the eleventh capacitor is grounded.

[0020] The beneficial technical effects of this invention are as follows: This invention provides a frequency modulation circuit based on mains synchronous tracking, which enables the frequency and phase of the reference sine wave in hardware-controlled inverter applications to follow the mains waveform, thereby improving the stability of hardware-controlled inverter applications. Attached Figure Description

[0021] Figure 1 This is a connection block diagram of the frequency modulation circuit based on mains synchronous tracking in an embodiment of the present invention; Figure 2 This is a circuit diagram from an embodiment of the present invention. Detailed Implementation

[0022] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application. Example

[0023] like Figure 1-2 As shown, this invention discloses a frequency modulation circuit based on mains synchronous tracking, applied in a hardware-controlled inverter. It is connected to the mains voltage waveform, a first inverter synchronization signal, a second inverter synchronization signal, and a mains over / under voltage shutdown signal. The circuit includes a first operational amplifier circuit, a precision detector circuit, a synchronization over-range shutdown circuit, a mains over / under voltage shutdown circuit, a first analog switch circuit, a rectangular wave generator circuit, a second analog switch circuit, a second operational amplifier circuit, and a pulse width modulation frequency conversion circuit; wherein: The mains voltage waveform is connected to the input terminal of the first operational amplifier circuit; The first output terminal of the first operational amplifier circuit is connected to the first input terminal of the first analog switch circuit, and the second output terminal of the first operational amplifier circuit is connected to the first input terminal of the precision detector circuit. The first inverter synchronization signal is connected to the second input terminal of the precision detector circuit, the output terminal of the precision detector circuit is connected to the input terminal of the synchronization over-range shutdown circuit, and the output terminal of the synchronization over-range shutdown circuit is connected to the control terminal of the first analog switch circuit. The mains over / under voltage shutdown signal is connected to the input terminal of the mains over / under voltage shutdown circuit, and the output terminal of the mains over / under voltage shutdown circuit is connected to the control terminal of the first analog switch circuit. The output terminal of the first analog switch circuit is connected to the input terminal of the second analog switch circuit; The second inverter synchronization signal is connected to the input terminal of the rectangular wave generator circuit, and the output terminal of the rectangular wave generator circuit is connected to the control terminal of the second analog switch circuit. The output of the second analog switch circuit is connected to the input of the second operational amplifier circuit; The output of the second operational amplifier circuit is connected to the input of the pulse width modulation frequency conversion circuit. The output of the pulse width modulation frequency conversion circuit outputs a frequency-modulated square wave signal, so that the frequency and phase of the reference sine wave modulated by the frequency-modulated square wave signal follow the mains waveform.

[0024] The work process is as follows: The mains voltage waveform (20VAC sine wave) is fed into the first operational amplifier. After phase shifting, a mains reference sine wave is obtained, which is divided into two outputs. One output is sent to the first analog switching circuit, and the other output is sent to the precision detector circuit to check whether the mains phase exceeds the synchronization range.

[0025] The switching on and off of the first analog switch is determined by the following two conditions: the mains phase does not exceed the synchronization range, and the mains voltage does not experience over- or under-voltage. If either condition is not met, the first analog switch is off; if both conditions are met, the mains reference sine wave is switched on to the second analog switch circuit.

[0026] The second inverter synchronization signal, through a rectangular wave generator circuit, produces a rectangular wave with a 5% duty cycle to trigger the second analog switch circuit to conduct. During the trigger conduction period, when the mains reference sine wave is exactly crossing zero, the input and output voltages of the second analog switch are equivalent to the VREF voltage. During the trigger conduction period, when the mains reference sine wave is not crossing zero, the mains reference sine wave at the input of the second analog switch is sent to the output, causing a change in the output potential, thereby altering the modulation frequency of the subsequent stage.

[0027] As one of the embodiments, the mains voltage waveform is formed as follows: the initial signal comes from AC power input terminal N and AC power input terminal L, and after passing through the isolation step-down transformer, a 19-21VAC sine wave is obtained, which is the mains voltage waveform; the first end of the mains voltage waveform is connected to the input terminal of the first operational amplifier, specifically, one end of the mains voltage waveform is connected to one end of the first resistor, and the second end of the mains voltage waveform is connected to VREF, where VREF is the midpoint voltage of the positive power supply (VCC) to ground.

[0028] As some embodiments, the first operational amplifier circuit includes a first resistor, a second resistor, a third resistor, a first potentiometer, a first capacitor, a second capacitor, a first diode, a second diode, and a first operational amplifier; wherein: The first end of the first resistor is the input terminal of the mains voltage waveform, the second end of the first resistor is connected to the anode of the first diode, and the cathode of the first diode is positively connected to the power supply. The second end of the first resistor is connected to the cathode of the second diode, and the anode of the second diode is grounded. The second end of the first resistor is connected to the first end of the first capacitor, and the second end of the first capacitor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The second end of the first resistor is connected to the first end of the first potentiometer, and the first end of the first potentiometer is connected to the movable contact end of the first potentiometer. The second terminal of the first potentiometer is connected to the non-inverting input terminal of the first operational amplifier, and the non-inverting input terminal of the first operational amplifier is connected to the first terminal of the second capacitor. The second terminal of the second capacitor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The second end of the first resistor is connected to the first end of the second resistor, the second end of the second resistor is connected to the inverting input of the first operational amplifier, and the inverting input of the first operational amplifier is connected to the first end of the third resistor. The first terminal of the third resistor is connected to the output terminal of the first operational amplifier.

[0029] The function of the first operational amplifier circuit is to adjust the phase of the mains reference sine wave so that it is in phase and frequency with the inverter reference sine wave.

[0030] The specific working process of the first operational amplifier circuit is as follows: The AC mains voltage waveform (20VAC sine wave) is output in two paths. One path is phase-shifted by an LC converter and connected to the non-inverting input of an operational amplifier. The other path is sent to the inverting input, and the output terminal outputs a phase-shifted AC mains reference sine wave. The phase shift angle can be adjusted by adjusting the first potentiometer.

[0031] As some embodiments, the system also includes a mains voltage judgment circuit, from which the mains over / under voltage shutdown signal originates.

[0032] Specifically, the mains voltage is high when it is within the range of 220V / 230V / 240V±20%, and low when it exceeds this range.

[0033] As one embodiment, the mains over / under voltage shutdown circuit includes a third diode, the cathode of which is the input terminal of the mains undervoltage shutdown signal, and the anode of which is connected to the control terminal of the first analog switch circuit.

[0034] As one of the embodiments, the first inverter synchronization signal is a square wave signal, which comes from the original code output terminal of the frequency divider (MC14013B). The waveform of the first inverter synchronization signal is in the same frequency but out of phase with the inverter output sine wave.

[0035] As some embodiments, the precision detection circuit includes a first comparator, a second comparator, a third comparator, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a sixth capacitor, a fourth diode, a fifth diode, a sixth diode, and a seventh diode, wherein: The output of the first operational amplifier circuit is connected to the inverting input of the first comparator. The non-inverting input of the first comparator is connected to the first terminal of the ninth resistor, and the second terminal of the ninth resistor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The non-inverting input of the first comparator is connected to the first terminal of the tenth resistor, and the second terminal of the tenth resistor is grounded. The non-inverting input of the first comparator is connected to the first terminal of the sixth capacitor, and the second terminal of the sixth capacitor is grounded. The output of the first comparator is connected to the first terminal of the twelfth resistor, and the second terminal of the twelfth resistor is connected to the power supply. The output of the first comparator is connected to the anode of the fourth diode, the cathode of the fourth diode is connected to the cathode of the sixth diode, the anode of the sixth diode is connected to the cathode of the seventh diode, the anode of the seventh diode is connected to the anode of the fifth diode, and the cathode of the fifth diode is connected to the anode of the fourth diode. The non-inverting input of the first comparator is connected to the non-inverting input of the second comparator, and the non-inverting input of the second comparator is connected to the inverting input of the third comparator. The inverting input of the second comparator is connected to the anode of the fifth diode, the inverting input of the second comparator is connected to the first terminal of the thirteenth resistor, and the second terminal of the thirteenth resistor is connected to the positive power supply. The non-inverting input of the third comparator is connected to the cathode of the fourth diode, the non-inverting input of the third comparator is connected to the first terminal of the eleventh resistor, and the second terminal of the eleventh resistor is grounded. The anode of the sixth diode is the input terminal of the first inverter synchronization signal; The output of the second comparator is connected to the output of the third comparator; The output of the second comparator is connected to the first terminal of the fourteenth resistor, and the second terminal of the fourteenth resistor is positively connected to the power supply.

[0036] The function of the precision detector circuit is as follows: compare the current mains phase with the inverter phase difference, output a low level for the in-phase part and a high level for the out-of-phase part.

[0037] The precision detection circuit operates as follows: The mains reference sine wave output from the first operational amplifier is connected to the inverting input of the first comparator, the non-inverting input is connected to the reference voltage, and the output is an inverted mains reference square wave. The second and third comparators, the eleventh, twelfth, thirteenth, and fourteenth resistors, the fourth, fifth, sixth, and seventh diodes perform precision detection on the inverted mains reference square wave output from the first comparator and the first inverter synchronization signal. The first inverter synchronization signal is also an inverted square wave from the inverter. When both inverted square waves are in phase, the output of the second or third comparator is low; when they are out of phase, the outputs of both comparators are high.

[0038] As some embodiments, the synchronous over-range shutdown circuit includes a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a seventh capacitor, an eighth capacitor, an eighth diode, and a fourth comparator, wherein: The output of the second comparator is connected to the first terminal of the fifteenth resistor; The inverting input of the fourth comparator is connected to the second terminal of the fifteenth resistor; The inverting input of the fourth comparator is connected to the first terminal of the seventh capacitor, and the second terminal of the seventh capacitor is grounded. The non-inverting input of the fourth comparator is connected to the first terminal of the sixteenth resistor, and the second terminal of the sixteenth resistor is connected to the positive power supply. The non-inverting input of the fourth comparator is connected to the first terminal of the seventeenth resistor, and the second terminal of the seventeenth resistor is grounded. The non-inverting input of the fourth comparator is connected to the first terminal of the eighth capacitor, and the second terminal of the eighth capacitor is grounded. The non-inverting input of the fourth comparator is connected to the first terminal of the eighteenth resistor, and the second terminal of the eighteenth resistor is connected to the output of the fourth comparator. The output of the fourth comparator is connected to the first terminal of the nineteenth resistor, and the second terminal of the nineteenth resistor is connected to the power supply. The output of the fourth comparator is connected to the cathode of the eighth diode, and the anode of the eighth diode is connected to the control terminal of the first analog switch circuit.

[0039] The function of the synchronous out-of-range shutdown circuit is as follows: it determines whether the phase difference between the current mains power and the inverter is within the synchronizable range. If it is within the synchronizable range, it outputs a high level; otherwise, it outputs a low level.

[0040] The synchronous over-range shutdown circuit operates as follows: When the mains power and the inverter are in phase, the output of the second or third comparator is low, and the fourth comparator outputs a high level; when the mains power and the inverter are out of phase, the outputs of the second and third comparators are high. After integration by the fifteenth resistor and the seventh capacitor, the high level is fed to the inverting input of the fourth comparator and compared with the reference voltage at the non-inverting input. If the voltage at the inverting input is higher than the voltage at the non-inverting input, the fourth comparator outputs a low level.

[0041] As some embodiments, the first analog switch circuit includes a fourth resistor, a first analog switch, and an eighth resistor; wherein: The output terminal of the first operational amplifier circuit is connected to the input terminal of the first analog switch; The input terminal of the first analog switch is connected to the first terminal of the fourth resistor, and the output terminal of the first analog switch is connected to the second terminal of the fourth resistor. The control terminal of the first analog switch is connected to the first terminal of the eighth resistor, and the second terminal of the eighth resistor is positively connected to the power supply.

[0042] The function of the first analog switch circuit is as follows: to control the on and off of the mains reference sine wave output.

[0043] The operation of the first analog switch circuit is as follows: The eighth resistor provides a forward bias to the control terminal of the first analog switch, turning it on and allowing the mains reference sine wave to be fed into the second analog switch. When the mains frequency or phase exceeds the synchronization range, the eighth diode clamps the forward bias provided by the eighth resistor to ground, turning off the first analog switch. When the mains voltage exceeds the 220V / 230V / 240V ± 20% range, the third diode similarly clamps the forward bias provided by the eighth resistor to ground, also turning off the first analog switch. With the first analog switch off, the mains synchronization tracking is disabled.

[0044] As one of the embodiments, the second inverter synchronization signal is a square wave signal, which comes from the inverted code output terminal of the frequency divider (MC14013B). The waveform of the second inverter synchronization signal is in phase and frequency with the inverter output sine wave.

[0045] As some embodiments, the rectangular wave generating circuit includes a third capacitor, a fifth capacitor, a first XOR gate, and a fifth resistor, wherein: The first terminal of the third capacitor is the input terminal of the second inverter synchronization signal; The second terminal of the third capacitor is connected to the first input terminal of the first XOR gate; The first input terminal of the first XOR gate is connected to the first terminal of the fifth resistor, and the second terminal of the fifth resistor is positively connected to the power supply. The second input of the first XOR gate is positively connected to the power supply.

[0046] The function of the rectangular wave generator circuit is as follows: to generate a rectangular wave at the zero-crossing position of the falling edge of the inverter output sine wave.

[0047] The working process of the rectangular wave generator circuit is as follows: When the falling edge of the inverter output sine wave crosses zero, the corresponding second synchronization signal (rectangular wave) changes from high level to low level, causing VCC to charge the third capacitor through the fifth resistor. A low-level triangular wave is generated at one input of the first XOR gate. The other input of the first XOR gate is connected to the positive power supply, and a rectangular wave is output at the output terminal with a duty cycle of 5%.

[0048] As some embodiments, the second analog switch circuit includes a sixth resistor, a seventh resistor, and a second analog switch, wherein: The output terminal of the first analog switch circuit is connected to the first terminal of the sixth resistor, and the second terminal of the sixth resistor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The first end of the sixth resistor is connected to the first end of the seventh resistor, and the second end of the seventh resistor is connected to the input end of the second analog switch. The output terminal of the rectangular wave generator circuit is connected to the control terminal of the second analog switch.

[0049] The function of the second analog switch circuit is as follows: compare the difference between the current mains frequency and the inverter frequency, and convert it into a voltage signal output.

[0050] The operation of the second analog switch circuit is as follows: The rectangular wave output by the first XOR gate provides a positive bias to the control terminal of the second analog switch, turning on the second analog switch. During the conduction period of the second analog switch, when the mains frequency equals the inverter frequency, the falling edge potential of the mains reference sine wave input to the second analog switch is exactly at the zero-crossing point, and the voltage value is equal to VERF. When the mains frequency decreases, the falling edge potential of the mains reference sine wave input to the second analog switch is above the zero-crossing point, and the voltage value is slightly higher than VERF. Similarly, when the mains frequency increases, the falling edge potential of the mains reference sine wave input to the second analog switch is below the zero-crossing point, and the voltage value is slightly lower than VERF. Changes in the mains frequency will cause changes in the output voltage of the second analog switch; a lower mains frequency results in a higher output voltage, and a higher mains frequency results in a lower output voltage.

[0051] As some embodiments, the second operational amplifier circuit includes a twentieth resistor, a second operational amplifier, a twenty-first resistor, a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a fourth capacitor, a ninth capacitor, a tenth capacitor, and a twelfth capacitor, wherein: The output terminal of the second analog switch circuit is connected to the first terminal of the fourth capacitor, and the second terminal of the fourth capacitor is grounded. The output of the second analog switch circuit is connected to the first end of the twentieth resistor, and the second end of the twentieth resistor is connected to the non-inverting input of the second operational amplifier. The non-inverting input of the second operational amplifier is connected to the first terminal of the twenty-third resistor, the second terminal of the twenty-third resistor is connected to the positive terminal of the ninth capacitor, and the negative terminal of the ninth capacitor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The inverting input of the second operational amplifier is connected to the first terminal of the twenty-fourth resistor, and the second terminal of the twenty-fourth resistor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The inverting input terminal of the second operational amplifier is connected to the first terminal of the twenty-fifth resistor, and the second terminal of the twenty-fifth resistor is connected to the output terminal of the second operational amplifier. The inverting input of the second operational amplifier is connected to the first terminal of the tenth capacitor, the second terminal of the tenth capacitor is connected to the output of the second operational amplifier, and the output of the second operational amplifier is connected to the first terminal of the twenty-first resistor. The second terminal of the twenty-first resistor is connected to the first terminal of the twelfth capacitor, and the second terminal of the twelfth capacitor is grounded.

[0052] The function of the second operational amplifier circuit is as follows: to filter and amplify the voltage signal representing the difference between the current mains frequency and the inverter frequency, and to output a frequency modulation control signal.

[0053] The working process of the second operational amplifier circuit is as follows: The voltage output by the second analog switch is filtered by the fourth capacitor, the twentieth resistor, the twenty-third resistor, and the ninth capacitor, and then connected to the non-inverting input terminal of the second operational amplifier. After being amplified by the operation, it is filtered by the twenty-first resistor and the twelfth capacitor before being sent to the pulse width modulation frequency conversion circuit.

[0054] As some embodiments, the pulse width modulation frequency conversion circuit includes a twenty-second resistor, a twenty-sixth resistor, an eleventh capacitor, a second potentiometer, and a time base chip, wherein: The control terminal (CTRL) of the time base chip is connected to the twenty-first resistor; The discharge terminal (DIS) of the time base chip is connected to the first terminal of the second potentiometer; The discharge terminal (DIS) of the time base chip is electrically connected to the active contact terminal of the second potentiometer; The second terminal of the second potentiometer is connected to the first terminal of the twenty-second resistor, and the second terminal of the twenty-second resistor is positively connected to the power supply. The discharge terminal (DIS) of the time base chip is connected to the first terminal of the twenty-sixth resistor, and the second terminal of the twenty-sixth resistor is connected to the threshold terminal (THR) of the time base chip. The threshold (THR) terminal of the time base chip is connected to the trigger (TRIG) terminal of the time base chip; The trigger terminal (TRIG) of the time base chip is connected to the first terminal of the eleventh capacitor, and the second terminal of the eleventh capacitor is grounded.

[0055] The pulse width modulation frequency conversion circuit functions as follows: when the mains frequency and phase exceed the synchronization range, it outputs a 19.2kHz square wave to generate a 50Hz or 60Hz reference sine wave; when the mains frequency and phase are within the synchronization range, it outputs a modulation frequency square wave to generate a reference sine wave with the same frequency and phase as the mains power.

[0056] The operation of the pulse width modulation (PWM) frequency conversion circuit is as follows: When the mains frequency and phase exceed the synchronization range, the first analog switch is turned off, and the input and output voltages of the second analog switch are equal to the VERF voltage. After passing through the second operational amplifier, the voltage value remains in a steady state, and the output voltage does not affect the control terminal (CTRL) voltage of the first time base chip. The PWM frequency is determined by the twenty-second resistor, the twenty-sixth resistor, the eleventh capacitor, and the second potentiometer. The second adjustable resistor can calibrate the PWM frequency, which is calculated as f = 1.443 / (R22 + VR2 + 2R26) * C11. When the mains frequency and phase are within the synchronization range, the PWM control signal output by the second operational amplifier circuit will adjust the control terminal (CTRL) voltage of the first time base chip. The lower the control terminal voltage, the higher the modulation frequency; the higher the control terminal voltage, the lower the modulation frequency. This change in the PWM frequency will change the inverter reference sine wave frequency, thereby achieving synchronous tracking of the mains frequency and phase by the inverter.

[0057] The advantages of this embodiment are: It enables the frequency and phase of the reference sine wave in hardware-controlled inverter applications to follow the mains waveform, improving the stability of hardware-controlled inverter applications and reducing the possibility of relay damage. Compared with DSP chip control, which is expensive, it has a low-cost advantage. It also solves the problem that MCU control often leads to inverter failures due to slow operation speed in complex application environments.

[0058] The embodiments described herein are preferred embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Furthermore, the above embodiments can be combined with each other for use. Therefore, all equivalent changes made in accordance with the structure, shape, and principle of the present invention should be covered within the scope of protection of the present invention.

Claims

1. A frequency modulation circuit based on mains synchronous tracking, applied in a hardware-controlled inverter, connected to the mains voltage waveform, a first inverter synchronization signal, a second inverter synchronization signal, and a mains over / under voltage shutdown signal, characterized in that, It includes a first operational amplifier circuit, a precision detector circuit, a synchronous over-range shutdown circuit, a mains over / under voltage shutdown circuit, a first analog switch circuit, a rectangular wave generator circuit, a second analog switch circuit, a second operational amplifier circuit, and a pulse width modulation frequency conversion circuit; wherein: The mains voltage waveform is connected to the input terminal of the first operational amplifier circuit; The first output terminal of the first operational amplifier circuit is connected to the first input terminal of the first analog switch circuit, and the second output terminal of the first operational amplifier circuit is connected to the first input terminal of the precision detector circuit. The first inverter synchronization signal is connected to the second input terminal of the precision detector circuit, the output terminal of the precision detector circuit is connected to the input terminal of the synchronization over-range shutdown circuit, and the output terminal of the synchronization over-range shutdown circuit is connected to the control terminal of the first analog switch circuit. The mains over / under voltage shutdown signal is connected to the input terminal of the mains over / under voltage shutdown circuit, and the output terminal of the mains over / under voltage shutdown circuit is connected to the control terminal of the first analog switch circuit. The output terminal of the first analog switch circuit is connected to the input terminal of the second analog switch circuit; The second inverter synchronization signal is connected to the input terminal of the rectangular wave generating circuit, and the output terminal of the rectangular wave generating circuit is connected to the control terminal of the second analog switch circuit. The output terminal of the second analog switch circuit is connected to the input terminal of the second operational amplifier circuit; The output terminal of the second operational amplifier circuit is connected to the input terminal of the pulse width modulation frequency conversion circuit. The output terminal of the pulse width modulation frequency conversion circuit outputs a frequency-modulated square wave signal, so that the frequency and phase of the reference sine wave modulated by the frequency-modulated square wave signal follow the mains waveform. The formation of the mains voltage waveform is as follows: the initial signal comes from AC power input terminal N and AC power input terminal L, and after passing through the isolation step-down transformer, a 19-21VAC sine wave is obtained, which is the mains voltage waveform. The first end of the mains voltage waveform is connected to the input terminal of the first operational amplifier, and the second end of the mains voltage waveform is connected to VREF, wherein VREF is the midpoint voltage of the power supply to ground. The function of the rectangular wave generator circuit is as follows: to generate a rectangular wave at the zero-crossing point of the falling edge of the inverter output sine wave; The operation of the second analog switch circuit is as follows: The rectangular wave output by the first XOR gate provides a positive bias to the control terminal of the second analog switch, turning on the second analog switch. During the conduction period of the second analog switch, when the mains frequency equals the inverter frequency, the falling edge potential of the mains reference sine wave input to the second analog switch is exactly at the zero-crossing point, and the voltage value is equal to VERF. When the mains frequency decreases, the falling edge potential of the mains reference sine wave input to the second analog switch is above the zero-crossing point, and the voltage value is slightly higher than VERF. Similarly, when the mains frequency increases, the falling edge potential of the mains reference sine wave input to the second analog switch is below the zero-crossing point, and the voltage value is slightly lower than VERF. Changes in the mains frequency will cause changes in the output voltage of the second analog switch; when the mains frequency decreases, the output voltage increases; when the mains frequency increases, the output voltage decreases. The working process of the pulse width modulation frequency conversion circuit is as follows: When the mains frequency and phase exceed the synchronization range, the first analog switch is turned off, and the input and output voltages of the second analog switch are equal to the VERF voltage. After passing through the second operational amplifier, the voltage value is maintained in a steady state, and the output voltage does not affect the control terminal voltage of the first time base chip. The frequency modulation pulse width is determined by the twenty-second resistor, the twenty-sixth resistor, the eleventh capacitor, and the second potentiometer. The second adjustable resistor can calibrate the frequency modulation pulse width. The frequency modulation pulse width is calculated as f = 1.443 / (R22 + VR2 + 2R26) * C11. When the mains frequency and phase are within the synchronization range, the frequency modulation control signal output by the second operational amplifier circuit will adjust the control terminal voltage of the first time base chip. The lower the control terminal voltage, the higher the modulation frequency; the higher the control terminal voltage, the lower the modulation frequency. This change in pulse width modulation frequency will change the inverter reference sine wave frequency, thereby achieving synchronous tracking of the mains frequency and phase by the inverter.

2. The frequency modulation circuit based on mains synchronous tracking according to claim 1, characterized in that, The first operational amplifier circuit includes a first resistor, a second resistor, a third resistor, a first potentiometer, a first capacitor, a second capacitor, a first diode, a second diode, and a first operational amplifier; wherein: The first end of the first resistor is the input terminal of the mains voltage waveform, the second end of the first resistor is connected to the anode of the first diode, and the cathode of the first diode is positively connected to the power supply. The second end of the first resistor is connected to the cathode of the second diode, and the anode of the second diode is grounded; The second end of the first resistor is connected to the first end of the first capacitor, and the second end of the first capacitor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The second end of the first resistor is connected to the first end of the first potentiometer, and the first end of the first potentiometer is connected to the movable contact end of the first potentiometer. The second terminal of the first potentiometer is connected to the non-inverting input terminal of the first operational amplifier, and the non-inverting input terminal of the first operational amplifier is connected to the first terminal of the second capacitor. The second terminal of the second capacitor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground; The second end of the first resistor is connected to the first end of the second resistor, the second end of the second resistor is connected to the inverting input of the first operational amplifier, and the inverting input of the first operational amplifier is connected to the first end of the third resistor. The first end of the third resistor is connected to the output end of the first operational amplifier.

3. The frequency modulation circuit based on mains synchronous tracking according to claim 1, characterized in that, It also includes a mains voltage judgment circuit, wherein the mains over / under voltage shutdown signal originates from the mains voltage judgment circuit; and / or The mains over / under voltage shutdown circuit includes a third diode, the cathode of which is the input terminal of the mains undervoltage shutdown signal, and the anode of which is connected to the control terminal of the first analog switch circuit.

4. The frequency modulation circuit based on mains synchronous tracking according to claim 1, characterized in that, The first inverter synchronization signal is a square wave signal, which comes from the original code output terminal of the frequency divider. The waveform of the first inverter synchronization signal is in the same frequency but out of phase with the inverter output sine wave. and / or The precision detection circuit includes a first comparator, a second comparator, a third comparator, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a sixth capacitor, a fourth diode, a fifth diode, a sixth diode, and a seventh diode, wherein: The output terminal of the first operational amplifier circuit is connected to the inverting input terminal of the first comparator; The non-inverting input of the first comparator is connected to the first terminal of the ninth resistor, and the second terminal of the ninth resistor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The non-inverting input of the first comparator is connected to the first terminal of the tenth resistor, and the second terminal of the tenth resistor is grounded. The non-inverting input of the first comparator is connected to the first terminal of the sixth capacitor, and the second terminal of the sixth capacitor is grounded. The output terminal of the first comparator is connected to the first terminal of the twelfth resistor, and the second terminal of the twelfth resistor is positively connected to the power supply. The output of the first comparator is connected to the anode of the fourth diode, the cathode of the fourth diode is connected to the cathode of the sixth diode, the anode of the sixth diode is connected to the cathode of the seventh diode, the anode of the seventh diode is connected to the anode of the fifth diode, and the cathode of the fifth diode is connected to the anode of the fourth diode. The non-inverting input of the first comparator is connected to the non-inverting input of the second comparator, and the non-inverting input of the second comparator is connected to the inverting input of the third comparator. The inverting input terminal of the second comparator is connected to the anode of the fifth diode, the inverting input terminal of the second comparator is connected to the first terminal of the thirteenth resistor, and the second terminal of the thirteenth resistor is connected to the positive power supply. The non-inverting input terminal of the third comparator is connected to the cathode of the fourth diode, the non-inverting input terminal of the third comparator is connected to the first terminal of the eleventh resistor, and the second terminal of the eleventh resistor is grounded. The anode of the sixth diode is the input terminal of the first inverter synchronization signal; The output of the second comparator is connected to the output of the third comparator; The output of the second comparator is connected to the first terminal of the fourteenth resistor, and the second terminal of the fourteenth resistor is positively connected to the power supply; and / or The synchronous over-range shutdown circuit includes a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a seventh capacitor, an eighth capacitor, an eighth diode, and a fourth comparator, wherein: The output of the second comparator is connected to the first terminal of the fifteenth resistor; The inverting input terminal of the fourth comparator is connected to the second terminal of the fifteenth resistor; The inverting input terminal of the fourth comparator is connected to the first terminal of the seventh capacitor, and the second terminal of the seventh capacitor is grounded. The non-inverting input terminal of the fourth comparator is connected to the first terminal of the sixteenth resistor, and the second terminal of the sixteenth resistor is positively connected to the power supply. The non-inverting input terminal of the fourth comparator is connected to the first terminal of the seventeenth resistor, and the second terminal of the seventeenth resistor is grounded. The non-inverting input terminal of the fourth comparator is connected to the first terminal of the eighth capacitor, and the second terminal of the eighth capacitor is grounded. The non-inverting input terminal of the fourth comparator is connected to the first terminal of the eighteenth resistor, and the second terminal of the eighteenth resistor is connected to the output terminal of the fourth comparator. The output terminal of the fourth comparator is connected to the first terminal of the nineteenth resistor, and the second terminal of the nineteenth resistor is positively connected to the power supply. The output terminal of the fourth comparator is connected to the cathode of the eighth diode, and the anode of the eighth diode is connected to the control terminal of the first analog switch circuit.

5. The frequency modulation circuit based on mains synchronous tracking according to claim 1, characterized in that, The first analog switch circuit includes a fourth resistor, a first analog switch, and an eighth resistor; wherein: The output terminal of the first operational amplifier circuit is connected to the input terminal of the first analog switch; The input terminal of the first analog switch is connected to the first terminal of the fourth resistor, and the output terminal of the first analog switch is connected to the second terminal of the fourth resistor. The control terminal of the first analog switch is connected to the first terminal of the eighth resistor, and the second terminal of the eighth resistor is positively connected to the power supply.

6. The frequency modulation circuit based on mains synchronous tracking according to claim 1, characterized in that, The second inverter synchronization signal is a square wave signal, originating from the inverted code output of the frequency divider. The waveform of the second inverter synchronization signal is in phase and frequency with the inverter output sine wave; and / or The rectangular wave generating circuit includes a third capacitor, a fifth capacitor, a first XOR gate, and a fifth resistor, wherein: The first terminal of the third capacitor is the input terminal of the second inverter synchronization signal; The second terminal of the third capacitor is connected to the first input terminal of the first XOR gate; The first input terminal of the first XOR gate is connected to the first terminal of the fifth resistor, and the second terminal of the fifth resistor is positively connected to the power supply. The second input of the first XOR gate is positively connected to the power supply.

7. The frequency modulation circuit based on mains synchronous tracking according to claim 1, characterized in that, The second analog switch circuit includes a sixth resistor, a seventh resistor, and a second analog switch, wherein: The output terminal of the first analog switch circuit is connected to the first terminal of the sixth resistor, and the second terminal of the sixth resistor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The first end of the sixth resistor is connected to the first end of the seventh resistor, and the second end of the seventh resistor is connected to the input end of the second analog switch. The output terminal of the rectangular wave generator circuit is connected to the control terminal of the second analog switch.

8. The frequency modulation circuit based on mains synchronous tracking according to claim 1, characterized in that, The second operational amplifier circuit includes a twentieth resistor, a second operational amplifier, a twenty-first resistor, a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a fourth capacitor, a ninth capacitor, a tenth capacitor, and a twelfth capacitor, wherein: The output terminal of the second analog switch circuit is connected to the first terminal of the fourth capacitor, and the second terminal of the fourth capacitor is grounded. The output terminal of the second analog switch circuit is connected to the first terminal of the second tenth resistor, and the second terminal of the second tenth resistor is connected to the non-inverting input terminal of the second operational amplifier. The non-inverting input of the second operational amplifier is connected to the first terminal of the 23rd resistor, the second terminal of the 23rd resistor is connected to the positive terminal of the 9th capacitor, and the negative terminal of the 9th capacitor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The inverting input terminal of the second operational amplifier is connected to the first terminal of the twenty-fourth resistor, and the second terminal of the twenty-fourth resistor is connected to VREF, where VREF is the midpoint voltage of the power supply to ground. The inverting input terminal of the second operational amplifier is connected to the first terminal of the second fifteenth resistor, and the second terminal of the second fifteenth resistor is connected to the output terminal of the second operational amplifier. The inverting input terminal of the second operational amplifier is connected to the first terminal of the tenth capacitor, the second terminal of the tenth capacitor is connected to the output terminal of the second operational amplifier, and the output terminal of the second operational amplifier is connected to the first terminal of the eleventh resistor. The second end of the twentieth-first resistor is connected to the first end of the twelfth capacitor, and the second end of the twelfth capacitor is grounded.

9. The frequency modulation circuit based on mains synchronous tracking according to claim 1, characterized in that, The pulse width modulation frequency conversion circuit includes a twenty-second resistor, a twenty-sixth resistor, an eleventh capacitor, a second potentiometer, and a time base chip, wherein: The control terminal of the time base chip is connected to the second operational amplifier circuit; The discharge terminal of the time base chip is connected to the first terminal of the second potentiometer; The discharge terminal of the time base chip is electrically connected to the movable contact terminal of the second potentiometer; The second terminal of the second potentiometer is connected to the first terminal of the second twelfth resistor, and the second terminal of the second twelfth resistor is positively connected to the power supply. The discharge terminal of the time base chip is connected to the first terminal of the 26th resistor, and the second terminal of the 26th resistor is connected to the threshold terminal of the time base chip. The threshold terminal of the time base chip is connected to the trigger terminal of the time base chip; The trigger terminal of the time base chip is connected to the first terminal of the eleventh capacitor, and the second terminal of the eleventh capacitor is grounded.

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