PCB wiring structure

Abstract

The application relates to a PCB wiring structure, which comprises a substrate provided with a plurality of single-board areas and a process edge area; each single-board area is provided with a first output pad and a first trace electrically connected with the first output pad; the process edge area is provided with a second trace; the first traces of the plurality of single-board areas are electrically connected with the second trace; a first collection pad is mounted on the process edge area and electrically connected with the second trace. The first output pads on the plurality of single-board areas are electrically connected with the second trace through the first traces, and the first collection pad electrically connected with the second trace is used for electrical connection with an external calibration system, so that the problem that the first output pads on the plurality of single boards need to be separately wired for electrical connection with the external calibration system, resulting in excessive wiring, messy wiring, wiring error, low calibration efficiency, time consumption and labor intensity is solved.

Description

Technical Field

[0001] This invention relates to the automotive field, and in particular to a PCB wiring structure. Background Technology

[0002] The process of detecting oil pressure and temperature in automotive engines must be performed while the engine is running, under conditions of significant temperature fluctuations. Furthermore, road conditions during vehicle operation also affect the detection. The engine bears enormous heat loads, impacts, and vibrations, so the sensor's operating conditions are negatively impacted by harsh environments such as high temperatures, humidity, impacts, vibrations, corrosion, and oil contamination. Ordinary PCBs are prone to warping, and pressure during assembly can cause changes in sensor parameters. Therefore, a different PCB substrate—a ceramic substrate—is typically used in the design process. Ceramic substrates have strong bonding strength, prevent copper foil from falling off, offer high reliability, and maintain stable performance in high-temperature and high-humidity environments. Generally, due to the small size of the sensors, panelization is used to improve PCB utilization and surface mount efficiency.

[0003] In related technologies, when calibrating the parameters of a panel, multiple pads on the individual boards of the panel need to be connected to external calibration equipment by individual wires. This results in too many connections, which leads to messy wire harnesses, easy wire harness misconnection, low calibration efficiency, and is time-consuming and labor-intensive. Summary of the Invention

[0004] This invention provides a PCB wiring structure to solve the problems in related technologies where multiple pads on a single board on a panel need to be connected to external calibration equipment separately with wires, which leads to too many connections. Too many connections result in messy wire harnesses, easy wire harness misconnection, low calibration efficiency, and is time-consuming and labor-intensive.

[0005] This invention provides a PCB wiring structure, which includes:

[0006] The substrate has multiple single-board areas and process edge areas; each single-board area has a first output pad and a first trace electrically connected to the first output pad; the process edge area has a second trace; and the first traces of the multiple single-board areas are electrically connected to the second traces.

[0007] A first aggregate pad is mounted on the process edge area and is electrically connected to the second trace.

[0008] In some embodiments, there are two first collection pads, and the two first collection pads correspond one-to-one with the two ends of the second trace and are electrically connected to the corresponding end.

[0009] In some embodiments, each of the single-board areas is provided with a second output pad and a third trace electrically connected to the second output pad;

[0010] The process edge area is provided with a fourth trace and a second collection pad electrically connected to the fourth trace, and the third traces on multiple single board areas are all electrically connected to the fourth trace;

[0011] Multiple single-board areas are arranged side by side and located between the second and fourth traces.

[0012] In some embodiments, there are two second collection pads, each corresponding to one end of the fourth trace and electrically connected to the corresponding end.

[0013] In some embodiments, each of the single-board areas is provided with a third output pad and a fifth trace electrically connected to the third output pad;

[0014] The process edge area is provided with a sixth trace and a third collection pad electrically connected to the sixth trace, and the fifth traces on multiple single board areas are all electrically connected to the sixth trace;

[0015] The fourth trace is located between the multiple single-board areas arranged side by side and the sixth trace, and a first insulating coating is provided at the intersection of the fifth trace and the sixth trace.

[0016] In some embodiments, there are two third collection pads, and the two third collection pads correspond one-to-one with the two ends of the sixth trace and are electrically connected to the corresponding end.

[0017] In some embodiments, the substrate is provided with at least two rows of single-board areas, and at least one side of each row of single-board areas is provided with the first collection pad. The first collection pads corresponding to the at least two rows of single-board areas are electrically connected to each other through a seventh trace.

[0018] In some embodiments, at least one side of each row of single-board areas is provided with a second pooling pad, and the second pooling pad is located on the same side as the first pooling pad;

[0019] At least two rows of the single-board areas corresponding to the second collection pads are electrically connected to each other through an eighth trace, and a second insulating coating is provided at the intersection of the eighth trace and the seventh trace.

[0020] In some embodiments, at least one side of each row of single-board areas is provided with a third pooling pad, the third pooling pad being located on the same side as the second pooling pad;

[0021] At least two rows of the single-board areas are electrically connected to each other via the ninth trace, and the intersection of the ninth trace and the seventh trace is provided with a third insulating coating, and the intersection of the ninth trace and the eighth trace is provided with a fourth insulating coating.

[0022] In some embodiments, the third insulating coating and the second insulating coating are integrally formed.

[0023] The beneficial effects of the technical solution provided by this invention include: first output pads on multiple single-board areas are electrically connected to second traces through first traces, and first collection pads connected to second traces through second traces are used to connect to external calibration systems, thereby enabling parameter calibration of multiple single boards on the PCB wiring structure. This solves the problem that the first output pads on multiple single boards need to be individually wired to connect to external calibration systems, resulting in too many wires, messy wire harnesses, easy wire harness misconnection, low calibration efficiency, and time and effort. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a schematic diagram of the PCB wiring structure provided in an embodiment of the present invention;

[0026] Figure 2 This is a schematic diagram of the double-row PCB board wiring structure provided in an embodiment of the present invention;

[0027] Figure 3 for Figure 2 A magnified structural diagram of A in the diagram.

[0028] In the diagram: 1. Single board area; 2. Process edge area; 3. First output pad; 4. First trace; 5. Second trace; 6. First collection pad; 7. Second output pad; 8. Third trace; 9. Fourth trace; 10. Second collection pad; 11. Third output pad; 12. Fifth trace; 13. Sixth trace; 14. First insulating coating; 15. Third collection pad; 16. Seventh trace; 17. Eighth trace; 18. Second insulating coating; 19. Ninth trace; 20. Third insulating coating; 21. Fourth insulating coating. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0030] This invention provides a PCB wiring structure to solve the problems in related technologies where multiple pads on a single board on a panel need to be connected to external calibration equipment separately with wires, which leads to too many connections. Too many connections result in messy wire harnesses, easy wire harness misconnection, low calibration efficiency, and is time-consuming and labor-intensive.

[0031] See Figure 1 As shown, this embodiment of the invention provides a PCB wiring structure, which may include: a substrate, the substrate having multiple single-board areas 1 and process edge areas 2; each single-board area 1 having a first output pad 3 and a first trace 4 electrically connected to the first output pad 3; the process edge area 2 having a second trace 5, and the first trace 4 of the multiple single-board areas 1 being electrically connected to the second trace 5; and a first collection pad 6, the first collection pad 6 being mounted on the process edge area 2 and electrically connected to the second trace 5. The first output pad 3 may be a temperature sensor output pad or a pressure sensor output pad.

[0032] Specifically, the power pads on multiple single-board areas 1 are first connected to the circuit. The first output pads 3 on multiple single-board areas 1 are electrically connected to the second traces 5 via the first trace 4. The first collection pad 6 connected by the second trace 5 is electrically connected to the external calibration system. This enables parameter calibration of multiple single boards on the PCB wiring structure. This solves the problem that the first output pads 3 on multiple single-board areas 1 need to be individually wired to be electrically connected to the external calibration system, resulting in too many wires, messy wire harnesses, easy wire harness misconnection, low calibration efficiency, and time and labor costs.

[0033] Furthermore, there are two first aggregate pads 6, each corresponding to one end of the second trace 5 and electrically connected to the corresponding end. With one first aggregate pad 6 at each end of the second trace 5, operators can select one of the first aggregate pads 6 for electrical connection during actual parameter calibration, based on the working environment requirements, thereby calibrating the parameters of each board area 1 and improving the flexibility of the PCB wiring structure.

[0034] In some embodiments, such as Figure 1As shown, each board area 1 is provided with a second output pad 7 and a third trace 8 electrically connected to the second output pad 7; the process edge area 2 is provided with a fourth trace 9 and a second collection pad 10 electrically connected to the fourth trace 9, and the third trace 8 on multiple board areas 1 are all electrically connected to the fourth trace 9; multiple board areas 1 are arranged side by side and located between the second trace 5 and the fourth trace 9. The second output pad 7 can be a GND output pad. The routing direction of the third trace 8 is opposite to that of the first trace 4, so that the multiple single-board areas 1 arranged side by side are located between the second trace 5 and the fourth trace 9. At the same time, the first collection pad 6 and the second collection pad 10 can be located on the same side, that is, on the left side of the multiple single-board areas 1 arranged side by side. When the substrate needs to be calibrated, the GND output pads in the multiple single-board areas 1 on the substrate only need to be electrically connected to the second collection pad 10. Therefore, it is not necessary to connect the GND output pads on each single-board area 1 separately with wire harnesses, which greatly reduces the number of wiring harnesses, ensures the efficiency of calibration work, and avoids the problem of easy wiring harness misconnection.

[0035] Furthermore, such as Figure 1 As shown, there are two second collection pads 10, each corresponding to one end of the fourth trace 9 and electrically connected to its corresponding end. The two second collection pads 10 are located on the left and right sides of multiple board areas 1 arranged side-by-side. When faced with other concentrated wiring harnesses, the operator can choose one of the second collection pads 10 for electrical connection to avoid the problem of messy and concentrated wiring harnesses.

[0036] In some embodiments, such as Figure 1As shown, each board area 1 is provided with a third output pad 11 and a fifth trace 12 electrically connected to the third output pad 11; the process edge area 2 is provided with a sixth trace 13 and a third convergence pad 15 electrically connected to the sixth trace 13, and the fifth trace 12 on multiple board areas 1 are all electrically connected to the sixth trace 13; the fourth trace 9 is located between multiple board areas 1 and the sixth trace 13 arranged side by side, and a first insulating coating 14 is provided at the intersection of the fifth trace 12 and the sixth trace 13. The third output pad 11 can be a VCC output pad. The VCC output pad on each board area 1 is led to the third convergence pad 15, which is electrically connected to the sixth pad 13, through the fifth trace 12. When the fifth trace 12 is electrically connected to the sixth trace 13, it will intersect with the fourth trace 9. At this time, a first insulating coating 14 is provided at the intersection. Along the thickness direction of the substrate, the first insulating coating 14 is located between the fifth trace 12 and the sixth trace 13 to isolate the connection between the fifth trace 12 and the sixth trace 13 and ensure normal circuit routing. Finally, simply connect the third converging pad 15 to the power supply to power multiple single-board areas 1 arranged side by side. There is no need to connect each third converging pad 15 to the power supply individually, which can further reduce the use of wiring harnesses. The substrate can be connected to external calibration equipment through the third converging pad 15 (i.e., VCC output pad), the second converging pad 10 (i.e., GDN output pad), and the first converging pad 6 (i.e., sensor output pad). Only three wiring harnesses are needed to perform parameter calibration work on multiple single-board areas 1.

[0037] Furthermore, such as Figure 1 As shown, there are two third consolidation pads 15. Each of the two third consolidation pads 15 corresponds one-to-one with the two ends of the sixth trace 13 and is electrically connected to the corresponding end. The third consolidation pads 15 are located on the left and right sides of multiple single-board areas 1, and the operator can select one of the third consolidation pads 15 for electrical connection. That is, the operator can select the first consolidation pad 6 and the second consolidation pad 10 on the left for wiring harness connection, and then select the third consolidation pad 15 on the right for wiring harness connection; alternatively, the operator can select the first consolidation pad 6 on the left for wiring harness connection, and then select the second consolidation pad 10 and the third consolidation pad 15 on the right for wiring harness connection. There are also various other wiring harness connection options, which will not be listed here. The operator can choose the wiring harness connection according to the actual working situation.

[0038] In some embodiments, such as Figure 2As shown, the substrate has at least two rows of single-board areas 1, and each row of single-board areas 1 has a first collection pad 6 on at least one side. The first collection pads 6 of the at least two rows of single-board areas 1 are electrically connected to each other through a seventh trace 16. When facing a substrate with two rows of single-board areas 1, the first collection pads 6 of each row of single-board areas 1 are made conductive through the seventh trace 16. At this time, the operator only needs to connect the wiring harness to one of the first collection pads 6 to complete the connection of the sensor output pads of the two rows of single-board areas 1.

[0039] In some embodiments, such as Figure 2-3 As shown, at least one side of each row of single-board areas 1 is provided with a second collection pad 10, and the second collection pad 10 is located on the same side as the first collection pad 6. The second collection pads 10 corresponding to at least two rows of single-board areas 1 are electrically connected to each other through an eighth trace 17. A second insulating coating 18 is provided at the intersection of the eighth trace 17 and the seventh trace 16. The eighth trace 17 enables the electrical connection of the second collection pads 10 of the two rows of single-board areas 1. When the eighth trace 17 and the seventh trace 16 intersect, the second insulating coating 18 can be provided between the eighth trace 17 and the seventh trace 16 to ensure the normal routing of the eighth trace 17 and avoid conductive connection with the seventh trace 16. At this time, only one of the second collection pads 10 needs to be connected to the wiring harness to connect the GND output pads of the multiple single-board areas 1 in the two rows, further reducing the amount of wiring harness used.

[0040] Furthermore, such as Figure 2-3 As shown, at least one side of each row of single-board areas 1 is provided with a third collection pad 15, and the third collection pad 15 and the second collection pad 10 are located on the same side. The third collection pads 15 corresponding to at least two rows of single-board areas 1 are electrically connected to each other through a ninth trace 19, and a third insulating coating 20 is provided at the intersection of the ninth trace 19 and the seventh trace 16, and a fourth insulating coating 21 is provided at the intersection of the ninth trace 19 and the eighth trace 17. Specifically, on the left side of each row of single-board areas 1, a first collection pad 6, a second collection pad 10, and a third collection pad 15 are arranged sequentially in the vertical direction. When the third collection pads 15 corresponding to the two rows of single-board areas 1 are connected, they will intersect and conduct electricity with the seventh trace 16. At this time, the third insulating coating 20 can prevent conduction with the seventh trace 16. When they intersect and conduct electricity with the eighth trace 17, the fourth insulating coating 21 can prevent conduction with the eighth trace 17, thereby completing the wire connection of the VCC output pads corresponding to the two rows of single-board areas 1. This allows for the connection of VCC output pads to two rows of single-board areas 1 by simply connecting to one of the third aggregation pads 15.

[0041] Furthermore, such as Figure 3As shown, the third insulating coating 20 and the second insulating coating 18 are integrally formed. Wherein, the third insulating coating 20 and the second insulating coating 18 are integrally formed on the same layer along the substrate thickness direction, thus simplifying the substrate processing technology.

[0042] In some embodiments, such as Figure 2 As shown, the first collection pad 6, the second collection pad 10, and the third collection pad 15 on the right side of the upper single board area 1 are similarly connected to the corresponding first collection pad 6, the second collection pad 10, and the third collection pad 15 in the lower single board area 1 through wiring. At the intersection of the wiring, an insulating coating is used to prevent conduction between different collection pads.

[0043] In the description of this invention, it should be noted that the terms "upper," "lower," etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Unless otherwise expressly specified and limited, the terms "installed," "connected," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two elements. For those skilled in the art, the specific meaning of the above terms in this invention can be understood according to the specific circumstances.

[0044] It should be noted that in this invention, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0045] The above description is merely a specific embodiment of the present invention, enabling those skilled in the art to understand or implement the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A PCB wiring structure, characterized in that, It includes: The substrate has multiple single-board areas (1) and process edge areas (2); each single-board area (1) is provided with a first output pad (3) and a first trace (4) electrically connected to the first output pad (3); the process edge area (2) is provided with a second trace (5); the first trace (4) of the multiple single-board areas (1) is electrically connected to the second trace (5); The first collection pad (6) is installed in the process edge area (2) and is electrically connected to the second trace (5); Each of the single board areas (1) is provided with a second output pad (7) and a third trace (8) electrically connected to the second output pad (7); The process edge area (2) is provided with a fourth trace (9) and a second collection pad (10) electrically connected to the fourth trace (9). The third traces (8) on multiple single board areas (1) are all electrically connected to the fourth trace (9). Multiple single-board areas (1) are arranged side by side and located between the second wiring (5) and the fourth wiring (9); Each of the single board areas (1) is provided with a third output pad (11) and a fifth trace (12) electrically connected to the third output pad (11). The process edge area (2) is provided with a sixth trace (13) and a third collection pad (15) electrically connected to the sixth trace (13). The fifth traces (12) on multiple single board areas (1) are all electrically connected to the sixth trace (13). The fourth wiring (9) is located between the multiple single-board areas (1) arranged side by side and the sixth wiring (13), and the intersection of the fifth wiring (12) and the sixth wiring (13) is provided with a first insulating coating (14).

2. The PCB wiring structure as described in claim 1, characterized in that, There are two first collection pads (6), and the two first collection pads (6) correspond one-to-one with the two ends of the second trace (5) and are electrically connected to the corresponding end.

3. The PCB wiring structure as described in claim 1, characterized in that, There are two second collection pads (10), and the two second collection pads (10) correspond one-to-one with the two ends of the fourth trace (9) and are electrically connected to the corresponding end.

4. The PCB wiring structure as described in claim 1, characterized in that, There are two third collection pads (15), and the two third collection pads (15) correspond one-to-one with the two ends of the sixth trace (13) and are electrically connected to the corresponding end.

5. The PCB wiring structure as described in claim 1, characterized in that, The substrate is provided with at least two rows of single board areas (1), and at least one side of each row of single board areas (1) is provided with the first collection pad (6). The first collection pads (6) corresponding to the at least two rows of single board areas (1) are electrically connected to each other through the seventh trace (16).

6. The PCB wiring structure as described in claim 5, characterized in that, Each row of single board areas (1) is provided with a second collection pad (10) on at least one side, and the second collection pad (10) and the first collection pad (6) are located on the same side; At least two rows of the single board area (1) are electrically connected to each other via an eighth trace (17), and a second insulating coating (18) is provided at the intersection of the eighth trace (17) and the seventh trace (16).

7. The PCB wiring structure as described in claim 6, characterized in that, At least one side of each row of single board areas (1) is provided with a third collection pad (15), and the third collection pad (15) and the second collection pad (10) are located on the same side; At least two rows of the single board area (1) are electrically connected to each other via the ninth trace (19), and the intersection of the ninth trace (19) and the seventh trace (16) is provided with a third insulating coating (20), and the intersection of the ninth trace (19) and the eighth trace (17) is provided with a fourth insulating coating (21).

8. The PCB wiring structure as described in claim 7, characterized in that, The third insulating coating (20) and the second insulating coating (18) are integrally formed.

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