Method for producing a semiconductor single crystal material

Abstract

The application discloses a preparation method of a semiconductor single crystal material, which comprises the following steps: material preparation is carried out by using a heterogeneous substrate; a compound semiconductor material is sputtered on the heterogeneous substrate at a temperature of 200 DEG C to 700 DEG C to obtain a first wafer; the first wafer is subjected to heat treatment for not less than two times to obtain a heat treatment finished wafer, wherein the temperature of each heat treatment is higher than that of the previous heat treatment, the temperature of the first heat treatment is higher than the sputtering temperature, and the temperature of the last heat treatment ranges from 1300 DEG C to 1800 DEG C; and the compound semiconductor material is deposited on the heat treatment finished wafer to obtain the semiconductor single crystal material. Thus, the compound semiconductor material is densified through early low-temperature heat treatment, and the problem of thermal decomposition due to loose structure when high-temperature heat treatment is performed for rearrangement to form a single crystal is avoided, so that the compound semiconductor material deposited subsequently can keep a single crystal state.

Description

Technical Field

[0001] This invention relates to a method for preparing single crystals, and more specifically to a method for preparing semiconductor single crystal materials. Background Technology

[0002] Semiconductor devices are the foundation of the modern electronics industry. Low-defect-density, high-quality single-crystal semiconductor materials are a prerequisite for achieving high-performance semiconductor devices. For elemental semiconductors such as silicon, near-dislocation-free high-quality single-crystal materials can be obtained using crystal growth furnaces and single-crystal pulling methods. However, for most wide-bandgap compound semiconductors, a direct liquid-to-solid transition is required under extremely high temperatures and pressures. Current equipment materials cannot withstand such high temperatures and pressures. Therefore, most current compound semiconductor materials are prepared using substrate-based deposition methods. Furthermore, most compound semiconductor materials currently lack commercially available large-size homogeneous substrates and can only be deposited on heterogeneous substrates. Due to the generally large lattice and thermal mismatches with heterogeneous substrates, the deposited materials often exhibit very high dislocation densities and strong residual stresses. Therefore, reducing dislocation density and strain intensity is crucial for the preparation of wide-bandgap semiconductor single-crystal materials.

[0003] In existing technologies, high-temperature heat treatment can rearrange the crystal lattice and greatly reduce the dislocation density of the material. However, due to the huge thermal mismatch between the material and the substrate, the material after high-temperature heat treatment still generally has very strong residual compressive stress. Excessive compressive stress in the material will cause the subsequent epitaxial growth mode to change from smooth two-dimensional growth to large-ripple three-dimensional growth, which will seriously affect the crystallization quality of the upper layer material. Summary of the Invention

[0004] To address the current challenges in preparing single-crystal semiconductor materials, the inventors conducted extensive research and experimentation. They discovered that while conventional magnetron sputtering often produces polycrystalline semiconductors due to the low sputtering temperature, polycrystalline semiconductors prepared by low-temperature sputtering can undergo lattice rearrangement through high-temperature heat treatment to form single crystals. Furthermore, the inventors found that breaking down the high-temperature heat treatment into multiple stages with progressively increasing temperatures improves the compactness of the semiconductor material through initial lower-temperature heat treatments, preventing thermal decomposition of loosely structured semiconductors prepared by low-temperature sputtering when directly subjected to higher-temperature heat treatment. Therefore, according to one aspect of the present invention, a method for preparing single-crystal semiconductor materials is provided, which is particularly suitable for preparing wide-bandgap compound semiconductor single-crystal materials.

[0005] The method for preparing this semiconductor single-crystal material includes the following steps:

[0006] S10: Material preparation is carried out using a heterogeneous substrate;

[0007] S20: At a temperature of 200℃-700℃, a compound semiconductor material is sputtered onto a heterogeneous substrate to obtain a first wafer;

[0008] S30: Perform heat treatment on the first wafer at least twice to obtain a heat-treated finished wafer, wherein the temperature of each heat treatment is higher than the temperature of the previous heat treatment, the temperature of the first heat treatment is higher than the sputtering temperature, and the temperature range of the last heat treatment is 1300℃-1800℃.

[0009] S40: Deposit compound semiconductor material on a heat-treated finished wafer to obtain a semiconductor single crystal material.

[0010] This invention involves subjecting compound semiconductor materials obtained by low-temperature sputtering to multiple heat treatments at progressively increasing temperatures. This avoids the decomposition problem that occurs when the loosely structured, low-density compound semiconductor material obtained by low-temperature sputtering is directly subjected to high-temperature heat treatment. The initial low-temperature heat treatment (below 1000°C) densifies the compound semiconductor material, allowing it to form a single crystal through lattice rearrangement during subsequent high-temperature heat treatment (above 1000°C). This prevents thermal decomposition due to the loose structure, ensuring that the compound semiconductor material on the heat-treated wafer remains in a single-crystal state, which is essential for the subsequent deposition of compound semiconductor materials.

[0011] In some embodiments, in step S20, the thickness of the compound semiconductor material sputtered on the heterogeneous substrate is controlled within the range of 20 nm to 1 μm. By controlling the thickness of the compound semiconductor material sputtered on the heterogeneous substrate within a reasonable range, it is avoided that the compound semiconductor material is too thick and cannot be transformed into a single crystal structure through subsequent heat treatment.

[0012] In some embodiments, nitrogen or argon atmosphere is used during heat treatment in step S30. This prevents chemical reactions of the compound semiconductor material sputtered on the heterogeneous substrate during heat treatment.

[0013] In some embodiments, the heat treatment time in step S30 is 0.5h-3h. This ensures sufficient heat treatment time to densify or rearrange the compound semiconductor material sputtered on the heterogeneous substrate.

[0014] In some embodiments, in step S30, the heat treatment is performed four times, with each heat treatment occurring at temperatures ranging from 400°C to 800°C, 800°C to 1000°C, 1000°C to 1300°C, and 1300°C to 1800°C. This allows for a gradual increase in the heat treatment temperature, thereby improving the density of the compound semiconductor material sputtered on the heterogeneous substrate. This avoids the decomposition of loosely structured compound semiconductor materials obtained through low-temperature sputtering when directly subjected to high-temperature heat treatment. Furthermore, the inventors have divided the heat treatment into four stages based on the temperature at which it transforms into a single crystal. This avoids both thermal decomposition of the compound semiconductor material sputtered on the heterogeneous substrate due to a single high-temperature treatment and low processing efficiency caused by a large number of heat treatment stages.

[0015] In some embodiments, in step S40, the thickness range of the compound semiconductor material deposited on the heat-treated finished wafer is controlled within 500 nm to 3 μm.

[0016] In some embodiments, the compound semiconductor material in steps S10 and S40 is a wide bandgap compound semiconductor material such as aluminum nitride (AlN), boron nitride (BN), gallium oxide (GaO), aluminum scandium nitride (AlScN), or boron aluminum nitride (BalN).

[0017] In some embodiments, in step S10, the tilt angle of the heterostructure substrate used for material preparation is greater than 1°. Because the residual compressive stress in semiconductor materials, especially aluminum nitride, is excessively high after high-temperature heat treatment, the inventors conceived of using a large-tilt-angle substrate for material preparation. By epitaxially growing more atomic planes on the large-tilt-angle heterostructure substrate, tensile stress is introduced to compensate for the residual compressive stress, achieving stress regulation and thus reducing the residual compressive stress in the semiconductor material after high-temperature heat treatment. Ultimately, this results in high-quality semiconductor single-crystal materials with low defect density and low strain.

[0018] In some embodiments, the heterogeneous substrate is a sapphire substrate, a silicon substrate, or a silicon carbide substrate. This makes the heterogeneous substrate readily available.

[0019] In some embodiments, when the heterostructure is a sapphire substrate, the tilt angle is the angle between the actual cut surface and the (0001) structural surface; when the heterostructure is a silicon substrate, the tilt angle is the angle between the actual cut surface and the (111) structural surface; and when the heterostructure is a silicon carbide substrate, the tilt angle is the angle between the actual cut surface and the (0001) structural surface. This ensures that more atomic planes can be formed during epitaxial growth on the heterostructure, thereby introducing more tensile stress and neutralizing the compressive stress introduced during high-temperature heat treatment. Attached Figure Description

[0020] Figure 1 This is a schematic flowchart of a method for preparing a semiconductor single crystal material according to an embodiment of the present invention;

[0021] Figure 2 This is a schematic diagram of the tilt angle structure of a heterogeneous substrate according to an embodiment of the present invention;

[0022] Figure 3 The graph shows the relationship between stress and substrate tilt angle in the final AlN material. Detailed Implementation

[0023] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other.

[0024] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising" or "including" include not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element. The terminology used herein is generally that commonly used by those skilled in the art; in case of any discrepancy with commonly used terminology, the terminology used herein shall prevail.

[0025] In this paper, the term "heterogeneous substrate" refers to a substrate made of a material different from that of the semiconductor single crystal material to be prepared.

[0026] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0027] Figure 1 A method for preparing a semiconductor single-crystal material according to an embodiment of the present invention is illustrated schematically. As shown, the method for preparing the semiconductor single-crystal material includes the following steps:

[0028] S10: Material preparation is carried out using a heterogeneous substrate;

[0029] S20: At a temperature of 200℃-700℃, a compound semiconductor material is sputtered onto a heterogeneous substrate to obtain a first wafer;

[0030] S30: Perform heat treatment on the first wafer at least twice to obtain a heat-treated finished wafer, wherein the temperature of each heat treatment is higher than the temperature of the previous heat treatment, the temperature of the first heat treatment is higher than the sputtering temperature, and the temperature range of the last heat treatment is 1300℃-1800℃.

[0031] S40: Deposit compound semiconductor material on a heat-treated finished wafer to obtain a semiconductor single crystal material.

[0032] In step S10, for example, the heterogeneous substrate is a substrate material commonly used in the prior art that is different from the wide bandgap semiconductor material. For example, the heterogeneous substrate is a sapphire substrate, a silicon substrate, or a silicon carbide substrate.

[0033] In step S20, the equipment used to sputter the compound semiconductor material on the heterogeneous substrate is a conventional magnetron sputtering equipment commonly used in the prior art; moreover, the sputtered compound semiconductor material is a common wide bandgap semiconductor material, such as aluminum nitride, boron nitride, gallium oxide, aluminum scandium nitride, or boron aluminum nitride.

[0034] In step S30, the first wafer is heat-treated using a high-temperature heat treatment furnace commonly used in the prior art.

[0035] In step S30, the number of heat treatments must be no less than two, for example, two, four, five or six heat treatments can be performed; at the same time, the temperature of each heat treatment must be higher than the temperature of the previous heat treatment, so as to ensure that the density of the compound semiconductor material sputtered on the heterogeneous substrate can be improved after each heat treatment; moreover, the temperature of the last heat treatment must be able to reach 1300℃-1800℃, so as to ensure that the compound semiconductor material sputtered on the heterogeneous substrate can be completely transformed into a single crystal structure after the last heat treatment, so as to ensure that the compound semiconductor material deposited subsequently can also maintain a single crystal structure.

[0036] In step S40, the deposition of compound semiconductor material on the heat-treated finished wafer can be carried out using epitaxial growth equipment commonly used in the prior art, such as chemical vapor deposition (MOCVD) equipment, hydride vapor phase epitaxy (HVPE) equipment, or molecular beam epitaxy (MBE) equipment. Moreover, the compound semiconductor material deposited in step S40 is the same as the compound semiconductor material sputtered in step S20. Therefore, it is possible to avoid the introduction of additional stress due to the deposition of heterogeneous materials, which would lead to crystal quality degradation.

[0037] This invention avoids the decomposition problem that occurs when compound semiconductor materials obtained by low-temperature sputtering undergo high-temperature heat treatment with gradually increasing temperatures through multiple heat treatments. This is achieved by subjecting the compound semiconductor material obtained by low-temperature sputtering to multiple heat treatments. The low-temperature heat treatment first densifies the compound semiconductor material, so that it can form a single crystal through lattice rearrangement during subsequent high-temperature heat treatment without thermal decomposition due to its loose structure. This ensures that the compound semiconductor material on the heat-treated wafer is transformed into a single crystal state, so that the compound semiconductor material deposited later can maintain a single crystal state.

[0038] In some preferred embodiments, in order to avoid the compound semiconductor material sputtered on the heterogeneous substrate being too thick to be transformed into a single crystal structure by heat treatment, and at the same time to avoid the problem of cracking of the compound semiconductor material with excessive thickness during subsequent heat treatment, it is necessary to control the thickness of the compound semiconductor material sputtered on the heterogeneous substrate. Specifically, in step S20, the thickness range of the compound semiconductor material sputtered on the heterogeneous substrate is controlled within 20nm-1μm.

[0039] In some preferred embodiments, in step S30, the atmosphere used during heat treatment is nitrogen or argon. This prevents the compound semiconductor material sputtered onto the heterogeneous substrate from undergoing a chemical reaction during heat treatment.

[0040] In some preferred embodiments, the heat treatment time in step S30 is 0.5h-3h. This ensures sufficient heat treatment time to densify or rearrange the compound semiconductor material sputtered on the heterogeneous substrate.

[0041] In some preferred embodiments, in step S30, the heat treatment is performed four times, and the temperature range for each heat treatment is 400℃-800℃, 800℃-1000℃, 1000℃-1300℃, and 1300℃-1800℃, respectively. After each heat treatment, the temperature can be lowered to room temperature or directly raised for the next heat treatment. Thus, by gradually increasing the heat treatment temperature, the compactness of the compound semiconductor material sputtered on the heterogeneous substrate can be gradually improved, avoiding the decomposition problem that occurs when the loosely structured compound semiconductor material obtained by low-temperature sputtering is directly subjected to high-temperature heat treatment. Moreover, the inventors divide the heat treatment into four stages according to the temperature at which it transforms into a single crystal, which avoids the thermal decomposition problem of the compound semiconductor material sputtered on the heterogeneous substrate due to a single high-temperature treatment, and also avoids the problem of low processing efficiency due to a large number of heat treatments.

[0042] In some preferred embodiments, the thickness of the compound semiconductor material deposited on the heat-treated finished wafer can be selected according to actual needs. Considering the thickness of the compound semiconductor material previously sputtered on the heterogeneous substrate, in step S40, the thickness range of the compound semiconductor material deposited on the heat-treated finished wafer is controlled within 500 nm-3 μm. This ensures that a single-crystal material of a reasonable thickness can be prepared.

[0043] In some preferred embodiments, in order to neutralize the residual compressive stress introduced into the semiconductor material during high-temperature heat treatment as much as possible, the inventors conceived of using a substrate with a large tilt angle for material preparation. Tensile stress is introduced by epitaxial growth on the large tilt angle heterostructure substrate to form more atomic planes, thereby compensating for the residual compressive stress and achieving stress regulation. Therefore, in step S10, the inventors control the tilt angle of the heterostructure substrate used for material preparation to be greater than 1°. Specifically, the tilt angle is the angle between the actual cut surface of the substrate and the structural surface (e.g., ...). Figure 2 As shown, the angle between the structural plane and the actual cut surface is different for different substrates. For example, when the heterostructure substrate is sapphire, the angle is the angle between the actual cut surface and the (0001) structural plane; when the heterostructure substrate is silicon, the angle is the angle between the actual cut surface and the (111) structural plane; and when the heterostructure substrate is silicon carbide, the angle is the angle between the actual cut surface and the (0001) structural plane. Therefore, it can be ensured that when epitaxial growth is performed on different heterostructure substrates, more atomic planes can be formed to introduce more tensile stress, thereby neutralizing the compressive stress introduced during high-temperature heat treatment.

[0044] The technical solution of the present invention will be explained in detail below with reference to specific embodiments.

[0045] Example 1

[0046] The first step involves preparing the material using a sapphire substrate with the (0001) plane offset by 2° from the (10-10) plane.

[0047] The second step involves placing the sapphire substrate into a conventional magnetron sputtering apparatus and sputtering a 300nm thick AlN layer onto the sapphire substrate at a sputtering temperature of 300°C to obtain the first wafer.

[0048] The third step involves placing the first wafer into a high-temperature heat treatment furnace for the first heat treatment at 500°C for 1 hour in a nitrogen atmosphere. After the treatment, the temperature is allowed to drop to room temperature.

[0049] The fourth step involves placing the sample obtained in the third step into a high-temperature heat treatment furnace for a second heat treatment at 800°C for 1 hour in a nitrogen atmosphere. After treatment, the temperature is allowed to drop to room temperature.

[0050] The fifth step involves placing the sample obtained in the fourth step into a high-temperature heat treatment furnace for a third heat treatment at 1200℃ for 1 hour in a nitrogen atmosphere. After treatment, the temperature is allowed to drop to room temperature.

[0051] The sixth step involves placing the sample obtained in the fifth step into a high-temperature heat treatment furnace for a fourth heat treatment at a temperature of 1700℃ for 1 hour in a nitrogen atmosphere. After the treatment, the temperature is lowered to room temperature to obtain the heat-treated finished wafer.

[0052] The seventh step involves placing the heat-treated wafer into an MOCVD chamber to grow a 1 μm thick AlN epitaxial layer at a growth temperature of 1250 °C, ultimately yielding a high-quality AlN single crystal material with low defect density and low strain.

[0053] Example 2

[0054] The first step involves preparing the material using a sapphire substrate with the (0001) plane offset by 4° from the (10-10) plane.

[0055] The second step involves placing the sapphire substrate into a conventional magnetron sputtering apparatus and sputtering a 300nm thick AlN layer onto the sapphire substrate at a sputtering temperature of 300°C to obtain the first wafer.

[0056] The third step involves placing the first wafer into a high-temperature heat treatment furnace for the first heat treatment at 500°C for 1 hour in a nitrogen atmosphere. No cooling is required after this treatment; proceed to the next step.

[0057] The fourth step involves placing the sample obtained in the third step into a high-temperature heat treatment furnace for a second heat treatment at 800°C for 1 hour in a nitrogen atmosphere. No cooling is required after the second treatment; proceed to the next step.

[0058] Fifth, the sample obtained in step four is placed in a high-temperature heat treatment furnace for a third heat treatment at 1200℃ for 1 hour in a nitrogen atmosphere. No cooling is required after treatment; proceed to the next step.

[0059] The sixth step involves placing the sample obtained in the fifth step into a high-temperature heat treatment furnace for a fourth heat treatment at a temperature of 1700℃ for 1 hour in a nitrogen atmosphere. After the treatment, the temperature is lowered to room temperature to obtain the heat-treated finished wafer.

[0060] The seventh step involves placing the heat-treated wafer into an MOCVD chamber to grow a 1 μm thick AlN epitaxial layer at a growth temperature of 1250 °C, ultimately yielding a high-quality AlN single crystal material with low defect density and low strain.

[0061] Example 3

[0062] The main difference between this embodiment and Embodiment 1 lies in the first step.

[0063] In this embodiment, in the first step, a 6H-SiC substrate with the (0001) plane offset from the (11-20) plane at 3.5° is used for material preparation.

[0064] Example 4

[0065] The first step involves material preparation using a SiC substrate with the (0001) plane offset 3° from the (11-20) plane.

[0066] The second step involves placing the SiC substrate into a conventional magnetron sputtering apparatus and sputtering a 200nm thick BN layer onto the sapphire substrate at a sputtering temperature of 250°C to obtain the first wafer.

[0067] The third step involves placing the first wafer into a high-temperature heat treatment furnace for the first heat treatment. The heat treatment temperature is 500℃, the treatment time is 1 hour, and the heat treatment atmosphere is argon. After the treatment is completed, the temperature is cooled to room temperature.

[0068] The fourth step involves placing the sample obtained in the third step into a high-temperature heat treatment furnace for a second heat treatment at 800°C for 1 hour in an argon atmosphere. After the treatment, the temperature is allowed to drop to room temperature.

[0069] The fifth step involves placing the sample obtained in the fourth step into a high-temperature heat treatment furnace for a third heat treatment at a temperature of 1200℃ for 1 hour, under an argon atmosphere. After treatment, the temperature is allowed to drop to room temperature.

[0070] The sixth step involves placing the sample obtained in the fifth step into a high-temperature heat treatment furnace for a fourth heat treatment at 1700℃ for 1 hour in an argon atmosphere. After the treatment, the temperature is lowered to room temperature to obtain the heat-treated wafer.

[0071] The seventh step involves placing the heat-treated wafer into an MOCVD chamber to grow a 1 μm thick BN epitaxial layer at a growth temperature of 1000℃, ultimately yielding a high-quality BN single crystal material with low defect density and low strain.

[0072] Example 5

[0073] The first step is to prepare the material using a Si substrate with the (111) plane offset from the (100) plane by 3°.

[0074] The second step involves placing the Si substrate into a conventional magnetron sputtering apparatus and sputtering a 300nm thick GaO layer onto the sapphire substrate at a sputtering temperature of 200°C to obtain the first wafer.

[0075] The third step involves placing the first wafer into a high-temperature heat treatment furnace for the first heat treatment. The heat treatment temperature is 400℃, the treatment time is 1 hour, and the heat treatment atmosphere is argon. After the treatment is completed, the temperature is cooled to room temperature.

[0076] The fourth step involves placing the sample obtained in the third step into a high-temperature heat treatment furnace for a second heat treatment at 800°C for 1 hour in an argon atmosphere. After the treatment, the temperature is allowed to drop to room temperature.

[0077] The fifth step involves placing the sample obtained in the fourth step into a high-temperature heat treatment furnace for a third heat treatment at 1100℃ for 1 hour in an argon atmosphere. After treatment, the temperature is allowed to drop to room temperature.

[0078] The sixth step involves placing the sample obtained in the fifth step into a high-temperature heat treatment furnace for a fourth heat treatment at 1300°C for 1 hour in an argon atmosphere. After the treatment, the temperature is lowered to room temperature to obtain the heat-treated wafer.

[0079] The seventh step involves placing the heat-treated wafer into an MOCVD chamber to grow a 500 nm thick GaO epitaxial layer at a growth temperature of 1000 °C, ultimately yielding a high-quality GaO single crystal material with low defect density and low strain.

[0080] Example 6

[0081] The main difference between this embodiment and Embodiment 1 is in steps two through seven.

[0082] In the second step of this embodiment, the sapphire substrate is placed in a conventional magnetron sputtering apparatus, and a 20nm thick AlScN layer is sputtered on the sapphire substrate at a sputtering temperature of 700°C to obtain the first wafer.

[0083] In the third step of this embodiment, the first wafer is placed in a high-temperature heat treatment furnace for a first heat treatment at a temperature of 400°C for 3 hours under a nitrogen atmosphere. After the treatment is completed, the temperature is lowered to room temperature.

[0084] In the fourth step of this embodiment, the sample obtained in the third step is placed in a high-temperature heat treatment furnace for a second heat treatment. The heat treatment temperature is 800°C, the treatment time is 3 hours, and the heat treatment atmosphere is nitrogen. After the treatment is completed, the temperature is cooled to room temperature.

[0085] In the fifth step of this embodiment, the sample obtained in the fourth step is placed in a high-temperature heat treatment furnace for a third heat treatment. The heat treatment temperature is 1000°C, the treatment time is 3 hours, and the heat treatment atmosphere is nitrogen. After the treatment is completed, the temperature is cooled to room temperature.

[0086] In the sixth step of this embodiment, the sample obtained in the fifth step is placed in a high-temperature heat treatment furnace for a fourth heat treatment. The heat treatment temperature is 1300°C, the treatment time is 3 hours, and the heat treatment atmosphere is nitrogen. After the treatment is completed, the temperature is reduced to room temperature to obtain the heat-treated finished wafer.

[0087] In the seventh step of this embodiment, the obtained heat-treated finished wafer is placed in MOCVD to grow an AlScN epitaxial layer with a thickness of 3μm at a growth temperature of 1250℃, and finally a high-quality AlScN single crystal material with low defect density and low strain is obtained.

[0088] Example 7

[0089] The main difference between this embodiment and Embodiment 1 is in steps two through seven.

[0090] In the second step of this embodiment, the sapphire substrate is placed in a conventional magnetron sputtering apparatus, and a 1 μm thick BAlN layer is sputtered on the sapphire substrate at a sputtering temperature of 700°C to obtain the first wafer.

[0091] In the third step of this embodiment, the first wafer is placed in a high-temperature heat treatment furnace for a first heat treatment at a temperature of 800°C for 0.5 hours in a nitrogen atmosphere. After the treatment is completed, the temperature is lowered to room temperature.

[0092] In the fourth step of this embodiment, the sample obtained in the third step is placed in a high-temperature heat treatment furnace for a second heat treatment. The heat treatment temperature is 1000°C, the treatment time is 0.5 hours, and the heat treatment atmosphere is nitrogen. After the treatment is completed, the temperature is cooled to room temperature.

[0093] In the fifth step of this embodiment, the sample obtained in the fourth step is placed in a high-temperature heat treatment furnace for a third heat treatment. The heat treatment temperature is 1300°C, the treatment time is 0.5 hours, and the heat treatment atmosphere is nitrogen. After the treatment is completed, the temperature is cooled to room temperature.

[0094] In the sixth step of this embodiment, the sample obtained in the fifth step is placed in a high-temperature heat treatment furnace for a fourth heat treatment. The heat treatment temperature is 1800°C, the treatment time is 0.5 hours, and the heat treatment atmosphere is nitrogen. After the treatment is completed, the temperature is reduced to room temperature to obtain the heat-treated finished wafer.

[0095] In the seventh step of this embodiment, the obtained heat-treated finished wafer is placed in MOCVD to grow a 3μm thick BAlN epitaxial layer at a growth temperature of 1250℃, ultimately obtaining a high-quality BAlN single crystal material with low defect density and low strain.

[0096] Comparative Example 1

[0097] The first step involves preparing the material using a sapphire substrate with the (0001) plane offset by 0.2° from the (10-10) plane.

[0098] The second step involves placing the sapphire substrate into a conventional magnetron sputtering apparatus and sputtering a 300nm thick AlN layer onto the sapphire substrate at a sputtering temperature of 300°C to obtain the first wafer.

[0099] The third step involves placing the first wafer into a high-temperature heat treatment furnace for the first heat treatment at 500°C for 1 hour in a nitrogen atmosphere. After treatment, the temperature is lowered to room temperature by 5 degrees Celsius.

[0100] The fourth step involves placing the sample obtained in the third step into a high-temperature heat treatment furnace for a second heat treatment at 800°C for 1 hour in a nitrogen atmosphere. After treatment, the temperature is allowed to drop to room temperature.

[0101] The fifth step involves placing the sample obtained in the fourth step into a high-temperature heat treatment furnace for a third heat treatment at 1200℃ for 1 hour under a nitrogen atmosphere. After treatment, the temperature is allowed to drop to room temperature.

[0102] The sixth step involves placing the sample obtained in the fifth step into a high-temperature heat treatment furnace for a fourth heat treatment at a temperature of 1700℃ for 1 hour in a nitrogen atmosphere. After the treatment, the temperature is lowered to room temperature to obtain the heat-treated finished wafer.

[0103] 5. In the seventh step, the obtained heat-treated finished wafer is placed in MOCVD to grow an AlN epitaxial layer with a thickness of 1 μm at a growth temperature of 1250℃, and finally a high-quality AlN single crystal material with low defect density and low strain is obtained.

[0104] Raman spectra of Examples 1, 2 and Comparative Example 1 show that as the tilt angle of the heterostructure increases, the tensile stress of the final AlN single crystal material increases (as shown in Figure 03). This can better neutralize the compressive stress introduced during high-temperature heat treatment.

[0105] The above descriptions are merely some embodiments of the present invention. Those skilled in the art can make various modifications and improvements without departing from the inventive concept of the present invention, and these all fall within the scope of protection of the present invention.

Claims

1. A method for preparing semiconductor single-crystal materials, characterized in that, Includes the following steps: S10: Material preparation is carried out using heterogeneous substrates; S20: At a temperature of 200℃-700℃, a compound semiconductor material is sputtered onto the heterogeneous substrate to obtain a first wafer; S30: The first wafer is subjected to heat treatment at least twice to obtain a heat-treated finished wafer. The temperature of each heat treatment is higher than the temperature of the previous heat treatment. The temperature of the first heat treatment is higher than the sputtering temperature but lower than 1000°C. The temperature range of the last heat treatment is 1300°C-1800°C. The time of each heat treatment is 0.5h-3h to ensure that the compound semiconductor material on the heat-treated finished wafer is in a single crystal state. S40: Deposit compound semiconductor material on the heat-treated finished wafer to obtain semiconductor single crystal material.

2. The method for preparing semiconductor single crystal material according to claim 1, characterized in that, In step S20, the thickness of the compound semiconductor material sputtered on the heterogeneous substrate is controlled within the range of 20 nm to 1 μm.

3. The method for preparing semiconductor single crystal materials according to claim 1, characterized in that, In step S30, the atmosphere used during heat treatment is nitrogen or argon.

4. The method for preparing semiconductor single crystal material according to claim 3, characterized in that, In step S30, the heat treatment is performed four times, and the temperature range for each heat treatment is 400℃-800℃, 800℃-1000℃, 1000℃-1300℃ and 1300℃-1800℃ respectively.

5. The method for preparing semiconductor single crystal material according to claim 1, characterized in that, In step S40, the thickness range of the compound semiconductor material deposited on the heat-treated finished wafer is controlled within 500 nm to 3 μm.

6. The method for preparing semiconductor single crystal material according to claim 1, characterized in that, The compound semiconductor material in steps S10 and S40 is aluminum nitride, boron nitride, gallium oxide, scandium aluminum nitride, or boron aluminum nitride.

7. The method for preparing semiconductor single crystal material according to any one of claims 1 to 6, characterized in that, In step S10, the tilt angle of the heterogeneous substrate used for material preparation is greater than 1°.

8. The method for preparing semiconductor single crystal material according to claim 7, characterized in that, The heterogeneous substrate is a sapphire substrate, a silicon substrate, or a silicon carbide substrate.

9. The method for preparing semiconductor single crystal material according to claim 8, characterized in that, When the heterostructure substrate is a sapphire substrate, the tilt angle is the angle between the actual cut surface and the (0001) structural surface; When the heterogeneous substrate is a silicon substrate, the tilt angle is the angle between the actual cut surface and the (111) structural surface; When the heterogeneous substrate is a silicon carbide substrate, the tilt angle is the angle between the actual cut surface and the (0001) structural surface.

Images