A passive UHF-RFID tag chip infrastructure design based on in-memory computing

Abstract

The application discloses a passive UHF-RFID tag chip infrastructure design based on in-memory computing in the technical field of UHF-RFID application, which comprises a sensor unit, a main control unit, an in-memory computing unit, a radio frequency front end and a pressing power generation device; the passive UHF-RFID tag chip infrastructure design based on in-memory computing is provided, radio frequency and the pressing power generation device are adopted to realize the passive UHF-RFID tag chip infrastructure design, the rapid reading of multiple sensor tag data and external data is realized, the structure design of the passive UHF-RFID tag chip has the characteristics of long service life, multiple repeated erasing and writing times, fast card reading speed, long reading distance, less influence of environmental factors, flexible and convenient application and the like, in the application, multiple power supply modes can be selected, the continuous power supply capacity of the passive UHF-RFID tag can be ensured, the response power consumption and response time when the tag data is acquired are ensured to be within the application support range, and the application is suitable for large-scale use in various intelligent application scenarios.

Description

Technical Field

[0001] This invention relates to the field of UHF-RFID application technology, specifically to a passive UHF-RFID tag chip basic structure design based on in-memory computing. Background Technology

[0002] As a fundamental component of passive IoT technology, passive UHF-RFID tag chips have been widely used in applications such as supermarket retail, logistics warehousing, library archives, and anti-counterfeiting traceability. Traditional passive UHF-RFID tag chips rely on wireless power transmission, float charging, and on-chip energy storage capacitor charging and discharging for power supply. However, due to basic propagation losses and low power supply efficiency, they cannot meet the operational needs of various types of tags in different scenarios. To solve the power supply problem, this invention adds a press-to-generate device to the RF front end, becoming an important supplementary form of RF power supply for the antenna connection modulation and demodulation unit and power management unit. It can simultaneously support the reading of multiple types of tag data, such as temperature, humidity, voltage, pressure, random analog signals, and data from external sensors.

[0003] Existing UHF-RFID applications suffer from low power supply efficiency and high transmission power loss, and require data transmission and decryption with the RFID reader via an RF front-end. Therefore, new technical solutions are needed to address these issues. Summary of the Invention

[0004] The purpose of this invention is to provide a passive UHF-RFID tag chip basic structure design based on in-memory computing, so as to solve the problems mentioned in the background art, such as low power supply efficiency, high transmission power loss, and the need for data transmission and decryption with RFID readers through radio frequency front-end.

[0005] To achieve the above objectives, the present invention provides the following technical solution: a passive UHF-RFID tag chip basic structure design based on in-memory computing, including a sensor unit, a main control unit, an in-memory computing unit, an RF front-end, and a press-to-generate device. The sensor unit is connected to the main control unit via a data line. The main control unit is bidirectionally connected to the in-memory computing unit and the RF front-end via a data line. The in-memory computing unit is electrically connected to a data memory and a reserved memory. The data memory and the reserved memory are electrically connected to a row decoder, a storage array, a multiplexer, an in-memory XOR computing unit, and a control unit. The press-to-generate device is electrically connected to the RF front-end. The main control unit and the in-memory computing unit can be combined. The in-memory computing unit performs the functions of the main control unit. The in-memory computing unit can perform data analysis, such as analysis, processing, filtering, and storage, and make decision-making and control based on the data analysis results.

[0006] As a preferred design of the passive UHF-RFID tag chip basic structure based on in-memory computing according to the present invention, the sensor unit includes a temperature sensor, a humidity sensor, a voltage sensor, a pressure sensor, a random analog signal sensor, other external sensors, and an ADC. The temperature sensor, the humidity sensor, the voltage sensor, the pressure sensor, the random analog signal sensor, and the other external sensors are electrically connected to the ADC.

[0007] As a preferred design of the passive UHF-RFID tag chip basic structure based on in-memory computing according to the present invention, the radio frequency front end includes a modulation and demodulation unit and a power management unit, wherein the modulation and demodulation unit is connected to the power management unit through an antenna.

[0008] As a preferred design of the passive UHF-RFID tag chip basic structure based on in-memory computing according to the present invention, the radio frequency front-end is electrically connected to the sensor unit, the main control unit and the in-memory computing unit.

[0009] As a preferred design of the passive UHF-RFID tag chip basic structure based on in-memory computing according to the present invention, the modulation and demodulation unit is electrically connected to the line decoder, and the line decoder is electrically connected to the data memory.

[0010] Compared with the prior art, the beneficial effects of the present invention are as follows: The passive UHF-RFID tag chip basic structure design based on in-memory computing adopts radio frequency and press-to-generate devices to realize the passive UHF-RFID tag chip basic structure design, realizing the rapid reading of data from multiple types of sensor tags and external data. The passive UHF-RFID tag chip structure design has the characteristics of long service life, high number of repeated erase and write cycles, fast card reading speed, long reading distance, less affected by environmental factors, and flexible and convenient application. The present invention also has multiple power supply methods to choose from, which can ensure the continuous power supply capability of UHF-RFID passive tags, and ensure that the response power consumption and response time when acquiring tag data are within the range that the application can support, making it suitable for large-scale use in various intelligent application scenarios.

[0011] In terms of security, the designed in-memory computing encryption module can complete the encrypted storage of tag data with extremely low power consumption, ensuring that the data in the UHF-RFID tag cannot be read by unauthorized users. This invention meets the need for simultaneous, fast, accurate and automatic identification of multiple application scenarios, solves the power supply and security problems of passive UHF-RFID tag chips from multiple dimensions, effectively improves the readout efficiency of various built-in and external sensor data, and reduces the overall power consumption of the chip. Attached Figure Description

[0012] Figure 1 This is a schematic diagram of the structure of the present invention;

[0013] Figure 2 This is a schematic diagram of the storage unit structure of the present invention.

[0014] In the diagram: 1. Sensor unit; 11. Temperature sensor; 12. Humidity sensor; 13. Voltage sensor; 14. Pressure sensor; 15. Random analog signal sensor; 16. Other external sensors; 17. ADC; 2. Main control unit; 3. In-memory computing unit; 31. Data memory; 32. Reserved memory; 33. Line decoder; 34. Storage array; 35. Multiplexer; 36. In-memory XOR calculation unit; 37. Control unit; 4. RF front end; 41. Modulation and demodulation unit; 42. Power management unit; 5. Press-to-generate generator. Detailed Implementation

[0015] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0016] Please see Figure 1-2 The present invention provides a technical solution:

[0017] This technical solution discloses a basic structure design for a passive UHF-RFID tag chip based on in-memory computing, including a sensor unit 1, a main control unit 2, an in-memory computing unit 3, an RF front-end 4, and a press-to-generate device 5. The sensor unit 1 is connected to the main control unit 2 via a data line. The main control unit 2 is bidirectionally connected to the in-memory computing unit 3 and the RF front-end 4 via a data line. The in-memory computing unit 3 electrically outputs to the data memory 31 and the reserved memory 32. The data memory 31 and the reserved memory 32 electrically output to the row decoder 33, the storage array 34, the multiplexer 35, the in-memory XOR computing unit 36, and the control unit 37. The press-to-generate device 5 electrically inputs to the RF front-end 4. The main control unit 2 and the in-memory computing unit 3 can be combined. The in-memory computing unit 3 performs the functions of the main control unit 2. The in-memory computing unit 3 can perform data analysis, such as analysis, processing, filtering, and storage, and make decisions and controls based on the data analysis results.

[0018] Sensor unit 1 includes a temperature sensor 11, a humidity sensor 12, a voltage sensor 13, a pressure sensor 14, a random analog signal sensor 15, other external sensors 16, and an ADC 17. The temperature sensor 11, humidity sensor 12, voltage sensor 13, pressure sensor 14, random analog signal sensor 15, and other external sensors 16 are electrically connected to the ADC 17.

[0019] The radio frequency front-end 4 includes a modulation and demodulation unit 41 and a power management unit 42. The modulation and demodulation unit 41 is connected to the power management unit 42 through an antenna.

[0020] The radio frequency front-end 4 is electrically connected to sensor unit 1, main control unit 2 and memory computing unit 3.

[0021] The modulation and demodulation unit 41 has its electrical output connected to the line decoder 33, and the line decoder 33 has its electrical output connected to the data memory 31.

[0022] Working Principle: A passive chip acquires sensor data using both radio frequency (RF) and press-to-power modes. On one hand, the RF front-end 4's modulation / demodulation unit 41 and power management unit 42 are connected via an antenna. The RF energy received by the tag is used to power the chip, demodulate signals (including command signals and synchronization clocks), and provide an acknowledgment carrier. This facilitates the reader's command signal transmission to the tag and the tag's acknowledgment signal transmission to the reader, thus completing the RF power acquisition of tag data. On the other hand, the press-to-power generator 5 activates the corresponding module power supply, connecting to the power management unit 42 to control the power supply. The power management unit 42 powers the main control unit 2, the storage unit 3, and the sensor unit 1. At this time, the main control unit 2 resets. After the sensor unit 1 completes reading and transmission of various tags and external data, the RF front-end 4's modulation / demodulation unit 41 powers on the encoding / decoding module and waits for commands. Upon receiving a command, the encoding / decoding module decodes the data, transmits the decoding result to the main control unit 2, executes the command, and caches the data in the storage unit 3. These two power supply methods optimize the power supply capability of the passive UHF-RFID tag chip, thereby enhancing the chip's competitiveness. Furthermore, this invention uses reserved memory 32 to store the data encryption key and adds an in-memory logic calculation unit to the read interface of the EPC memory, supporting XOR calculations widely used in various encryption algorithms within the memory. The in-memory calculation unit 3 performs in-situ data encryption on the cached data, leveraging the extremely low power consumption of in-memory computation to improve the security of the RFID tag. When reading RFID tag data, the RFID reader uses the key stored internally to decrypt the data in the RFID tag. Therefore, an RFID reader without authorization and a key will be unable to correctly read the data stored in the RFID tag, thus ensuring the security of the RFID tag.

[0023] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0024] Although the present invention has been described above with reference to embodiments, various modifications can be made and components can be replaced with equivalents without departing from the scope of the invention. These equivalents not only replace components but also allow for additions, subtractions, and combinations of "replacement and addition / subtraction" in any manner. For example, multiple sensors can be used individually or in combination. In particular, as long as there is no structural conflict, the features in the embodiments disclosed in this invention can be combined with each other in any way. The lack of an exhaustive description of these combinations in this specification is merely for the sake of brevity and resource conservation. Therefore, the present invention is not limited to the specific embodiments disclosed herein but includes all technical solutions falling within the scope of the claims.

Claims

1. A basic structural design for a passive UHF-RFID tag chip based on in-memory computing, characterized in that: The device includes a sensor unit (1), a main control unit (2), a memory computing unit (3), a radio frequency front end (4), and a press-to-generate device (5). The sensor unit (1) is connected to the main control unit (2) via a data line. The main control unit (2) is bidirectionally connected to the memory computing unit (3) and the radio frequency front end (4) via a data line. The memory computing unit (3) is electrically connected to the data memory (31) and the reserved memory (32). The data memory (31) and the reserved memory (32) are electrically connected to the line decoder (33), the storage array (34), the multiplexer (35), the in-memory XOR calculation unit (36), and the control unit (37). The press-to-generate device (5) is electrically connected to the radio frequency front end (4).

2. The basic structure design of a passive UHF-RFID tag chip based on in-memory computing according to claim 1, characterized in that: The sensor unit (1) includes a temperature sensor (11), a humidity sensor (12), a voltage sensor (13), a pressure sensor (14), a random analog signal sensor (15), other external sensors (16), and an ADC (17). The temperature sensor (11), the humidity sensor (12), the voltage sensor (13), the pressure sensor (14), the random analog signal sensor (15), and the other external sensors (16) are electrically connected to the ADC (17).

3. The basic structure design of a passive UHF-RFID tag chip based on in-memory computing according to claim 1, characterized in that: The radio frequency front end (4) includes a modulation and demodulation unit (41) and a power management unit (42), and the modulation and demodulation unit (41) is connected to the power management unit (42) through an antenna.

4. The basic structure design of a passive UHF-RFID tag chip based on in-memory computing according to claim 1, characterized in that: The radio frequency front end (4) is electrically connected to the sensor unit (1), the main control unit (2) and the memory unit (3).

5. The basic structure design of a passive UHF-RFID tag chip based on in-memory computing according to claim 3, characterized in that: The modulation and demodulation unit (41) is electrically connected to the line decoder (33), and the line decoder (33) is electrically connected to the data memory (31).

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