Method for manufacturing a cryogenic infrared detector

Abstract

The application provides a preparation method of a refrigeration infrared detector and applies to the technical field of semiconductors. Specifically, the device substrate material to be processed to form the refrigeration infrared detector is first cut into multiple device chips of the same size or different sizes, and then the multiple device chips are re-arranged and bonded on an existing 6-inch or 8-inch carrier (semiconductor substrate), and then the existing mature 6-inch or 8-inch production line process is used to realize automatic batch production of the refrigeration infrared detector device of the same size or automatic batch production of the refrigeration infrared detector device of different sizes, so that the existing refrigeration infrared detector production equipment is not limited by the irregular substrate of the refrigeration infrared detector, and the problem that the refrigeration infrared detector cannot be produced in batches is avoided, and finally the production efficiency and the product yield are improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for fabricating a cooled infrared detector. Background Technology

[0002] Since its discovery, infrared radiation has become increasingly well-known and plays a vital role in fields such as information technology and communications, healthcare and life sciences, and defense and aerospace. The infrared spectrum is invisible to the human eye, with wavelengths ranging from 0.75 micrometers to 10 micrometers, falling between visible red light and microwaves. Based on wavelength, it can be divided into four categories: near-infrared, mid-infrared, far-infrared, and extreme far-infrared.

[0003] With the continuous promotion and development of infrared applications, advanced infrared detection technology requires detectors to have higher spatial resolution and better target recognition capabilities. An infrared detector is an optoelectronic device that converts infrared radiation into electronic signals. The photoelectric reaction occurs only on the photosensitive element, while the subsequent signal processing involves only electronic technology. Therefore, the infrared detection chip is the core component of an infrared detector.

[0004] Currently, infrared detectors typically use layered materials grown from two or more substances as substrates. Due to the different lattice orientations of each substrate material, and the fact that dicing to form individual chip substrates can only be done along the lattice orientation, the shape of infrared detector substrate chips is usually irregular, such as rectangles or squares of different sizes like 2*3cm, 4*6cm, 15*23cm, or 36*41cm. In practical applications, infrared detectors usually contain multiple devices of different sizes. Because existing production equipment is limited by the irregular substrates, and processing technology is limited by the substrate size, only 1 to 9 effective devices can be fabricated at a time. This prevents fully automated production of infrared detectors, thus reducing production efficiency and product yield. After reconstruction, multiple substrates can be processed simultaneously, allowing for the fabrication of hundreds of effective devices at once. Summary of the Invention

[0005] The purpose of this invention is to provide a method for fabricating a cooled infrared detector, in order to solve the problem in the prior art that the production equipment is limited by irregular substrates, which prevents the mass production of cooled infrared detectors and reduces the production efficiency and yield of the products.

[0006] To solve the above-mentioned technical problems, the present invention provides a method for preparing a cooled infrared detector, comprising:

[0007] Provides a wafer with multiple alignment marks formed on its surface and a device substrate for forming a cooled infrared detector;

[0008] The device substrate material is selectively diced along different crystal orientations to obtain multiple device chips to be processed into the cooled infrared detector device.

[0009] According to the alignment marks, each of the device chips is sequentially bonded or bonded to the carrier to reconstruct the device substrate for forming a plurality of the cooled infrared detector devices.

[0010] A sacrificial fill layer is formed on the surface of the substrate of the reconstructed device;

[0011] The reconstructed device substrate containing the sacrificial fill layer is then processed to mass-produce multiple cooled infrared detector devices, including detector pixel structures and electrodes that electrically lead out the detector pixel structures.

[0012] Furthermore, the step of obtaining a wafer with a plurality of alignment marks formed on the surface may include: providing a semiconductor substrate and forming a plurality of alignment marks on the surface of the semiconductor substrate or in the semiconductor substrate.

[0013] Furthermore, the step of selectively dicing the device substrate material along different crystal orientations to obtain multiple device chips to form the cooled infrared detector device may include:

[0014] The device substrate is cut into multiple first device chips of the same size and multiple second device chips of the same size, wherein the first device chips and the second device chips have different sizes;

[0015] Alternatively, the step of dicing the device substrate to obtain multiple device chips to form the cooled infrared detector device may include: cutting the device substrate into multiple third device chips of the same size.

[0016] Furthermore, the step of sequentially bonding or adhering the device chips to the carrier wafer may include:

[0017] A fused bonding layer is formed on the surface of the substrate, or an adhesive layer is formed on the surface of the substrate using a heating process or an ultraviolet irradiation process;

[0018] A protective adhesive layer or passivation protective layer is formed on the surface of the first device chip, the second device chip, or the third device chip to protect the surface of the device chip.

[0019] According to the alignment marks, the first device chip, the second device chip, or the third device chip, which are rearranged in sequence, are placed on the surface of the carrier through the fused bonding layer or the adhesive layer, respectively, to form a reconstructed device substrate containing each of the device chips and with gaps between adjacent device chips.

[0020] Furthermore, after forming a sacrificial fill layer on the surface of the reconstructed device substrate, and before performing subsequent processes on the reconstructed device substrate containing the sacrificial fill layer, the method for fabricating the cooled infrared detector provided by the present invention may further include:

[0021] The sacrificial fill layer is planarized at the top until the top surface of the first device chip, the second device chip, or the third device chip is exposed;

[0022] Remove the protective adhesive layer or passivation protective layer.

[0023] Furthermore, the sacrificial filler layer may include an organic material, which may include epoxy resin.

[0024] Furthermore, after the step of batch forming multiple cooled infrared detector devices including detector pixel structures and electrodes electrically leading out the detector pixel structures, the method for fabricating the cooled infrared detector provided by the present invention may further include:

[0025] The reconstructed device substrate, on which multiple cooled infrared detector devices are formed, is interconnected with the readout circuit by a flip-flop process.

[0026] Furthermore, the step of performing a flip-flop interconnection process between the reconstructed device substrate, on which multiple cooled infrared detector devices are formed, and the readout circuit may include:

[0027] A substrate having a plurality of readout circuits is provided, wherein the readout circuits contained in the substrate correspond one-to-one with the cooled infrared detector devices already formed in the reconstructed device substrate;

[0028] The reconstructed device substrate with multiple cooled infrared detector devices is diced again to obtain multiple independent cooled infrared detector devices.

[0029] Multiple independent cooled infrared detector devices are bonded to the substrate having multiple readout circuits to form multiple cooled infrared detectors in batches.

[0030] Furthermore, the step of performing a flip-flop interconnection process between the reconstructed device substrate, on which multiple cooled infrared detector devices are formed, and the readout circuit may include:

[0031] A substrate having a plurality of readout circuits is provided, wherein the readout circuits contained in the substrate correspond one-to-one with the cooled infrared detector devices already formed in the reconstructed device substrate;

[0032] The substrate having multiple readout circuits is bonded to a reconstructed device substrate having multiple cooled infrared detector devices to batch form multiple cooled infrared detectors.

[0033] Furthermore, the step of performing a flip-flop interconnection process between the reconstructed device substrate, on which multiple cooled infrared detector devices are formed, and the readout circuit may include:

[0034] A substrate having a plurality of readout circuits is provided, wherein the readout circuits contained in the substrate correspond one-to-one with the cooled infrared detector devices already formed in the reconstructed device substrate;

[0035] The substrate on which multiple readout circuits are formed is diced to obtain multiple independent readout circuits;

[0036] Each individual readout circuit is bonded to the reconstructed device substrate on which multiple cooled infrared detector devices are formed, to batch form multiple cooled infrared detectors.

[0037] Compared with the prior art, the technical solution provided by the present invention has at least one of the following beneficial effects:

[0038] In the method for fabricating a cooled infrared detector provided by this invention, the substrate material to be formed into a cooled infrared detector is first cut into multiple device chips of the same or different specifications (sizes). Then, the multiple device chips are rearranged and bonded onto an existing 6-inch or 8-inch wafer (semiconductor substrate). Then, using the existing mature 6-inch or 8-inch production line process, the automated mass production of cooled infrared detector devices of the same specification or different specifications can be achieved. This avoids the problem that existing cooled infrared detector production equipment is limited by the irregular substrate of the cooled infrared detector, which leads to the inability to mass produce cooled infrared detectors. Ultimately, this improves the production efficiency and product yield of the product. Attached Figure Description

[0039] Figure 1 This is a schematic flowchart of a method for preparing a cooled infrared detector according to an embodiment of the present invention;

[0040] Figures 2a-2e This is a schematic diagram of the fabrication process of a cooled infrared detector according to an embodiment of the present invention.

[0041] The accompanying figure is labeled as follows:

[0042] 100 - Carrier wafer; 200 - Device substrate / substrate material;

[0043] 201 - Device chip; 110 - Fused bonding layer or adhesive layer;

[0044] 100' - Reconstructed device substrate; 120 - Sacrificial fill layer. Detailed Implementation

[0045] As described in the background section, infrared detectors currently typically use layered materials grown alternately and periodically from two or more materials as substrates. Due to the different lattice orientations of each substrate material, and the fact that dicing the substrate material to form a single chip substrate can only be done along the lattice orientation, the shape of the infrared detector substrate chip is usually irregular. For example, it may be a rectangle or square of different sizes, such as 2*3cm, 4*6cm, 15*23cm, or 36*41cm (the size varies depending on the design and manufacturing process). In practical applications, infrared detectors usually contain multiple devices of different sizes. Because existing production equipment is limited by the irregular substrate, it can currently only fabricate 1 to 6 effective devices at a time, thus preventing fully automated production of infrared detectors and reducing product manufacturing efficiency and yield.

[0046] Therefore, the present invention provides a method for fabricating a cooled infrared detector to solve the problem in the prior art where the production equipment is limited by irregular substrates, which prevents the mass production of cooled infrared detectors and reduces the production efficiency and yield of the products.

[0047] refer to Figure 1 , Figure 1 This is a flowchart illustrating a method for fabricating a cooled infrared detector according to an embodiment of the present invention. The method includes the following steps:

[0048] Step S100: Provide a wafer with multiple alignment marks formed on its surface and a device substrate for forming a cooled infrared detector;

[0049] Step S200: The device substrate material is selectively diced along different crystal orientations to obtain multiple device chips to be processed into the cooled infrared detector device.

[0050] Step S300: According to the alignment marks, each of the device chips is sequentially bonded or bonded to the carrier to reconstruct the device substrate for forming a plurality of cooled infrared detector devices.

[0051] Step S400: A sacrificial fill layer is formed on the surface of the reconstructed device substrate;

[0052] Step S500: Perform subsequent processes on the reconstructed device substrate containing the sacrificial fill layer to batch form multiple cooled infrared detector devices including detector pixel structures and electrodes that electrically lead out the detector pixel structures.

[0053] That is, this invention provides a method for fabricating a cooled infrared detector. Specifically, the device substrate to be formed into a cooled infrared detector is first cut into multiple device chips of the same or different sizes. Then, the multiple device chips are rearranged and bonded onto an existing 6-inch or 8-inch wafer (semiconductor substrate). Then, using existing mature 6-inch or 8-inch production line processes, automated mass production of cooled infrared detector devices of the same size or different sizes can be achieved. This avoids the limitation of existing cooled infrared detector production equipment by the irregular substrate of the cooled infrared detector, which prevents the mass production of cooled infrared detectors, and ultimately improves the production efficiency and product yield.

[0054] The method for fabricating the cooled infrared detector proposed in this invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of this invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of this invention.

[0055] Figures 2a-2e This is a schematic diagram of the fabrication process of a cooled infrared detector according to an embodiment of the present invention.

[0056] In step S100, please refer to the following for details. Figure 2a As shown, a wafer 100 with multiple alignment marks formed on its surface and a device substrate (not shown) for forming a cooled infrared detector are provided. The wafer 100 can be any existing semiconductor substrate suitable for existing 6-inch or 8-inch manufacturing processes. The semiconductor substrate can be at least one of the following materials: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP, or other III / V compound semiconductors, including multilayer structures composed of these semiconductors, or silicon-on-insulator (SOI), silicon-on-insulator stacked (SSOI), silicon-on-insulator stacked (S-SiGeOI), silicon-on-insulator (SiGeOI), and germanium-on-insulator (GeOI), etc., or it can be glass. Exemplarily, in this embodiment, the wafer 100 is a silicon substrate.

[0057] The device substrate is grown from two or more materials and is a layered material substrate used to form a cooled infrared detector device. For example, in an embodiment of the present invention, the device substrate can be at least one of other materials such as silicon germanide, silicon carbide, gallium arsenide, or indium gallium.

[0058] In this embodiment, a silicon substrate can be provided first, and then multiple alignment marks can be formed on the surface of the silicon substrate or in the silicon substrate. The alignment marks can be alignment marks of the same specification or alignment marks of different specifications.

[0059] Alternatively, in step S100, a carrier wafer (not shown) and a device substrate to be formed into a cooled infrared detector can be provided first. Then, a mold film layer with multiple alignment marks is formed on the surface of the carrier wafer. Then, steps S200 to S500 are executed. That is, the purpose of the alignment marks designed in this invention is to accurately fix the segmented device chips onto the carrier wafer, thereby utilizing the carrier wafer for existing mature 6-inch or 8-inch production line processes to achieve automated mass production of cooled infrared detector devices of the same specification or different specifications. Therefore, whether the alignment marks are set directly on the carrier wafer or on its surface, both fall within the protection scope of this invention.

[0060] In step S200, the device substrate material is selectively diced along different crystal orientations to obtain multiple device chips (not shown) to be formed into the cooled infrared detector device.

[0061] In this embodiment, depending on actual needs, the device substrate material can be cut into multiple first device chips and multiple second device chips of the same size, wherein the first device chips and the second device chips have different sizes; or, the device substrate can be cut into multiple third device chips of the same size.

[0062] Specifically, the device substrate can be diced into device chips of the same specification (third device chip), and then the same specification device chips can be mass-produced automatically using the carrier substrate 100, such as... Figure 2dAs shown. At this time, if the device substrate is cut into device chips of the same specification, it is equivalent to mass automated production of cooled infrared detector devices that achieve the same function. For example, the device substrate can be cut into 10 2*2cm device chips, and then the cut device chips are bonded (fixed) onto the carrier 100 according to the alignment marks on the carrier 100. Then, using the existing mature production line process, the corresponding cooled infrared detector devices are formed on the device chips on the carrier 100.

[0063] Furthermore, since cooled infrared detectors can include detector pixel structures of various sizes in practical applications, in order to achieve mass production of cooled infrared detectors including detector pixel structures of various sizes, the fabrication method of the cooled infrared detector provided by this invention can also cut the device substrate into device chips (first device chip and second device chip) of different specifications, such as... Figure 2e As shown, for example, the device substrate is cut into 10 2*2cm device chips and 10 4*4cm device chips. These chips are then bonded or glued together and reconstructed onto the carrier 100. Using existing, well-developed production line processes, the corresponding cooled infrared detector devices are formed on the device chips on the carrier 100. In this case, cutting the device substrate into device chips of different specifications is equivalent to mass-producing cooled infrared detector devices of various sizes that achieve different functions in an automated manner.

[0064] In step S300, please refer to the following for details. Figure 2b As shown, and in combination Figure 2a According to the alignment marks, each of the device chips 201 is sequentially bonded or bonded to the carrier 100 to reconstruct a reconstructed device substrate 100' for forming a plurality of the cooled infrared detector devices.

[0065] In this embodiment, when the device substrate is cut into various device chips of different sizes, alignment marks that can identify the various device chips of different sizes need to be provided on the surface or inside of the carrier 100. For example, coordinate marks that correspond one-to-one with the size of the device chip. Then, according to the alignment marks, the cut device chips 201 are respectively bonded to the carrier 100. At this time, it is equivalent to rearranging on the carrier 100 to form a new substrate for forming multiple infrared detector devices.

[0066] Furthermore, the present invention provides a specific implementation method for sequentially bonding or adhesively reconstructing each of the device chips 201 to the carrier 100, which may include the following steps:

[0067] Step S301: A fused bonding layer 110 is formed on the surface of the substrate 100, or an adhesive layer (not shown) is formed on the surface of the substrate 100 by a heating process or an ultraviolet irradiation process.

[0068] Step S302: A protective adhesive layer (not shown) or a passivation protective layer (not shown) is formed on the surface of the first device chip, the second device chip, or the third device chip to protect the surface of the device chip.

[0069] Step S303: According to the alignment marks, the first device chip, the second device chip, or the third device chip, which are rearranged in sequence, are placed on the surface of the carrier 100 through the fused bonding layer 110 or the adhesive layer, respectively, to form a reconstructed device substrate 100' containing each of the device chips 201 and with gaps between adjacent device chips 201.

[0070] In this embodiment, in order to securely bond the device chip 201 to the surface of the carrier 100, a fused bonding layer 110 needs to be formed on the surface of the carrier 100 first. Then, the fused bonding layer 110 and the surface of the carrier 100 are fused into a film structure by means of melting, molecular diffusion and other processes, thereby realizing the bonding of the device chip 201 and the carrier 100.

[0071] Alternatively, to securely bond and reconstruct the device chip 201 onto the surface of the carrier 100, an adhesive layer needs to be formed on the surface of the carrier 100 first. Then, the adhesive properties of the adhesive layer are used to bond the device chip 201 and the carrier 100 together to form the reconstructed device substrate, i.e., the reconstructed device substrate 100'.

[0072] In step S400, see details. Figure 2d or Figure 2e As shown, a sacrificial fill layer 120 is formed on the surface of the reconstructed device substrate 100'.

[0073] In this embodiment, a sacrificial filler layer 120 of a certain thickness can be deposited on the surface of the reconstructed device substrate 100' after multiple device chips 201 are bonded. Then, the sacrificial filler layer 120 is planarized until the top surfaces of all device chips 201 are exposed to ensure the surface flatness of the reconstructed device substrate 100', which is beneficial for subsequent processes. Afterward, the protective adhesive layer or passivation protective layer is removed. Furthermore, the current process progress of cooled infrared detectors is controlled at around 3µm. However, by using the method provided by this invention, the device chips 201 to be formed into the cooled infrared detector device are rearranged and bonded onto a wafer 100 that can be processed on existing 6-inch or 8-inch production lines, and the thickness can be controlled to below 1µm, which is particularly critical for large-area devices.

[0074] It is understandable that there will be some error during the top planarization process of the sacrificial fill layer 120. As long as the height of the top of the device chip 201 above the top of the sacrificial fill layer 120 is less than 1µm, it is within the acceptable error range of the method provided by the present invention.

[0075] Furthermore, the sacrificial filler layer 120 can be an organic material, including epoxy resin. Of course, the sacrificial filler layer 120 can also be other insulating material layers, such as silicon dioxide or silicon nitride; this invention does not specifically limit its application.

[0076] In step S500, the reconstructed device substrate 100' containing the sacrificial fill layer 120 is subjected to subsequent processes to batch form multiple cooled infrared detector devices, including detector pixel structures and electrodes that electrically lead out the detector pixel structures.

[0077] In this embodiment, after the reconstructed device substrate 100' is formed, the production process of manufacturing cooled infrared controllers, which requires different production equipment for different irregular substrates, is transformed into a production process of automated mass production of cooled infrared controllers using existing mature 6-inch or 8-inch production equipment. This improves the production efficiency of the product, reduces the production cost of the product, and ultimately improves the product yield.

[0078] Specifically, after forming the reconstructed device substrate 100', a detector pixel structure can be uniformly formed on each device chip 201 contained in the reconstructed device substrate 100' using photolithography and / or etching processes, as well as ion implantation processes. Then, contact holes are formed using etching and photolithography and / or etching processes, and metal pillars are filled in the contact holes to form electrodes (not shown) for electrically leading out the detector pixel structure formed on each device chip 201, so as to automatically form multiple cooled infrared detector devices in batches.

[0079] Furthermore, the same method can be used to batch-form readout circuits on a substrate for receiving electrical signals converted from infrared radiation by the cooled infrared detector, processing the electrical signals, and outputting them. Then, using a flip-flop interconnect process, the cooled infrared detector devices and the readout circuits are flip-floped together to form the cooled infrared detector.

[0080] Specifically, the present invention provides a step for flip-soldering interconnection between a reconstructed device substrate having multiple cooled infrared detector devices and a readout circuit, as follows:

[0081] First, a substrate (not shown) having a plurality of readout circuits is provided, wherein the readout circuits (not shown) contained in the substrate correspond one-to-one with the cooled infrared detector devices already formed in the reconstructed device substrate;

[0082] Secondly, the reconstructed device substrate with multiple cooled infrared detector devices is diced and cut again to obtain multiple independent cooled infrared detector devices.

[0083] Finally, multiple independent cooled infrared detector devices are bonded to the substrate having multiple readout circuits to form multiple cooled infrared detectors in batches.

[0084] Alternatively, the present invention also provides a step of performing a flip-chip interconnection process between the reconstructed device substrate on which multiple cooled infrared detector devices are formed and the readout circuit, as follows:

[0085] First, a substrate having a plurality of readout circuits is provided, wherein the readout circuits contained in the substrate correspond one-to-one with the cooled infrared detector devices already formed in the reconstructed device substrate;

[0086] Secondly, the substrate with multiple readout circuits is bonded to a reconstructed device substrate with multiple cooled infrared detector devices to batch-produce multiple cooled infrared detectors.

[0087] Alternatively, the present invention also provides a step of performing a flip-chip interconnection process between the reconstructed device substrate on which multiple cooled infrared detector devices are formed and the readout circuit, as follows:

[0088] First, a substrate having a plurality of readout circuits is provided, wherein the readout circuits contained in the substrate correspond one-to-one with the cooled infrared detector devices already formed in the reconstructed device substrate;

[0089] Next, the substrate on which multiple readout circuits are formed is diced to obtain multiple independent readout circuits;

[0090] Next, each independent readout circuit is bonded to the reconstructed device substrate on which multiple cooled infrared detector devices are formed, in order to batch form multiple cooled infrared detectors.

[0091] In summary, the method for fabricating a cooled infrared detector provided by this invention involves first cutting the device substrate to be formed into multiple device chips of the same or different specifications (sizes). Then, these multiple device chips are rearranged and bonded onto an existing 6-inch or 8-inch wafer (semiconductor substrate). Finally, using existing mature 6-inch or 8-inch production line processes, automated mass production of cooled infrared detector devices of the same or different specifications is achieved. This avoids the technical problem of existing cooled infrared detector production equipment being limited by the irregular substrate of the cooled infrared detector, which prevents mass production of cooled infrared detectors and ultimately reduces product production efficiency and yield.

[0092] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of protection of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the scope of protection of the present invention.

[0093] It should be noted that although the present invention has been disclosed above with reference to preferred embodiments, these embodiments are not intended to limit the present invention. For any person skilled in the art, many possible variations and modifications can be made to the technical solutions of the present invention based on the disclosed technical content, or equivalent embodiments can be modified accordingly, without departing from the scope of the present invention. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the present invention shall still fall within the scope of protection of the present invention.

[0094] In this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, without necessarily requiring or implying any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0095] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A method for fabricating a cooled infrared detector, characterized in that, Includes the following steps: A carrier with multiple alignment marks formed on its surface and a device substrate for forming a cooled infrared detector are provided; the carrier is 6 inches or 8 inches in size; The device substrate material is selectively diced along different crystal orientations to obtain multiple device chips to be processed into the cooled infrared detector device. According to the alignment marks, each of the device chips is sequentially bonded or bonded to the carrier to reconstruct the device substrate for forming a plurality of the cooled infrared detector devices. A sacrificial fill layer is formed on the surface of the substrate of the reconstructed device; The reconstructed device substrate containing the sacrificial fill layer is then processed to mass-produce multiple cooled infrared detector devices, including detector pixel structures and electrodes that electrically lead out the detector pixel structures.

2. The method for preparing a cooled infrared detector as described in claim 1, characterized in that, The step of obtaining a wafer with a plurality of alignment marks formed on the surface includes: providing a semiconductor substrate and forming a plurality of alignment marks on the surface of the semiconductor substrate or in the semiconductor substrate.

3. The method for preparing a cooled infrared detector as described in claim 2, characterized in that, The step of selectively dicing the device substrate material along different crystal orientations to obtain multiple device chips to be formed into the cooled infrared detector device includes: The device substrate is cut into multiple first device chips of the same size and multiple second device chips of the same size, wherein the first device chips and the second device chips have different sizes; Alternatively, the step of dicing the device substrate material to obtain multiple device chips to form the cooled infrared detector device includes: cutting the device substrate into multiple third device chips of the same size.

4. The method for preparing a cooled infrared detector as described in claim 3, characterized in that, The step of sequentially bonding or adhesively reconstructing each of the device chips to the carrier wafer includes: A fused bonding layer is formed on the surface of the substrate, or an adhesive layer is formed on the surface of the substrate using a heating process or an ultraviolet irradiation process; A protective adhesive layer or passivation protective layer is formed on the surface of the first device chip, the second device chip, or the third device chip to protect the surface of the device chip. According to the alignment marks, the first device chip, the second device chip, or the third device chip, which are rearranged in sequence, are placed on the surface of the carrier through the fused bonding layer or the adhesive layer, respectively, to form a reconstructed device substrate containing each of the device chips and with gaps between adjacent device chips.

5. The method for preparing a cooled infrared detector as described in claim 4, characterized in that, After forming a sacrificial fill layer on the surface of the reconstructed device substrate, and before performing subsequent processes on the reconstructed device substrate containing the sacrificial fill layer, the method further includes: The sacrificial fill layer is planarized at the top until the top surface of the first device chip, the second device chip, or the third device chip is exposed; Remove the protective adhesive layer or passivation protective layer.

6. The method for preparing a cooled infrared detector as described in claim 1 or 5, characterized in that, The sacrificial filler layer comprises an organic material, including epoxy resin.

7. The method for preparing a cooled infrared detector as described in claim 5, characterized in that, After the step of mass-producing multiple cooled infrared detector devices, including detector pixel structures and electrodes electrically leading out the detector pixel structures, the method further includes: The reconstructed device substrate, on which multiple cooled infrared detector devices are formed, is interconnected with the readout circuit by a flip-flop process.

8. The method for preparing a cooled infrared detector as described in claim 7, characterized in that, The steps of performing a flip-soldering interconnection process between the reconstructed device substrate, on which multiple cooled infrared detector devices are formed, and the readout circuitry include: A substrate having a plurality of readout circuits is provided, wherein the readout circuits contained in the substrate correspond one-to-one with the cooled infrared detector devices already formed in the reconstructed device substrate; The reconstructed device substrate with multiple cooled infrared detector devices is diced again to obtain multiple independent cooled infrared detector devices. Multiple independent cooled infrared detector devices are bonded to the substrate having multiple readout circuits to form multiple cooled infrared detectors in batches.

9. The method for preparing a cooled infrared detector as described in claim 7, characterized in that, The steps of performing a flip-soldering interconnection process between the reconstructed device substrate, on which multiple cooled infrared detector devices are formed, and the readout circuitry include: A substrate having a plurality of readout circuits is provided, wherein the readout circuits contained in the substrate correspond one-to-one with the cooled infrared detector devices already formed in the reconstructed device substrate; The substrate having multiple readout circuits is bonded to a reconstructed device substrate having multiple cooled infrared detector devices to batch form multiple cooled infrared detectors.

10. The method for preparing a cooled infrared detector as described in claim 7, characterized in that, The steps of performing a flip-soldering interconnection process between the reconstructed device substrate, on which multiple cooled infrared detector devices are formed, and the readout circuitry include: A substrate having a plurality of readout circuits is provided, wherein the readout circuits contained in the substrate correspond one-to-one with the cooled infrared detector devices already formed in the reconstructed device substrate; The substrate on which multiple readout circuits are formed is diced to obtain multiple independent readout circuits; Each individual readout circuit is bonded to the reconstructed device substrate on which multiple cooled infrared detector devices are formed, to batch form multiple cooled infrared detectors.

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