Pixel circuit, cmos image sensor and method for improving dynamic range thereof

Abstract

The application provides a pixel circuit, a CMOS image sensor and a method for improving dynamic range, and the pixel circuit comprises a photoelectric conversion element, a transfer transistor, a storage capacitor and an exposure control module; wherein the output end of the photoelectric conversion element is connected to the first connection end of the transfer transistor, and the other end of the photoelectric conversion element is connected to a first reference potential; the second connection end of the transfer transistor is connected to the first end of the storage capacitor, and the gate end is connected to an exposure control signal; the second end of the storage capacitor is connected to a second reference potential; and the exposure control module is used for generating the exposure control signal according to the predicted light intensity, and controlling the actual exposure time of the photoelectric conversion element by controlling the on and off of the transfer transistor. Through the pixel circuit, the CMOS image sensor and the method for improving dynamic range provided by the application, the problem of low dynamic range of the existing CMOS image sensor is solved.

Description

Technical Field

[0001] This invention relates to the field of CMOS image sensor technology, and in particular to a pixel circuit, a CMOS image sensor, and a method for improving the dynamic range of the same. Background Technology

[0002] Dynamic range is one of the most important parameters of a CMOS image sensor. It determines the range of light intensity distribution from the darkest shadow to the brightest highlight that the CMOS image sensor can accept, which in turn determines the detail, level, and features of the captured image.

[0003] Due to limitations in full-well capacity, exposure time, and noise, the dynamic range of CMOS image sensors is typically 60dB-70dB, while the dynamic range of the human eye is above 100dB. Therefore, it is difficult for CMOS image sensors to accurately reproduce the scenes observed by the human eye.

[0004] Therefore, how to achieve a high dynamic range for CMOS image sensors is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a pixel circuit, a CMOS image sensor and a method for improving the dynamic range of the same, in order to solve the problem of low dynamic range of existing CMOS image sensors.

[0006] To achieve the above and other related objectives, the present invention provides a pixel circuit, the pixel circuit comprising: a photoelectric conversion element, a transmission transistor, a storage capacitor, and an exposure control module, wherein, The output terminal of the photoelectric conversion element is connected to the first connection terminal of the transmission transistor, and the other end is connected to the first reference potential; the second connection terminal of the transmission transistor is connected to the first terminal of the storage capacitor, and the gate terminal is connected to the exposure control signal; the second terminal of the storage capacitor is connected to the second reference potential. The exposure control module generates the exposure control signal based on the predicted illumination level and controls the actual exposure time of the photoelectric conversion element by controlling the on and off states of the transmission transistor.

[0007] Optionally, the exposure control module includes: a control transistor, wherein the gate terminal of the control transistor is connected to a gate control signal, the first connection terminal is connected to an original exposure signal related to the predicted illumination level, and the second connection terminal generates the exposure control signal.

[0008] Optionally, the exposure control module further includes: a selection transistor and an auxiliary control transistor, wherein the gate terminal of the selection transistor is connected to a row selection signal, a first connection terminal is connected to a column selection signal, and a second connection terminal is connected to the gate terminal of the auxiliary control transistor; the first connection terminal of the auxiliary control transistor is connected to an auxiliary control signal, and the second connection terminal is connected to the gate terminal of the control transistor.

[0009] Optionally, the exposure control module further includes: a first auxiliary control capacitor and a second auxiliary control capacitor, wherein a first terminal of the first auxiliary control capacitor is connected to a second connection terminal of the selection transistor, and a second terminal is connected to a third reference potential; a first terminal of the second auxiliary control capacitor is connected to a second connection terminal of the auxiliary control transistor, and a second terminal is connected to a fourth reference potential.

[0010] Optionally, the exposure control module includes: a first control transistor and a second control transistor. The gate terminal of the first control transistor is connected to the first gate control signal, the first connection terminal is connected to the original short exposure signal related to the predicted high light, and the second connection terminal generates the exposure control signal; The gate terminal of the second control transistor is connected to the second gate control signal, the first connection terminal is connected to the original long exposure signal related to the predicted low light, and the second connection terminal generates the exposure control signal.

[0011] Optionally, the exposure control module further includes: a first selection transistor and a second selection transistor. The gate terminal of the first selection transistor is connected to the row selection signal, the first connection terminal is connected to the first column selection signal, and the second connection terminal is connected to the gate terminal of the first control transistor. The gate terminal of the second selection transistor is connected to the row selection signal, the first connection terminal is connected to the second column selection signal, and the second connection terminal is connected to the gate terminal of the second control transistor.

[0012] Optionally, the exposure control module further includes: a first energy storage capacitor and a second energy storage capacitor. The first end of the first energy storage capacitor is connected to the second connection terminal of the first selection transistor, and the second end is connected to the fifth reference potential; The first end of the second energy storage capacitor is connected to the second connection terminal of the second selection transistor, and the second end is connected to the sixth reference potential.

[0013] Optionally, the pixel circuit further includes a pixel readout module connected to the first end of the storage capacitor, used to read the charge stored in the storage capacitor and generate a pixel signal.

[0014] Optionally, the pixel readout module includes: a reset transistor, a first source follower transistor, a first storage transistor, a pixel capacitor, a second storage transistor, a reset capacitor, and a second source follower transistor. The gate terminal of the reset transistor is connected to a reset control signal, the first connection terminal is connected to a first operating voltage, and the second connection terminal is connected to the first terminal of the storage capacitor. The gate terminal of the first source follower transistor is connected to the first terminal of the storage capacitor, the first connection terminal is connected to a variable voltage, and the second connection terminal is connected to the first connection terminal of the first storage transistor. The gate terminal of the first storage transistor is connected to the first storage control signal, the second connection terminal is connected to the first connection terminal of the second storage transistor, and is connected to the seventh reference potential through the pixel capacitor; The gate terminal of the second storage transistor is connected to the second storage control signal, the second connection terminal is connected to the gate terminal of the second source follower transistor, and is connected to the eighth reference potential through the reset capacitor; The second source follower transistor's first connection terminal is connected to a second operating voltage, the second connection terminal is connected to the first connection terminal of the row select transistor, and the row select transistor's gate terminal is connected to a row select control signal, and the second connection terminal generates the pixel signal; or, the second connection terminal of the second source follower transistor generates the pixel signal.

[0015] The present invention also provides a CMOS image sensor, the CMOS image sensor comprising: at least one pixel circuit as described in any of the preceding claims.

[0016] Optionally, the CMOS image sensor includes a first substrate and a second substrate stacked together, and the transmission transistor and the exposure control module are fabricated on the same substrate.

[0017] Optionally, the photoelectric conversion element is fabricated in the first substrate; the transmission transistor, the storage capacitor, the exposure control module, the readout circuit, and the logic circuit are fabricated in the second substrate; or, the photoelectric conversion element, the transmission transistor, the storage capacitor, the exposure control module, and the readout circuit are fabricated in the first substrate, and the logic circuit is fabricated in the second substrate; or, the photoelectric conversion element is fabricated in the first substrate, the transmission transistor, the storage capacitor, the exposure control module, and the readout circuit are fabricated in the second substrate, the CMOS image sensor includes a third substrate, and the logic circuit is fabricated in the third substrate.

[0018] The present invention also provides a method for improving the dynamic range of a CMOS image sensor based on the pixel circuit described in any of the preceding claims, the method comprising: The illumination level of the next frame's pixel signal is predicted based on the illumination level corresponding to the historical pixel signals. If the illumination corresponding to the next frame pixel signal is predicted to be the first illumination, the photoelectric conversion element performs photoelectric conversion within a short exposure time to generate exposure charge. If the illumination corresponding to the next frame pixel signal is predicted to be the second illumination, the photoelectric conversion element performs photoelectric conversion during the long exposure time to generate exposure charge; Wherein, the first illumination is higher than a preset illumination threshold, and the second illumination is lower than the preset illumination threshold.

[0019] Optionally, a method for enabling the photoelectric conversion element to perform photoelectric conversion to generate exposure charge at different exposure times includes: controlling the actual reset time of the transmission transistor before the start of the next exposure based on the predicted illumination level, and thereby controlling the actual exposure time of the photoelectric conversion element to enable the photoelectric conversion element to perform photoelectric conversion at different exposure times.

[0020] As described above, the pixel circuit, CMOS image sensor, and method for improving dynamic range of the present invention, through the design of the exposure control module, enable the CMOS image sensor to perform short exposures in high light and long exposures in low light, thereby adjusting the actual exposure time of the photoelectric conversion element according to the light intensity to achieve high dynamic range. Attached Figure Description

[0021] Figure 1 This is shown as one circuit implementation of the pixel circuit of the present invention.

[0022] Figure 2 Displayed as Figure 1 The timing diagram of the relevant signals of the pixel circuit shown is shown during short exposure.

[0023] Figure 3 Displayed as Figure 1 The timing diagram of the relevant signals of the pixel circuit shown is shown during long exposure.

[0024] Figure 4 This is shown as another circuit implementation of the pixel circuit of the present invention.

[0025] Figure 5 Displayed as Figure 4 The timing diagram of the relevant signals of the pixel circuit shown is shown during short exposure.

[0026] Figure 6 Displayed as Figure 4 The timing diagram of the relevant signals of the pixel circuit shown is shown during long exposure.

[0027] Component designation explanation 200 Exposure control module 201 Control transistor 202 Select transistor 203 Auxiliary control transistor 201a First control transistor 201b Second control transistor 202a First-select transistor 202b Second selection transistor 300 Pixel readout module 301 Reset transistor 302 First source follower transistor 303 First storage transistor 304 Second storage transistor 305 Second source follower transistor 306 Row select transistor Detailed Implementation

[0028] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0029] Please see Figures 1 to 6 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Although the illustrations only show components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation, the shape, quantity and proportion of each component in the actual implementation can be arbitrarily changed, and the layout of the components may also be more complex.

[0030] like Figure 1 and Figure 4 As shown, this embodiment provides a pixel circuit, which includes: a photoelectric conversion element, a transmission transistor 100, a storage capacitor Cfd, and an exposure control module 200.

[0031] The output terminal of the photoelectric conversion element is connected to the first connection terminal of the transmission transistor 100, and the other end is connected to a first reference potential, used to generate exposure charge according to the photoelectric effect. As an example, the photoelectric conversion element is a photodiode (PD), wherein the positive terminal of the photodiode (PD) is connected to the first reference potential, and the negative terminal is connected to the first connection terminal of the transmission transistor 100. Optionally, the first reference potential is ground potential.

[0032] The first connection terminal of the transmission transistor 100 is connected to the output terminal of the photoelectric conversion element, the second connection terminal is connected to the first terminal of the storage capacitor Cfd, and the gate terminal is connected to the exposure control signal tx, which is used to transfer and output the exposure charge generated by the photoelectric conversion element according to the exposure control signal tx.

[0033] The first terminal of the storage capacitor Cfd is connected to the second terminal of the transmission transistor 100, and the second terminal is connected to a second reference potential, used to store the exposure charge transferred out by the transmission transistor 100. Optionally, the second reference potential is ground potential. In practical applications, the storage capacitor Cfd can be the parasitic capacitance of the second terminal of the transmission transistor 100 to ground, or it can be an external capacitor, which does not affect this embodiment.

[0034] The exposure control module 200 is used to generate the exposure control signal tx according to the predicted illumination level, and to control the actual exposure time of the photoelectric conversion element by controlling the conduction and cutoff of the transmission transistor 100.

[0035] As an example, such as Figure 4 As shown, the exposure control module 200 includes: a first control transistor 201a and a second control transistor 201b; wherein, the gate terminal of the first control transistor 201a is connected to a first gate control signal, the first connection terminal is connected to the original short exposure signal txs related to the predicted high illumination, and the second connection terminal is connected to the gate terminal of the transmission transistor 100 and generates the exposure control signal tx; the gate terminal of the second control transistor 201b is connected to a second gate control signal, the first connection terminal is connected to the original long exposure signal txl related to the predicted low illumination, and the second connection terminal is connected to the gate terminal of the transmission transistor 100 and generates the exposure control signal tx.

[0036] The first control transistor 201a is controlled by the first gate control signal. When the first control transistor 201a is turned on, the original short exposure signal txs related to the predicted high illumination is applied to the gate terminal of the transmission transistor 100. The second control transistor 201b is controlled by the second gate control signal. When the second control transistor 201b is turned on, the original long exposure signal txl related to the predicted low illumination is applied to the gate terminal of the transmission transistor 100.

[0037] Furthermore, the exposure control module 200 further includes: a first selection transistor 202a and a second selection transistor 202b; wherein, the gate terminal of the first selection transistor 202a is connected to the row selection signal row0, the first connection terminal is connected to the first column selection signal col0, and the second connection terminal is connected to the gate terminal of the first control transistor 201a; the gate terminal of the second selection transistor 202b is connected to the row selection signal row0, the first connection terminal is connected to the second column selection signal col0_b, and the second connection terminal is connected to the gate terminal of the second control transistor 201b. It should be noted that when the exposure control module 200 further includes the first selection transistor 202a and the second selection transistor 202b, the gate terminal of the first control transistor 201a will no longer be connected to the first gate control signal, but will only be connected to the second connection terminal of the first selection transistor 202a, and the gate terminal of the second control transistor 201b will no longer be connected to the second gate control signal, but will only be connected to the second connection terminal of the second selection transistor 202b.

[0038] The first selection transistor 202a is controlled by the row selection signal row0, and when the first selection transistor 202a is turned on, the first column signal col0 is applied to the gate of the first control transistor 201a to control the turn-on or turn-off of the first control transistor 201a; the second selection transistor 202b is controlled by the row selection signal row0, and when the second selection transistor 202b is turned on, the second column signal col0_b is applied to the gate of the second control transistor 201b to control the turn-on or turn-off of the second control transistor 201b; wherein, the first column signal col0 and the second column signal col0_b are not simultaneously high. In practical applications, the timing design of the row selection signal row0, the first column selection signal col0, and the second column signal col0_b (e.g., ...) is used to... Figure 5 and Figure 6 As shown in the figure, this can be achieved: When the illumination corresponding to the next frame pixel signal is predicted to be high illumination, the first control transistor 201a is turned on, and the original short exposure signal txs is applied to the gate terminal of the transmission transistor 100, thereby controlling the photoelectric conversion element to perform short exposure; when the illumination corresponding to the next frame pixel signal is predicted to be low illumination, the second control transistor 201b is turned on, and the original long exposure signal txl is applied to the gate terminal of the transmission transistor 100, thereby controlling the photoelectric conversion element to perform long exposure.

[0039] In this example, the design of the first selection transistor 202a and the second selection transistor 202b enables the control transistor 201a and the second control transistor 201b to be controlled by the existing row selection signal row0, column selection signal col0 and their associated signal col0_b, without the need for new control signals.

[0040] Furthermore, the exposure control module 200 also includes a first energy storage capacitor C1 and a second energy storage capacitor C2; wherein, the first terminal of the first energy storage capacitor C1 is connected to the second connection terminal of the first selection transistor 202a, and the second terminal is connected to a fifth reference potential; the first terminal of the second energy storage capacitor C2 is connected to the second connection terminal of the second selection transistor 202b, and the second terminal is connected to a sixth reference potential. In this example, the design of the first energy storage capacitor C1 and the second energy storage capacitor C2 facilitates the stable control of the two control transistors by the two selection transistors, and facilitates the storage of signals based on storage. Optionally, both the fifth reference potential and the sixth reference potential are ground potentials.

[0041] Specifically, such as Figure 3 and Figure 4As shown, the pixel circuit further includes a pixel readout module 300, which is connected to the first terminal of the storage capacitor Cfd and is used to read out the exposure charge stored in the storage capacitor Cfd and generate a pixel signal.

[0042] As an example, the pixel readout module 102 includes: a reset transistor 301, a first source follower transistor 302, a first storage transistor 302, a pixel capacitor Csig, a second storage transistor 304, a reset capacitor Crst, and a second source follower transistor 305. The gate terminal of the reset transistor 301 is connected to a reset control signal rst, its first connection terminal is connected to a first operating voltage, and its second connection terminal is connected to the first terminal of the storage capacitor Cfd. The gate terminal of the first source follower transistor 302 is connected to the first terminal of the storage capacitor Cfd, its first connection terminal is connected to a variable voltage VRSF, and its second connection terminal is connected to the first connection terminal of the first storage transistor 303. The gate terminal of the first storage transistor 303 is connected to a first storage control signal gs_sig. The second connection terminal is connected to the first connection terminal of the second storage transistor 304, and is connected to the seventh reference potential through the pixel capacitor Csig; the gate terminal of the second storage transistor 304 is connected to the second storage control signal gs_rst, the second connection terminal is connected to the gate terminal of the second source follower transistor 305, and is connected to the eighth reference potential through the reset capacitor Crst; the first connection terminal of the second source follower transistor 305 is connected to the second operating voltage, the second connection terminal is connected to the first connection terminal of the row select transistor 306, and the gate terminal of the row select transistor 306 is connected to the row select control signal gs_sel, and the second connection terminal generates the pixel signal pixout; or, the second connection terminal of the second source follower transistor 305 generates the pixel signal pixout. The first operating voltage and the second operating voltage can be the same or different. In one embodiment, when the pixel readout module 300 generates the pixel signal pixout through the second source follower transistor 305, the first operating voltage and the second operating voltage are different, and the first operating voltage is a variable voltage; when the pixel readout module 300 generates the pixel pixout through the row selection transistor 306, the first operating voltage and the second operating voltage are the same, both being the operating voltage PIXVDD of the pixel circuit. Optionally, the seventh reference potential and the eighth reference potential are both ground potentials.

[0043] Please refer to the following: Figure 4 See Figure 5 and Figure 6 The following will be used to explain the exposure control of the pixel circuit described in this embodiment; wherein, pixel <0,0> is taken as an example.

[0044] 1. The reset transistor 301 and the transmission transistor 100 are turned on to clear the charge in the photodiode PD and perform a global reset (pre-chg). 2. Transmission transistor 100 is turned off to perform global exposure. 3. When reset transistor 301 is turned on, the variable voltage VRSF is at a low level, the first storage transistor 303 and the second storage transistor 304 are turned on, pulling the pixel capacitor Csig and the reset capacitor Crst to a low level, and performing a reset signal pre-charge (pre-chg rst). 4. When reset transistor 301 is turned off, first source follower transistor 302 is turned on, variable voltage VRSF is high, first storage transistor 303 and second storage transistor 304 are turned on, pixel capacitor Csig and reset capacitor Crst respectively store 1 / 2Vrst, and the reset signal is sampled (global sample rst). 5. When the first source follower transistor 302 is turned on, the variable voltage VRSF is at a low level, the first storage transistor 303 is turned on, and the pixel capacitor Csig is pulled to a low level to perform image signal pre-charging (pre-chg sig). 6. When the transmission transistor 100 is turned on, the photodiode PD transfers the exposure charge to the storage capacitor Cfd, ending the exposure. When the transmission transistor 100 is turned off, the first storage transistor 303 is turned on, transferring the exposure charge in the storage capacitor Cfd to the pixel capacitor Csig. The pixel capacitor Csig stores Vsig, and image signal sampling (global sample sig) is performed. 7. The row selection transistor 306 is turned on, and 1 / 2Vrst is read out; the second storage transistor 304 is turned on, and 1 / 2Vsig+1 / 4Vrst is read out, and pixel signal readout (quantification) is performed.

[0045] 8. After the pixel signal is read out, predict the illumination level corresponding to the next frame pixel signal <0,0> based on the historical pixel signals, thereby obtaining the corresponding row selection signal row0, the first column selection signal col0, and the second column selection signal col0_b; specifically: If the predicted illumination corresponding to the next frame pixel signal <0,0> is high illumination, then the row selection signal row0 is high, the first column selection signal col0 is high, and the second column selection signal col0_b is low. At this time, the first control transistor 201a is turned on, and the original short exposure signal txs connected to its first connection terminal is used as the exposure control signal tx to control the transmission transistor 100 to be turned on once at the beginning and end of the global reset phase (pre-chg), so that the actual exposure time of the photodiode PD starts from the last turn-off of the transmission transistor 100, thereby realizing that the photodiode PD performs photoelectric conversion to generate exposure charge (such as...) within the short exposure time. Figure 5 (as shown) If the predicted illumination corresponding to the next frame pixel signal <0,0> is low, then the row selection signal row0 is high, the first column selection signal col0 is low, and the second column selection signal col0_b is high. At this time, the second control transistor 201b is turned on, and the original long exposure signal txl connected to its first connection terminal is used as the exposure control signal tx to control the transmission transistor 100 to be turned on once at the beginning of the global reset phase (pre-chg), so that the actual exposure time of the photodiode PD starts from the turn-off of the transmission transistor 100, thereby realizing that the photodiode PD performs photoelectric conversion to generate exposure charge (such as...) during the long exposure time. Figure 6 (As shown).

[0046] As another example, such as Figure 1 As shown, the exposure control module 200 includes: a control transistor 201, the gate terminal of which is connected to a gate control signal, a first connection terminal connected to a raw exposure signal txl / txs related to the predicted illumination level, and a second connection terminal generating the exposure control signal tx. The control transistor 201 is controlled by the gate control signal, and when the control transistor 201 is turned on, the raw exposure signal txl / txs related to the predicted illumination level is applied as the exposure control signal tx to the gate terminal of the transmission transistor 100, thereby controlling the actual exposure time of the photoelectric conversion element by controlling the on and off states of the transmission transistor 100.

[0047] Furthermore, the exposure control module 200 also includes a selection transistor 202 and an auxiliary control transistor 203. The gate terminal of the selection transistor 202 is connected to a row selection signal (row0), the first connection terminal is connected to a column selection signal (col0), and the second connection terminal is connected to the gate terminal of the auxiliary control transistor 203. The first connection terminal of the auxiliary control transistor 203 is connected to an auxiliary control signal (ctrl), and the second connection terminal is connected to the gate terminal of the control transistor 201. It should be noted that when the exposure control module 200 also includes the selection transistor 202 and the auxiliary control transistor 203, the gate terminal of the control transistor 201 will no longer be connected to a gate control signal, but will only be connected to the second connection terminal of the auxiliary control transistor 203.

[0048] In one embodiment, the first connection terminal of the control transistor 201 is connected to the raw short exposure signal txs, which is low in correlation with the predicted illumination (see [link]). Figure 2 and Figure 3 As shown in the figure, the TXS and CRTL signals are generated by digital circuits, and the actual long / short exposure is controlled by the ROW0 and CLO0 signals.

[0049] The selection transistor 202 is controlled by the row selection signal row0, and when the selection transistor 202 is turned on, the column selection signal col0 is applied to the gate terminal of the auxiliary control transistor 203; the auxiliary control transistor 203 is controlled by the column selection signal col0, and when the auxiliary control transistor 203 is turned on, the auxiliary control signal ctrl is applied to the gate terminal of the control transistor 201 to control the turn-on or turn-off of the control transistor 201. In a practical application, the timing design of the row selection signal row0, the column selection signal col0, the auxiliary control signal ctrl, and the original short exposure signal txs (e.g.) Figure 2 and Figure 3 As shown in the figure, this can be achieved: If the predicted illumination corresponding to the next frame pixel signal is high illumination, the row selection signal row0 is high, the column selection signal col0 is first high and then low, the auxiliary control transistor 203 is first turned on and then turned off, the gate potential of the control transistor 201 is always high, the exposure control signal tx is generated by the original short exposure signal txs, and thus the photoelectric conversion element is controlled by the transmission transistor 100 to perform short exposure; If the predicted illumination for the next frame pixel signal is low, both the row selection signal row0 and the column selection signal col0 are at a high level, the auxiliary control transistor 203 is always in the on state, and the exposure control signal tx is generated by the auxiliary control signal ctrl and the original short exposure signal txs, thereby controlling the photoelectric conversion element to perform long exposure through the transmission transistor 100.

[0050] Furthermore, the exposure control module 200 also includes: a first auxiliary control capacitor C1 and a second auxiliary control capacitor C2. The first terminal of the first auxiliary control capacitor C1 is connected to the second terminal of the selection transistor 202, and the second terminal is connected to a third reference potential. The first terminal of the second auxiliary control capacitor C2 is connected to the second terminal of the auxiliary control transistor 203, and the second terminal is connected to a fourth reference potential. In this example, the design of the first auxiliary control capacitor C1 and the second auxiliary control capacitor C2 facilitates stable control of the control transistor 201 and enables signal storage based on memory. Optionally, both the third reference potential and the fourth reference potential are ground potentials.

[0051] In a practical application, the prediction of illumination level can be achieved by a back-end image processing module (such as an ISP). This module can generate an image based on the pixel signals output by the pixel circuit, and also predict the illumination level corresponding to the next frame's pixel signal based on the historical pixel signals output by the pixel circuit. It then generates a raw exposure signal txl / txs related to the predicted illumination level (e.g., it can be understood as a long / short exposure control signal based on the row selection signal row0, column selection signal col0, auxiliary control signal ctrl, and raw short exposure signal txs). For example, if the illumination corresponding to the historical pixel signals of the previous frame or several previous frames is high, then the illumination corresponding to the next frame's pixel signal is predicted to be high, thus forming a raw short exposure signal. Conversely, if the illumination corresponding to the historical pixel signals of the previous frame or several previous frames is low, then the illumination corresponding to the next frame's pixel signal is predicted to be low, thus forming a raw long exposure signal. In one implementation, the image processing module may include a processing circuit that compares the pixel signal of the previous frame or several previous frames with a set threshold, such as by a comparator, and determines whether to perform long exposure control or short exposure control based on the comparison result.

[0052] Accordingly, this embodiment also provides a CMOS image sensor, which includes at least one pixel circuit as described above.

[0053] Specifically, the CMOS image sensor includes a plurality of pixels, which are arranged in rows and columns to form a pixel array, and each pixel corresponds to a pixel circuit. In practical applications, each pixel corresponds one-to-one with a pixel circuit, that is, each pixel is composed of the pixel circuit; of course, multiple pixels may share the same pixel readout module, which does not affect this embodiment.

[0054] Specifically, the CMOS image sensor also includes an image processing circuit (such as an ISP), connected to the output of the pixel circuit, used to generate an image based on the pixel signals. The image processing circuit also predicts the illumination level of the next frame's pixel signal based on the illumination levels corresponding to historical pixel signals, and generates related signals such as row0, col0, ctrl, txs, or row0, col0, col0_b, which can be further written to the corresponding transistors via peripheral logic control circuitry. Additionally, other control signals involved in the pixel circuitry (such as the reset control signal rst, the first storage control signal gs_sig, the second storage control signal gs_rst, the row selection control signal gs_sel, etc.) can be implemented through peripheral logic control circuitry.

[0055] Specifically, the CMOS image sensor includes a first substrate and a second substrate stacked together, with the transfer transistor and the exposure control module fabricated on the same substrate. In this example, the CMOS image sensor is configured in a stacked structure, and fabricating the transfer transistor and the exposure control module on the same substrate is beneficial for improving the overall performance of the image sensor while enhancing the control performance of the actual exposure time.

[0056] In one embodiment, the photoelectric conversion element is fabricated on the first substrate; the transmission transistor, the storage capacitor, the exposure control module, the pixel readout circuit, and the logic circuit are fabricated on the second substrate. In another embodiment, the photoelectric conversion element is fabricated on the first substrate; the transmission transistor, the storage capacitor, the exposure control module, and the pixel readout circuit are fabricated on the second substrate; the CMOS image sensor includes a third substrate, and the peripheral logic control circuit is fabricated on the third substrate. In yet another embodiment, the photoelectric conversion element, the transmission transistor, the storage capacitor, the exposure control module, and the readout circuit are fabricated in the first substrate, and the logic circuit is fabricated in the second substrate. The logic circuit is fabricated on the third substrate. It should also be noted that the electrical connection between the various substrates can be implemented using existing circuitry, for example, using metal pads and interconnects or using TSV vias to achieve electrical connections between transistor devices.

[0057] Accordingly, this embodiment also provides a method for improving the dynamic range of a CMOS image sensor based on the pixel circuit described above, the method comprising: 1) Predict the illumination level of the next frame pixel signal based on the illumination level corresponding to the historical pixel signal; for example, if the illumination corresponding to the pixel signal in the previous frame or several previous frames is the first illumination, then predict the illumination corresponding to the next frame pixel signal as the first illumination, and vice versa, if the illumination corresponding to the pixel signal in the previous frame or several previous frames is the second illumination, then predict the illumination corresponding to the next frame pixel signal as the second illumination, wherein the first illumination is higher than a preset illumination threshold, and the second illumination is lower than the preset illumination threshold; in practical applications, the first illumination higher than the preset illumination threshold is set as high illumination, and the first illumination lower than the preset illumination threshold is set as low illumination, for example, the preset illumination threshold can be selected from pixel signal 240.

[0058] 2) If the illumination corresponding to the next frame pixel signal is predicted to be the first illumination, the photoelectric conversion element performs photoelectric conversion within a short exposure time to generate exposure charge; if the illumination corresponding to the next frame pixel signal is predicted to be the second illumination, the photoelectric conversion element performs photoelectric conversion within a long exposure time to generate exposure charge.

[0059] Specifically, the method for realizing photoelectric conversion of the photoelectric conversion element to generate exposure charge at different exposure times includes: controlling the actual reset time of the transmission transistor before the start of the next exposure according to the predicted light intensity, and thereby controlling the actual exposure time of the photoelectric conversion element to realize photoelectric conversion of the photoelectric conversion element at different exposure times.

[0060] In summary, the pixel circuit, CMOS image sensor, and method for improving dynamic range of the present invention, through the design of the exposure control module, enable the CMOS image sensor to perform short exposures in high light and long exposures in low light, thereby adjusting the actual exposure time of the photodiode according to the light intensity to achieve a high dynamic range. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and has high industrial applicability.

[0061] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A pixel circuit, characterized in that, The pixel circuit includes: a photoelectric conversion element, a transmission transistor, a storage capacitor, and an exposure control module, wherein... The output terminal of the photoelectric conversion element is connected to the first connection terminal of the transmission transistor, and the other end is connected to the first reference potential; the second connection terminal of the transmission transistor is connected to the first terminal of the storage capacitor, and the gate terminal is connected to the exposure control signal; the second terminal of the storage capacitor is connected to the second reference potential. The exposure control module is used to generate the exposure control signal according to the predicted light intensity, and to control the actual exposure time of the photoelectric conversion element by controlling the on and off of the transmission transistor, wherein the actual exposure time of the photoelectric conversion element starts from the last off of the transmission transistor in the global reset phase; The exposure control module includes a selection transistor, an auxiliary control transistor, and a control transistor. The gate terminal of the selection transistor is connected to a row selection signal, the first connection terminal is connected to a column selection signal, and the second connection terminal is connected to the gate terminal of the auxiliary control transistor. The first connection terminal of the auxiliary control transistor is connected to an auxiliary control signal, and the second connection terminal is connected to the gate terminal of the control transistor. The first connection terminal of the control transistor is connected to a raw exposure signal related to the predicted illumination level, and the second connection terminal generates the exposure control signal. Alternatively, the exposure control module includes a first selection transistor, a second selection transistor, a first control transistor, and a second control transistor; the gate of the first selection transistor is connected to a row selection signal, the first connection terminal is connected to a first column selection signal, and the second connection terminal is connected to the gate of the first control transistor; the first connection terminal of the first control transistor is connected to a raw short exposure signal related to the predicted high light level, and the second connection terminal generates the exposure control signal; the gate of the second selection transistor is connected to the row selection signal, the first connection terminal is connected to a second column selection signal, and the second connection terminal is connected to the gate of the second control transistor; the first connection terminal of the second control transistor is connected to a raw long exposure signal related to the predicted low light level, and the second connection terminal generates the exposure control signal.

2. The pixel circuit according to claim 1, characterized in that, When the exposure control module includes a selection transistor, an auxiliary control transistor, and a control transistor, the exposure control module further includes: a first auxiliary control capacitor and a second auxiliary control capacitor, wherein a first terminal of the first auxiliary control capacitor is connected to a second connection terminal of the selection transistor, and a second terminal is connected to a third reference potential; a first terminal of the second auxiliary control capacitor is connected to a second connection terminal of the auxiliary control transistor, and a second terminal is connected to a fourth reference potential.

3. The pixel circuit according to claim 1, characterized in that, When the exposure control module includes a first selection transistor, a second selection transistor, a first control transistor, and a second control transistor, the exposure control module further includes: a first energy storage capacitor and a second energy storage capacitor. The first end of the first energy storage capacitor is connected to the second connection terminal of the first selection transistor, and the second end is connected to the fifth reference potential; The first end of the second energy storage capacitor is connected to the second connection terminal of the second selection transistor, and the second end is connected to the sixth reference potential.

4. The pixel circuit according to claim 1, characterized in that, The pixel circuit further includes a pixel readout module, connected to the first end of the storage capacitor, used to read the charge stored in the storage capacitor and generate a pixel signal.

5. The pixel circuit according to claim 4, characterized in that, The pixel readout module includes: a reset transistor, a first source follower transistor, a first storage transistor, a pixel capacitor, a second storage transistor, a reset capacitor, and a second source follower transistor. The gate terminal of the reset transistor is connected to a reset control signal, the first connection terminal is connected to a first operating voltage, and the second connection terminal is connected to the first terminal of the storage capacitor. The gate terminal of the first source follower transistor is connected to the first terminal of the storage capacitor, the first connection terminal is connected to a variable voltage, and the second connection terminal is connected to the first connection terminal of the first storage transistor. The gate terminal of the first storage transistor is connected to the first storage control signal, the second connection terminal is connected to the first connection terminal of the second storage transistor, and is connected to the seventh reference potential through the pixel capacitor; The gate terminal of the second storage transistor is connected to the second storage control signal, the second connection terminal is connected to the gate terminal of the second source follower transistor, and is connected to the eighth reference potential through the reset capacitor; The second source follower transistor's first connection terminal is connected to a second operating voltage, the second connection terminal is connected to the first connection terminal of the row select transistor, and the row select transistor's gate terminal is connected to a row select control signal, and the second connection terminal generates the pixel signal; or, the second connection terminal of the second source follower transistor generates the pixel signal.

6. A CMOS image sensor, characterized in that, The CMOS image sensor includes at least one pixel circuit as described in any one of claims 1-5.

7. The CMOS image sensor according to claim 6, characterized in that, The CMOS image sensor includes a first substrate and a second substrate stacked together, and the transmission transistor and the exposure control module are fabricated on the same substrate.

8. The CMOS image sensor according to claim 7, characterized in that, The photoelectric conversion element is fabricated in the first substrate; the transmission transistor, the storage capacitor, the exposure control module, the readout circuit, and the logic circuit are fabricated in the second substrate; or, the photoelectric conversion element, the transmission transistor, the storage capacitor, the exposure control module, and the readout circuit are fabricated in the first substrate, and the logic circuit is fabricated in the second substrate; or, the photoelectric conversion element is fabricated in the first substrate, the transmission transistor, the storage capacitor, the exposure control module, and the readout circuit are fabricated in the second substrate, the CMOS image sensor includes a third substrate, and the logic circuit is fabricated in the third substrate.

9. A method for improving the dynamic range of a CMOS image sensor based on the pixel circuit as described in any one of claims 1-5, characterized in that, The method includes: The illumination level of the next frame's pixel signal is predicted based on the illumination level corresponding to the historical pixel signals. If the illumination corresponding to the next frame pixel signal is predicted to be the first illumination, the photoelectric conversion element performs photoelectric conversion within a short exposure time to generate exposure charge. If the illumination corresponding to the next frame pixel signal is predicted to be the second illumination, the photoelectric conversion element performs photoelectric conversion during the long exposure time to generate exposure charge; Wherein, the first illumination is higher than a preset illumination threshold, and the second illumination is lower than the preset illumination threshold.

10. The method for improving the dynamic range of a CMOS image sensor according to claim 9, characterized in that, A method for enabling a photoelectric conversion element to perform photoelectric conversion to generate exposure charge at different exposure times includes: controlling the actual reset time of the transmission transistor before the start of the next exposure based on the predicted illumination level, and thereby controlling the actual exposure time of the photoelectric conversion element to enable the photoelectric conversion element to perform photoelectric conversion at different exposure times.

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