High-frequency organic planar structure rectifier diode and preparation method thereof

Abstract

This invention discloses a high-frequency organic planar rectifier diode, comprising a substrate, a metal back gate, a dielectric layer, a semiconductor channel layer, source / drain electrodes, and a polymer encapsulation layer. The semiconductor channel layer is a thin film of small organic molecules with alkyl side chains, and the alkyl side chains are exposed after film formation. The contact layer of the source / drain electrodes is platinum. After the source / drain electrodes are individually fabricated, they are covered with the polymer encapsulation layer. Then, the polymer encapsulation layer and the source / drain metal electrodes are transferred non-destructively onto the semiconductor channel layer, and the platinum contact layer is bonded to the alkyl side chains of the small organic molecules in the semiconductor channel layer. This high-frequency organic planar rectifier diode achieves high-frequency performance at low operating voltage, with a maximum rectification characteristic of 64MHz, a voltage-normalized rectification frequency of 25.6MHz / V, and a theoretical maximum rectification frequency of 0.13GHz.

Description

Technical Field

[0001] This invention relates to a diode, and more particularly to a high-frequency organic planar rectifier diode and its fabrication method. Background Technology

[0002] Organic rectifier diodes have been widely used in printed electronics and wearable electronics. Planar rectifier diodes, compared to vertical structures, are more compatible with transistor processes and are better suited for large-scale integration. In many important applications, such as the Internet of Things (IoT), RFID tags, and wearable sensors, rectifier diodes are required to achieve rectification at the highest possible frequency and lowest possible voltage, thus enabling better performance in high-frequency circuits. However, compared to two-dimensional materials and oxide semiconductors, organic planar rectifier diodes still face many challenges in terms of high-frequency performance and manufacturing processes.

[0003] First, due to limitations in key parameters such as carrier concentration, contact resistance, and intrinsic mobility, the high-frequency performance of organic planar rectifier diodes remains consistently low. Their highest rectification frequency is typically below 40MHz, requiring a relatively high input voltage (>5V). The highest reported voltage-normalized highest rectification frequency is only 15.6MHz / V. There is a strong need to explore the high-frequency application potential of organic planar rectifier diodes at low voltages (≤3V). Furthermore, current traditional metal deposition processes in organic semiconductor manufacturing involve high-energy metal ion bombardment of organic thin films, introducing numerous defects into the metal-semiconductor contact, thereby reducing the high-frequency performance of organic planar rectifier diodes and limiting their further applications. Simultaneously, the organic channel layer in organic devices is highly fragile and is often damaged or even dissolved by solutions (such as acetone, N-methylpyrrolidone, etc.) used in conventional photolithography or electron beam lithography processes, further reducing the high-frequency performance of organic planar rectifier diodes. Summary of the Invention

[0004] Objective of the invention: The first objective of this invention is to provide a high-frequency organic planar rectifier diode that can achieve high frequency under low input voltage; the second objective of this invention is to provide a method for fabricating the aforementioned organic planar rectifier diode.

[0005] Technical Solution: The high-frequency organic planar rectifier diode of the present invention includes a substrate, a metal back gate, a dielectric layer, a semiconductor channel layer, source / drain electrodes, and a polymer encapsulation layer; wherein, the semiconductor channel layer is an organic small molecule thin film with alkyl side chains, and the alkyl side chains are exposed after film formation; the contact layer of the source / drain electrodes is platinum metal; after the source / drain electrodes are prepared separately, they are covered with the polymer encapsulation layer, and then the polymer encapsulation layer and the source / drain metal electrodes are transferred non-destructively onto the semiconductor channel layer, and the platinum contact layer is bonded to the organic small molecule alkyl side chains of the semiconductor channel layer.

[0006] The Pt contact layer of the source / drain electrode bonds with the alkyl side chains exposed in the small molecule film in the semiconductor channel layer, reducing the metal-semiconductor interface barrier and further improving the performance of the rectifier diode. Preferably, the organic small molecule is 2,9-dicepoxynaphthol[2,3-b:2',3'-f]thiophene[3,2-b]thiophene, 2,7-dioctyl[1]benzothiophene[3,2-b]benzothiophene or 2-decyl-7-phenyl[1]benzothiophene[3,2-b][1]benzothiophene.

[0007] In this invention, the source / drain electrodes are first prepared and then transferred and superimposed onto the organic semiconductor channel layer without damage, so that the organic semiconductor is protected from the impact damage of high-energy metal particles. The metal-semiconductor contact achieves a good ohmic contact rather than a Schottky contact with a higher barrier, which significantly improves the electrical performance such as the on-state current of the organic planar rectifier diode.

[0008] Preferably, the dielectric layer is one of hafnium oxide, zirconium oxide, lanthanum oxide, or aluminum oxide thin films, and is a high-dielectric-constant oxide thin film. High-dielectric-constant oxide thin films allow for very low operating voltages of the device, thereby achieving higher normalized frequencies. Furthermore, the high-dielectric-constant oxide allows for effective doping of the organic semiconductor thin film grown on it, thereby improving the transconductance, on-state current, and other electrical properties of the organic planar rectifier diode.

[0009] Preferably, the polymer encapsulation layer is polymethyl methacrylate or polyvinyl alcohol.

[0010] The substrate can be an insulating rigid substrate or an insulating flexible substrate. When an insulating flexible substrate is used, a flexible organic planar rectifier diode with high-frequency performance can be obtained, which can then be used in wearable electronic devices.

[0011] The method for fabricating the organic planar rectifier diode of the present invention includes the following steps:

[0012] (1) A local gate metal layer is prepared on an insulating substrate;

[0013] (2) A dielectric layer is grown on the gate metal layer and a via is etched.

[0014] (3) A semiconductor channel layer is grown on the surface of the dielectric layer;

[0015] (4) A source / drain metal electrode is fabricated on a silicon wafer and covered with a polymer encapsulation layer, wherein the contact layer of the source / drain metal electrode is platinum metal;

[0016] (5) Remove the polymer encapsulation layer and source / drain metal electrodes from the silicon wafer and transfer them to the grown semiconductor channel layer without damage. The metal platinum contact layer contacts the semiconductor channel layer. Heat at 95-105°C to make the platinum contact layer of the source / drain metal electrodes tightly bond with the small molecule alkyl side chains in the semiconductor channel layer.

[0017] (6) Use electron beam patterning to pattern planar diodes so that they can work independently.

[0018] In step (2), preferably, the method for growing the dielectric layer is as follows: the substrate with the local gate metal layer is placed in the atomic layer deposition chamber, a vacuum is drawn, the temperature of the chamber is raised, and then a metal source and an oxide source are introduced to deposit a uniform High-K oxide film on the surface of the substrate in situ. The growth temperature and thickness are adjusted according to the properties of the oxide. Preferably, the thickness of the dielectric layer is 20-40 nm.

[0019] In step (3), the methods for growing the semiconductor channel layer include thermal evaporation, vapor phase epitaxial deposition, solution method, etc. Preferably, a crescent-shaped shearing method is used. First, the organic semiconductor material is prepared into a growth solution. Then, the growth solution is injected into the intersection of the dielectric layer and the scraper. The scraper is controlled to move continuously in one direction to complete the growth of organic molecules.

[0020] In step (4), the source / drain metal electrodes can be prepared using various metals as support layers (not the bottom layer), such as gold, platinum, silver, copper, etc. The patterning method can be photolithography or electron beam exposure; the metal preparation method can be thermal evaporation or electron beam evaporation, etc.; preferably, the source / drain electrodes are patterned by electron beam exposure, and a 10-15 nm thick metal platinum is first deposited as a contact layer by electron beam evaporation, and then a 100-200 nm thick gold electrode is deposited as a support layer.

[0021] In step (5), the method of removing the polymer encapsulation layer and source / drain metal electrodes from the silicon wafer and transferring them to the grown semiconductor channel layer without damage is as follows: using low-viscosity thermal release tape to peel the encapsulation layer and source / drain electrodes from the silicon wafer and stack them onto the grown semiconductor channel layer. After successful stacking, the temperature is raised to release the encapsulation layer and source / drain electrodes using the low-viscosity thermal release tape.

[0022] In step (6), the electron beam patterned diode is preferably equipped with a suitable dose electron beam (700C cm⁻¹). 2 Organic molecular field-effect transistor arrays (OMTs) can be patterned using electron beam lithography (EBL) at 30 keV, enabling them to operate independently. Compared to other organic microlithography processes, EBL can reduce linewidth to the nanometer scale to achieve arbitrary patterning, allowing for the construction of large-area functional devices and circuits. Furthermore, it avoids damage to the organic channel layer by eliminating the use of solvents that could harm it.

[0023] The high-frequency organic planar rectifier diode of this invention can be used for rectifying various high-frequency AC signals, such as sinusoidal signals and square wave signals. Specifically, after the high-frequency organic planar rectifier diode is fabricated, an AC signal of a certain voltage is introduced into the input terminal of the rectifier circuit containing the rectifier diode, and the rectified DC signal is collected at the output terminal using a voltage testing device.

[0024] Invention Principle: The organic planar rectifier diode of this invention uses a small-molecule organic thin film containing alkyl chains as the channel material, combined with Pt metal as the source / drain electrode contact layer. Pt bonds to the alkyl side chains exposed in the small-molecule thin film in the semiconductor channel layer, lowering the metal-semiconductor interface barrier. This allows for lower voltage attenuation when a high-frequency AC input signal passes through, significantly improving high-frequency rectification performance. The small-molecule organic thin film is 2,9-dicepoxydinaphthol [2,3-b:2',3'-f]thiophene [3,2-b]thiophene (C 10 Taking -DNTT as an example, according to density functional theory (DFT) for C 10 The electrical properties of -DNTT in contact with platinum (Pt) and gold (Au) were calculated. In C 10 In the -DNTT molecule, the two highest valence states responsible for hole transport (VBM and VBM-1) are the antibonding and bonding states of SCS, respectively, and they are formed by C 10 The DNTT core, rather than the connected alkyl chains, contributes to the electrical contact. During contact formation, the alkyl chains between DNTT and the metal layer act as a tunneling barrier. Specifically, C... 10 The energy range corresponding to the VBM and VBM-1 states of -DNTT is -5.3 to -6.0 eV. Within this range, the total density of states (DOS) of Pt(111) is much higher than that of Au(111). This indicates that hole carriers of Pt(111) tunnel from Pt to C. 10 The probability of -DNTT is greater than the probability of tunneling from Au, resulting in lower contact resistance.

[0025] In this invention, the source / drain electrodes are first prepared and then transferred and superimposed onto the organic semiconductor channel layer without damage, so that the organic semiconductor is protected from the impact damage of high-energy metal particles. The metal-semiconductor contact achieves a good ohmic contact rather than a Schottky contact with a higher barrier, which significantly improves the electrical performance such as the on-state current of the organic planar rectifier diode.

[0026] Beneficial effects: Compared with the prior art, the present invention has the following significant advantages: (1) The high-frequency organic planar rectifier diode achieves high-frequency performance under low operating voltage, with the highest rectification characteristic at 64MHz, a voltage-normalized rectification frequency of 25.6MHz / V, and a theoretical maximum rectification frequency of 0.13GHz; (2) The dielectric layer uses a high dielectric constant oxide, which significantly reduces the operating voltage of the field-effect transistor, and the high dielectric constant oxide allows the organic semiconductor thin film grown on it to be effectively doped, thereby improving the transconductance and on-state voltage of the organic planar rectifier diode. (3) The preparation method adopts the method of first preparing the source / drain electrodes and then transferring and superimposing them onto the organic semiconductor channel layer without damage, so that the organic semiconductor is protected from the impact damage of high-energy metal particles and the on-state current and other electrical properties of the organic planar rectifier diode are improved; (4) The preparation method uses electron beam patterning array process. Compared with other organic micro-lithography processes, this method can reduce the line width to the nanometer level to realize arbitrary patterning, which can be used to build large-area functional devices and circuits. At the same time, it does not use solvents that may damage the organic channel layer, thus avoiding damage to the organic channel layer. Attached Figure Description

[0027] Figure 1 This is a schematic diagram of the organic planar rectifier diode prepared in Example 1;

[0028] Figure 2 Scanning electron microscope image of the organic planar rectifier diode prepared in Example 1;

[0029] Figure 3 The figure shows the electrical performance characterization of the transistor of the organic planar rectifier diode prepared in Example 1 when the gate and source are not connected; where (a) is the transfer characteristic curve of the device and (b) is the output characteristic curve of the device.

[0030] Figure 4 The diode current-voltage characteristic curve of the organic planar rectifier diode prepared in Example 1;

[0031] Figure 5 This is a schematic diagram of the rectifier circuit built based on an organic planar rectifier diode in Example 1;

[0032] Figure 6 The input AC carrier signal and the output DC voltage of the rectifier circuit in Example 1 are shown in (a) and (b) respectively. The positive input AC carrier signal frequency is 1MHz.

[0033] Figure 7 The curve showing the functional relationship between the output DC voltage of the rectifier circuit in Example 1 and the frequency of the input AC signal is shown.

[0034] Figure 8 This is a scanning electron microscope image of the organic planar rectifier diode prepared in Example 2;

[0035] Figure 9 The curve showing the functional relationship between the output DC voltage of the rectifier circuit in Example 2 and the frequency of the input AC signal is shown.

[0036] Figure 10 The curve shows the functional relationship between the output DC voltage of the rectifier circuit in Comparative Example 1 and the frequency of the input AC signal.

[0037] Figure 11 The output characteristic curve of the transistor device when the gate and source of the organic planar rectifier diode prepared in Comparative Example 1 are not connected;

[0038] Figure 12 The output characteristic curves of the organic planar transistor device prepared in Comparative Example 2 are shown.

[0039] Figure 13 The output characteristic curves are those of the organic planar transistor device prepared in Comparative Example 3. Detailed Implementation

[0040] The technical solution of the present invention will be further described below with reference to the embodiments.

[0041] Example 1

[0042] The high-frequency organic planar rectifier diode of the present invention is based on a single layer of 2,9-dicepoxynaphthol[2,3-b:2',3'-f]thiophene[3,2-b]thiophene (C 10 The fabrication method of a high-frequency organic planar rectifier diode consisting of a DNTT molecular thin film and a hafnium oxide dielectric layer includes the following steps:

[0043] (1) The pattern of the gate of the organic planar rectifier diode is written on a high-resistivity silicon oxide substrate by electron beam exposure (EBL), with a gate width of 3μm; then 10 / 10nm titanium / gold are deposited onto the written pattern by electron beam evaporation (EBE), and the patterned gate electrode is obtained after removing the resist.

[0044] (2) After cleaning the high-resistivity silicon oxide substrate, place it in the atomic layer deposition chamber, evacuate the chamber, heat it to 150°C, and hold it for 60 min. Then, use tetra(dimethylamino)hafnium as the metal source and water as the oxidation source. The pulse time of the hafnium source and the oxidation source is 300 ms and 30 ms respectively. The cleaning time between two pulses is 30 s. Set 150 cycles and start growing hafnium oxide film with a thickness of about 20 nm. Use EBL to write the pattern of the through hole in the organic planar rectifier diode. Use inductively coupled plasma (ICP) etching technology to etch away the hafnium oxide in the through hole. Use EBE to deposit 20 nm of Au as the gate-source connection metal.

[0045] (3) Growing a monolayer organic molecular film as a channel layer on an oxide substrate using a solution shearing method: First, prepare the growth solution, using tetrahydronaphthalene as a solvent to dissolve C 10 -DNTT, concentration of 0.25 mg / mL; then, the solution was injected into the intersection of the substrate and the scraper. The temperature of both the substrate and the scraper was set to 68℃, the spacing was 100 μm, the scraper tilt angle was 15°, and the speed was 2-3 μm / s. The upper scraper was continuously moved in one direction using an electric displacement stage to complete the growth of the organic crystal, monolayer C. 10 - The thickness of the DNTT molecular thin film is approximately 4 nm;

[0046] (4) The source / drain electrode pattern of the organic transistor array is written on the silicon wafer using EBL, with a channel length and width of 0.7 / 200μm respectively; then 10 / 100nm platinum / gold are successively deposited onto the written pattern using EBE, and after removing the resist, the patterned source / drain gold electrode is obtained; a polymethyl methacrylate (PMMA) layer of about 1μm thickness is spin-coated on its support layer as an encapsulation layer, which also plays a supporting role during the transfer process;

[0047] (5) The encapsulation layer and source / drain electrodes are peeled off from the silicon wafer using a heat release tape (TRT) with a release temperature of 95-105℃ and aligned and stacked onto the grown organic molecular layer. The stacking speed is slow (Z-axis speed <100nm / s). After successful stacking, the TRT is heated to release the encapsulation layer and source / drain electrodes. The heating rate is slow (<1.0℃ / min). After reaching the release temperature, the platinum contact layer of the source / drain metal electrode is tightly bonded to the small molecule alkyl side chains in the semiconductor channel layer, lifting the TRT. The entire transfer process is performed using a high-precision micro-transfer platform.

[0048] (6) Use 700C cm 2 A 30keV electron beam is used to pattern an organic planar rectifier diode through an EBL, enabling it to operate independently. This process does not affect the transistor itself and does not use solvents that may damage the organic channel layer.

[0049] Figure 1 and Figure 2 The images show a schematic diagram and a scanning electron microscope image of the high-frequency organic planar rectifier diode prepared in Example 1. The channel length and width are 0.7 / 200 μm, and the width of the gate-source / gate-drain overlap portion is only 1.1 / 1.2 μm, which effectively reduces parasitic capacitance and improves high-frequency performance.

[0050] Figure 3 The organic planar rectifier diode prepared in Example 1 exhibits good ohmic contact when the gate and source are not connected. The on-state current density reaches 7.5 μA / μm, and the on / off ratio reaches 10. 8 This indicates that the transistor prepared by the present invention has successfully achieved high electrical performance, which can further promote the high-performance and high-frequency application of organic planar rectifier diodes.

[0051] Figure 4 The diode current-voltage characteristic curve of the organic planar rectifier diode prepared in Example 1 shows an on / off ratio of 10. 3 .

[0052] Figure 5 This is a schematic diagram of the rectifier circuit built based on an organic planar rectifier diode in Example 1, where the capacitor is 82nF and the resistance varies depending on the oscilloscope model.

[0053] Figure 6 The AC carrier signal input to the rectifier circuit in Example 1 and the DC voltage output at this time are given. When the input frequencies are 1MHz and 70MHz, the rectified DC (dc) output voltages are 1.48V and 1.0V, respectively.

[0054] The input voltage frequency when the custom output voltage drops to -3dB is the maximum rectified frequency f. R . Figure 7 The function relating the output DC voltage of the rectifier circuit in Example 1 to the frequency of the input AC signal is given when V(ac) = ±2.5V, f R The measured value is 64MHz, and the normalized frequency is 25.6MHz / V, which is the highest value reported to date for organic planar rectifier diodes.

[0055] Additionally, through the formula The theoretical value f of the highest rectified frequency was calculated. R =0.13GHz, of which V a.c. Given the amplitude of the input AC voltage, β = 0.42 is calculated. The experimental device parameters are: μ = 1.32 cm. 2 V -1 s-1 V a.c. =2.5V and L=0.7μm.

[0056] Example 2

[0057] The high-frequency organic planar rectifier diode of the present invention is based on a single-layer 2,7-dioctyl[1]benzothiophene[3,2-b]benzothiophene molecule (C8-BTBT) molecular thin film and a hafnium oxide dielectric layer. The preparation method of the high-frequency organic planar rectifier diode includes the following steps:

[0058] (1) The pattern of the gate of the organic planar rectifier diode is written on a high-resistivity silicon oxide substrate by electron beam exposure (EBL), with a gate width of 3μm; then 10 / 10nm titanium / gold are deposited onto the written pattern by electron beam evaporation (EBE), and the patterned gate electrode is obtained after removing the resist.

[0059] (2) After cleaning the high-resistivity silicon oxide substrate, place it in the atomic layer deposition chamber, evacuate the chamber, heat it to 150°C, and hold it for 60 min. Then, use tetra(dimethylamino)hafnium as the metal source and water as the oxidation source. The pulse time of the hafnium source and the oxidation source is 300 ms and 30 ms respectively. The cleaning time between two pulses is 30 s. Set 150 cycles and start growing hafnium oxide film with a thickness of about 20 nm. Use EBL to write the pattern of the through hole in the organic planar rectifier diode. Use inductively coupled plasma (ICP) etching technology to etch away the hafnium oxide in the through hole. Use EBE to deposit 20 nm of Au as the gate-source connection metal.

[0060] (3) A monolayer organic molecular film was grown on an oxide substrate using a solution shearing method as a channel layer: First, the growth solution was prepared by dissolving C8-BTBT in tetrahydronaphthalene at a concentration of 4 mg / mL. Then, the solution was injected into the intersection of the substrate and the scraper. At this time, the temperature of both the substrate and the scraper was set to 40°C, the spacing was 100 μm, the tilt angle of the scraper was 8°, and the speed was 40 μm / s. The upper scraper was continuously moved in one direction by an electric displacement stage to complete the growth of the organic crystal. The thickness of the monolayer C8-BTBT molecular film grown in this embodiment is approximately 3 nm;

[0061] (4) The source / drain electrode pattern of the organic transistor array is written on the silicon wafer using EBL, with a channel length and width of 1.6 / 180μm respectively; then 10 / 100nm platinum / gold are successively deposited onto the written pattern using EBE, and after removing the resist, the patterned source / drain gold electrode is obtained; a polymethyl methacrylate (PMMA) layer of about 1μm thickness is spin-coated on it as an encapsulation layer, which also plays a supporting role during the transfer process;

[0062] (5) The encapsulation layer and source / drain electrodes are peeled off from the silicon wafer using a heat release tape (TRT) with a release temperature of 95-105℃ and aligned and stacked onto the grown organic molecular layer. The stacking speed is slow (Z-axis speed <100nm / s). After successful stacking, the temperature is increased to release the encapsulation layer and source / drain electrodes from the TRT. The heating rate is slow (<1.0℃ / min). After reaching the release temperature, the platinum contact layer of the source / drain metal electrode is tightly bonded to the small molecule alkyl side chain in the semiconductor channel layer, lifting the TRT. The entire transfer process is operated using a high-precision micro-transfer platform.

[0063] (6) Use 700C cm 2 A 30keV electron beam is used to pattern an organic planar rectifier diode through an EBL, enabling it to operate independently. This process does not affect the transistor itself and does not use solvents that may damage the organic channel layer.

[0064] The schematic diagram of the organic planar rectifier diode prepared in Example 2 is basically the same as that in Example 1 (e.g., Figure 1 ).

[0065] Figure 8 The image shows a scanning electron microscope image of the organic planar rectifier diode prepared in Example 2. The channel length and width are 1.6 / 180 μm, and the width of the gate-source / gate-drain overlap portion is only 0.7 / 0.7 μm, which effectively reduces parasitic capacitance and improves high-frequency performance.

[0066] The schematic diagram of the rectifier circuit built based on the organic planar rectifier diode prepared in Example 2 is basically the same as that in Example 1 (e.g.) Figure 5 ), where the capacitance is 100nF.

[0067] Figure 9 The function relating the output DC voltage of the rectifier circuit in Example 2 to the frequency of the input AC signal is given when V(ac) = ±2.5V, f R The measured value is 37MHz.

[0068] Comparative Example 1

[0069] Based on Example 1, step (4) replaces the Pt contact layer with an Au contact layer, while the other conditions remain unchanged.

[0070] from Figure 10 It can be seen that the maximum rectification frequency of the Au-contact organic planar rectifier diode is 41MHz, which is lower than the 64MHz of the Pt contact layer.

[0071] Figure 11The Au-contact organic planar rectifier diode prepared for Comparative Example 1 shows the output characteristic curve of the transistor when the gate and source are not connected. The highest on-state current density reached 2.0 μA / μm, which is lower than the highest on-state current density of 7.5 μA / μm of the organic planar rectifier diode prepared in Example 1.

[0072] This indicates that there is a lower contact resistance between platinum and the organic channel layer with alkyl side chains (see Invention Principles), which effectively improves the high-frequency rectification characteristics of the rectifier diode.

[0073] Comparative Example 2

[0074] To compare the impact of alkyl side chain contacts, a transistor with alkyl-side chain-free pentacene as the channel material was fabricated, and compared with C... 10 The performance of DNTT transistors was compared, and their fabrication method includes the following steps:

[0075] (1) The pattern of the gate of the organic planar rectifier diode is written on a high-resistivity silicon oxide substrate by electron beam exposure (EBL), with a gate width of 3μm; then 10 / 10nm titanium / gold are deposited onto the written pattern by electron beam evaporation (EBE), and the patterned gate electrode is obtained after removing the resist.

[0076] (2) After cleaning the high-resistivity silicon oxide substrate, it was placed in the atomic layer deposition chamber. The chamber was evacuated and heated to 150°C. After holding for 60 min, tetra(dimethylamino)hafnium was used as the metal source and water was used as the oxidation source. The pulse time of the hafnium source and the oxidation source was 300 ms and 30 ms, respectively. The cleaning time between two pulses was 30 s. 150 cycles were set to start growing a hafnium oxide film with a thickness of about 20 nm.

[0077] (3) A pentacene thin film was grown on an oxide substrate using physical vapor deposition as a channel layer. The thickness of the pentacene molecular film grown in this comparative example is about 6 nm.

[0078] (4) The source / drain electrode pattern of the organic transistor array is written on the silicon wafer using EBL, with a channel length and width of 0.7 / 100μm respectively; then 10 / 100nm platinum / gold are successively deposited onto the written pattern using EBE, and after removing the resist, the patterned source / drain gold electrode is obtained; a polymethyl methacrylate (PMMA) layer of about 1μm thickness is spin-coated on it as an encapsulation layer, which also plays a supporting role during the transfer process;

[0079] (5) The encapsulation layer and source / drain electrodes are peeled off from the silicon wafer using a thermal release tape (TRT) with a release temperature of 95-105℃ and aligned and stacked onto the grown organic molecular layer. The stacking speed is slow (Z-axis speed <100nm / s). After successful stacking, the TRT is heated to release the encapsulation layer and source / drain electrodes. The heating rate is slow (<1.0℃ / min). After reaching the release temperature, the TRT is lifted. The entire transfer process is carried out using a high-precision micro-transfer platform.

[0080] (6) Using a 700C cm2, 30KeV electron beam, a quinone transistor is patterned by EBL so that it can work independently. This process does not affect the transistor itself and does not use solvents that may damage the organic channel layer.

[0081] The organic transistor prepared in Comparative Example 2 has a structure that is basically the same as that in Example 1 (as in Example 1). Figure 3 (Description), only the machine channel layer is replaced with pentacene.

[0082] Figure 12 The output characteristic curve of the pentacene organic transistor in Comparative Example 2 shows that the highest on-state current density is 1.1 μA / μm, which is lower than C. 10 The 7.5 μA / μm of the -DNTT device indicates that the C-type ... 10 -DNTT transistors have higher electrical performance, which means that rectifier diodes made based on them will have better high-frequency rectification characteristics.

[0083] Comparative Example 3

[0084] To compare the impact of fabricating the source / drain electrodes before transferring them to the channel layer without damage, C electrodes prepared by direct evaporation of Au source / drain electrodes were fabricated. 10 The fabrication method of the -DNTT transistor is basically the same as steps (1) to (6) in Example 1, except that the via process in step (2) is not implemented, the gate and source are not connected, and the contact layer in step (4) is replaced by Au instead of Pt, thus fabricating a C transistor with Au source / drain electrode. 10 -DNTT transistor.

[0085] Figure 13 For Comparative Example 3, C was prepared by direct deposition of Au source / drain electrodes. 10 The output characteristic curve of the -DNTT transistor shows a maximum on-state current density of 0.12 μA / μm, which is lower than... Figure 11 First, the source / drain electrodes are prepared and then transferred non-destructively to the C layer prepared on the channel layer. 10The 2.0 μA / μm of the -DNTT transistor indicates that the method of first preparing the source / drain electrodes and then transferring them to the channel layer in this invention effectively improves the electrical performance of the organic transistor. This determines that the organic planar rectifier diode prepared by this method will have better high-frequency rectification characteristics.

Claims

1. A high-frequency organic planar rectifier diode, characterized in that, The device includes a substrate, a metal back gate, a dielectric layer, a semiconductor channel layer, source / drain electrodes, and a polymer encapsulation layer; wherein, the semiconductor channel layer is an organic small molecule thin film with alkyl side chains, and the alkyl side chains are exposed after film formation; the source / drain electrode contact layer is platinum metal; after the source / drain electrodes are prepared separately, they are covered with the polymer encapsulation layer, and then the polymer encapsulation layer and the source / drain metal electrodes are transferred onto the semiconductor channel layer without damage, and the platinum contact layer is bonded to the organic small molecule alkyl side chains of the semiconductor channel layer; the organic small molecule is 2,9-dicepoxydinaphthol[2,3-b:2',3'-f]thiophene[3,2-b]thiophene, 2,7-dioctyl[1]benzothiophene[3,2-b]benzothiophene or 2-decyl-7-phenyl[1]benzothiophene[3,2-b][1]benzothiophene.

2. The organic planar rectifier diode according to claim 1, characterized in that, The dielectric layer is one of hafnium oxide, zirconium oxide, lanthanum oxide, or aluminum oxide thin film.

3. The organic planar rectifier diode according to claim 1, characterized in that, The polymer encapsulation layer is polymethyl methacrylate or polyvinyl alcohol.

4. A method for fabricating an organic planar rectifier diode according to any one of claims 1 to 3, characterized in that, Includes the following steps: (1) A localized gate metal layer is prepared on an insulating substrate; (2) A dielectric layer is grown on the gate metal layer and a via is etched; (3) A semiconductor channel layer is grown on the surface of the dielectric layer; (4) A source / drain metal electrode is fabricated on a silicon wafer and covered with a polymer encapsulation layer, wherein the contact layer of the source / drain metal electrode is platinum metal; (5) Remove the polymer encapsulation layer and source / drain metal electrodes from the silicon wafer and transfer them to the grown semiconductor channel layer without damage. The metal platinum contact layer contacts the semiconductor channel layer. Heat at 95~105℃ to make the platinum contact layer of the source / drain metal electrodes tightly bond with the small molecule alkyl side chains in the semiconductor channel layer. (6) Use electron beam patterning to pattern planar diodes so that they can work independently.

5. The method for fabricating an organic planar rectifier diode according to claim 4, characterized in that, In step (5), the method of removing the polymer encapsulation layer and the source / drain metal electrodes from the silicon wafer and transferring them to the grown semiconductor channel layer without damage is as follows: the encapsulation layer and the source / drain electrodes are peeled off from the silicon wafer using low-viscosity thermal release tape and stacked onto the grown semiconductor channel layer. After successful stacking, the temperature is raised to release the encapsulation layer and the source / drain electrodes using the low-viscosity thermal release tape.

6. The method for fabricating an organic planar rectifier diode according to claim 4, characterized in that, In step (3), the semiconductor channel layer is grown using a crescent-shaped shearing method. First, the organic semiconductor material is prepared into a growth solution. Then, the growth solution is injected into the intersection of the dielectric layer and the scraper. The scraper is controlled to move continuously in one direction to complete the growth of organic molecules.

7. The method for fabricating an organic planar rectifier diode according to claim 4, characterized in that, The dielectric layer has a thickness of 20~40nm.

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