Semiconductor processing tool with improved performance using hybrid learning model

CN116134595BActive Publication Date: 2026-08-07APPLIED MATERIALS INC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
APPLIED MATERIALS INC
Filing Date
2021-07-14
Publication Date
2026-08-07

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Abstract

The various embodiments disclosed herein include semiconductor manufacturing tools having a hybrid model and methods of using such hybrid model to process wafers and / or develop process recipes. In one embodiment, a method for developing a semiconductor manufacturing process recipe includes selecting one or more device outcomes, and querying a hybrid model to obtain a process recipe recommendation suitable for obtaining the device outcomes. In one embodiment, the hybrid process model includes a statistical model and a physical model. In one embodiment, the method can further include performing a design of experiments (DoE) on a set of wafers to validate the process recipe recommended by the hybrid process model.
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Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit of U.S. Non-Provisional Application No. 16 / 944,012, filed July 30, 2020, the contents of which are incorporated herein by reference in their entirety.

[0003] field

[0004] Several embodiments of this disclosure relate to the field of semiconductor processing, and in particular, to a hybrid model using semiconductor manufacturing processes, which includes statistical and physical models for recipe development and chamber baselineization.

[0005] Related technical descriptions

[0006] As semiconductor devices continue to evolve towards smaller feature size, the complexity of semiconductor wafer processing continues to increase. A given process may include many different processing parameters (i.e., knobs) that can be individually controlled to deliver desired results on the wafer. For example, desired results on the wafer might refer to feature profiles, layer thickness, layer chemical composition, or similar outcomes. As the number of knobs increases, the theoretical process space available for tuning and optimizing the process becomes extremely large.

[0007] To develop process formulations for high-volume manufacturing (HVM), process engineers rely on their experience and expertise to determine a baseline formulation that provides a rough approximation of the desired results on the wafer. A design of experiment (DoE) is then developed around the baseline formulation. The DoE relies on processing a set of wafers (or test wafers) to determine how knobs interact with each other to produce results on the wafer. The DoE results can be interpreted by process engineers to further refine the baseline formulation. Additional DoEs can also be performed to converge the desired results on the wafer. This iterative process is time- and resource-intensive.

[0008] Furthermore, once the final processing formulation is developed, chamber drift can lead to changes in the final product on the wafer during multiple iterations of the process on different wafers. Chamber drift can result in corrosion of consumable parts of the chamber, degradation of components (e.g., sensors, lamps, etc.), deposition of byproduct films on the surface, or similar consequences. Therefore, additional tuning is required even after extensive formulation development processes. Summary of the Invention

[0009] The various embodiments disclosed herein include semiconductor manufacturing tools with hybrid models and methods for using hybrid models to process wafers and / or develop process recipes. In one embodiment, a method for developing a semiconductor manufacturing process recipe includes selecting one or more device outcomes and querying a hybrid model to obtain a recommended process recipe suitable for obtaining the device outcomes. In one embodiment, the hybrid process model includes both a statistical model and a physical model. In one embodiment, this method may further include performing a design of experiments (DoE) on a set of wafers to validate the process recipe recommended by the hybrid process model.

[0010] In an additional embodiment, a method is provided to baseline a chamber in which a semiconductor manufacturing process is performed. In one embodiment, this method includes running a constrained design of experiment (DoE) with external metrology on a wafer to baseline the chamber performance. This embodiment may further include adding wafer outcomes and metrology data from the constrained DoE to a hybrid model as a calibration dataset. In one embodiment, the hybrid model includes a statistical model and a physical model. In one embodiment, this method further includes adjusting the model's predictions to account for specific chamber conditions and / or wafer conditions identified by the constrained DoE. In one embodiment, this method further includes predicting optimized process parameters to achieve desired wafer outcomes for the wafer processed in the chamber.

[0011] In an additional embodiment, a method for processing a wafer in a processing tool is provided. In one embodiment, the method includes providing a hybrid model of the processing tool. In one embodiment, the hybrid model includes a statistical model and a physical model. In one embodiment, the method further includes executing a recipe in the processing tool to process a first wafer, obtaining wafer data from the first wafer after recipe execution, and obtaining process data related to the recipe execution from the processing tool. In one embodiment, the method further includes providing the wafer data and process data to the hybrid model to generate an updated hybrid model, and using the updated hybrid model to generate a modified recipe to take into account chamber drift in the processing tool. In one embodiment, the method further includes executing a modified recipe in the processing tool to process a second wafer.

[0012] Multiple implementations may also include a non-transitory computer-readable medium containing instructions that, when executed by a processor, cause the processor to perform operations for developing semiconductor manufacturing process recipes. In one implementation, the operations may include selecting one or more device outcomes on a processed wafer and querying a hybrid model to obtain a process recipe recommendation suitable for achieving the device outcome. In one implementation, the hybrid model includes a statistical model and a physical model. In one implementation, the process may further include performing a design of experiments (DoE) on a set of wafers to validate the process recipe recommended by the hybrid process model. In one implementation, performing a DoE includes measuring the DoE wafer results with metrology tools and determining, based on the DoE wafer results, whether the desired device outcome has been achieved. Attached Figure Description

[0013] Figure 1A This is a schematic diagram of a hybrid model that includes a statistical model and a physical model according to one implementation method.

[0014] Figure 1B This is a schematic diagram of a processing tool incorporating a hybrid model according to one embodiment.

[0015] Figure 2A This is a flowchart illustrating a process for developing a hybrid model according to one embodiment, wherein a statistical model and a physical model are inputs to a hybrid model engine.

[0016] Figure 2B This is a flowchart illustrating a process for developing a hybrid model according to one embodiment, wherein the physical model is the input to a statistical modeling engine.

[0017] Figure 3 It is a diagram showing a two-dimensional representation of the multidimensional process space provided by a hybrid model according to one embodiment.

[0018] Figure 4 This is a flowchart illustrating a process for developing process formulations using a hybrid model, according to one embodiment.

[0019] Figure 5 This is a flowchart illustrating a process for baselined chambers using a hybrid model, according to one embodiment.

[0020] Figure 6 A block diagram of an exemplary computer system according to one embodiment of the present disclosure is shown. Detailed Implementation

[0021] This document describes a method using a hybrid model of semiconductor manufacturing processes, which incorporates statistical and physical models for recipe development and chamber baselineization. Numerous specific details are set forth in the following description to provide a thorough understanding of various embodiments of this disclosure. It will be apparent to those skilled in the art that various embodiments of this disclosure can be practiced without these specific details. In other instances, well-known aspects such as integrated circuit manufacturing are not described in detail to avoid unnecessarily obscuring the various embodiments of this disclosure. Furthermore, it should be understood that the various embodiments illustrated in the figures are illustrative representations and are not necessarily drawn to scale.

[0022] As mentioned above, formulation development and chamber baselineization are time- and resource-intensive. In particular, the process space available for tuning and optimizing a given process is extremely large, and it is practically impossible to explore the entire process space empirically within any reasonable timeframe. Furthermore, due to the interactions between processing parameters and their impact on process performance, it is difficult to predict the combined effects of multiple processing parameters varying simultaneously by manually scanning one parameter at a time.

[0023] Therefore, the various embodiments disclosed herein utilize the use of a hybrid model to query the entire process space without processing physical wafers in a large Design of Experiment (DoE). This significantly reduces the time and resources dedicated to recipe development. Furthermore, the hybrid model can be updated during wafer processing within the chamber. The updated hybrid model provides accurate tracking of chamber drift and allows for modifications to process recipes without extensive DoE on physical wafers or relying solely on the experience and knowledge of process engineers. Therefore, the use of the hybrid model according to the various embodiments disclosed herein provides at least the following benefits: 1) reduced out-of-schedule tooling downtime; 2) reduced reliance on calibrating or monitoring wafers; 3) tighter process control and better uniformity, repeatability, and yield; 4) lower scrap rates; 5) improved chamber matching; 6) enabled automated tool health monitoring; and 7) improved recovery based on planned maintenance (PM).

[0024] As used herein, “process space” can refer to a multidimensional process space that maps processing parameters to one or more device outcomes on a wafer. Processing parameters, sometimes referred to as knobs, are variables that can be controlled to control the process. For example, a knob may include pressure, process gas flow rate, temperature, RF source power, bias power, and similar parameters. Device outcomes can refer to measurable characteristics of a feature structure on the wafer after processing. For example, device outcomes may include feature structure profile, layer thickness, thickness uniformity, layer material composition, compositional uniformity, porosity, film stress, or similar results. In one embodiment, device outcomes may also refer to process uniformity (e.g., chamber matching) of chambers within a facility, inter-wafer uniformity, uniformity between different wafer batches, and similar results. That is, device outcomes are not limited to outcomes on a single wafer. Each point in the process space can be a representation of a set of processing parameter values ​​and the resulting device outcome (or multiple outcomes) generated by this set of processing parameters.

[0025] In one implementation, the hybrid model may comprise a statistical model and a physical model. The statistical model can be constructed using the DoE of an actual wafer to populate a portion of the process space. Algorithms can then be used to extrapolate the remaining portion of the process space. The physical model is based on real-world physical and chemical interactions occurring within the processing chamber. Simulations of physical and chemical interactions across different ranges of processing parameters within the processing chamber can be used to generate the physical model. In one implementation, the physical model is merged with the statistical model to provide a hybrid model. For example, the physical model can be used to fill any gaps in the statistical model and / or validate extrapolated data points.

[0026] In one implementation, the hybrid model can be used for process formulation development and / or for chamber baselineization to account for chamber drift. In the case of process formulation development, the hybrid model is queried to select a baseline formulation, rather than relying solely on the skills and knowledge of the process engineer. The baseline formulation provided by the hybrid model will produce plant results that closely approximate the desired plant outcome. Therefore, a small DoE (Does of Experience) validating the baseline formulation may be all that is needed to validate the process formulation predicted by the hybrid model.

[0027] In the case of chamber baselineization, the hybrid model can be updated using a calibration dataset obtained from the wafer being processed. The calibration dataset may include metrological data and / or other device outcomes collected during or after wafer processing. The updated hybrid model can then be queried to select a modified process formulation that takes into account chamber drift to produce the desired device outcome on subsequently processed wafers. Therefore, chamber baselineization is a powerful tool for providing chamber mapping. That is, the chamber baselineization process (e.g., updating the hybrid model using a calibration dataset) allows for accurate accounting of current chamber conditions during wafer processing. Furthermore, baselineization can also be used to account for differences between wafers. For example, wafers may have differences between batches (or even within a single batch) (e.g., due to inhomogeneities from previous processing). By updating the hybrid model with the baselineization process, these differences between wafers can be accounted for to provide the desired device outcome.

[0028] The hybrid models disclosed herein can be used in any semiconductor manufacturing process. For example, hybrid models can be used to provide formulation development and / or chamber baselines for etching, deposition, cleaning, planarization, or similar processes. Processes studied using hybrid models may include plasma processes, thermal processes, wet chemical processes, or any other process. In one embodiment, the processing tool modeled using a hybrid model may include a plasma chamber, a vacuum chamber, a thermal chamber, or a similar chamber.

[0029] In one particular implementation, a hybrid model is used to study oxidation processes, such as radical oxidation processes. In radical oxidation processes, processing parameters may include, but are not limited to, pressure, flow rate of the processing gas, temperature, and soak time. Controlled apparatus outcomes in radical oxidation processes may include, but are not limited to, oxide thickness, thickness uniformity across the wafer, material composition of the oxide, material composition uniformity, and oxide layer profile.

[0030] For reference Figure 1A The diagram illustrates a hybrid model server 120 according to one embodiment. In one embodiment, the hybrid model server 120 may include a statistical model 125 and a physical model 127. The statistical model 125 and the physical model 127 may be communicatively coupled to a database 130, which stores input data (e.g., sensor data, model data, measurement data, etc.) used for constructing and / or updating the statistical model 125 and the physical model 127.

[0031] In one implementation, statistical model 125 may be generated from a physical DoE and interpolation may be used to provide an extended process space model. The processed physical wafer may be used to provide a mapping of processing parameters to specific device outcomes. The physical DoE may also be used to identify interactions between different processing parameters. After providing data for the physical wafer (e.g., metrology data, sensor data, process parameter data, etc.), interpolation is used to fill gaps in the process space. In one implementation, data, such as metrology data, may be obtained using external tools communicatively coupled to the hybrid model server 120 via a data link (e.g., a wired or wireless data link). Interpolation may be performed using any suitable algorithm or a combination of algorithms. Algorithms may include, but are not limited to, neural networks, deep learning, or any other known techniques for regression analysis (e.g., linear, partial least squares, Gaussian, polynomial, convolutional neural networks for regression, regression trees, and other techniques).

[0032] In one implementation, the statistical model 125 may be provided as a module, which may be sold or licensed for use in conjunction with the processing tool. That is, the physical DoE of the statistical model 125 may be performed by the manufacturer of the processing tool. In several other implementations, the statistical model 125 may be generated by performing a physical DoE in the field. In yet another implementation, the tool manufacturer may provide a generic statistical model 125 and perform subsequent physical DoEs in the field to provide calibration of the statistical model 125 to more closely model the specific processing tool being studied.

[0033] In one implementation, real-world physical and chemical relationships can be used to generate the physical model 127. For example, physical and chemical equations governing various interactions within the processing chamber can be used to construct the physical model. The physical model 127 can also utilize chamber geometry or other chamber constructions to improve its accuracy. The physical model 127 can be the result of simulations of physical and chemical interactions within the processing instrument across multiple different processing parameters. The physical model 127 can be a module that is sold or licensed for use with the processing instrument.

[0034] In one implementation, physical model 127 and statistical model 125 may be able to reference each other (as indicated by the arrows). Cross-referencing between the two models 127 and 125 allows for the validation of each model and allows for filling any gaps in the individual models. In one implementation, physical model 127 and statistical model 125 may be combined to provide a more robust hybrid model.

[0035] For reference Figure 1BAccording to one embodiment, a schematic diagram of a processing tool 100 is shown. As shown, a hybrid model server 120 may be integrated with the processing tool 100. For example, as indicated by the arrows, the hybrid model server 120 may be communicatively coupled to a front-end server 160 via a network connection. However, in several other embodiments, the hybrid model server 120 may be external to the processing tool 100. For example, the hybrid model server 120 may be communicatively coupled to the processing tool 100 via an external network or a similar network.

[0036] In one implementation, processing tool 100 may include a front-end server 160, a tool control server 150, and tool hardware 140. The front-end server 160 may include a user interface 165 for the hybrid model server 120. As will be described in more detail below, the user interface 165 provides a way for process engineers to perform various operations using hybrid modeling, such as recipe development or chamber baselineization.

[0037] Tool control server 150 may include intelligent monitoring and control block 155. Intelligent monitoring and control block 155 may include modules for providing diagnostics and other monitoring of the processing tool 100. These modules may include, but are not limited to, health checks, sensor drift, fault recovery, and leak detection. Intelligent monitoring and control block 155 may receive data as input from various sensors implemented in the tool hardware. Sensors may include standard sensors 147 generally present in the semiconductor manufacturing tool 100 to allow operation of the tool 100. Sensors may also include modeled sensors 145 added to the tool 100. Modeled sensors 145 provide additional information necessary to construct a highly detailed hybrid model. For example, modeled sensors may include virtual sensors and / or witness sensors. Virtual sensors may utilize data obtained from two or more physical sensors and perform interpolation and / or extrapolation to provide additional sensor data that cannot be obtained solely from physical sensors. In a particular instance, a virtual sensor may utilize upstream and downstream pressure sensors to calculate the flow rate through a portion of the processing tool, such as a cylinder. Generally, modeled sensors can include any type of sensor, such as, but not limited to, pressure sensors, temperature sensors, and gas concentration sensors. In one embodiment, the intelligent monitoring and control block 155 can provide data used by the hybrid model server 120. In several other embodiments, output data from various modeled sensors 145 can be directly provided to the hybrid model server 120.

[0038] For reference Figure 2AAccording to one embodiment, a flowchart illustrating a process for generating a hybrid model is shown. In one embodiment, inputs from a modeling DoE 215 are fed into a statistical modeling engine 224. The modeling DoE 215 may include the processing of multiple physical wafers. The DoE 215 may include various data sources fed to the statistical modeling engine 224. For example, metrological data 216 obtained during or after wafer processing may be provided to the statistical modeling engine 224. Additionally, sensor data 217 from sensors in the processing apparatus may be provided to the statistical modeling engine 224. Process parameter data 218 (i.e., values ​​of various process parameters during wafer processing) may also be provided to the statistical modeling engine 224.

[0039] In one implementation, the statistical model engine 224 may be implemented as hardware and / or software suitable for analyzing various data sources and outputting a statistical model 225. The statistical model engine 224 may utilize neural network-based machine learning, or any other known techniques for regression analysis (e.g., linear, partial least squares, Gaussian, polynomial, convolutional neural networks for regression, regression trees, and other techniques) to interpolate a process space larger than that obtained solely from physical DoE data.

[0040] In one implementation, a physics modeling engine 226 is used to generate a physics model 227. In one implementation, the physics modeling engine 226 may be implemented as hardware and / or software. The physics modeling engine 226 takes chamber construction and real-world physical and chemical equations as input. The physics modeling engine 226 can perform simulations of physical and chemical interactions within the processing apparatus across multiple different processing parameters to construct the physics model 227. Therefore, changes in processing parameters that modify physical and / or chemical reactions within the processing apparatus can be mapped to the desired apparatus results.

[0041] In one implementation, statistical model 225 and physical model 227 are used as inputs to generate hybrid model 228. For example, statistical model 225 and physical model 227 can be inputs to hybrid model engine 229. Hybrid model engine 229 processes physical model 227 and statistical model 225 and outputs hybrid model 228. In some implementations, physical model 227 can be used to derive some unmeasurable physical measurements, and the output of physical model 227 can be considered as additional input to the statistical model. In this case, hybrid model engine 229 adds information from physical model 227 to statistical model 225 to provide hybrid model 228. Therefore, hybrid model 228 allows both models 225 and 227 to be used to validate individual points in the process space and provides a more complete process space that can be individually customized for a given processing tool. However, in some implementations, depending on the output, physical model 227 and statistical model 225 can be independent models. That is, in some implementations, statistical model 225 and physical model 227 may not be combined into a hybrid model.

[0042] In one implementation, the mixture model can also be considered another instance of statistical model 225. For example, in Figure 2B In this embodiment, the physical model 227 output by the physical model engine 226 can be used as input to the statistical model engine 224. The statistical model engine 224 therefore has additional inputs to produce a statistical model 225 that includes information from the physical model 227. Specifically, the statistical model 224 may already include data from the physical model 227, and in all embodiments, using a hybrid model engine to generate a hybrid model may be optional.

[0043] For reference Figure 3 According to one embodiment, a graph illustrating a representation of the process space provided by a hybrid model is shown. Each point on the graph represents a set of processing parameters and the resulting outcome on the wafer. For example, the X-axis could be response uniformity, and the Y-axis could be the response average. The graph describes how, for a given set of processing parameters, the resulting outcome on the wafer will have a specific response uniformity and response average.

[0044] In the diagram shown, the larger diamond-shaped points are data points obtained from the modeled DoE. That is, the larger points are based on the dataset obtained from the physical processing of the wafer. The smaller points represent virtual points generated using a hybrid model. As shown, the hybrid model provides much more detailed data to the processing space than data obtained solely from the processed wafer.

[0045] For reference Figure 4According to one embodiment, a flowchart illustrating process 470 for developing a process formulation using a hybrid model is shown. The target process formulation is a process formulation having a set of process parameters that will produce desired device outcomes on a wafer. In one embodiment, process 470 may begin operation 471, which includes determining the desired device outcome. In one embodiment, the device outcome may relate to wafer device size, material composition, or similar results. For example, device outcomes may include layer thickness, thickness uniformity across the entire wafer, layer material composition, or material composition uniformity.

[0046] In one implementation, process 470 can proceed to operation 472, which includes querying a hybrid model to select a set of processing parameters. In one implementation, the hybrid model can be a process space model generated by a combination of statistical and physical models. The statistical model can be generated using the DoE of an actual wafer as described above. The physical model can be based on real-world physical and chemical equations. For example, the physical model can be generated based on simulations of physical and chemical interactions within the processing apparatus across multiple different processing parameters. In one implementation, the hybrid model can cover the entire processing space available to the processing apparatus.

[0047] Hybrid models allow for the identification of stable process formulations without relying entirely on the experience and knowledge of process engineers. Instead, baseline formulations that are expected to produce plant outcomes that closely match the target plant outcomes can be selected from the process space of the hybrid model.

[0048] In one implementation, process 470 can proceed to operation 473, which includes performing a small DoE to validate the model recommendation. Due to the high precision of the hybrid model, a small DoE (e.g., 20 or fewer wafers) may be all that is needed to validate the model recommendation. In one implementation, the DoE may be designed by a process engineer.

[0049] In one implementation, process 470 can continue with operation 474, which includes measuring the DoE wafer results using one or more metrology tools. The metrology data can be used to verify whether the target device outcome has been achieved on the wafer.

[0050] In one implementation, process 470 can continue to operation 475, which includes determining whether the desired device outcome has been achieved. If the desired device outcome has been achieved, the process continues to operation 476 and completes. If the desired device outcome has not been achieved, the process can loop back to operation 472. In one implementation, data from a small DoE can be fed back into the hybrid model to update it. The updated hybrid model can then be queried to provide a second baseline formulation. In this way, even if the first iteration is unsuccessful, the process can still quickly converge to the correct formulation without a large number of DoEs and wasted resources.

[0051] For reference Figure 5 According to one embodiment, a flowchart illustrating process 580 for baselined processing tooling is shown. In one embodiment, the baselined process may be advantageous in taking into account chamber drift during wafer processing in the processing tooling. In one embodiment, the baselined process can be implemented at any desired frequency. For example, process 580 may be implemented in batches, as scheduled maintenance (PM) events, or when the wafer being processed has device results outside a specified range.

[0052] In one embodiment, process 580 may begin operation 581, which includes running a constrained DoE of wafers with external metrology to baseline chamber performance. In one embodiment, the constrained DoE may include twenty or fewer wafers. The constrained DoE may utilize a recorded process formulation as a baseline. External metrology may include any metrology suitable for determining the device outcome of the processed wafer. For example, in the case of an oxidation process, ellipsometry may be used to study film thickness and thickness uniformity on the wafer.

[0053] In one implementation, process 580 may proceed with operation 582, which includes adding apparatus results and other metrological data to the hybrid model. The additional data added to the hybrid model may be referred to as a calibration dataset. The calibration dataset is used to update the hybrid model so that it more accurately reflects the current state of the processing instrument. For example, process 580 may include operation 583, which includes adjusting the model's predictions to account for specific chamber conditions. That is, updating the process space of the hybrid model to more closely match the conditions of the processing instrument under study.

[0054] In one implementation, the hybrid model can be a process space model generated by combining a statistical model and a physical model. The statistical model can be generated using the DoE of an actual wafer as described above. The physical model can be based on real-world physical and chemical equations. For example, the physical model can be generated based on simulations of physical and chemical interactions within the processing apparatus across multiple different processing parameters. In one implementation, the hybrid model can cover the entire processing space available to the processing apparatus.

[0055] In one implementation, process 580 can proceed to operation 584, which involves predicting and optimizing process parameters to achieve the desired wafer outcome for subsequent processing in the chamber. Optimized process parameters can be selected after the hybrid model has been updated to include a calibration dataset. Therefore, regardless of changes in chamber conditions, the new process formulation provides wafer parameters that more closely match the wafer outcome to the target values. Chamber drift can thus be monitored and accounted for to maintain a tight process window and improve uniformity, repeatability, and yield. Furthermore, unscheduled tool downtime is reduced because the processing formulation can be accurately adjusted to account for chamber drift. Additionally, when PM does occur, process 580 can be implemented to provide shorter recovery times, which improves tool utilization.

[0056] In one implementation, the hybrid model can be further used to provide continuous (or near-continuous) modifications to the processing recipe to account for chamber drift. For example, wafer and process data acquired during device wafer processing can be obtained and used to update the hybrid model. That is, a dedicated DoE may not be required to provide a correction dataset. Wafer data from the device wafers can be obtained for each wafer or subset of wafers being processed.

[0057] Such implementations may include a hybrid model providing the processing tool. The hybrid model may include statistical and physical models, similar to the hybrid model described above. In one implementation, the process may begin by executing a recipe in the processing tool to process a first wafer. After processing the first wafer, wafer data from the first wafer and process data from the processing tool related to the recipe execution are obtained. In one implementation, the wafer data may include metrological data, such as, but not limited to, thickness, thickness uniformity, profile, and hydrogen percentage. In one implementation, the process data may include data obtained from sensors within the processing tool and / or tool configuration information. In one implementation, the wafer data and process data are provided to the hybrid model to generate an updated hybrid model. In one implementation, the updated hybrid model is used to generate a modified recipe to account for chamber drift in the processing tool. Multiple implementations may then include executing the modified recipe in the processing tool to process a second wafer. While the processing of a single first wafer has been described above, it should be understood that multiple first wafers may be processed before generating an updated hybrid model. In this implementation, multiple sets of wafer data and process data may be used to generate an updated hybrid model.

[0058] Figure 6A schematic representation of a machine in an exemplary form of a computer system 600 is shown, within which a set of instructions can be executed to cause the machine to perform any or more of the methods described herein. In several alternative embodiments, the machine may be connected (e.g., network-connected) to other machines in a Local Area Network (LAN), intranet, extranet, or Internet. The machine may operate as a server or client machine in a client-server network environment, or as a peer-to-peer machine in a peer (or distributed) network environment. The machine may be a personal computer (PC), tablet PC, set-top box (STB), personal digital assistant (PDA), cellular phone, network device, server, network router, switch, or bridge, or any machine capable of executing a set of instructions (sequential or otherwise) specifying the action to be taken by the machine. Furthermore, although only a single machine is shown, the term "machine" should also be considered as including any collection of machines (e.g., computers) that individually or jointly execute a set (or more) of instructions to perform any or more of the methods described herein.

[0059] An exemplary computer system 600 includes a processor 602, main memory 604 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM) such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM), etc.), static memory 606 (e.g., flash memory, static random access memory (SRAM), MRAM, etc.), and auxiliary memory 618 (e.g., a data storage device), which communicate with each other via a bus 630.

[0060] Processor 602 represents one or more general-purpose processing devices, such as microprocessors, central processing units, or similar devices. In particular, processor 602 may be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor implementing other instruction sets, or a processor implementing combinations of instruction sets. Processor 602 may also be one or more special-purpose processing devices, such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), digital signal processors (DSPs), network processors, or similar processors. Processor 602 is configured to execute processing logic 626 to perform the operations described herein.

[0061] The computer system 600 may further include a network interface device 608. The computer system 600 may also include a video display unit 610 (e.g., a liquid crystal display (LCD), a light-emitting diode display (LED), or a cathode ray tube (CRT)), an alphanumeric input device 612 (e.g., a keyboard), a cursor control device 614 (e.g., a mouse), and a signal generation device 616 (e.g., a speaker).

[0062] Secondary memory 618 may include machine-readable storage medium (or more specifically, computer-readable storage medium) 632 on which one or more sets of instructions (e.g., software 622) embodying any one or more methods or functions described herein are stored. Software 622 may also reside wholly or at least partially within main memory 604 and / or processor 602 during execution by computer system 600, which also constitute machine-readable storage media. Software 622 may further be transmitted or received on network 620 via network interface device 608.

[0063] Although machine-accessible storage medium 632 is shown as a single medium in the exemplary embodiment, the term "machine-readable storage medium" should be considered to include a single medium or multiple media (e.g., a centralized or distributed database, and / or associated caches and servers) that store one or more sets of instructions. The term "machine-readable storage medium" should also be considered to include any medium capable of storing or encoding a set of machine-executable instructions that enables the machine to perform any one or more of the methods described in this disclosure. Therefore, the term "machine-readable storage medium" should be considered to include, but is not limited to, solid-state memory, and optical and magnetic media.

[0064] According to embodiments of this disclosure, a machine-accessible storage medium has instructions stored on the machine-accessible storage medium that enable a data processing system to process a chip using insights from a hybrid model and / or methods for updating or constructing a hybrid model.

[0065] Therefore, methods for using hybrid models to process wafers in processing tools have been disclosed.

Claims

1. A method for developing semiconductor manufacturing process formulations, the method comprising the following steps: Choose one or more device results; Query the hybrid model to obtain a recommended process formulation suitable for achieving the results of the device, wherein the hybrid model includes: Statistical model; and Physical models, wherein the physical models are generated based on simulations of physical and chemical interactions within the processing apparatus across multiple different processing parameters; A design of experiments (DoE) is performed on a set of wafers to validate the process formulations recommended by the hybrid model and to provide validated process formulations, wherein the validated process formulations include an oxidation process for the growth of oxide materials. Applying the validated process formulation to a wafer, wherein applying the validated process formulation to the wafer includes applying the oxidation process to grow the oxide material on the wafer and performing the formulation on a plurality of first wafers; Obtain wafer data from the plurality of first wafers; Process data related to the execution of the formulation on the plurality of first wafers is obtained from the processing tool; and The wafer data and process data from the processing of the plurality of first wafers are provided to the hybrid model to generate an updated hybrid model.

2. The method of claim 1, wherein the step of performing the DoE comprises the following steps: The results of measuring the DoE wafer were obtained using metrological tools; and The desired device outcome is determined based on the DoE wafer results.

3. The method of claim 1, wherein the oxidation process is a free radical oxidation process.

4. The method of claim 3, wherein the process formulation comprises one or more of pressure, temperature, flow rate and holding time.

5. The method of claim 3, wherein the apparatus result comprises one or more of thickness, thickness uniformity, profile, and hydrogen percentage.

6. The method of claim 1, wherein the statistical model is generated based on the physical DoE and interpolation of data from the physical DoE.

7. The method of claim 1, wherein the hybrid model is a multidimensional process space.

8. A method for baselined chambers performing semiconductor manufacturing processes, the method comprising the steps of: Run a restricted design of experiments (DoE) on a wafer with external metrology to baseline chamber performance; Wafer results and metrological data from the restricted DoE are added to the hybrid model as a calibration dataset, wherein the hybrid model comprises: Statistical model; and Physical models, wherein the physical models are generated based on simulations of physical and chemical interactions within the processing apparatus across multiple different processing parameters; The model's predictions are adjusted to take into account the specific chamber conditions and / or wafer conditions identified by the restricted DoE; Predict and optimize process parameters to achieve the desired wafer outcome of the wafer processed in the chamber and provide optimized process parameters, wherein the optimized process parameters include an oxidation process for the growth of oxide materials; Applying the optimized process parameters to the wafer, wherein applying the optimized process parameters to the wafer includes applying the oxidation process to grow the oxide material on the wafer and performing the formulation on a plurality of first wafers; Obtain wafer data from the plurality of first wafers; Process data related to the execution of the formulation on the plurality of first wafers is obtained from the processing tool; and The wafer data and process data from the processing of the plurality of first wafers are provided to the hybrid model to generate an updated hybrid model.

9. The method of claim 8, wherein the oxidation process is a free radical oxidation process.

10. The method of claim 9, wherein the process parameters include one or more of pressure, flow rate, temperature, and holding time.

11. The method of claim 9, wherein the wafer outcome comprises one or more of thickness, thickness uniformity, profile, and hydrogen percentage.

12. The method of claim 8, wherein the statistical model is generated based on the modeled DoE and interpolation of data from the modeled DoE.

13. The method of claim 8, wherein the hybrid model is a multidimensional process space.

14. The method of claim 8, wherein the restricted DoE comprises 20 or fewer wafers.

15. A method for processing a wafer in a processing tool, the method comprising the steps of: A hybrid model providing processing tools, wherein the hybrid model comprises: Statistical model; and Physical models, wherein the physical models are generated based on simulations of physical and chemical interactions within the processing apparatus across multiple different processing parameters; The recipe is executed in the processing tool to process the first wafer; After the formula is executed, wafer data is obtained from the first wafer; Obtain process data related to the execution of the formulation from the processing tool; The wafer data and the process data are provided to the hybrid model to generate an updated hybrid model; The updated hybrid model is used to generate a modified formulation to take into account chamber drift in the processing tool, wherein the modified formulation includes an oxidation process for the growth of oxide materials; Applying the modified formulation to a second wafer in the processing tool, wherein applying the modified formulation to the wafer includes applying the oxidation process to grow the oxide material on the wafer and performing the formulation on a plurality of first wafers; Obtain wafer data from the plurality of first wafers; Process data related to the execution of the formulation on the plurality of first wafers is obtained from the processing tool; and The wafer data and process data from the processing of the plurality of first wafers are provided to the hybrid model to generate an updated hybrid model.

16. The method of claim 15, wherein the wafer data includes metrological data.

17. The method of claim 16, wherein the metrological data includes one or more of thickness, thickness uniformity, profile, and hydrogen percentage.

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