Terminal based on photoplethysmography, ppg

Abstract

Embodiments of the present application provide a terminal based on photoplethysmography (PPG), which comprises an LED, an AFE chip, a processor, a delay circuit and a plurality of PDs, the plurality of PDs comprising a first PD and a second PD, the first PD and the second PD being connected in parallel to the AFE chip, the AFE chip being connected to the processor, and the delay circuit being connected in series to a branch in which the first PD is located; the LED is configured to emit a first light signal to the skin of a user; the first PD is configured to receive a second light signal reflected by the skin of the user and convert the second light signal into a first electrical signal; the second PD is configured to receive the second light signal reflected by the skin of the user and convert the second light signal into a second electrical signal; the delay circuit is configured to perform delay processing on the first electrical signal; the AFE chip is configured to determine a target signal according to the second electrical signal and the first electrical signal after the delay processing; and the processor is configured to process the target signal to obtain the health status of the user.

Description

Technical Field

[0001] This application relates to the field of terminal technology, and in particular to a terminal based on photoelectric volumetric plethysmography (PPG). Background Technology

[0002] Typically, a terminal can use photoplethysmography (PPG) to measure parameters such as heart rate, blood oxygen saturation, and respiratory rate to obtain information about a person's health status. This method can be implemented using a photodiode (PD) and a light-emitting diode (LED) within the terminal. Specifically, the PD receives the light signal emitted by the LED and reflected through the user's skin, converts the light signal into an electrical signal, and the terminal obtains the user's health status by analyzing the electrical signal.

[0003] However, the current PPG signal acquisition accuracy is not high. For example, in motion scenarios, there may be situations where the PD cannot make sufficient contact with the skin, resulting in poor signal quality acquired by the PD. This affects the accuracy of the user's health status obtained by analyzing and processing the signal, thus impacting the user experience. Summary of the Invention

[0004] This application provides a terminal based on photoelectric volumetric plethysmography (PPG), which can obtain a high-quality target signal based on multiple photodiodes (PDs) and delay circuits, and then obtain an accurate human health status based on the target signal.

[0005] In a first aspect, embodiments of this application provide a terminal based on photoplethysmography (PPG). The terminal includes a light-emitting diode (LED), an analog front-end (AFE) chip, a processor, and multiple photodiodes (PDs). The multiple PDs include a first PD and a second PD. The first PD and the second PD are connected in parallel to the AFE chip, and the AFE chip is connected to the processor. The LED is used to emit a first light signal to the user's skin. The first PD is used to receive a second light signal reflected by the user's skin and convert the second light signal into a first electrical signal. The second PD is used to receive the second light signal reflected by the user's skin and convert the second light signal into a second electrical signal. The terminal also includes a delay circuit, which is connected in series in the branch where the first PD is located. The delay circuit is used to perform delay processing on the first electrical signal. The AFE chip is used to determine a target signal based on the second electrical signal and the first electrical signal after delay processing. The processor is used to process the target signal to obtain the user's health status.

[0006] In this way, the terminal can perform delay processing on the first electrical signal converted by the first PD based on the delay circuit, so that the AFE chip can obtain independent first and second electrical signals. The first and second electrical signals are obtained based on the reflection of the first light signal emitted by the LED at the same time through the user's skin. This allows the AFE chip to select and obtain a target signal with higher accuracy, and then the processor processes the target signal to obtain the user's health status.

[0007] In one possible implementation, the delay circuit includes an RC filter and a controllable switch. The RC filter includes a resistor and a capacitor. The control terminal of the controllable switch is connected to the first terminal of the resistor and the first terminal of the capacitor. The first terminal of the controllable switch is connected to a first PD, and the second terminal of the controllable switch is connected to the input terminal of the AFE chip. The second terminal of the resistor is connected to the general interface of the AFE chip, and the second terminal of the capacitor is grounded. The RC filter is used to control the voltage at the control terminal of the controllable switch. The controllable switch is used to turn on when the voltage at the control terminal is higher than a preset threshold, so as to realize the delay processing of the first electrical signal.

[0008] In this way, the terminal can control the delay time of the delay circuit through the RC filter. After the RC filter is configured to reach the preset threshold after a preset time, the voltage at the control terminal of the controllable switch will reach the preset threshold. When the voltage at the control terminal of the controllable switch is higher than the preset threshold, the controllable switch will be turned on, thereby realizing the delay processing of the first electrical signal.

[0009] In one possible implementation, the delay circuit includes a timer and a controllable switch; the control terminal of the controllable switch is connected to the output terminal of the timer, the first terminal of the controllable switch is connected to the first PD, and the second terminal of the controllable switch is connected to the input terminal of the AFE chip; the timer is used to delay the first electrical signal output to the control terminal of the controllable switch by a preset time compared to the second electrical signal.

[0010] In this way, the terminal can control the delay time of the delay circuit through a timer. After the timer controls the preset time, the controllable switch is turned on, and the AFE chip obtains the first electrical signal after the preset time, thereby realizing the delay processing of the first electrical signal.

[0011] In one possible implementation, the delay circuit includes a power management chip; the power management chip includes a signal input pin, a signal output pin, and a power input pin, the power input pin being used to connect to a DC voltage, and the power management chip being connected in series with the first PD through the signal input pin and the signal output pin; the power management chip is used to generate a first electrical signal that is delayed by a preset time compared to the second electrical signal using the DC voltage.

[0012] In this way, the power management chip can generate a first electrical signal after a preset delay based on the input DC voltage, thereby realizing the delay processing of the first electrical signal.

[0013] In one possible implementation, the multiple PDs are eight PDs, the first electrical signal is four electrical signals generated by four of the eight PDs, and the AFE chip has four signal receiving channels.

[0014] In this way, an AFE chip with 4 signal receiving channels can obtain 8 electrical signals after delaying 4 of the 8 electrical signals obtained from 8 PDs through a delay circuit. The delay processing can separate two signals obtained from the same channel, and the AFE chip can obtain 8 independent electrical signals through the 4 signal receiving channels.

[0015] In one possible implementation, there are 12 PDs. The first PD includes 4 first sub-PDs and 4 second sub-PDs, which are connected in parallel to the AFE chip. The first sub-PDs are used to receive the second optical signal reflected by the user's skin and convert it into a first sub-electrical signal. The second sub-PDs are used to receive the second optical signal reflected by the user's skin and convert it into a second sub-electrical signal. The delay circuit includes a first delay circuit and a second delay circuit, which have different delay durations. The first delay circuit is connected in series in the branch where the first sub-PD is located, and the second delay circuit is connected in series in the branch where the second sub-PD is located. The first delay circuit is used to delay the first sub-electrical signal, and the second delay circuit is used to delay the second sub-electrical signal.

[0016] In this way, an AFE chip with four signal receiving channels can obtain 12 electrical signals after delaying eight of the twelve signals from the twelve signals received by the twelve PDs through a first delay circuit and a second delay circuit. The eight delayed electrical signals include four first sub-signals processed by the first delay and four second sub-signals processed by the second delay. Through the first and second delay circuits, each signal receiving channel of the AFE chip can obtain three electrical signals. These three signals are delayed by different times through the first and second delay circuits, thus obtaining three independent electrical signals. The AFE chip can obtain 12 independent electrical signals through its four signal receiving channels.

[0017] In one possible implementation, multiple PDs are distributed in a ring.

[0018] In this way, multiple digital signal processors (PDs) can be arranged in a ring on the terminal. When a user touches the terminal at any angle, they will come into contact with one of the PDs. When any one of the PDs comes into contact with the user's skin, a high-quality electrical signal can be obtained, thus providing an accurate assessment of the user's health status.

[0019] In one possible implementation, the user's health status includes at least one of the user's heart rate, blood oxygen saturation, and respiratory rate.

[0020] In this way, the terminal can be used to acquire any one of the user's heart rate, blood oxygen saturation and respiratory rate, and can also acquire any two or all of the above parameters at the same time, so that the user can obtain his / her own health status based on the terminal.

[0021] In one possible implementation, the terminal is a wearable device.

[0022] In this way, users can monitor their health status in various scenarios through this terminal.

[0023] In one possible implementation, the first optical signal is at least one of a red light signal, a green light signal, and an infrared light signal.

[0024] In this way, the terminal can control the color of LED light emission based on different application scenarios.

[0025] Secondly, embodiments of this application provide a control method based on photoplethysmography (PPG), applied to a wearable device as described in any of the first aspects. The method includes: acquiring a second light signal reflected by the user's skin via a first photodiode (PD), and converting the second light signal into a first electrical signal, wherein the second light signal is obtained by reflecting a first light signal emitted by an LED onto the skin; acquiring the second light signal reflected by the user's skin via a second PD, and converting the second light signal into a second electrical signal; performing a delay processing on the first electrical signal via a delay circuit; determining a target signal based on the second electrical signal and the first electrical signal after the delay processing; and processing the target signal to obtain the user's health status.

[0026] In one possible implementation, the first electrical signal is delayed by a delay circuit, including: controlling the voltage at the control terminal of a controllable switch via an RC filter; when the voltage at the control terminal is higher than a preset threshold, the controllable switch is turned on to achieve the delay processing of the first electrical signal.

[0027] In one possible implementation, the first electrical signal is delayed by a delay circuit, including: using a timer to delay the first electrical signal output to the control terminal of the controllable switch by a preset time compared to the second electrical signal.

[0028] In one possible implementation, the first electrical signal is delayed by a delay circuit, including: generating a first electrical signal that is delayed by a preset time compared to the second electrical signal using a DC voltage via a power management chip.

[0029] In one possible implementation, the multiple PDs are eight PDs, the first electrical signal is four electrical signals generated by four of the eight PDs, and the AFE chip has four signal receiving channels.

[0030] In one possible implementation, the multiple PDs are 12 PDs, the first PD includes 4 first sub-PDs and 4 second sub-PDs, and the AFE chip has 4 signal receiving channels; acquiring the second light signal reflected by the user's skin through the first PDs includes: acquiring the second light signal reflected by the user's skin through 8 first PDs; acquiring the second light signal reflected by the user's skin through the second PDs includes: acquiring the second light signal reflected by the user's skin through 4 second PDs; delaying the first electrical signal through a delay circuit includes: delaying the 4 first sub-electrical signals through a first delay circuit, and delaying the other 4 second sub-electrical signals through a second delay circuit.

[0031] In one possible implementation, multiple PDs are distributed in a ring.

[0032] In one possible implementation, the user's health status includes at least one of the user's heart rate, blood oxygen saturation, and respiratory rate.

[0033] In one possible implementation, the method is applied to wearable devices.

[0034] In one possible implementation, the first optical signal is at least one of a red light signal, a green light signal, and an infrared light signal.

[0035] Thirdly, embodiments of this application provide a computer-readable storage medium storing instructions that, when executed, cause a computer to perform the control method described in the second aspect or any implementation thereof.

[0036] Fourthly, embodiments of this application provide a computer program product, including a computer program that, when run, causes a computer to perform the control method described in the second aspect or any implementation thereof.

[0037] It should be understood that the second to fourth aspects of this application correspond to the technical solutions of the first aspect of this application, and the beneficial effects achieved by each aspect and the corresponding feasible implementation are similar, and will not be repeated here. Attached Figure Description

[0038] Figure 1 A schematic diagram illustrating the principle of PPG as provided in an embodiment of this application;

[0039] Figure 2 This is a schematic diagram of the structure of a terminal provided in an embodiment of this application;

[0040] Figure 3 A schematic diagram illustrating the interface and connection relationships of a smartwatch provided in an embodiment of this application;

[0041] Figure 4 This is a schematic diagram of a PD connection structure provided in an embodiment of this application;

[0042] Figure 5 A schematic diagram of a communication receiving unit receiving signals, provided in an embodiment of this application;

[0043] Figure 6 This is a schematic diagram of a delay circuit provided in an embodiment of this application;

[0044] Figure 7 This is a schematic diagram of another PD connection structure provided in an embodiment of this application;

[0045] Figure 8 This is a schematic diagram of another PD connection provided in an embodiment of this application;

[0046] Figure 9 This is a schematic diagram of another PD connection structure provided in an embodiment of this application;

[0047] Figure 10 This is a schematic diagram of another delay circuit provided in an embodiment of this application;

[0048] Figure 11 This is a schematic diagram of another delay circuit provided in an embodiment of this application;

[0049] Figure 12 This is a schematic diagram of another delay circuit provided in an embodiment of the present application;

[0050] Figure 13 A flowchart illustrating a PPG control method provided in an embodiment of this application;

[0051] Figure 14 This is a schematic diagram of the hardware structure of a control device provided in an embodiment of this application. Detailed Implementation

[0052] To facilitate a clear description of the technical solutions in the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with essentially the same function and effect. For example, the first value and the second value are only used to distinguish different values ​​and do not limit their order. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.

[0053] It should be noted that, in this application, the terms "exemplary" or "for example" are used to indicate that something is being described as an example, illustration, or illustration. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or design solutions. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0054] In this application, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0055] As user needs continue to grow, terminals can offer more functions. For example, to meet users' needs for monitoring their own health, terminals can monitor users' physical health.

[0056] The terminal can use photoplethysmography (PPG) to measure parameters such as heart rate, blood oxygenation, and respiratory rate in the human body, thereby obtaining information about the person's health status. The specific principle is as follows... Figure 1As shown, an LED emits a beam of light of a specific wavelength to illuminate the skin surface. The beam is received by the PD (Digital Display Device) through transmission or reflection, and the PD converts the light signal into an electrical signal. Thus, the terminal can acquire electrical signals, including those related to the user's health status, through the PD, and then analyze and process these signals to obtain the user's health condition. Since the absorption of light by muscles, bones, and veins in the human body remains relatively constant when there is no significant movement, while blood absorption varies due to its flow, the PD converts the light signal into an electrical signal. Because the absorption of light by arteries changes, while the absorption by other tissues in the body remains relatively constant, the terminal can separate the acquired electrical signal into alternating current (AC) and direct current (DC) signals, extracting the AC signal to obtain the user's health status.

[0057] The terminal can be a portable device such as a smartwatch or smart bracelet. The LED and PD can be installed in the back cover of the portable device. The LED emits light signals, and the PD receives the light signals reflected by the skin of the human wrist and converts the light signals into electrical signals. In this way, the terminal can obtain electrical signals that characterize the human body's health status through the PD, and obtain the human body's health status by processing the electrical signals.

[0058] In some situations, such as during sports activities, the unstable contact between the watch case and the skin can prevent the photodetector (PD) from making sufficient contact, resulting in poor signal quality. To address this, additional PDs can be added, and their signals can be combined with those of the existing PDs. For example, if the terminal has four PDs (PD1 to PD4) and four additional PDs (PD5 to PD8) are added, connecting PD1 and PD5 combines their signals. Similarly, PD2 and PD6, PD3 and PD7, and PD4 and PD8 can be combined, allowing the PD to output four combined signals.

[0059] However, when a PD contains a poor signal, this poor signal is superimposed on other signals, affecting the quality of the combined signal and causing further deterioration in signal quality.

[0060] In view of this, this application provides a PPG-based terminal, which includes light-emitting diodes (LEDs), an analog front-end (AFE) chip, a processor, a delay circuit, and multiple photodiodes (PDs). The multiple PDs include a first PD and a second PD. The first PD and the second PD are connected in parallel to the AFE chip. The AFE chip is connected to the processor. The delay circuit is connected in series in the branch where the first PD is located.

[0061] Specifically, the LED is used to emit a first light signal to the user's skin, the first PD is used to receive a second light signal reflected by the user's skin and convert the second light signal into a first electrical signal, the second PD is used to receive the second light signal reflected by the user's skin and convert the second light signal into a second electrical signal, the delay circuit is used to delay the first electrical signal, and the AFE chip is used to determine the target signal processor based on the second electrical signal and the first electrical signal after the delay, and to process the target signal to obtain the user's health status.

[0062] Through a delay circuit, the AFE chip can obtain a first electrical signal and a second electrical signal after delay processing. These first and second signals are independent of each other. The AFE chip can select between these independent signals to acquire the target signal with better signal quality. The processor then analyzes and processes the target signal to obtain information about the human health status. Delaying the first electrical signal allows the AFE chip to independently receive multiple electrical signals collected by multiple PDs. This enables the AFE chip to independently select the target signal based on the electrical signal collected by each PD, achieving comprehensive extraction of the target signal and avoiding interference caused by signal superposition.

[0063] In this embodiment, the terminal structure can be as follows: Figure 2 As shown, Figure 2 This is a schematic diagram of a terminal structure provided in an embodiment of this application. The terminal may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, a sensor module 180, buttons 190, a motor 191, an indicator 192, a camera 193, a display screen 194, a subscriber identification module (SIM) card interface 195, and a light-emitting diode (LED) 196, etc. The sensor module 180 may include a photodiode. The photodiode and the LED can be deployed in various positions as follows... Figure 3 As shown.

[0064] It is understood that the structure illustrated in this embodiment does not constitute a specific limitation on the terminal. In other embodiments, the terminal may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0065] The architecture of the terminal has been briefly introduced above. The connection method in the terminal of this application embodiment will be specifically introduced below, taking a smartwatch as an example of a wearable device.

[0066] The terminal in this embodiment of the application can be as follows: Figure 3 As shown, the eight PDs can form a ring structure. In this way, in motion scenarios, no matter what angle the user is in close contact with the back of the smartwatch, the user can make full contact with one of the PDs and thus obtain a good quality signal.

[0067] Typically, an analog front-end (AFE) chip used to process signals acquired by a PD (PD) has four communication receive units (RX). Therefore, the AFE chip can only receive four PD signals acquired simultaneously. When the number of PDs exceeds four, the terminal can connect multiple PDs in parallel, that is, superimpose the acquired PD signals so that the AFE chip can receive signals acquired by more than four PDs through its four communication receive units. For example, when the terminal has eight PDs, the terminal superimposes the eight PD signals acquired by the eight PDs pairwise, and obtains the superimposed four signals through the AFE chip's communication receive units. However, in this method, the signals obtained by the terminal through the AFE chip's four communication receive units are superimposed signals. When one of the PDs is unstable, the noise in the signal acquired by that PD is superimposed into the combined signal of that signal and the signals acquired by the other PDs, affecting the signal quality acquired by the PD.

[0068] To acquire more PD signals, the terminal not only needs to collect more PD signals, but also needs the AFE chip to receive independent multi-channel signals, thereby eliminating the coupling effect of multiple PDs connected in parallel. Without changing the AFE chip, the terminal can add a delay circuit to the parallel superimposed multiple PDs. Through the delay circuit, the terminal splits the multiple PD signals collected at the same time into signals at different times, which are then acquired by the communication receiving unit of the AFE chip.

[0069] like Figure 4 The image shows a signal receiving scheme provided in an embodiment of this application, wherein 8 PDs are as follows: Figure 3 The arrangement is shown below. Figure 3 An example of this application applied to a smartwatch 300 is provided, where 301 is the watch face, and the back of the watch face includes LEDs and PDs; 302 is the watch's display interface, used to display human health status; and 303 is other parts of the smartwatch, such as the watch strap.

[0070] like Figure 4As shown, PD1 and PD2 are connected in parallel to the first communication receiving unit RX0 (PD0) of the AFE chip; PD3 and PD4 are connected in parallel to the second communication receiving unit RX1 (PD1) of the AFE chip; PD5 and PD6 are connected in parallel to the third communication receiving unit RX2 (PD2) of the AFE chip; and PD7 and PD8 are connected in parallel to the fourth communication receiving unit RX3 (PD3) of the AFE chip. Delay circuits are introduced in the branches containing PD2, PD4, PD6, and PD8, respectively. In this way, the AFE chip can receive signals from PD1, PD3, PD5, PD7, PD2, PD4, PD6, and PD8, respectively. When the LED emits light between time t0 and t1, the delay time of the aforementioned delay circuit is T, where T is greater than (t1-t0). During time t0 to t1, the AFE chip receives the PD signals from PD1, PD3, PD5, and PD7 respectively through the four communication receiving units. During time (t0+T) to (t1+T), it receives the signals from PD2, PD4, PD6, and PD8 respectively through the four communication receiving units. The signals received by the AFE chip during time (t0+T) to (t1+T) are the synchronously acquired signals from PD2, PD4, PD6, and PD8 as the LED emits light during time t0 to t1. The delay circuit processes these signals by a delay of T, and they are then received by the AFE chip during time (t0+T) to (t1+T).

[0071] When no delay circuit is added to the above circuit, RX0 receives the sum of PD1 and PD2 signals from time t0 to t1, RX1 receives the sum of PD3 and PD4 signals from time t0 to t1, RX2 receives the sum of PD5 and PD6 signals from time t0 to t1, and RX3 receives the sum of PD7 and PD8 signals from time t0 to t1. Figure 5 As shown in (a). After adding delay circuits with a delay of time T to the branches containing PD2, PD4, PD6, and PD8, RX0 receives the signal of PD1 from time t0 to t1 and the signal of PD2 from time (t0+T) to (t1+T). RX1 receives the signal of PD3 from time t0 to t1 and the signal of PD4 from time (t0+T) to (t1+T). RX2 receives the signal of PD5 from time t0 to t1 and the signal of PD6 from time (t0+T) to (t1+T). RX3 receives the signal of PD7 from time t0 to t1 and the signal of PD8 from time (t0+T) to (t1+T). Figure 5As shown in (b). In this way, the AFE chip can independently acquire 8 PD signals, thereby sending the 8 independent signals into a first-in-first-out (FIFO) memory, and then evaluating the signal quality of the 8 signals based on a channel selection algorithm, thereby obtaining the target signal characterizing the user's health status.

[0072] When evaluating the signal quality of PD signals, channel selection algorithms typically require the DC signal amplitude to be at the μA level, and the AD signal amplitude to be approximately 0.5% to 2% of the DC signal amplitude. Furthermore, the signal should not exhibit significant amplitude fluctuations or glitches. The frequency domain energy should be concentrated between 0.5 and 4 Hz. This approach yields signals with good quality, allowing for the acquisition of indicators that reflect the user's health.

[0073] In some possible implementations, the LED in this application can emit light of multiple colors, such as red, green, or infrared light, so the first light signal is a red light signal, a green light signal, or an infrared light signal. The LED can also include multiple LED sub-units, emitting red and green light simultaneously, or red and infrared light simultaneously, or green and infrared light simultaneously, or red, green, and infrared light simultaneously.

[0074] Furthermore, when analyzing the target signal, the processor can obtain the user's heart rate, blood oxygen saturation, or respiratory rate, which indicate the user's health status. It can also obtain the user's heart rate and blood oxygen saturation, or heart rate and respiratory rate, or blood oxygen saturation or respiratory rate, from the target signal analysis. Moreover, based on the absorption of different light by different parts of the body, different colors of light can correspond to different parameters indicating the user's health status. For example, red light corresponds to the user's heart rate, green light to the user's blood oxygen saturation, and infrared light to the user's respiratory rate, etc.

[0075] like Figure 6Disclosed is a schematic diagram of energy storage of a delay circuit taking PD1 and PD2 as examples. In some possible implementations, energy storage for electrical signals output by PD2 can be implemented through an inductor and a switch. When the LED emits light from time t0 to t1, S1 and S2 are disconnected, at this time the current emitted by PD1 is received by the AFE chip, and the current emitted by PD2 is stored by the inductor L. After time T, the LED has been extinguished (T>(t1-t0)). S1 and S2 are closed, and the energy released by the inductor is received by the AFE chip. This energy is the current of PD2 during the LED lighting period from t0 to t1, so that the AFE chip can obtain the independent signal of PD2 after time T. Since the PD2 signal acquired by the AFE after time T is a signal received when the LED emits light, the lighting time of the LED is not changed, and almost no additional power consumption of the PPG device is increased. Through this circuit, the energy storage function of PD2 in the delay circuit can be realized. The energy emitted by PD2 is received and stored by the inductor. When the switch is turned on, the inductor releases the energy for the AFE chip to receive, thereby realizing delay processing of the electrical signal.

[0076] Wherein, the time delay T of the delay circuit is greater than the lighting duration (t1-t0) of the LED. For example, if the sampling period of the AFE chip is 100 hertz (HZ), the AFE chip acquires the signal of the next cycle after an interval of 10 milliseconds (ms), the sampling interval of the AFE chip is 10 ms, and the LED lighting duration (t1-t0) is 79 microseconds (us), so the time delay T needs to satisfy: lighting duration<T<sampling interval, that is: 79us<T<10ms.

[0077] It should be noted that, in the case where there are 8 PDs and the AFE chip has 4-channel communication receiving units, the present application is not limited to Figure 4 the parallel connection mode shown, where PD1 is connected in parallel with PD2, PD3 is connected in parallel with PD4, PD5 is connected in parallel with PD6, and PD7 is connected in parallel with PD8. Due to the technical solution provided by the present application, the AFE chip can independently receive signals sent by each PD, so multiple PDs in the present application can be arbitrarily connected in parallel in pairs. For example, PD1 is connected in parallel with PD5, PD2 is connected in parallel with PD6, PD3 is connected in parallel with PD7, and PD4 is connected in parallel with PD8, as shown in Figure 7 the figure.

[0078] Moreover, this embodiment is not limited to the structure of two PDs connected in parallel. In some possible implementations, three PDs or four PDs can also be connected in parallel. Through the delay circuit, multiple parallel-connected PDs can be received by the AFE chip through one communication receiving unit (RX). As shown in Figure 8As shown, PD1, PD2, and PD3 are connected in parallel. The branch containing PD2 includes a first delay circuit, and the branch containing PD3 includes a second delay circuit. The first delay circuit can delay for T1, and the second delay circuit can delay for T2. RX receives the signal from PD1 at times t0 to t1, the signal from PD2 at times (t0+T1) to (t1+T1), and the signal from PD3 at times (t0+T2) to (t1+T2). Here, T2 can be equal to 2T1.

[0079] Furthermore, the method of adding a delay circuit in the parallel branch in this embodiment is not limited to enabling an AFE chip with 4 communication receiving units to acquire more than 4 signals. When the chip used in this scenario has n receiving units, this embodiment is still applicable to acquiring more than n signals. Moreover, when the AFE chip has 4 communication receiving units, this embodiment is not limited to acquiring 8 or 12 signals. When 5 signals need to be acquired, two PDs can be connected in parallel to the chip, and the remaining PDs can be connected normally to the chip, such as... Figure 9 As shown.

[0080] The following example illustrates the delay circuit in this embodiment, using PD1 and PD2 connected in parallel and a delay circuit added to the branch containing PD2. RX0 receives the signal acquired by PD1 and, after a delay T, receives the signal acquired by PD2. This allows for independent acquisition of signals acquired by different PDs from time t0 to t1. The AFE chip can send the independent PD1 and PD2 signals into the FIFO, perform signal quality evaluation based on the channel selection algorithm, and acquire the target signal.

[0081] like Figure 10An example of a delay circuit is provided. This delay circuit includes an RC filter and a controllable switch, where the controllable switch can be a bipolar junction transistor (BJT) or a metal-oxide-semiconductor field-effect transistor (MOSFET). The RC filter includes a resistor and a capacitor. In this embodiment, an NPN transistor is used as an example. The control terminal of the NPN transistor D1 (the base of the NPN transistor in this embodiment) is connected to the first terminal of resistor R1 and the first terminal of capacitor C. The first terminal of the NPN transistor D1 (the collector of the NPN transistor in this embodiment) is connected to the first PD (PD2 in the figure). The second terminal (emitter) of the NPN transistor is connected to the input terminal of the AFE chip. The second terminal of resistor R1 is connected to the general purpose interface (GPIO) of the AFE chip, and the second terminal of capacitor C is grounded. GPIO is the general purpose input / output interface of the AFE chip. The first terminal of PD2 is connected to the PD0_N pin of the AFE chip, and the first terminal of PD2 is also connected to the collector of the N-type transistor D1. The emitter of the N-type transistor D1 is connected to the PD0_P pin of the AFE chip. The first terminal of PD1 is connected to the PD0_N pin of the AFE chip, and the second terminal is connected to the PD0_P pin of the AFE chip. The branch containing PD2 and the delay circuit is connected in parallel with the branch containing PD1 and then connected to the AFE chip through the PD0_N and PD0_P pins.

[0082] An RC filter consisting of resistor R1 and capacitor C is used to control the base voltage of an NPN transistor. The NPN transistor conducts when the base voltage exceeds a preset threshold, thereby delaying the first electrical signal. Furthermore, the delay circuit may also include diode D2 and a voltage-regulating resistor R2 for voltage regulation.

[0083] In practical applications, the resistance value of resistor R1 and the capacitance value of capacitor C can be determined according to the required delay time T. Thus, the RC filter can control the NPN transistor to conduct after time T in the delay circuit. Consequently, the electrical signal of PD2 enters the AFE chip after time T, and the AFE chip can obtain the electrical signals generated by PD1 and PD2 at different times simultaneously.

[0084] like Figure 11The following is an example of another delay circuit. This delay circuit includes a timer and a controllable switch. The timer can be any chip capable of performing a timer function, and the controllable switch can be a BJT or MOSFET. In this embodiment, a 555 timer chip and an NPN transistor are used as examples. The control terminal (base) of the NPN transistor is connected to the output terminal (pin 3) of the 555 chip. The first terminal (collector) of the NPN transistor is connected to the first PD (PD2), and the second terminal (emitter) of the NPN transistor is connected to the input terminal of the AFE chip. Further, this delay circuit also includes a resistor R, capacitors C1 and C2, and a diode D2. Specifically, pin 1 of the 555 chip is grounded, pins 2 and 6 are connected to the first terminal of capacitor C1, the cathode of diode D2, and the first terminal of resistor R. The second terminal of resistor R and the anode of diode are connected and grounded. Pins 2 and 6 of the 555 chip are used to determine whether the timer is on at a low or high level. Pin 3 is connected to the base of NPN transistor D1. The collector of NPN transistor D1 is connected to the second terminal of PD2, and the emitter is connected to the PD0_P pin of the AFE chip. Pins 4 and 8 are both connected to the GPIO pins of the AFE chip and the second terminal of capacitor C1. Pin 5 is connected to the first terminal of capacitor C2. The second terminal of capacitor C2 is connected to pin 1, the second terminal of resistor R, the positive terminal of diode D2, and grounded. The second terminal of PD2 is connected to the PD0_N pin of the AFE chip. The first terminal of PD1 is connected to the PD0_N pin of the AFE chip, and the negative terminal is connected to the PD0_P pin of the AFE chip. The branch containing PD2 and the delay circuit is connected in parallel with the branch containing PD1 and connected to the AFE chip through the PD0_N and PD0_P pins.

[0085] The 555 timer chip, used as a timer, is designed to delay a first electrical signal output to the base terminal of an NPN transistor by a preset time T compared to a second electrical signal. The delay time can be controlled by setting the timing period T within the 555 chip.

[0086] When the output voltage of pin 3 of the 555 timer chip is higher than the voltage across the base and emitter of NPN transistor D1, the transistor conducts, and the electrical signal of PD2 enters the AFE chip. Thus, the electrical signal of PD2 enters the AFE chip after passing through transistor T. The AFE chip can obtain the electrical signals generated by PD1 and PD2 at the same time at different times.

[0087] like Figure 12The following is an example of another delay circuit. This delay circuit includes a power management chip, which can be any chip that achieves the delay effect through a DC voltage, including signal input pins, signal output pins, and a power input pin. In this embodiment, the power management chip is an LTC6994 chip, which is connected in series with the first PD through its signal input and signal output pins. The delay circuit also includes a capacitor C, a resistor REST, and an external power supply Vcc. Specifically, the IN pin of the LTC6994 chip is connected to the first terminal of PD2, the second terminal of PD2 is connected to the PD0_N pin of the AFE chip, the GND pin of the LTC6994 chip is grounded, the SET pin is connected to the resistor REST, the DIV pin is grounded and connected to the first terminal of capacitor C, the second terminal of capacitor C is connected to the V+ pin and the external power supply Vcc, and the OUT pin is connected to the PD0_P pin of the AFE chip. The positive terminal of PD1 is connected to the PD0_N pin of the AFE chip, and the negative terminal is connected to the PD0_P pin of the AFE chip. The branch containing PD2 and the delay circuit is connected in parallel with the branch containing PD1 and is connected to the AFE chip through the PD0_N pin and PD0_P pin of the AFE chip.

[0088] The power management chip is used to generate a first electrical signal that is delayed by a preset time compared to the second electrical signal using a DC voltage. The IN pin of the LTC6994 chip can receive the input voltage of PD2, and then output it to the AFE chip after a preset time T, thus delaying the electrical signal of PD2. Therefore, the AFE chip can obtain the electrical signals generated by PD1 and PD2 at the same time at different times.

[0089] The above provides a brief overview of the architecture of PPG's signal processing method. The following section will combine... Figure 13 The specific steps of the PPG signal processing method in this embodiment are described.

[0090] S1302: The terminal acquires multiple electrical signals representing human health status through multiple PDs.

[0091] The electrical signal is obtained by the photoelectric conversion of the received optical signal by the PD. The optical signal refers to the light signal emitted by the LED and reflected by the human skin. Since the absorption of light by muscles, bones, veins, etc. in the human body remains basically constant when there is no large-scale movement, while the absorption of light by blood in the human body is variable due to its flow, the light signal reflected by the human skin can characterize the human health status.

[0092] In this system, multiple photodetectors (PDs) correspond one-to-one with multiple electrical signals. Each PD receives the light signal reflected from human skin and performs photoelectric conversion, transforming the light signal into an electrical signal to obtain the light signal corresponding to each PD. Because the PDs are located in different positions, each PD acquires a different light signal.

[0093] In some possible implementations, to maximize the area occupied by the smartwatch face, multiple digital display (PD) units can be arranged in an enclosing structure, such as... Figure 3 The arrangement shown ensures that the light signal can be received by at least one of the multiple PDs regardless of the angle at which the dial is in close contact with the human body. Furthermore, the multiple PDs can be closely distributed at multiple angles around the LED (the included angle between adjacent PDs is close to 0) to guarantee that the PDs can receive the light signal corresponding to any angle at which the dial is in close contact with the human body.

[0094] S1304: The terminal performs delay processing on the first electrical signal corresponding to the first PD through a delay circuit.

[0095] The first PD is one of multiple PDs, and the electrical signal corresponding to the first PD is the first electrical signal. The multiple PDs include the first PD and the second PD. The first PD can be a single PD, for example... Figure 9 In PD5, the first PD can also be multiple PDs, for example... Figure 7 PD5, PD6, PD7, and PD8 in the series. Figure 8 PD2 and PD3 in the middle.

[0096] The delay circuit can be any circuit that includes a delay circuit, such as the one shown in Figure 10, which includes resistors R1 and R2, capacitor C, diode D2, and transistor D1. Figure 11 The delay circuit shown includes a 555 timer chip, resistor R, capacitor C1, capacitor C2, diode D2, and N-type transistor D1. Figure 12 The circuit shown includes an LTC6994 chip, capacitor C, resistor REST, external power supply Vcc, and N-type transistor D1. The delay duration T of the delay circuit is greater than the LED's illumination duration and less than the sampling interval of the AFE chip.

[0097] S1306: The terminal selects the first electrical signal after delay processing and the second electrical signal corresponding to the second PD through the AFE chip to obtain the target signal.

[0098] The AFE chip is used to determine the target signal from signals input from multiple sensors. In this embodiment, the AFE chip is used to select the target signal from multiple electrical signals corresponding to multiple PDs. The first electrical signal is an electrical signal after being delayed by a delay circuit, and the second electrical signal is an electrical signal without delay processing. When the number of communication receiving units of the AFE chip is less than the number of PDs, by delaying the first electrical signal, the AFE chip can acquire simultaneously collected electrical signals at different times.

[0099] For example, when the AFE chip has 4 communication receiving units and 8 PDs, such as Figure 4 As shown, PD2, PD4, PD6 and PD8 are connected in parallel to PD1, PD3, PD5 and PD7 and the AFE chip through delay circuits, respectively.

[0100] Taking the four communication receiving units of the AFE chip as RX0, RX1, RX2, and RX3, with the LED illumination time from t0 to t1 and the delay circuit duration as T, RX0 receives the signal of PD1 from t0 to t1 and the signal of PD2 from (t0+T) to (t1+T). RX1 receives the signal of PD3 from t0 to t1 and the signal of PD4 from (t0+T) to (t1+T). RX2 receives the signal of PD5 from t0 to t1 and the signal of PD6 from (t0+T) to (t1+T). RX3 receives the signal of PD7 from t0 to t1 and the signal of PD8 from (t0+T) to (t1+T). Thus, the AFE chip can independently acquire eight PD signals.

[0101] The terminal can acquire the independent electrical signals collected by all PDs at the same time through the AFE chip. Furthermore, the terminal can evaluate the signal quality of multiple PD signals collected at the same time at different times based on the channel selection algorithm to obtain the target signal.

[0102] When evaluating the signal quality of electrical signals corresponding to multiple PDs using a channel selection algorithm, the terminal can assess the signal quality based on the signal amplitude, signal image, and signal frequency domain energy. For example, it can require that the DC signal amplitude be at the uA level, the AD signal amplitude be approximately 0.5% to 2% of the DC signal amplitude, the signal have no obvious amplitude fluctuations or glitches, and the signal frequency domain energy be concentrated between 0.5 and 4 Hz.

[0103] S1308: The terminal processes the target signal to obtain the user's health status.

[0104] A user's health status can include at least one of their heart rate, blood oxygenation, and respiratory status. The terminal can acquire the user's corresponding characteristics by converting light signals reflected from the user's skin into electrical signals. In some possible implementations, different wavelengths, intensities, and frequencies of light emitted by the LED correspond to different characteristics representing human health status. Furthermore, the LED can also emit light signals of different colors simultaneously to obtain multiple characteristics representing human health status at the same time.

[0105] In summary, this embodiment provides a PPG-based signal processing method. The terminal acquires multiple electrical signals, including human health data, through multiple photodetectors (PDs). Each electrical signal corresponds one-to-one with a PD. The electrical signals are obtained by the PDs from converted received optical signals. The optical signals are emitted by LEDs and reflected by human skin, representing light signals indicative of human health status. The terminal delays the first electrical signal corresponding to the first PD using a delay circuit. Thus, the terminal can use an AFE chip to select the delayed electrical signal corresponding to the first PD and the second electrical signal corresponding to the second PD to obtain a target signal characterizing human health status. This target signal is then analyzed and processed to obtain the user's health status. By delaying the electrical signal corresponding to the first PD, the terminal ensures that the electrical signals acquired by multiple PDs can be independently received by the AFE chip. This allows for selection based on the electrical signals acquired by each PD to obtain the target signal, achieving comprehensive extraction of the target signal and avoiding interference caused by signal superposition, thereby accurately assessing the user's health status.

[0106] For example, Figure 14 This is a schematic diagram of the hardware structure of a control device provided in an embodiment of this application, such as... Figure 14 As shown, the control device includes a processor 1401, a communication line 1404, and at least one communication interface. Figure 14 (The example described uses communication interface 1403 as an example).

[0107] The processor 1401 may be a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits used to control the execution of the program of the present application.

[0108] Communication line 1404 may include circuitry for transmitting information between the aforementioned components.

[0109] Communication interface 1403 uses any transceiver-like device for communicating with other devices or communication networks, such as Ethernet, wireless local area networks (WLAN), etc.

[0110] Possibly, the control device may also include a memory 1402.

[0111] The memory 1402 may be a read-only memory (ROM) or other type of static storage device capable of storing static information and instructions, random access memory (RAM) or other type of dynamic storage device capable of storing information and instructions, or electrically erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital versatile optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but not limited thereto. The memory may exist independently and be connected to the processor via communication line 1404. The memory may also be integrated with the processor.

[0112] The memory 1402 stores computer execution instructions for implementing the scheme of this application, and the processor 1401 controls the execution of these instructions. The processor 1401 executes the computer execution instructions stored in the memory 1402 to implement the control method provided in the embodiments of this application.

[0113] It is possible that the computer execution instructions in the embodiments of this application may also be referred to as application code, and the embodiments of this application do not specifically limit this.

[0114] In a specific implementation, as one embodiment, the processor 1401 may include one or more CPUs, for example... Figure 14 CPU0 and CPU1 in the CPU.

[0115] In a specific implementation, as one example, the control device may include multiple processors, for example... Figure 14Processors 1401 and 1405 are mentioned. Each of these processors can be a single-core (single-CPU) processor or a multi-core (multi-CPU) processor. A processor here can refer to one or more devices, circuits, and / or processing cores used to process data (such as computer program instructions).

[0116] In the above embodiments, the instructions stored in the memory for execution by the processor can be implemented in the form of a computer program product. This computer program product can be pre-written into the memory, or it can be downloaded and installed into the memory as software.

[0117] A computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the flow or function according to the embodiments of this application is generated. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can store or a data storage device such as a server or data center that integrates one or more available media. For example, available media may include magnetic media (e.g., floppy disks, hard disks, or magnetic tapes), optical media (e.g., digital versatile discs (DVDs)), or semiconductor media (e.g., solid-state disks (SSDs)).

[0118] This application also provides a computer-readable storage medium. The methods described in the above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any combination thereof. The computer-readable medium may include computer storage media and communication media, and may also include any medium capable of transferring a computer program from one place to another. The storage medium can be any target medium accessible by a computer.

[0119] As one possible design, computer-readable media may include compact disc read-only memory (CD-ROM), RAM, ROM, EEPROM, or other optical disc storage; computer-readable media may also include disk storage or other disk storage devices. Furthermore, any connecting cable may also be appropriately referred to as computer-readable media. For example, if software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave, then coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of media. As used herein, disks and optical discs include optical discs (CD), laser discs, optical discs, digital versatile discs (DVD), floppy disks, and Blu-ray discs, where disks typically reproduce data magnetically, while optical discs optically reproduce data using lasers.

[0120] The above combinations should also be included within the scope of computer-readable media. The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A photoplethysmography, PPG, based terminal, characterized in that, The terminal includes light-emitting diodes (LEDs), an analog front-end (AFE) chip, a processor, and multiple photodiodes (PDs). The multiple PDs include a first PD and a second PD. The first PD and the second PD are connected in parallel to the AFE chip, and the AFE chip is connected to the processor. The number of the multiple PDs is greater than the number of electrical signals that the AFE chip can simultaneously receive. The LED is used to emit a first light signal onto the user's skin; The first PD is used to receive a second light signal reflected by the user's skin and convert the second light signal into a first electrical signal; the second light signal is obtained by reflecting the first light signal through the skin. The second PD is used to receive the second light signal reflected by the user's skin and convert the second light signal into a second electrical signal; The terminal further includes a delay circuit, which is connected in series in the branch where the first PD is located; The delay circuit is used to delay the first electrical signal; the delay duration of the delay circuit is greater than the lighting duration of the LED and less than the sampling interval of the AFE chip. The AFE chip is used to determine the target signal based on the second electrical signal and the first electrical signal after the delay processing; The processor is used to process the target signal to obtain the user's health status; When the delay circuit includes an RC filter and a controllable switch, the RC filter includes a resistor and a capacitor; The control terminal of the controllable switch is connected to the first terminal of the resistor and the first terminal of the capacitor. The first terminal of the controllable switch is connected to the first PD. The second terminal of the controllable switch is connected to the input terminal of the AFE chip. The second terminal of the resistor is connected to the general interface of the AFE chip. The second terminal of the capacitor is grounded. The RC filter is used to control the voltage at the controllable switch terminal; The controllable switch is used to turn on when the voltage at the control terminal is higher than a preset threshold, so as to realize the delay processing of the first electrical signal; When the delay circuit includes a timer and a controllable switching transistor; The control terminal of the controllable switch is connected to the output terminal of the timer, the first terminal of the controllable switch is connected to the first PD, and the second terminal of the controllable switch is connected to the input terminal of the AFE chip. The timer is used to delay the first electrical signal output to the control terminal of the controllable switch by a preset time compared to the second electrical signal. When the delay circuit includes a power management chip; the power management chip includes a signal input pin, a signal output pin, and a power input pin, the power input pin being used to connect to a DC voltage, and the power management chip being connected in series with the first PD through the signal input pin and the signal output pin; The power management chip is used to generate a first electrical signal that is delayed by a preset time compared to the second electrical signal using the DC voltage.

2. The terminal according to claim 1, characterized by The plurality of PDs are eight PDs, the first electrical signal is four electrical signals generated by four of the eight PDs, and the AFE chip has four signal receiving channels.

3. The terminal according to claim 1, characterized in that, The plurality of PDs consists of 12 PDs. The first PD includes 4 first sub-PDs and 4 second sub-PDs. The AFE chip has 4 signal receiving channels. The first sub-PDs and the second sub-PDs are connected in parallel to the AFE chip. The first sub-PD is used to receive the second light signal reflected by the user's skin and convert the second light signal into a first sub-electrical signal; The second sub-PD is used to receive the second light signal reflected by the user's skin and convert the second light signal into a second sub-electrical signal; The delay circuit includes a first delay circuit and a second delay circuit. The delay durations of the first delay circuit and the second delay circuit are different. The first delay circuit is connected in series in the branch where the first sub-PD is located, and the second delay circuit is connected in series in the branch where the second sub-PD is located. The first delay circuit is used to delay the first sub-electrical signal; The second delay circuit is used to delay the second sub-signal.

4. The terminal according to any one of claims 1 to 3, characterized by The multiple PDs are distributed in a ring.

5. The terminal according to any one of claims 1 to 3, characterized in that, The user's health status includes at least one of the user's heart rate, blood oxygen saturation, and respiratory rate.

6. The terminal according to any one of claims 1 to 3, characterized by The terminal is a wearable device.

7. The terminal according to any one of claims 1 to 3, characterized by The first optical signal is at least one of red light signal, green light signal and infrared light signal.

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