Tem sample preparation method and tem sample

Abstract

The application discloses a TEM sample preparation method and a TEM sample. The method comprises the following steps: obtaining a wafer to be detected; arranging a protective layer on the surface of the wafer, wherein the protective layer comprises an organic resin layer with a first preset thickness; and cutting a wafer part comprising the protective layer by using an ion beam of a FIB machine to obtain a target TEM sample. In the application, the surface structure of the wafer can be protected when the ion beam of the FIB machine is used for cutting by arranging a protective layer on the surface of the wafer, so that the surface structure of the TEM sample is prevented from being deformed, and the detection result of the TEM sample is prevented from being affected.

Description

Technical Field

[0001] This invention relates to the field of semiconductor fabrication technology, and in particular to a method for preparing a TEM sample and a TEM sample. Background Technology

[0002] With the development of semiconductor microfabrication technology, various high-precision inspection equipment is needed to inspect defects in semiconductor devices. Among them, transmission electron microscopy (TEM) is increasingly used to observe morphological defects in semiconductor devices and then perform failure analysis. The working principle of TEM is to first thin the sample to be tested to about 100 nm using methods such as cutting, mechanical grinding, and ion thinning, then place it in the TEM sample chamber, irradiate the sample with a high-voltage electron beam, collect the transmitted electron signals, magnify the images, and project them onto a fluorescent screen for imaging and analysis. Therefore, sample preparation is a crucial step in TEM analysis.

[0003] A focused ion beam (FIB) instrument can prepare micro-region TEM samples. The process involves placing the pre-treated sample horizontally on a sample stage, cutting and etching the sample, and then using a focused ion beam formed by a liquid metal ion source (Ga-gallium ions) to bombard the target area to thin it, ultimately preparing a TEM sample.

[0004] When preparing TEM samples of semiconductor materials with high aspect ratio structures, if the area to be analyzed is close to the surface of the TEM sample, the strong irradiation of the high-energy ion beam output by the FIB machine during the sample cutting process will cause thermal damage to the sample surface. In particular, for TEM samples with photoresist remaining on the surface, severe thermal damage can deform the surface structure of the sample and cause the photoresist to soften, which in turn affects the detection results of the TEM sample.

[0005] The above content is only used to help understand the technical solution of the present invention and does not represent an admission that the above content is prior art. Summary of the Invention

[0006] The main objective of this invention is to provide a method for preparing TEM samples and a TEM sample, aiming to solve the technical problem of thermal damage to the surface structure of samples in the prior art.

[0007] To address the aforementioned technical problems, this invention provides a method for preparing TEM samples, the method comprising:

[0008] Obtain the wafer to be inspected;

[0009] A protective layer is provided on the surface of the wafer, the protective layer including an organic resin layer of a first predetermined thickness;

[0010] The wafer portion including the protective layer is cut using an FIB machine with an ion beam to obtain the target TEM sample.

[0011] Optionally, the step of forming a protective layer on the wafer surface includes:

[0012] Positioning was performed on the wafer using an optical microscope;

[0013] Select the target area based on the positioning results;

[0014] A protective layer is applied to the surface of the target area.

[0015] Optionally, the step of setting a protective layer on the surface of the target area includes:

[0016] A metal layer is disposed on the surface of the target area;

[0017] A protective layer is formed by coating the surface of the metal layer with an epoxy phenolic resin layer of a first predetermined thickness.

[0018] Optionally, the step of setting a metal layer on the surface of the target area includes:

[0019] A metal layer of second-preset thickness platinum is deposited on the surface of the target area using an ion sputtering apparatus to form a metal layer.

[0020] Optionally, before the step of forming a protective layer on the wafer surface, the method further includes:

[0021] Obtain the current operating parameters of the FIB machine;

[0022] The first preset thickness of the organic resin layer is determined based on the current operating parameters.

[0023] Optionally, the step of using an FIB machine to cut the wafer portion including the protective layer to obtain the target TEM sample includes:

[0024] The target operating parameters of the FIB machine are determined based on the first preset thickness of the epoxy phenolic resin layer in the protective layer.

[0025] Based on the target operating parameters, the machine is controlled to cut the wafer portion including the protective layer using an ion beam to obtain the target TEM sample.

[0026] Furthermore, to achieve the above objectives, the present invention also provides a TEM sample, the TEM sample comprising:

[0027] wafers;

[0028] The wafer surface is provided with a protective layer, which includes an organic resin layer of a first preset thickness.

[0029] Optionally, the protective layer is located within a target area on the wafer.

[0030] Optionally, the protective layer includes: an organic resin layer of a first preset thickness and a metal layer of a second preset thickness;

[0031] The metal layer is disposed within the target area;

[0032] The organic resin layer is disposed on the metal layer.

[0033] Optionally, the metal layer material is platinum.

[0034] The organic resin layer is made of epoxy phenolic resin.

[0035] This invention discloses a method for preparing TEM samples and a TEM sample. The method involves acquiring a wafer to be tested; depositing a protective layer on the surface of the wafer, the protective layer comprising an organic resin layer of a first predetermined thickness; and using an ion beam cutter on a FIB (Fiber Optic Injection) machine to cut the wafer portion including the protective layer, thereby obtaining the target TEM sample. In this invention, by depositing a protective layer on the surface of the wafer, the surface structure of the wafer can be protected during ion beam cutting using an FIB machine, thus preventing deformation of the TEM sample's surface structure and avoiding any impact on the TEM sample's detection results. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0037] Figure 1 This is a schematic flowchart of the first embodiment of the TEM sample preparation method proposed in this invention;

[0038] Figure 2 This is a top view of the first structure of the TEM sample proposed in this invention;

[0039] Figure 3 This is a front view of the first structure of the TEM sample proposed in this invention;

[0040] Figure 4 This is a schematic flowchart of the second embodiment of the TEM sample preparation method proposed in this invention;

[0041] Figure 5This is a schematic diagram of the wafer structure in the TEM sample proposed in this invention;

[0042] Figure 6 This is a top view of the second structure of the TEM sample proposed in this invention;

[0043] Figure 7 This is a front view of the second structure of the TEM sample proposed in this invention;

[0044] Figure 8 This is an observation image of the TEM sample proposed in this invention within the TEM.

[0045] Figure 9 This is a schematic diagram of the first process of the third embodiment of the TEM sample preparation method proposed in this invention;

[0046] Figure 10 This is a schematic diagram of the second process of the third embodiment of the TEM sample preparation method proposed in this invention.

[0047] Explanation of icon numbers

[0048] label name label name 10 wafer 20 protective layer 21 Organic resin layer 22 Metal layer

[0049] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0050] It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0051] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0052] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indication will also change accordingly.

[0053] Furthermore, the use of terms such as "first" and "second" in this invention is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. Additionally, the technical solutions of the various embodiments can be combined with each other, but only on the basis of being achievable by those skilled in the art. When the combination of technical solutions is contradictory or impossible to implement, the user should consider such a combination of technical solutions to be non-existent and not within the scope of protection claimed by this invention.

[0054] Reference Figure 1 , Figure 1 This is a schematic flowchart of the first embodiment of the TEM sample preparation method of the present invention. Based on Figure 1 The present invention presents a first embodiment of a TEM sample preparation method.

[0055] In this embodiment, the TEM sample preparation method includes:

[0056] Step S10: Obtain the wafer to be inspected.

[0057] It should be understood that a wafer refers to a silicon wafer used to fabricate silicon semiconductor circuits. Semiconductor devices are typically mounted on wafers; in this embodiment, the wafer can serve as a semiconductor device for testing.

[0058] Understandably, when inspecting semiconductor devices for defects, a certain number of semiconductor device samples are needed. These samples can be directly selected from semiconductor wafers as the samples to be inspected. Therefore, when fabricating TEM samples, the wafer to be inspected can be directly obtained as the semiconductor structure to be inspected. This wafer can be a wafer including a photoresist layer, or a wafer that includes other materials that are easily deformed by heat.

[0059] Step S20: A protective layer is formed on the surface of the wafer, the protective layer comprising an organic resin layer of a first preset thickness.

[0060] It should be understood that the TEM sample fabrication process requires steps such as cutting, etching, and thinning of the complete wafer structure to obtain samples of appropriate size. During the cutting process, the heat generated by the high-energy ion beam output from the FIB machine can easily damage the wafer surface. For example, if the wafer surface has a photoresist layer, the heat injection from the ion beam will soften the photoresist, making the photoresist layer prone to structural deformation. In this case, it is impossible to determine whether the change in the photoresist layer is due to sample defects or heat generated during the cutting process, and therefore it is impossible to determine whether the wafer surface has undergone defect deformation.

[0061] Reference Figure 2 and Figure 3To address the aforementioned issues, this solution involves applying a protective layer to the surface of the wafer. This protective layer safeguards the wafer surface structure during the wafer dicing process, preventing damage from high-energy ion beams.

[0062] In this embodiment, the protective layer can be a heat-insulating structure or a heat-absorbing structure. The heat generated by the high-energy ion beam can be isolated or absorbed by each protective layer. The protective layer can include an organic resin layer of a preset thickness. The organic resin layer absorbs the heat in the high-energy ion beam, thereby preventing the high-energy ion beam from damaging the wafer surface.

[0063] The thickness of the organic resin layer can be related to the heat generated by the high-energy ion beam during the cutting process. The more heat generated by the high-energy ion beam, the thicker the corresponding organic resin layer should be.

[0064] Step S30: Use an FIB machine to cut out the wafer portion including the protective layer using an ion beam to obtain the target TEM sample.

[0065] It should be understood that after the protective layer is applied, the high-energy ion beam emitted from the FIB machine will not damage the wafer surface structure. At this point, the high-energy ion beam output from the FIB machine can be used directly to cut the wafer portion with the protective layer, thereby obtaining a complete target TEM sample. The target TEM sample is a TEM sample whose surface structure is not damaged.

[0066] After the sample is prepared, the target TEM sample can be placed in a TEM for morphology inspection to determine whether there are defects in the semiconductor device corresponding to the target TEM sample.

[0067] This embodiment provides a method for preparing a TEM sample. The method involves acquiring a wafer to be tested; depositing a protective layer on the wafer surface, the protective layer comprising an organic resin layer of a first predetermined thickness; and using an ion beam cutter on a FIB (Fiber Optic Injection) machine to cut the wafer portion including the protective layer, thereby obtaining the target TEM sample. In this embodiment, by depositing an organic resin layer as a protective layer on the wafer surface, the surface structure of the wafer can be protected during ion beam cutting using the FIB machine, thus preventing deformation of the TEM sample surface structure and avoiding any impact on the TEM sample detection results.

[0068] Reference Figure 4 , Figure 4 This is a schematic flowchart of a second embodiment of the TEM sample preparation method of the present invention.

[0069] Based on the first embodiment of the TEM sample preparation method described above, a second embodiment of the TEM sample preparation method of the present invention is proposed.

[0070] In this embodiment, step S20 includes:

[0071] Step S201: Position the wafer using an optical microscope.

[0072] Step S202: Select the target area based on the positioning results.

[0073] It should be understood that a wafer is typically a large silicon wafer, such as 8 inches or 12 inches. When inspecting for defects in semiconductor devices, the entire wafer cannot be placed in a TEM for inspection. The wafer is usually cut into appropriately sized samples for testing. Therefore, when applying a protective layer to the wafer, it is not necessary to apply a protective layer to the entire surface of the wafer; only the sample area to be inspected needs to be protected, thus avoiding waste of resources.

[0074] Therefore, when setting the protective layer, it is necessary to locate and select a specific target area on the wafer for defect detection of semiconductor devices. This target area represents the optimal region for detecting defects in the semiconductor device. For example, in... Figure 5 The central region of the wafer is selected as the target region. Samples made using the central region can more accurately represent the defects of semiconductor devices.

[0075] In this embodiment, the wafer surface can be roughly observed using an optical microscope to locate the position that best reflects the current defect state of the wafer. Then, based on the location obtained from the positioning result as the center point, a target area is selected according to the size of the sample. The size of this target area should be the same as or larger than the size of the final sample to ensure that the size of the sample obtained after cutting can meet the observation requirements.

[0076] Step S203: Set a protective layer on the surface of the target area.

[0077] It is understandable that after determining the target area, an organic resin layer of a first preset thickness can be applied to the target area to complete the setting of the protective layer.

[0078] Specifically, step 203 includes:

[0079] Step S2031: A metal layer is formed on the surface of the target area.

[0080] Understandably, referring to Figure 8When an organic resin layer is directly deposited on the wafer surface as a protective layer, the composition of this organic resin layer is similar to that of the semiconductor device. For example, if a photoresist layer exists on the wafer surface, and both the organic resin layer and the photoresist layer are composed of lipid materials, during TEM observation, the photoresist layer and the organic resin layer may not be accurately distinguished, making it impossible to accurately determine whether there are defects on the surface of the semiconductor device. For example, if the photoresist layer and the organic resin layer are adhered, it is impossible to accurately distinguish between the photoresist layer and the organic resin layer during TEM. If a defect is observed, it is impossible to determine whether the defect is due to a defect in the photoresist itself or a defect in the organic resin layer caused by a high-energy ion beam during the dicing process.

[0081] To solve the above problems, refer to Figure 6 and Figure 7 In this embodiment, a metal layer can be first set in the target area. Since the composition of the metal layer is much different from that of the organic resin layer, the metal layer and the organic resin layer can be accurately distinguished in the TEM, thereby separating the organic resin layer from the semiconductor device.

[0082] The thickness of the metal layer needs to create a complete separating region during TEM observation to ensure effective differentiation between the organic resin layer and the semiconductor device. For example, if the metal layer is only 1 nm thick, only a thin shadow can be observed in the TEM, making the differentiation between the semiconductor device and the organic resin layer ineffective. The thickness of the metal layer can be 20–30 nm. The metal layer can be made of platinum, or other materials can be used, as long as it creates a significant observational difference with the organic resin layer.

[0083] During the preparation of the metal layer, an ion sputtering apparatus can be used to deposit a layer of platinum of a second predetermined thickness in the target area to form a metal layer. The deposition time of this metal layer is 60-90 s, and the deposition current is 15-30 mA, thereby forming a metal layer with a thickness of 20-30 nm in the target area.

[0084] Step S2032: Coat the surface of the metal layer with an epoxy phenolic resin layer of a first preset thickness to form a protective layer.

[0085] It is understandable that an organic resin layer can be deposited on the surface of the metal layer after the metal layer is deposited. This organic resin layer can be an epoxy phenolic resin layer with adhesive properties, which can better adhere to the metal layer.

[0086] In specific settings, the thickness of the epoxy phenolic resin layer can be determined first, and then an epoxy phenolic resin layer can be formed on the surface of the metal layer by coating.

[0087] In this embodiment, by positioning and selecting the target area on the wafer, resource waste can be avoided. Furthermore, by setting a metal layer, the organic resin layer can be separated from the semiconductor device, thereby allowing for more accurate observation of whether there are defects in the semiconductor device.

[0088] Based on the first or second embodiment of the TEM sample preparation method described above, a third embodiment of the TEM sample preparation method of the present invention is proposed.

[0089] Reference Figure 9 In this embodiment, the method further includes the following steps before step S20:

[0090] Step S21: Obtain the current operating parameters of the FIB machine.

[0091] Step S22: Determine the first preset thickness of the organic resin layer based on the current working parameters.

[0092] It should be understood that the initial preset thickness of the organic resin layer is related to the heat generated by the high-energy ion beam during the cutting process, and the power of the FIB machine is closely related to the heat generated by the high-energy ion beam. Therefore, before setting the organic resin layer, the required thickness of the organic resin layer to be consumed during sample cutting can be determined based on the current operating parameters of the FIB machine, and then the thickness of the coated organic resin layer can be determined according to the required thickness. For example, if the operating parameters of the FIB machine are set to 30kV and 40pA, the organic resin layer loss after sample preparation on the FIB machine is approximately 20nm. Under these operating parameters, the initial preset thickness of the organic resin layer should be greater than 20nm. The current operating parameters include operating voltage, power, and current.

[0093] Therefore, when the operating parameters of the FIB machine are relatively constant, the operating parameters of the FIB machine in its working state can be determined first. Then, the thickness of the organic resin layer to be set can be determined based on the high-energy ion beam generated under the current operating parameters. Finally, an organic resin layer of the corresponding thickness can be set on the wafer.

[0094] In addition, refer to Figure 10 In this embodiment, step S30 includes:

[0095] Step S301: Determine the target operating parameters of the FIB machine based on the first preset thickness of the epoxy phenolic resin layer in the protective layer.

[0096] Understandably, the initial preset thickness of the organic resin layer is related to the operating parameters of the FIB machine. Therefore, after setting a certain thickness of the epoxy phenolic resin layer, the operating parameters of the FIB machine can be adjusted according to the thickness of the epoxy phenolic resin layer, so that the heat generated by the FIB machine when outputting the high-energy ion beam will not completely consume the epoxy phenolic resin layer. For example, when the initial preset thickness of the epoxy phenolic resin layer in the protective layer is 30 nm, the operating parameters of the FIB machine can be set to 30 kV and 40 pA. During the FIB machine cutting process, approximately 20 nm of the epoxy phenolic resin layer will be consumed.

[0097] During the sample cutting process, the maximum value of the working parameters that the FIB machine can use can be determined based on the first preset thickness of the epoxy phenolic resin layer in the protective layer. Then, the working parameters of the FIB machine can be set to be less than the maximum value of the working parameters.

[0098] Step S302: Based on the target operating parameters, control the machine to cut out the wafer portion including the protective layer using an ion beam to obtain the target TEM sample.

[0099] The target operating parameters are those that prevent the FIB machine from completely consuming the epoxy phenolic resin layer during the cutting process. When the FIB machine cuts the target area under these target operating parameters, it can not only successfully complete the sample cutting but also avoid causing any damage to the sample surface.

[0100] Reference Figure 2 and Figure 3 To achieve the above objectives, the present invention also proposes a TEM sample, wherein the TEM sample comprises a wafer 10;

[0101] The wafer surface is provided with a protective layer 20, which includes an organic resin layer 21 of a first preset thickness.

[0102] It should be understood that semiconductor devices are typically disposed on wafer 10, and wafer 10 in this embodiment can be used as a semiconductor device for detection.

[0103] Understandably, when inspecting semiconductor devices for defects, a certain number of semiconductor device samples are needed. These samples can be directly selected from semiconductor wafers as the samples to be inspected. Therefore, when preparing TEM samples, the wafer 10 to be inspected can be directly obtained as the semiconductor structure to be inspected. This wafer 10 can be a wafer including a photoresist layer, or a wafer that is easily deformed by heat.

[0104] In the TEM sample fabrication process, the complete wafer structure needs to be cut, etched, and thinned to obtain samples of appropriate size. During the cutting process, the heat generated by the high-energy ion beam output from the FIB machine can easily damage the wafer surface. For example, if the wafer surface has a photoresist layer, the heat injection from the ion beam will soften the photoresist, making the photoresist layer prone to structural deformation. At this time, it is impossible to determine whether the change in the photoresist layer is due to sample defects or due to the heat during the cutting process, and therefore it is impossible to determine whether the wafer surface has undergone defect deformation.

[0105] Reference Figure 2 and Figure 3 To address the aforementioned issues, this solution involves applying a protective layer to the surface of the wafer. This protective layer safeguards the wafer surface structure during the wafer dicing process, preventing damage from high-energy ion beams.

[0106] In this embodiment, the protective layer 20 can be a heat insulation structure or a heat absorption structure. The heat generated by the high-energy ion beam can be isolated or absorbed by the protective layer 20. The protective layer 20 can include an organic resin layer 21 of a preset thickness. The organic resin layer absorbs the heat in the high-energy ion beam, thereby preventing the high-energy ion beam from damaging the wafer surface.

[0107] The thickness of the organic resin layer 21 can be related to the heat generated by the high-energy ion beam during the cutting process. The more heat generated by the high-energy ion beam, the thicker the corresponding organic resin layer 21 should be.

[0108] After the protective layer 20 is applied, the high-energy ion beam emitted from the FIB machine will not damage the surface structure of the wafer 10. At this point, the high-energy ion beam output from the FIB machine can be used to cut the portion of the wafer 10 with the protective layer 20, thereby obtaining a complete target TEM sample. The target TEM sample is a TEM sample whose surface structure is not damaged.

[0109] After the sample is prepared, the target TEM sample can be placed in a TEM for morphology inspection to determine whether there are defects in the semiconductor device corresponding to the target TEM sample.

[0110] This embodiment provides a TEM sample. By setting a protective layer 20 on the surface of the wafer 10, the surface structure of the wafer can be protected during ion beam cutting using a FIB machine, thereby avoiding deformation of the surface structure of the TEM sample and affecting the detection results of the TEM sample.

[0111] Furthermore, the protective layer is located within a target area on the wafer 10.

[0112] It should be understood that when detecting defects in semiconductor devices, the entire wafer 10 cannot be placed into a TEM for inspection. Typically, the wafer 10 is diced to obtain samples of suitable size for inspection. Therefore, when setting the protective layer 20 on the wafer 10, it is not necessary to apply the protective layer 20 to the entire surface of the wafer 10; only the surface of the sample area to be inspected needs to be covered with the protective layer 20, thus avoiding waste of resources.

[0113] Therefore, when setting the protective layer 20, it is necessary to locate and select a specific target area on the wafer 10 for defect detection of the semiconductor device. This target area is the optimal area for detecting defects in the semiconductor device. For example, in... Figure 5 The central region of wafer 10 is selected as the target region. Samples made using the central region can more accurately represent the defects of semiconductor devices.

[0114] In this embodiment, the surface of wafer 10 can be roughly observed using an optical microscope to locate the position that best reflects the current defect state of wafer 10. Then, based on the location in the positioning result as the center point, a target area is selected according to the size of the sample. The size of this target area should be the same as or larger than the size of the final sample to ensure that the size of the sample obtained after cutting can meet the observation requirements.

[0115] The protective layer 20 includes: an organic resin layer 21 of a first preset thickness and a metal layer 22 of a second preset thickness;

[0116] The metal layer 22 is disposed within the target area;

[0117] The organic resin layer 21 is disposed on the metal layer 22.

[0118] The metal layer 22 is made of platinum.

[0119] The organic resin layer 21 is made of epoxy phenolic resin.

[0120] Understandably, referring to Figure 8When an organic resin layer 21 is directly deposited on the surface of wafer 10 as a protective layer 20, the composition of the organic resin layer 21 is similar to that of the semiconductor device. For example, if a photoresist layer exists on the surface of wafer 10, and both the organic resin layer 21 and the photoresist layer are composed of lipid materials, during TEM observation, the photoresist layer and the organic resin layer 21 may not be accurately distinguished, making it impossible to accurately determine whether there are defects on the surface of the semiconductor device. For example, if the photoresist layer and the organic resin layer 21 are adhered, it is impossible to accurately distinguish between the photoresist layer and the organic resin layer 21 during TEM. If a defect is observed, it is impossible to determine whether the defect is due to a defect in the photoresist itself or a defect in the organic resin layer 21 caused by a high-energy ion beam during the dicing process.

[0121] To solve the above problems, refer to Figure 6 and Figure 7 In this embodiment, a metal layer 22 can be first set in the target area. Since the composition of the metal layer 22 is significantly different from that of the organic resin layer 21, the metal layer 22 and the organic resin layer 21 can be accurately distinguished in the TEM, thereby separating the organic resin layer 21 from the semiconductor device.

[0122] The thickness of the metal layer 22 needs to form a complete separating region during TEM observation to avoid the metal layer 22 being ineffective in distinguishing the organic resin layer 21 from the semiconductor device. For example, if the thickness of the metal layer 22 is only 1 nm, only a very thin shadow can be observed in the TEM, and the effect of distinguishing the semiconductor device from the organic resin layer 21 is not obvious. The thickness of the metal layer 22 can be 20–30 nm. The metal layer 22 can be made of platinum, or other materials can be used, as long as it creates a large observational difference with the organic resin layer 21.

[0123] During the preparation of metal layer 22, a layer of platinum of a second predetermined thickness can be deposited in the target area using an ion sputtering apparatus to form metal layer 22. The deposition time of metal layer 22 is 60-90s, and the deposition current is 15-30mA, thereby forming a metal layer 22 with a thickness of 20-30nm in the target area.

[0124] It is understandable that after the metal layer 22 is deposited, an organic resin layer 21 can be formed on the surface of the metal layer 22. This organic resin layer 21 can be an epoxy phenolic resin layer with adhesive properties, which can better adhere to the metal layer 22.

[0125] In specific settings, the thickness of the epoxy phenolic resin layer can be determined first, and then an epoxy phenolic resin layer can be formed on the surface of the metal layer by coating.

[0126] In this embodiment, by positioning and selecting the target area on the wafer, resource waste can be avoided. Furthermore, by setting a metal layer, the organic resin layer can be separated from the semiconductor device, thereby allowing for more accurate observation of whether there are defects in the semiconductor device.

[0127] The above are merely preferred embodiments of the present invention and do not limit the scope of the patent. Any equivalent structural or procedural transformations made based on the description and drawings of the present invention, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of the present invention.

[0128] It is worth noting that software programs will inevitably be used in the actual application of this invention. However, the applicant hereby declares that the software programs used in the specific implementation of this technical solution are all prior art. This application does not involve the modification or protection of software programs, but only the protection of the hardware architecture designed to achieve the purpose of the invention.

Claims

1. A method for preparing a TEM sample, characterized in that, The TEM sample preparation method includes: Obtain a wafer to be inspected; the surface of the wafer includes a photoresist layer; Before dicing the wafer, a protective layer is formed on the surface of the wafer, the protective layer comprising an organic resin layer of a first predetermined thickness; The wafer portion including the protective layer was cut using an FIB machine with an ion beam to obtain the target TEM sample; The step of forming a protective layer on the wafer surface includes: Positioning was performed on the wafer using an optical microscope; The target area is selected based on the positioning results; the position of the positioning results reflects the current defect state of the wafer. A protective layer is provided on the surface of the target area; The step of setting a protective layer on the surface of the target area includes: A metal layer is disposed on the surface of the target area; the metal layer is used to separate the organic resin layer from the wafer to be inspected; An organic resin layer of a first predetermined thickness is coated on the surface of the metal layer to form a protective layer.

2. The TEM sample preparation method according to claim 1, characterized in that, The step of setting a metal layer on the surface of the target area includes: A metal layer of second-preset thickness platinum is deposited on the surface of the target area using an ion sputtering apparatus.

3. The TEM sample preparation method as described in claim 1, characterized in that, Before the step of forming a protective layer on the wafer surface, the method further includes: Obtain the current operating parameters of the FIB machine; The first preset thickness of the organic resin layer is determined based on the current operating parameters.

4. The TEM sample preparation method according to claim 1, characterized in that, The step of using an FIB machine to cut the wafer portion including the protective layer with an ion beam to obtain the target TEM sample includes: The target operating parameters of the FIB machine are determined based on the first preset thickness of the epoxy phenolic resin layer in the protective layer. Based on the target operating parameters, the machine is controlled to cut the wafer portion including the protective layer using an ion beam to obtain the target TEM sample.

5. A TEM sample, characterized in that, The TEM sample is prepared by the TEM sample preparation method according to any one of claims 1 to 4, and the TEM sample comprises: Wafer; the surface of the wafer is provided with a photoresist layer; The wafer surface is provided with a protective layer, the protective layer including an organic resin layer of a first preset thickness; The protective layer is located within a target area on the wafer; The protective layer includes: an organic resin layer of a first preset thickness and a metal layer of a second preset thickness; The metal layer is disposed within the target area; The organic resin layer is disposed on the metal layer; the metal layer is used to separate the organic resin layer from the wafer to be tested.

6. The TEM sample as described in claim 5, characterized in that, The metal layer material is platinum. The organic resin layer is made of epoxy phenolic resin.

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