Data processing method applied to SOC chip

Abstract

A data processing method applied to an SOC chip, comprising: receiving original data; using a hardware data processing module to perform hardware processing on the original data, including: performing preprocessing on the original data to obtain first processed data, the preprocessing being used to add interaction identification information to the original data, the interaction identification information including hardware processing authentication information and hardware processing information; identifying the interaction identification information and determining whether the hardware processing authentication information is valid; in the case where the hardware processing authentication information is valid, performing hardware data processing on the first processed data according to the hardware processing information to obtain second processed data as output data of the hardware data processing module; in the case where the hardware processing authentication information is invalid, taking the first processed data as the output data of the hardware data processing module; and performing data reprocessing on the output data. The application reduces the probability of tampering of the original data and improves the flexibility and security of data processing.

Description

Technical Field

[0001] This invention relates to the field of semiconductor integrated circuits, and more particularly to a data processing method applied to SOC chips. Background Technology

[0002] The Internet of Things (IoT) is a network that connects all ordinary physical objects that can be independently addressed, based on information carriers such as the internet and traditional telecommunications networks. In the IoT era, the number of connections between people, between people and things, and between things is growing explosively. To accommodate this explosive growth in data volume, the number of IoT devices must be continuously increased. However, with the rapid development of the IoT, the number of devices is rising sharply, the demand for services is constantly increasing, and the number of cyberattacks is also growing. Against this backdrop, the data processing capabilities and security performance of IoT devices have become increasingly important concerns.

[0003] In current IoT terminal node devices, the core is "SOC (System on Chip) chip + sensor". As the core of IoT terminal node devices, the SOC chip's data processing capabilities and security performance fundamentally determine the data processing capabilities and security performance of IoT devices. Summary of the Invention

[0004] The problem solved by the embodiments of the present invention is to provide a data processing method for SOC chips, thereby improving the compatibility of data processing.

[0005] To address the aforementioned problems, this invention provides a data processing method applied to a SOC chip, comprising: receiving raw data; performing hardware processing on the raw data using a hardware data processing module, the hardware data processing including: preprocessing the raw data to obtain first processed data, the preprocessing being used to add interactive identification information to the raw data, the interactive identification information including hardware processing authentication information and hardware processing information; identifying the interactive identification information and determining whether the hardware processing authentication information is valid; if the hardware processing authentication information is valid, performing hardware data processing on the first processed data according to the hardware processing information to obtain second processed data, the second processed data being used as output data of the hardware data processing module; if the hardware processing authentication information is invalid, using the first processed data as output data of the hardware data processing module; performing data reprocessing on the output data, the data reprocessing including: forwarding the output data to a data output port and outputting the output data through the data output port; or, the data reprocessing including: forwarding the output data to a processor for business processing to obtain third processed data; and outputting the third processed data through the data output port.

[0006] Compared with the prior art, the technical solution of the embodiments of the present invention has the following advantages:

[0007] In the data processing method for SOC chips provided in this invention, a hardware data processing module is used to process the raw data. This bypasses the processor by directly forwarding the output data of the hardware data processing module to the data output port, preventing data leakage or tampering after passing through the processor. Furthermore, compared to traditional SOC chip data processing methods that use a single transmission path to process the raw data (i.e., transmitting the raw data to the processor for processing), this solution preprocesses the raw data by adding interactive identification information and then determines whether the raw data requires hardware data processing by identifying the hardware processing authentication information within the interactive identification information. In the case of efficiency, hardware data processing is performed first. After hardware data processing, depending on the actual data requirements, the output can be directly output through the data output port, or the output data can be forwarded to the processor for business processing to obtain the third-processed data, and then the third-processed data can be output through the data output port. This can improve the limitations of traditional SOC chips that directly transmit raw data to the processor for data processing, and reduce the probability of raw data being tampered with, thereby improving the flexibility and security of data processing. Moreover, by using the hardware data processing module to perform hardware processing on the raw data, the data processing speed is improved, and the data processing latency is reduced, thereby meeting more data processing needs and improving the compatibility of data processing. Attached Figure Description

[0008] Figure 1 This is a schematic diagram of the structure of a SOC chip;

[0009] Figure 2 This is a schematic diagram of the composition structure of an embodiment of the SOC chip in the data processing method of the present invention applied to the SOC chip;

[0010] Figure 3 This is a schematic diagram of the transmission path of an embodiment of the data processing method of the present invention applied to a SOC chip;

[0011] Figure 4 This is a flowchart illustrating an embodiment of the data processing method of the present invention applied to a SOC chip;

[0012] Figure 5 This is a schematic diagram of the transmission path of another embodiment of the data processing method of the present invention applied to a SOC chip;

[0013] Figure 6 This is a flowchart illustrating another embodiment of the data processing method of the present invention applied to a SOC chip;

[0014] Figure 7This is a schematic diagram of the transmission path of another embodiment of the data processing method of the present invention applied to a SOC chip;

[0015] Figure 8 This is a flowchart illustrating another embodiment of the data processing method of the present invention applied to a SOC chip. Detailed Implementation

[0016] As the background technology shows, the core of current IoT terminal node devices is "SOC (System on Chip) chip + sensor". Among them, the SOC chip typically integrates a processor, a data processing module, and memory (or an external memory control interface).

[0017] Figure 1 This is a schematic diagram of the structure of a SOC chip.

[0018] refer to Figure 1 The SOC chip 10 includes: a peripheral interface 11, an interconnect bus 12, a processor 13, and an external memory control interface 15; wherein, the peripheral interface 11 is used to couple with peripheral devices, and the interconnect bus 12 is coupled to the peripheral interface 11, the processor 13, and the external memory control interface 15 respectively.

[0019] Data from peripheral interface 11, processor 13 and external memory control interface 15 are all transmitted through data bus 12, and data processing scheduling is all done through processor 13.

[0020] However, when using the current SOC chip 10 to perform data processing, the following problems exist: 1) When peripheral devices interact with each other, the data needs to be forwarded and processed by the processor 13. The data interaction between peripheral devices must be scheduled by the processor 13 to complete the data interaction, which results in a relatively simple transmission path for the raw data sent by the peripheral devices, resulting in poor flexibility in data processing operations; 2) The relatively simple transmission path for the raw data sent by the peripheral devices makes it difficult to provide a transmission path that meets the requirements for data transmission delay; 3) Since all data interaction must be scheduled by the processor 13, and the processor 13 can also obtain the user's raw data, once the processor 13 is compromised, the raw data is at risk of being leaked or tampered with, thus failing to meet the requirements for data privacy and having poor protection performance for raw data.

[0021] To address the aforementioned problems, this invention provides a data processing method applied to a SOC chip, comprising: receiving raw data; performing hardware processing on the raw data using a hardware data processing module, the hardware data processing including: preprocessing the raw data to obtain first processed data, the preprocessing being used to add interactive identification information to the raw data, the interactive identification information including hardware processing authentication information and hardware processing information; identifying the interactive identification information and determining whether the hardware processing authentication information is valid; if the hardware processing authentication information is valid, performing hardware data processing on the first processed data according to the hardware processing information to obtain second processed data, the second processed data being used as output data of the hardware data processing module; if the hardware processing authentication information is invalid, using the first processed data as output data of the hardware data processing module; performing data reprocessing on the output data, the data reprocessing including: forwarding the output data to a data output port and outputting the output data through the data output port; or, the data reprocessing including: forwarding the output data to a processor for business processing to obtain third processed data; and outputting the third processed data through the data output port.

[0022] In the data processing method for SOC chips provided in this invention, a hardware data processing module is used to process the raw data. This bypasses the processor by directly forwarding the output data of the hardware data processing module to the data output port, preventing data leakage or tampering after passing through the processor. Furthermore, compared to traditional SOC chip data processing methods that use a single transmission path to process the raw data (i.e., transmitting the raw data to the processor for processing), this solution preprocesses the raw data by adding interactive identification information and then determines whether the raw data requires hardware data processing by identifying the hardware processing authentication information within the interactive identification information. In the case of efficiency, hardware data processing is performed first. After hardware data processing, depending on the actual data requirements, the output can be directly output through the data output port, or the output data can be forwarded to the processor for business processing to obtain the third-processed data, and then the third-processed data can be output through the data output port. This can improve the limitations of traditional SOC chips that directly transmit raw data to the processor for data processing, and reduce the probability of raw data being tampered with, thereby improving the flexibility and security of data processing. Moreover, by using the hardware data processing module to perform hardware processing on the raw data, the data processing speed is improved, and the data processing latency is reduced, thereby meeting more data processing needs and improving the compatibility of data processing.

[0023] To make the above-mentioned objects, features and advantages of the embodiments of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0024] Figure 2 This is a schematic diagram of the composition structure of an embodiment of the SOC chip in the data processing method of the present invention applied to the SOC chip; Figure 3 This is a schematic diagram of the transmission path of an embodiment of the data processing method of the present invention applied to a SOC chip; Figure 4 This is a flowchart illustrating an embodiment of the data processing method of the present invention applied to a SOC chip.

[0025] refer to Figure 4 The data processing method applied to SOC chips in this embodiment includes the following basic steps:

[0026] Step S1: Receive raw data;

[0027] Step S2: Using a hardware data processing module, perform hardware processing on the raw data. The hardware data processing includes: preprocessing the raw data to obtain first processed data. The preprocessing is used to add interactive identification information to the raw data. The interactive identification information includes hardware processing authentication information and hardware processing information.

[0028] Step S3: Identify the interactive identification information and determine whether the hardware processing authentication information is valid;

[0029] Step S4: If the hardware processing authentication information is valid, perform hardware data processing on the first processed data according to the hardware processing information to obtain the second processed data, and the second processed data is used as the output data of the hardware data processing module.

[0030] Step S5: If the hardware processing authentication information is invalid, the first processed data is used as the output data of the hardware data processing module;

[0031] Step S6: Perform data reprocessing on the output data, the data reprocessing including: forwarding the output data to the data output port, and outputting the output data through the data output port.

[0032] The following combination Figure 2 The SOC chip 20 shown provides a detailed description of the data processing method in this embodiment.

[0033] In this embodiment, the SOC chip 20 refers to an entire chip. The SOC chip 20 includes a processor 23, an interconnect matrix 22, a peripheral module 21, a hardware data processing module 26, and a configuration module 25. The processor 23, the peripheral module 21, and the hardware data processing module 26 are coupled together through the interconnect matrix 22. The configuration module 25 is coupled to the processor 23, the interconnect matrix 22, the peripheral module 21, and the hardware data processing module 26.

[0034] Specifically, the peripheral module includes a peripheral interface 211 and an external memory 221; the hardware data processing module 26 includes a preprocessing module 241, a data forwarding module 242 and a post-processing module 24, and the post-processing module 24 includes a security processing module 243.

[0035] In this embodiment, since the SOC chip 20 includes a processor 23 and a hardware data processing module 26, the SOC chip 20 has multiple data transmission paths. This allows the selection of one of these data transmission paths to process the raw data sent by the peripheral device according to actual needs, thereby improving the flexibility of data processing. For example, the raw data can be first transmitted to the processor 23, or first transmitted to the preprocessing module 241.

[0036] Reference Figures 2 to 4 Execute step S1 to receive raw data.

[0037] The raw data serves as input to the SOC chip 20, enabling subsequent data processing within the SOC chip 20.

[0038] Specifically, raw data from peripheral devices is received through the data receiving port of the SOC chip 20.

[0039] In this embodiment, the raw data includes a first type of raw data and a second type of raw data.

[0040] Depending on the application scenario, the first type of raw data and the second type of raw data have corresponding transmission paths. Specifically, the first type of raw data is first transmitted to the hardware data processing module 26, and the second type of raw data is first transmitted to the processor 23.

[0041] As an example, the security level of the first type of raw data is higher than that of the second type of raw data. Therefore, by transmitting the first type of raw data to the hardware data processing module 26 first, and then using the hardware data processing module 26 to perform hardware processing on the first type of raw data, the situation where the raw data is leaked or tampered with after passing through the processor 23 can be avoided, which is conducive to improving the security of data processing.

[0042] In this embodiment, the data processing method further includes: determining the transmission path of the original data within the SOC chip 20.

[0043] By determining the transmission path of the raw data within the SOC chip 20, preparations are made for subsequent processing of the raw data using the determined transmission path.

[0044] In this embodiment, when the SOC chip 20 receives raw data, it can determine the corresponding transmission path of the raw data within the SOC chip 20. By determining the corresponding transmission path of the raw data within the SOC chip 20, the SOC chip 20 can process the received raw data according to the transmission path configuration information using the corresponding transmission path when it receives raw data sent by a peripheral device.

[0045] In this embodiment, the raw data obtained by the specific data receiving port is transmitted through a specific transmission path, and interactive identification information is added to the raw data according to the configuration information. In other words, after the raw data is input to the SOC chip 20 through the specific data receiving port, the transmission path of the raw data has been determined, and the interactive identification information to be added to the raw data has been determined.

[0046] Specifically, when a specific data receiving port receives raw data sent by a corresponding peripheral device, the SOC chip 20 processes the raw data using a pre-set transmission path.

[0047] As an example, in the step of determining the transmission path corresponding to the original data within the SOC chip 20, the transmission path is related to the security level information of the original data.

[0048] In this embodiment, the step of acquiring the raw data sent by the peripheral device is performed using the peripheral module 21 in the SOC chip 20. That is, the SOC chip 20 receives the raw data from the peripheral device through the peripheral module 21.

[0049] Specifically, the peripheral module 21 includes several peripheral interfaces 211, which are the peripheral interfaces of the SOC chip 20. Accordingly, the SOC chip 20 obtains the raw data sent by the peripheral device through the peripheral interfaces 211 in the peripheral module 21.

[0050] In this embodiment, the peripheral interface 211 is used as a data receiving port or a data output port.

[0051] The interface type of the peripheral interface 211 is configured according to actual needs. As an example, the peripheral interface 211 may include one or more of the following: Universal Asynchronous Receiver / Transmitter (UART) interface, Inter Integrated Circuit (I2C) interface, Serial Peripheral Interface (SPI), General-Purpose Input / Output (GPIO) interface, Inter Integrated Circuit Sound (I2S) interface, Serial Audio Interface (SAI), Universal Serial Bus (USB) interface, Ethernet port, and Controller Area Network (CAN).

[0052] The number of peripheral interfaces 211 can be one or more. For example, such as Figure 2 As shown, taking the peripheral module 21 as an example, which includes N peripheral interfaces 211, the multiple peripheral interfaces 211 are peripheral interface 1, ..., peripheral interface N. As an example, the number of peripheral interfaces 211 is determined by the specifications of the SOC chip 20.

[0053] In this embodiment, the configuration module 25 is used to determine the transmission path of the original data within the SOC chip 20, and to determine the interaction identification information of the original data. Specifically, the configuration module 25 contains configuration information, which includes configuration information corresponding to the transmission path and configuration information corresponding to the interaction identification information.

[0054] Specifically, configuration module 25 is used to determine the transmission path of the raw data received by peripheral interface 211 within SOC chip 20. In other words, configuration module 25 determines the correspondence between the transmission path of the raw data within SOC chip 20 and peripheral interface 211. In other words, once peripheral interface 211 receives raw data, the transmission path of the raw data within SOC chip 20 is already determined.

[0055] Similarly, configuration is performed through configuration module 25 to determine the interaction identification information of the raw data received by peripheral interface 211 during preprocessing.

[0056] The configuration module 25 contains configuration information for determining the interactive identification information of the original data. Accordingly, the preprocessing module 241 adds the corresponding interactive identification information to the original data according to the configuration information of the configuration module 25, so as to add the required interactive identification information to the original data according to different application scenarios.

[0057] In this embodiment, the configuration module 25 includes a One-Time Programmable (OTP) module. The storage unit in the OTP module can only be programmed once, and the data after programming cannot be changed or erased again. It has good anti-reverse characteristics, which helps to reduce the risk of the configuration information in the configuration module 25 being changed or erased, and further improves the security and reliability of the data. In addition, the OTP module also has excellent characteristics such as non-volatility, high reliability, strong stability, and strong anti-interference ability.

[0058] In other embodiments, the configuration module may also be other types of storage modules.

[0059] Subsequent data processing methods also include: using the hardware data processing module 26 to perform hardware processing on the raw data, and after hardware processing, performing data reprocessing on the output data of the hardware data processing module 26.

[0060] By using the hardware data processing module 26 to process the raw data, the processor 23 can be bypassed by directly forwarding the output data of the hardware data processing module 26 to the data output port, thus avoiding the leakage or tampering of the data after passing through the processor 23. Moreover, using the hardware data processing module 26 to process the raw data improves the data processing speed and reduces the data processing latency.

[0061] The following is for reference only. Figure 3 and Figure 4 The hardware processing and reprocessing steps of this embodiment are described in detail, referring to the data transmission path diagram. Figure 3 The solid and dashed arrows in the diagram represent two different data transmission paths.

[0062] The hardware processing includes: performing step S2 to preprocess the original data to obtain the first processed data. The preprocessing is used to add interactive identification information to the original data. The interactive identification information includes hardware processing authentication information and hardware processing information.

[0063] The raw data is preprocessed to carry interaction identification information, which is used for subsequent hardware data processing based on this information. For example, the interaction identification information is parsed by parsing packets, allowing the determination of the relevant processing method—whether the data is identified, processed, or forwarded—by recognizing the content within the interaction identification information. Specifically, hardware processing authentication information identifies whether the raw data requires hardware data processing (e.g., whether encryption is required), and hardware processing information identifies the path and method of the raw data during subsequent hardware data processing (e.g., the encryption method).

[0064] In this embodiment, the raw data with a high security level is preprocessed so that subsequent processing can be performed directly based on the interaction identification information without prior scheduling by the processor 23, which improves the speed and security of data processing. Simultaneously, preprocessing adds security authentication information to the raw data, facilitating subsequent secure processing of the first-processed data, thereby further enhancing the security of data processing.

[0065] Specifically, the hardware data processing module is used to perform hardware processing on the first type of raw data, and correspondingly, the first type of raw data is preprocessed.

[0066] In this embodiment, the hardware data processing module 26 is coupled to the peripheral module 21. Specifically, the peripheral module 21 is coupled to the preprocessing module 241 to realize data interaction. After the hardware data processing module 26 receives the raw data, it first preprocesses the raw data through the preprocessing module 241.

[0067] In this embodiment, the hardware data processing module 26 implements its function in hardware. Correspondingly, the preprocessing module 241 is a hardware module that preprocesses the raw data in hardware.

[0068] Compared to software modules, using hardware modules helps avoid the problem of raw data being accessed by the processor, thus providing data isolation and protection to resist intrusion by external programs, prevent data tampering and leakage, and improve data security. Furthermore, compared to software modules, using hardware modules helps improve data processing efficiency and speed.

[0069] In this embodiment, the SOC chip 20 is suitable for blockchain technology; therefore, the hardware data processing module 26 is a blockchain processing module. Blockchain technology has high requirements for data security. Therefore, in this embodiment, the preprocessing module 241 first obtains the raw data and performs data preprocessing, without first forwarding the data through the processor 23. This avoids the risk of data tampering and leakage caused by the processor 23 obtaining the raw data first, thereby improving the security of data processing and meeting the data security requirements of blockchain technology.

[0070] Specifically, the SOC chip 20 is suitable for the Internet of Things (IoT). For the IoT SOC chip 20, there are high requirements for the privacy and security of the raw data. Therefore, this embodiment uses the hardware data processing module 26 to perform hardware processing on the raw data and performs preprocessing first, thereby effectively reducing the risk of the raw data of the SOC chip 20 being leaked and tampered with, and correspondingly effectively ensuring the security and reliability of the raw data of the SOC chip 20.

[0071] Specifically, peripheral module 21 is coupled to preprocessing module 241 via a preset first internal bus IB1. Correspondingly, raw data can be sent to preprocessing module 241 sequentially via peripheral module 21 and the first internal bus IB1. In this embodiment, the first internal bus IB1 can be a data transmission bus based on different standards, and can be selected according to actual needs.

[0072] In this embodiment, the preprocessing module 241 receives raw data configured to transmit raw data to the peripheral interface 211 of the preprocessing module 241.

[0073] In this embodiment, the original data is preprocessed according to the configuration information of the interaction recognition information configured by the configuration module 25.

[0074] Specifically, the preprocessing steps for the raw data include: adding label information to the raw data, and encapsulating the raw data and label information to obtain the first processed data, wherein the label information is used as interactive recognition information.

[0075] By adding tags to the raw data, with the tags containing interactive identification information, the raw data carries interactive identification information. By encapsulating the raw data and tags, the tags and raw data can be sent together to other modules during subsequent data transmission.

[0076] In this embodiment, the interactive identification information includes tag information with multiple tag fields.

[0077] In this embodiment, the hardware processing authentication information includes security authentication information, and the hardware processing information includes security processing information corresponding to the security authentication information.

[0078] Accordingly, the first processed data is then subjected to security processing based on the hardware processing information. Specifically, the subsequent processing module 24 includes a security processing module 243 for performing security processing.

[0079] In one embodiment, the security authentication information is related to the encryption process; that is, if the security authentication information is encrypted, then the subsequent security process will be encrypted. In another embodiment, the security authentication information is related to the decryption process; that is, if the security authentication information is decrypted, then the subsequent security process will be decrypted.

[0080] In this embodiment, taking security authentication information and encryption processing as examples, the tag field corresponding to the security authentication information includes an encryption enable field, and the security processing information correspondingly includes an encryption algorithm type field and an encryption key field. Accordingly, the security processing module 243 includes an encryption module for performing encryption processing.

[0081] It should be noted that in other embodiments, the tag field corresponding to the hardware processing information can also be other types of tag fields. For example, a routing control field, used to determine the forwarding direction of the preprocessed data. The routing control field is used to determine the forwarding direction of the first processed data, for example, whether the data is forwarded to the processor for further business processing, or forwarded to other peripheral devices (e.g., external chips) through the peripheral module, or uploaded to the blockchain cloud through the peripheral interface of the SOC chip as a network communication interface. Accordingly, the subsequent data forwarding module forwards the data according to the forwarding direction.

[0082] The hardware processing further includes: executing step S3, identifying interactive identification information, and determining whether the hardware processing authentication information is valid.

[0083] Subsequently, based on the interaction recognition information, corresponding data processing is performed on the first processed data, such as data forwarding, data encryption, and data caching.

[0084] In this embodiment, the identification of interactive identification information includes: parsing tag information to obtain hardware processing authentication information and the domain value of hardware processing information. The domain value of hardware processing authentication information is used to indicate whether the hardware processing authentication information is valid, and the domain value of hardware processing information is used to indicate the hardware processing method.

[0085] In this embodiment, the data forwarding module 242 parses the tag information, and the data forwarding module 242 determines whether the hardware processing authentication information is valid and determines the subsequent data transmission path of the first processed data based on the parsed tag information.

[0086] In this embodiment, the validity of the hardware-processed authentication information is determined based on the field value of the hardware-processed authentication information. For example, a field value of "1" indicates that the hardware-processed authentication information is valid, while a field value of "0" indicates that the hardware-processed authentication information is invalid.

[0087] As one example, after preprocessing the raw data, if the hardware authentication information is invalid, the data can be forwarded to a peripheral device via the data forwarding module 242. As another example, after preprocessing the raw data, if the hardware authentication information is valid, the data can be forwarded to other functional modules of the subsequent processing module for appropriate processing via the data forwarding module. In other embodiments, after preprocessing the raw data, if the hardware authentication information is invalid, the data can also be forwarded to the processor via the data forwarding module for further processing.

[0088] The hardware processing further includes: executing step S4, whereby, if the hardware processing authentication information is valid, hardware data processing is performed on the first processed data according to the hardware processing information to obtain second processed data, and the second processed data is used as the output data of the hardware data processing module.

[0089] like Figure 3 As shown, when the hardware processing authentication information is valid, corresponding to Figure 3 The data transmission path indicated by the solid arrow.

[0090] If the hardware processing authentication information is valid, it means that the data after the first processing needs to undergo hardware data processing.

[0091] As an example, hardware processing authentication information includes security authentication information. If the security authentication information is valid, it means that the data after the first processing needs to undergo security processing, thus obtaining the data after the second processing, which improves the security performance of the data and prevents the data from being tampered with or verified.

[0092] In this embodiment, the security processing module 243 performs security processing on the first processed data.

[0093] Specifically, corresponding security processing is performed based on the threshold of the security processing information. The threshold of the security processing information identifies the method of security processing required (e.g., encryption algorithm parameters).

[0094] In this embodiment, taking the security authentication information and encryption processing as examples, the steps for security processing of the first processed data include: encrypting the first processed data. When the tag field of the security authentication information indicates that the original data needs to be encrypted, the security processing module 243 receives the first processed data and encrypts it. The plaintext is converted into ciphertext using an encryption algorithm and encryption key, achieving information concealment and thus protecting information security.

[0095] In other embodiments, when the security authentication information is related to decryption, the subsequent processing module also includes a decryption module, which decrypts the first processed data.

[0096] It should be noted that after obtaining the second processed data, the data forwarding module 242 identifies the hardware processing information in the second processed data and forwards the second processed data using the corresponding transmission path so that the output data can be reprocessed subsequently.

[0097] It should also be noted that in other embodiments, the post-processing module may include other types of functional modules for performing corresponding hardware data processing.

[0098] The hardware processing further includes: executing step S5, in the case that the hardware processing authentication information is invalid, using the first processed data as the output data of the hardware data processing module.

[0099] like Figure 3 As shown, in the case where the hardware processing authentication information is invalid, corresponding to Figure 3 The data transmission path is indicated by the dashed arrow. When the hardware processing authentication information is invalid, the data forwarding module 242 identifies the hardware processing information in the first processed data and forwards the first processed data using the corresponding transmission path so that the output data can be reprocessed subsequently.

[0100] Step S6 is executed to reprocess the output data. The reprocessing includes forwarding the output data to the data output port and outputting the output data through the data output port.

[0101] Compared to traditional SOC chip data processing methods that use a single transmission path to process raw data (i.e., transmitting raw data to the processor for processing), this solution preprocesses the raw data by adding interactive identification information. It then uses the hardware processing authentication information within this information to determine whether hardware processing is required. If the authentication information is valid, hardware processing is performed first. After processing, the data is output through the data output port based on actual needs. Alternatively, if the authentication information is invalid, the data is directly output through the data output port. This overcomes the limitations of traditional SOC chips that directly transmit raw data to the processor for processing, reduces the probability of raw data tampering, and improves the flexibility and security of data processing.

[0102] In this embodiment, data reprocessing is performed according to the data transmission path corresponding to the data receiving port. Specifically, a data reprocessing method matching the hardware processing information is obtained by identifying the tag information in the hardware processing information.

[0103] In this embodiment, when the hardware processing authentication information is valid, after obtaining the second processed data, the second processed data is transmitted to the data forwarding module 242, and the second processed data serves as the output data of the hardware data processing module 26. When the hardware processing authentication information is invalid, the first processed data is transmitted to the data forwarding module 242, and the first processed data serves as the output data of the hardware data processing module 26. The data forwarding module 242 identifies the data processing information in the output data and reprocesses the output data using the corresponding transmission path.

[0104] As an example, the output data is forwarded to the peripheral module 21 through the data forwarding module 242 to realize the data transmission route of directly forwarding data to the peripheral device.

[0105] In this embodiment, the preprocessing module 241 is coupled to the peripheral interface 211. The data forwarding module 242 forwards the output data to the preprocessing module 241, and then forwards the output data to the peripheral module 21 via the preprocessing module 241. Specifically, the output data is transmitted to an external device via the peripheral interface 211, or the output data is uploaded to a cloud database.

[0106] Figure 5 This is a schematic diagram of the transmission path of another embodiment of the data processing method of the present invention applied to a SOC chip; Figure 6 This is a flowchart illustrating another embodiment of the data processing method of the present invention applied to a SOC chip.

[0107] The similarities between this embodiment and the previous embodiments will not be repeated here. The difference between this embodiment and the previous embodiments lies in the method of data reprocessing.

[0108] The following combination Figure 2 The SOC chip 20 shown and Figure 5 The schematic diagram of the transmission path shown provides a detailed description of the data processing method in this embodiment. Among other things, Figure 5 The solid and dashed arrows in the diagram represent two different transmission paths.

[0109] refer to Figure 6 , Figure 6 The contents of steps S1 to S5 are the same as those in the aforementioned embodiments, and will not be repeated here.

[0110] Continue to refer to Figure 6 In this embodiment, the data reprocessing includes: executing steps S6 and S7, forwarding the output data to the processor 23 for business processing to obtain the third processed data; and outputting the third processed data through the data output port.

[0111] The data is forwarded to processor 23 for business processing, realizing the functional processing of the data.

[0112] In this embodiment, the processor 23 is responsible for data processing and control scheduling. As an example, the processor 23 can be a CPU (central processing unit).

[0113] Compared to traditional SOC chip data processing methods that use a single transmission path to process raw data (i.e., directly transmitting raw data to the processor for processing), this solution preprocesses the raw data by adding interactive identification information. It then determines whether hardware data processing is required by identifying hardware processing authentication information within this information. If the authentication information is valid, hardware processing is performed first to obtain second-processed data. This second-processed data serves as the output data of the hardware data processing module. Based on actual data requirements, the output data is forwarded to the processor 23 for business processing to obtain third-processed data, which is then output through the data output port. Alternatively, if the hardware processing authentication information is invalid, the first-processed data is used as the output data of the hardware data processing module. Based on actual data requirements, the output data is forwarded to the processor 23 for business processing to obtain third-processed data, which is then output through the data output port. This improves upon the limitations of traditional SOC chips that directly transmit raw data to the processor for processing, reduces the probability of raw data tampering, and enhances the flexibility and security of data processing.

[0114] The processor 23 is a software module. Therefore, the original data is first processed by the hardware data processing module 26, and then the data is forwarded to the processor 23 for business processing. The business processing is data processing performed by the software module. Accordingly, this embodiment can realize a processing method that combines hardware and software.

[0115] In this embodiment, the data forwarding module 242 is coupled to the interconnection matrix 22 via the fourth internal bus IB4, the processor 23 is coupled to the interconnection matrix 22 via the third internal bus IB3, and the interconnection matrix 22 is coupled to the peripheral module 21 via the second internal bus IB2. This enables the data forwarding module 242 to forward output data to the processor 23 via a data transmission path, and to output the third processed data through a data output port via a data transmission path. For a detailed description of the fourth internal bus IB4, the third internal bus IB3, and the second internal bus IB2, please refer to the description of the first internal bus IB1; further details will not be provided here.

[0116] In this embodiment, data reprocessing further includes: executing step S8, which caches the output data before forwarding it to processor 23 for business processing.

[0117] By caching the output data, the data that needs to be processed can be retrieved and processed according to actual needs or processing order.

[0118] In this embodiment, external memory 221 is used for caching. External memory 221 has a large storage capacity and can store a large amount of data. Furthermore, using external memory 221 for caching saves storage space inside the SOC chip 20.

[0119] In this embodiment, the external memory 221 includes static random-access memory (SRAM), double data rate synchronous dynamic random-access memory (DDR), or external note-taking memory (HyberRAM).

[0120] In this embodiment, the interconnect matrix 22 is coupled to the peripheral module 21 through the second internal bus IB2, and the peripheral module 21 includes an external memory 221, so as to realize that before the output data is forwarded to the processor 23 for business processing, the output data is forwarded to the external memory 221 in the peripheral module 21, thereby caching the output data.

[0121] Accordingly, in this embodiment, forwarding data to processor 23 for business processing includes: retrieving cached output data and performing business processing. Specifically, processor 23 retrieves cached output data and performs business processing.

[0122] In this embodiment, the processor 23 is coupled to the interconnect matrix 22 via the third internal bus IB3, thereby retrieving cached output data from the external memory 221 and performing business processing through the second internal bus IB2, the interconnect matrix 22 and the third internal bus IB3.

[0123] Continue to refer to Figure 6 In this embodiment, the data reprocessing further includes: executing step S9, after forwarding the output data to the processor 23 for business processing and before outputting the third processed data through the data output port, executing step S8, to cache the third processed data.

[0124] By caching the third-processed data, the third-processed data that needs to be output through the data output port can be retrieved and output according to actual needs or processing order.

[0125] For reasons similar to those mentioned above, in this embodiment, external memory 221 is used for caching.

[0126] In this embodiment, the external memory 221 includes static random-access memory (SRAM), double data rate synchronous dynamic random-access memory (DDR), or external note-taking memory (HyberRAM).

[0127] In this embodiment, the interconnect matrix 22 is coupled to the peripheral module 21 through the second internal bus IB2, so as to realize that after the output data is forwarded to the processor 23 for business processing and before the third processed data is output through the data output port, the third processed data is forwarded to the external memory 221 in the peripheral module 21, thereby caching the third processed data.

[0128] Accordingly, in this embodiment, outputting the third processed data through the data output port includes: retrieving the cached third processed data and outputting it through the data output port. Specifically, the data output port retrieves the third processed data and outputs it.

[0129] Figure 7 This is a schematic diagram of the transmission path in another embodiment of the data processing method of the present invention applied to a SOC chip. Figure 8 This is a flowchart illustrating another embodiment of the data processing method of the present invention applied to a SOC chip.

[0130] The similarities between this embodiment and the previous embodiments will not be repeated here. The difference between this embodiment and the previous embodiments is that the data processing method further includes: after receiving the raw data, sending the second type of raw data to the processor for corresponding processing.

[0131] The following combination Figure 2 The SOC chip 20 shown, and Figure 8 The flowchart shown provides a detailed description of the data processing method in this embodiment.

[0132] In this embodiment, the data processing method includes the following basic steps:

[0133] Step S1: Receive raw data;

[0134] Step S2: Forward the raw data to the processor for business processing to obtain the third-processed data;

[0135] Step S3: Output the third processed data through the data output port.

[0136] In this embodiment, in the step of forwarding the raw data to the processor 23 for business processing, the second type of raw data is sent to the processor 23 for business processing.

[0137] In this embodiment, the raw data includes a first type of raw data and a second type of raw data. Depending on the application scenario, the first type of raw data and the second type of raw data have corresponding transmission paths.

[0138] As an example, the security level of the first type of raw data is higher than that of the second type of raw data. The security level of the second type of raw data is lower (e.g., it can be forwarded to processor 23 as plaintext). Therefore, there is no need to perform hardware processing on the second type of raw data.

[0139] In this embodiment, the second type of raw data is sent directly to the processor 23 via the interconnect matrix 22 without going through the hardware data processing module 26, and then the corresponding business processing is performed. After the business processing is completed, the third processed data is output through the data output port via the interconnect matrix 22.

[0140] Therefore, the SOC chip described in this embodiment is also compatible with the data processing methods of traditional SOC chips, thereby realizing the data processing methods of traditional SOC chips, which is beneficial to improving the flexibility of data processing, meeting different data processing needs, and improving the compatibility of data processing.

[0141] It should be noted that, after receiving the raw data and before forwarding it to the processor for business processing, the process further includes: executing step S4 to cache the raw data. Similarly, after forwarding the data to the processor for business processing and before outputting the third processed data through the data output port, the process further includes: executing step S5 to cache the third processed data. A detailed description of the data caching step can be found in the corresponding descriptions in the foregoing embodiments, and will not be repeated here.

[0142] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A data processing method applied to a SOC chip, characterized in that, include: Receive raw data; The raw data is processed using a hardware data processing module, the hardware processing including: The original data is preprocessed to obtain first processed data. The preprocessing is used to add interactive identification information to the original data. The interactive identification information includes hardware processing authentication information and hardware processing information. The interactive identification information of the original data is determined using a configuration module. The configuration module includes a one-time programmable module. The storage unit in the one-time programmable module can only be programmed once, and the data after programming cannot be changed or erased again. The hardware processing authentication information includes security authentication information, and the hardware processing information includes security processing information corresponding to the security authentication information. Identify the interactive identification information and determine whether the hardware processing authentication information is valid; If the hardware processing authentication information is valid, the first processed data is processed by hardware data processing according to the hardware processing information to obtain second processed data, and the second processed data is used as the output data of the hardware data processing module; in the step of processing the first processed data by hardware data processing according to the hardware processing information, the hardware data processing includes security processing. If the hardware processing authentication information is invalid, the first processed data will be used as the output data of the hardware data processing module. The output data is further processed, including: forwarding the output data to a data output port and outputting the output data through the data output port; or, the data reprocessing includes: forwarding the output data to a processor for business processing to obtain third processed data; and outputting the third processed data through the data output port.

2. The data processing method applied to a SOC chip as described in claim 1, characterized in that, The data reprocessing further includes: caching the output data before forwarding it to the processor for business processing; Forwarding the output data to the processor for business processing includes: retrieving the cached output data and performing business processing.

3. The data processing method applied to a SOC chip as described in claim 1, characterized in that, The data reprocessing further includes: caching the third processed data before outputting it through the data output port after forwarding the output data to the processor for business processing; Outputting the third processed data through the data output port includes: extracting the cached third processed data and outputting it through the data output port.

4. The data processing method applied to a SOC chip as described in claim 2 or 3, characterized in that, Use external storage for caching.

5. The data processing method applied to a SOC chip as described in claim 4, characterized in that, The external storage includes static random access memory, double rate synchronous dynamic random access memory, or external note-taking memory.

6. The data processing method applied to a SOC chip as described in claim 1, characterized in that, The interactive identification information includes tag information with multiple tag fields; Identifying the interactive identification information includes: parsing the tag information to obtain the hardware processing authentication information and the domain value of the hardware processing information; Based on the field value of the hardware processing authentication information, determine whether the hardware processing authentication information is valid; The hardware data processing is performed based on the domain value of the hardware processing information.

7. The data processing method applied to a SOC chip as described in claim 1, characterized in that, The security authentication information is related to encryption processing; The security process is encryption. or, The security authentication information and decryption related information; The security process described is a decryption process.

8. The data processing method applied to a SOC chip as described in claim 1, characterized in that, The preprocessing steps for the raw data include: adding tag information to the raw data, and encapsulating the raw data and tag information to obtain first processed data, wherein the tag information is used as the interaction identification information.

9. The data processing method applied to a SOC chip as described in claim 1, characterized in that, The raw data includes a first type of raw data and a second type of raw data; The first type of raw data is processed using a hardware data processing module. The data processing method further includes: sending the second type of raw data to the processor for business processing.

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