A resistance matrix closed-loop simulation system based on visible light image conversion

CN116151176BActive Publication Date: 2026-09-04南通长三角智能感知研究院 +1
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Patent Information

Application Number
CN202310085050.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-02-09
Publication Date
2026-09-04
Estimated Expiration
2043-02-09

AI Technical Summary

Technical Problem

丢帧、漏帧等会造成整个驱动系统的信号混乱,因此电阻阵芯片与控制驱动系统间有严格的同步要求,这种同步要求通常是以牺牲整个系统的最高帧频为代价,从而限制了电阻阵芯片性能

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Abstract

The application discloses a resistance array closed-loop simulation system based on visible light image conversion, which comprises an application system, a data processing system, an image display, a visible light system, a fiber array, a resistance array chip, a resistance array chip driving power supply and an infrared light system. When the closed-loop simulation is performed, the application system injects the processed image signal into the image display to generate visible light, the visible light is irradiated on the resistance array chip integrated with a back-illuminated photodiode and a resistance micro-bridge through the fiber array, and under the condition that all the resistance micro-bridges are connected, the driving voltage of the resistance micro-bridge is controlled to change with the light intensity in real time by the back-illuminated photodiode, so that the holding capacitor in the resistance array pixel is replaced, and finally the conversion of infrared radiation generated from the visible light to the resistance array pixel is realized, and a low-delay closed-loop simulation process is obtained.
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Description

Technical Field

[0001] This invention relates to a simulation system, and more particularly to a closed-loop simulation system for a resistive array based on visible light image conversion. Background Technology

[0002] A resistor array chip is an infrared thermal emission chip. It is primarily used for closed-loop simulation of infrared scene images. The generation of dynamic infrared images in a closed-loop simulation scenario by a resistor array chip generally involves the following process: ① The application system processes the acquired image signal and then transmits it to the image generation computer; ② Image generation: Computer generates image data sequences of the resistive array; ③ The image data sequence generates a driving signal sequence for the resistor array through the image data transmission correction card and related circuits; ④ After the selection circuit sequentially selects each pixel unit, it injects the driving signal into the driving circuit of each pixel to form the driving voltage or current signal of the resistor array, and drives the resistor microbridge to generate infrared thermal radiation. ⑤ The application system acquires the infrared image signal generated by the resistive microbridge; ⑥ Repeat the above steps in a parallel operation to form a dynamic infrared image.

[0003] In the above process, steps ②, ③, ④, and ⑤ require at least 1-2 frames to complete. Therefore, there will be at least a 4-frame delay from acquiring the image signal from the application system to generating infrared thermal emission through the resistive array microbridge.

[0004] Secondly, from a micro-design and manufacturing perspective, in commercially available resistor arrays, each pixel unit contains a switch. Only when an external selection signal turns on this switch can the corresponding pixel be selected. Furthermore, the pixel also contains a holding capacitor and a driving transistor. The holding capacitor provides the voltage to drive the resistor microbridge, and the driving transistor converts this voltage into current, continuously heating the resistor microbridge. Since the charge stored in the holding capacitor is discharged through the switch, to prevent the voltage drop from causing a rapid decrease in the resistor microbridge temperature, the capacitor C is typically made very large during actual chip fabrication. This significantly reduces the pixel's area, forcing a reduction in the resistor microbridge area and lowering key performance parameters such as the equivalent blackbody temperature.

[0005] Third, the resistor array chip has strict requirements for external clock, control, and drive signals during operation. In order to generate closed-loop dynamic infrared images, the resistor array chip requires all related software and hardware to work in strict accordance with the timing signals, coordinating frame by frame. Frame loss or omission will cause signal chaos in the entire drive system. Therefore, there are strict synchronization requirements between the resistor array chip and the control drive system. This synchronization requirement usually comes at the cost of sacrificing the highest frame rate of the entire system, thus limiting the performance of the resistor array chip.

[0006] In summary, current closed-loop simulations of resistor array chips suffer from several issues, including significant frame delays, capacitors encroaching on pixel space and reducing the performance of resistor microbridges, and synchronization requirements limiting the overall performance of the resistor array. These problems hinder the practical application of resistor arrays. Summary of the Invention

[0007] To address the aforementioned technical problems, this invention provides a resistor array closed-loop simulation system based on visible light image conversion. This system reduces frame latency in current closed-loop simulation processes, increases the proportion of resistor microbridges within pixels, and eliminates the limitations imposed by synchronization requirements, playing a significant role in improving the performance of resistor array closed-loop simulation systems. During closed-loop simulation, the application system injects the processed image signal into an image display to generate visible light. This light is then irradiated onto a resistor array chip integrating back-illuminated photodiodes and resistor microbridges via an optical fiber array. With all resistor microbridges connected, the back-illuminated photodiodes control the driving voltage of the resistor microbridges to change in real-time with the light intensity, thereby replacing the holding capacitors within the resistor array pixels. Ultimately, this achieves the conversion from visible light to infrared radiation generated by the resistor array pixels, resulting in a delay-free or low-latency closed-loop simulation process.

[0008] The purpose of this invention is to provide a closed-loop simulation system for a resistor array based on visible light image conversion. The technical point is that the system includes an application system, a data processing system, an image display, a visible optical system, a fiber array, a resistor array chip, a resistor array chip driving power supply, and an infrared optical system. The application system processes the acquired image signal S1 through the data processing system to generate signal S2, which is then injected into the image display to generate image signal S3. Image signal S3 passes through the visible light system to generate signal S4. Signal S4 is injected into the input end of the fiber optic array and output as image signal S5 through the output end of the fiber optic array. Image signal S5 passes through the resistor array chip to generate infrared radiation S6. Infrared radiation S6 passes through the infrared optical system to output image signal S1. Image signal S1 is input into the application system to achieve a closed loop and form a continuous dynamic infrared image.

[0009] To better implement the above technical solution, the image display in the resistor array closed-loop simulation system based on visible light image conversion of the present invention is an LCD display or an LED display; the pixel size of the image display is larger than the pixel size of the resistor array chip in both the horizontal and vertical directions; the pixel grayscale level of the image display is larger than the pixel grayscale level of the resistor array chip.

[0010] To better achieve the above technical solution, the entrance pupil area of ​​the visible optical system in the resistive array closed-loop simulation system based on visible light image conversion of the present invention is larger than the image plane of the image display.

[0011] To better realize the above technical solution, the fiber array in the resistive array closed-loop simulation system based on visible light image conversion of the present invention is larger in both horizontal and vertical dimensions than the exit pupil area of ​​the visible optical system.

[0012] To better achieve the above technical solution, the entrance pupil area of ​​the infrared optical system in the resistor array closed-loop simulation system based on visible light image conversion of the present invention is larger than the size of the resistor array chip.

[0013] To better realize the above technical solution, the resistor array chip in the resistor array closed-loop simulation system based on visible light image conversion of the present invention includes repeating pixels arranged in a certain layout.

[0014] To better realize the above technical solution, the pixel in the resistor array closed-loop simulation system based on visible light image conversion of the present invention includes a feedback resistor Rf, a driving transistor M, a back-illuminated photodiode PD, a resistor microbridge R, and a current-voltage conversion circuit module T.

[0015] To better realize the above technical solution, in a closed-loop simulation system of a resistor array based on visible light image conversion, the output end of the fiber array is closely attached to the back of the resistor array chip and directly opposite the back-illuminated photodiode PD.

[0016] To better realize the above technical solution, the back-illuminated photodiode PD in the resistor array closed-loop simulation system based on visible light image conversion of the present invention is attached to the back of the resistor array chip by flip-chip bonding.

[0017] The resistor array closed-loop simulation system based on visible light image conversion of this invention processes the obtained image signal and directly injects it into the resistor array chip as the driving signal for the resistor microbridge via an optical fiber array. This process eliminates the need for the image generation computer to generate the image data sequence and the process of the image transmission correction card and related circuits to generate the resistor array driving signal, thus reducing the frame delay caused by these two processes. Furthermore, since the resistor array chip drives the resistor microbridge in a normally open state, the image output does not need to be synchronized with other external signals, further reducing the frame delay caused by system synchronization. Therefore, using this invention, the delay of 4-6 frames in the original closed-loop simulation can be reduced to 1-2 frames. Secondly, the diode photocurrent is both a control signal (its presence or absence determines whether the resistor microbridge is driven) and a driving signal. Driven by a current-to-voltage conversion circuit, the resistor microbridge is replaced by the holding capacitor within the resistor array pixel. The saved area allows for a larger resistor microbridge, increasing its duty cycle within the pixel and improving its performance. In summary, this invention has significant benefits in reducing frame delay and improving the performance of resistor microbridges in closed-loop simulation systems.

[0018] The following will further explain the concept, specific structure, and technical effects of the present invention in conjunction with the accompanying drawings, so as to fully understand the purpose, features, and effects of the present invention. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of a closed-loop simulation system according to a preferred embodiment of the present invention; Figure 2 This is a schematic diagram of the pixel structure of a preferred embodiment of the present invention. Implementation

[0020] The embodiments of the present invention are described below with reference to the accompanying drawings to make the technical content clearer and easier to understand. The scope of protection of the present invention is not limited to the embodiments mentioned herein.

[0021] In the accompanying drawings, components with the same structure are indicated by the same numerical designation, and components with similar structures or functions are indicated by similar numerical designations. The dimensions and thicknesses of each component shown in the drawings are arbitrary, and the present invention does not limit the dimensions and thicknesses of each component. To make the illustrations clearer, some features of the components are appropriately exaggerated in the drawings.

[0022] like Figure 1As shown, the visible light closed-loop simulation system provided in this embodiment includes an application system 1, a data processing system 2, an image display 3, a visible optical system 4, a fiber array 5, a resistor array chip 6, a resistor array chip driving power supply 7, and an infrared optical system 8. The image display 3 is an LCD or LED display. The pixel size of the image display 3 is larger than that of the resistor array chip 6 in both the horizontal and vertical dimensions. The grayscale level of the pixels in the image display 3 is larger than that of the pixels in the resistor array chip 6. The entrance pupil area of ​​the visible optical system 4 is larger than the image plane of the image display 3. The fiber array 5 is larger than the exit pupil area of ​​the visible optical system 4 in both the horizontal and vertical dimensions. The entrance pupil area of ​​the infrared optical system 8 is larger than that of the resistor array chip 6. Preferably, the application system 1 includes an infrared detector, and the exit pupil area of ​​the infrared optical system 8 is larger than that of the infrared detector in the application system 1.

[0023] More specifically, the resistor array chip 6 includes repeating pixels arranged in a certain layout. For example... Figure 2 As shown, the pixel includes a feedback resistor Rf, a driving transistor M, a back-illuminated photodiode PD, a resistor microbridge R, and a current-to-voltage conversion circuit module T. The output end of the fiber array 5 is attached to the back of the resistor array chip 6 and faces the back-illuminated photodiode PD. The back-illuminated photodiode PD is attached to the back of the resistor array chip 6 by flip-chip bonding.

[0024] During the closed-loop simulation, the application system 1 processes the obtained image signal S1 through the data processing system 2 to generate signal S2, which is then injected into the image display 3 to generate image signal S3. Image signal S3 passes through the visible light system 4 to generate signal S4. Signal S4 is injected into the input end of the fiber array 5 and output as image signal S5 through the output end of the fiber array 5. Image signal S5 then passes through the resistor array chip 6 to generate infrared radiation S6. Specifically, when image signal S5 is output from the output end of the fiber array 5, it faces the back of the resistor array chip 6, causing the back-illuminated photodiode PD to generate photocurrent. Preferably, the visible light system 4 is equipped with an attenuation plate. By adjusting the attenuation plate of the visible light system 4, the photocurrent is maximized while preventing saturation of all back-illuminated photodiodes PD. The photocurrent generated by the back-illuminated photodiode PD passes through the feedback resistor Rf and the circuit voltage conversion circuit module T. The resulting driving voltage drives the resistor microbridge R through the driving transistor M. The resistor microbridge R generates corresponding continuous infrared radiation S6 according to the magnitude of the driving voltage. Among them, the resistor array chip 6 is powered by an external resistor array drive power supply A7, which provides corresponding electrical drive to all pixels in the resistor array chip 6. At this time, all pixels in the resistor array chip 6 are in a continuously selected state. The infrared radiation S6 outputs an image signal S1 after passing through the infrared optical system. The image signal S1 is input into the application system to realize a closed loop and form a continuous dynamic infrared image.

[0025] More specifically, the data processing system 2 includes data processing software and hardware, which processes the received image signal S1. The image signal S1 needs to be adjusted and corrected in the following situations: First, the infrared image obtained by the application system 1 needs to be adjusted after the image feature parameters are extracted; second, the intensity of the visible light emitted by the image display 3 will change nonlinearly, which is eliminated by correction; third, the generated visible light image is finally converted into an infrared light image emitted by the resistor array chip 6, and the image difference between the two images due to the difference in wavelength needs to be corrected.

[0026] The preferred embodiments of the present invention have been described in detail above. It should be understood that those skilled in the art can make numerous modifications and variations based on the concept of the present invention without creative effort. Therefore, all technical solutions that can be obtained by those skilled in the art based on the concept of the present invention through logical analysis, reasoning, or limited experimentation on the basis of existing technology should be within the scope of protection defined by the claims.

Claims

1. A closed-loop simulation system for a resistive array based on visible light image conversion, characterized in that, The system includes an application system, a data processing system, an image display, a visible optical system, a fiber optic array, a resistor array chip, a resistor array chip driver power supply, and an infrared optical system. The application system processes the acquired image signal S1 through the data processing system to generate signal S2, which is then injected into the image display to generate image signal S3. Image signal S3 passes through the visible light system to generate signal S4, which is then injected into the input end of the fiber array and output as image signal S5 through the output end of the fiber array. Image signal S5 passes through the resistor array chip to generate infrared radiation S6, which passes through the infrared optical system to output image signal S1. Image signal S1 is then input into the application system to achieve a closed loop and form a continuous dynamic infrared image. The resistor array chip includes repeating pixels arranged in a certain layout; each pixel includes a feedback resistor Rf, a driving transistor M, a back-illuminated photodiode PD, a resistor microbridge R, and a current-to-voltage conversion circuit module T.

2. The closed-loop simulation system for a resistive array based on visible light image conversion according to claim 1, characterized in that, The image display is an LCD display or an LED display; the pixel size of the image display is larger than that of the resistor array chip in both the horizontal and vertical directions; the grayscale level of the image display is greater than that of the resistor array chip.

3. The closed-loop simulation system for a resistive array based on visible light image conversion according to claim 1, characterized in that, The entrance pupil area of ​​the visible optical system is larger than the image plane of the image display.

4. The closed-loop simulation system for a resistive array based on visible light image conversion according to claim 1, characterized in that, The fiber array is larger than the exit pupil area of ​​the visible optical system in both the horizontal and vertical dimensions.

5. The closed-loop simulation system for a resistive array based on visible light image conversion according to claim 1, characterized in that, The entrance pupil area of ​​the infrared optical system is larger than the size of the resistor array chip.

6. The closed-loop simulation system for a resistive array based on visible light image conversion according to claim 1, characterized in that, The output end of the fiber optic array is attached to the back of the resistor array chip and is directly opposite the back-illuminated photodiode (PD).

7. The closed-loop simulation system for a resistive array based on visible light image conversion according to claim 1, characterized in that, The back-illuminated photodiode (PD) is attached to the back of the resistor array chip using a flip-chip bonding method.

Citation Information

Patent Citations

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