A display panel and display device

Abstract

This application provides a display panel and a display device. Multiple light-emitting device groups and multiple first signal lines are disposed on the same side of a substrate. Each light-emitting device group includes multiple light-emitting devices arranged along a second direction. The multiple first signal lines and the multiple light-emitting device groups are both arranged along a first direction, and the first signal lines are electrically connected to at least a portion of the light-emitting devices in their respective light-emitting device groups. The multiple first signal lines include at least a first type of first signal line, and the orthographic projection of the first type of first signal line on the substrate at least partially overlaps with the orthographic projection of its corresponding light-emitting device group on the substrate. By placing the first type of first signal lines in the area where the light-emitting device groups are located, the space required to specifically set up the first signal lines in the planar area of ​​the display panel is reduced. This facilitates the layout design of the pixel circuits and their electrically connected signal lines, and also facilitates the realization of a display device with a narrow bezel.

Description

[Technical Field]

[0001] This application relates to the field of display technology, and in particular to a display panel and display device. [Background Technology]

[0002] In recent years, narrow bezel and borderless displays have become important development directions for high-end displays.

[0003] To meet the current demand for narrow bezels, flexible displays have gained popularity. By bending the circuitry in the bezel area to the back of the display panel, the display appears to have no bezel. However, flexible displays are difficult to apply to all current display scenarios due to their high cost, poor stability, inability to withstand high temperatures and humidity, and poor corrosion resistance.

[0004] Therefore, how to achieve extremely narrow bezels remains a problem that urgently needs to be solved in the display field.

[0005] [Application Content]

[0006] In view of this, embodiments of this application provide a display panel and a display device.

[0007] In a first aspect, embodiments of this application provide a display panel, including:

[0008] Substrate;

[0009] Multiple light-emitting device groups are disposed on one side of the substrate; the multiple light-emitting device groups are arranged along a first direction and the light-emitting device groups include multiple light-emitting devices arranged along a second direction;

[0010] Multiple first signal lines are disposed on the same side of the substrate as the light-emitting device group; the multiple first signal lines are arranged along the first direction; the first signal lines are correspondingly disposed to the light-emitting device group, and the first signal lines are electrically connected to at least a portion of the light-emitting devices in the correspondingly disposed light-emitting device group;

[0011] Among them, the plurality of first signal lines include at least a first type of first signal line; the orthographic projection of the first type of first signal line on the substrate and the orthographic projection of the corresponding light-emitting device group on the substrate at least partially overlap.

[0012] Secondly, embodiments of this application provide a display device, including a display panel as provided in the first aspect.

[0013] By setting the first type of first signal line in the area where the light-emitting device group is located, the space required to set the first signal line in the planar area of ​​the display panel is reduced, making it easier to realize the layout design of the pixel circuit and the signal lines electrically connected to it, and also making it easier to realize a display device with a narrow bezel. [Attached Image Description]

[0014] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0015] Figure 1 A schematic diagram of a display panel provided in an embodiment of this application;

[0016] Figure 2 for Figure 1 A cross-sectional view along the M1-M2 direction;

[0017] Figure 3 for Figure 1 A partial detail diagram of area A1 in the display panel shown;

[0018] Figure 4 A schematic diagram of a display panel provided in an embodiment of this application;

[0019] Figure 5 A schematic diagram of a display panel provided in an embodiment of this application;

[0020] Figure 6 for Figure 4 A partial detail diagram of area A2 in the display panel shown;

[0021] Figure 7 This is a partially enlarged schematic diagram of a display panel provided in an embodiment of this application;

[0022] Figure 8 for Figure 3 and Figure 6 A cross-sectional view along the N1-N2 direction;

[0023] Figure 9 This is a partially enlarged schematic diagram of a display panel provided in an embodiment of this application;

[0024] Figure 10 This is a partially enlarged schematic diagram of a display panel provided in an embodiment of this application;

[0025] Figure 11 This is a partially enlarged schematic diagram of a display panel provided in an embodiment of this application;

[0026] Figure 12 A schematic diagram of a display device provided in an embodiment of this application;

[0027] Figure 13 This is a schematic diagram of another display device provided in the embodiments of this application.

Detailed Implementation Methods

[0028] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0029] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0030] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0031] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0032] In the description of this specification, it should be understood that the terms "substantially", "approximately", "about", "about", "generally", "largely" used in the claims and embodiments of this application refer to values ​​that can be generally agreed upon within a reasonable range of process operations or tolerances, rather than a precise value.

[0033] It should be understood that although the terms first, second, third, etc., may be used to describe signal lines, scan lines, etc. in the embodiments of this application, these signal lines, etc., should not be limited to these terms. These terms are only used to distinguish signal lines, scan lines, etc. from each other. For example, without departing from the scope of the embodiments of this application, a first signal line may also be referred to as a second signal line, and similarly, a second signal line may also be referred to as a first signal line.

[0034] Through meticulous and in-depth research, the applicant in this case has provided a solution to the problems existing in the prior art.

[0035] Figure 1 This is a schematic diagram of a display panel provided in an embodiment of this application. Figure 2 for Figure 1 A cross-sectional view along the M1-M2 direction.

[0036] Combination Figure 1 and Figure 2 The display panel 001 provided in this application embodiment includes a substrate 01, a plurality of light-emitting device groups 02 and a plurality of first signal lines L1, wherein the light-emitting device groups 02 and the first signal lines L1 are disposed on the same side of the substrate 01.

[0037] The display panel 001 includes multiple light-emitting device groups 02 arranged along a first direction Y, and each light-emitting device group 02 includes multiple light-emitting devices 20 arranged along a second direction X. The second direction X intersects the first direction Y; specifically, the second direction X can be perpendicular to the first direction Y. The light-emitting device 20 can be either a sub-millimeter light-emitting diode (mini LED) or a micro light-emitting diode (micro LED).

[0038] The display panel 001 includes multiple first signal lines L1 arranged along a first direction Y, and the first signal lines L1 can extend substantially along a second direction X. The first signal lines L1 are correspondingly arranged with the light-emitting device group 02, and the first signal lines L1 are electrically connected to at least some of the light-emitting devices 20 in the correspondingly arranged light-emitting device group 02. That is, the first signal lines L1 can be signal lines that transmit signals to multiple light-emitting devices 20 in the light-emitting device group 02.

[0039] In this embodiment, the display panel 001 further includes a plurality of pixel circuit groups 03, which are disposed on the same side of the substrate 01 as the light-emitting device group 02. The plurality of pixel circuit groups 03 are arranged along a first direction Y, and each pixel circuit group 03 includes a plurality of pixel circuits 30 arranged along a second direction X.

[0040] In this configuration, pixel circuit group 03 is correspondingly arranged with light-emitting device group 02, and pixel circuit 30 in pixel circuit group 03 is electrically connected to light-emitting device 20 in the corresponding light-emitting device group 02. For example, Figure 1 As shown, pixel circuit group 03 and light-emitting device group 02 are arranged in a one-to-one correspondence.

[0041] Furthermore, the orthographic projection of the pixel circuit group 03 on the substrate 01 can be non-overlapping with the orthographic projection of the correspondingly arranged light-emitting device group 02 on the substrate 01. Therefore, the orthographic projections of the pixel circuit group 03 and the correspondingly arranged light-emitting device group 02 on the substrate 01 are arranged along the first direction Y. Figure 1 As shown, the pixel circuit group 03 and the corresponding light-emitting device group 02 are arranged along the first direction Y. Furthermore, the pixel circuit 30 and the corresponding light-emitting device 20 are arranged along the first direction Y.

[0042] When the light-emitting device 20 is a sub-millimeter light-emitting diode or a micro light-emitting diode, the light-emitting device 20 can be transferred to an array substrate using mass transfer technology. The array substrate refers to a substrate on which pixel circuits 30, various signal lines, etc., are formed. For example... Figure 2 As shown, the array substrate includes a first signal line L1, a pixel circuit 30, a cathode pad 220, and an anode pad 210. The cathode 22 in the light-emitting device 20 is bonded to the cathode pad 220, and the anode 21 in the light-emitting device 20 is bonded to the anode pad 210. One of the cathode pads 220 and the anode pad 210 is electrically connected to the first signal line L1, and the other is electrically connected to the pixel circuit 30.

[0043] For example, such as Figure 2 As shown, when the light-emitting device 20 is a sub-millimeter light-emitting diode or a miniature light-emitting diode, the first signal line L1 can be electrically connected to the cathode pad 220. That is, the first signal line L1 is electrically connected to the cathode 22 of the sub-millimeter light-emitting diode or the miniature light-emitting diode and provides a cathode signal for the sub-millimeter light-emitting diode or the miniature light-emitting diode. At this time, the anode 21 of the sub-millimeter light-emitting diode or the miniature light-emitting diode can be electrically connected to the pixel circuit 30 through the anode pad 210.

[0044] Furthermore, when the light-emitting device 20 is a sub-millimeter light-emitting diode or a micro light-emitting diode, the first signal line L1 can be electrically connected to the anode pad 210, that is, the first signal line L1 is electrically connected to the anode 21 of the sub-millimeter light-emitting diode or the micro light-emitting diode and provides an anode signal for the sub-millimeter light-emitting diode or the micro light-emitting diode. At this time, the cathode 22 of the sub-millimeter light-emitting diode or the micro light-emitting diode can be electrically connected to the pixel circuit 30 through the cathode pad 220.

[0045] Since different pixel circuits 30 can output different electrical signals to the light-emitting device 20, at least some of the different first signal lines L1 can provide the same signal to the light-emitting devices 20 to which they are respectively electrically connected. In this case, these different first signal lines L1 can be electrically connected together to reduce impedance. For example, as... Figure 1 As shown, all the first signal lines L1 can be electrically connected together. Multiple first signal lines L1 are then electrically connected together via connecting electrodes L10 to form a mesh-like conductive structure. The first signal lines L1 are the portions of the mesh-like conductive structure extending along the second direction X. Furthermore, the connecting electrodes L10 and the first signal lines L1 can be located in different conductive film layers.

[0046] Figure 3 for Figure 1 A partial detail diagram of area A1 in the display panel shown.

[0047] It should be noted that, in addition to the first signal line L1, the signal lines in the array substrate may also include a second signal line L2, a data line L3, a first scan line SL1, a second scan line SL2, a third scan line SL3, and a reset signal line L4, all electrically connected to the pixel circuit 30. Typically, signal lines with intersecting extension directions are located in different film layers, while signal lines with parallel extension directions can be located in the same film layer. If the first scan line SL1, the second scan line SL2, and the third scan line SL3 extend along the second direction X, then the first signal line L1 can be disposed in the same layer as the first scan line SL1, the second scan line SL2, and the third scan line SL3. If the second signal line L2 and the data line L3 extend along the first direction Y, then the connecting electrode L10 can be disposed in the same layer as the second signal line L2 and the data line L3.

[0048] Specifically, when the first signal line L1 is electrically connected to the cathode pad 220, the first signal line L1 is used to transmit a negative power supply voltage, and the second signal line L2 can transmit a positive power supply voltage for the pixel circuit 30; when the first signal line L1 is electrically connected to the anode pad 210, the first signal line L1 is used to transmit a positive power supply voltage, and the second signal line L2 can transmit a negative power supply voltage for the pixel circuit 30.

[0049] It should be noted that, in the embodiments of this application, the type and number of signal lines can be set according to the specific circuit structure of the pixel circuit 30, and this application does not limit this.

[0050] In this embodiment, the plurality of first signal lines L1 includes at least a first type of first signal line L11, and the orthographic projection of the first type of first signal line L11 on the substrate 01 at least partially overlaps with the orthographic projection of the corresponding light-emitting device group 02 on the substrate 01. That is, some of the first signal lines L1 included in the display panel 001 overlap with the light-emitting device 20 electrically connected to them along the thickness direction of the display panel 001.

[0051] The orthographic projection of the first type of first signal line L11 on the substrate 01 and the orthographic projection of the corresponding light-emitting device group 02 on the substrate 01 at least partially overlap means that at least a portion of the first type of first signal line L11 is disposed in the region where the light-emitting device group 02 is located and is located below the light-emitting device group 02. Further, the orthographic projection of the first type of first signal line L11 on the substrate 01 and the orthographic projection of the cathode pads electrically connected to the cathodes of the plurality of light-emitting devices 20 in the corresponding light-emitting device group 02 on the substrate 01 overlap along the second direction X.

[0052] Along the second direction X, the two ends of the orthographic projection of the first type of first signal line L11 on the substrate 01 can protrude beyond the orthographic projection of the corresponding light-emitting device group 02 on the substrate 01; the portion of the orthographic projection of the first type of first signal line L11 on the substrate 01 that overlaps with the orthographic projection of the light-emitting device 20 on the substrate 01 is completely covered by the light-emitting device 20. This can be understood as the first type of first signal line L11 moving closer to the position of its corresponding light-emitting device group 02 along the first direction Y, causing the first type of first signal line L11 to overlap with its corresponding light-emitting device group 02.

[0053] In the technical solution provided by the embodiments of this application, by setting the first type of first signal line L11 in the area where the light-emitting device group 02 is located, the space required to specially set the first signal line L1 in the planar area of ​​the display panel 001 is reduced, and the layout design of the pixel circuit 30 and its electrically connected signal lines is easily realized.

[0054] In one embodiment of this application, such as Figure 1 , Figure 2 and Figure 3 As shown, the plurality of first signal lines L1 also includes a second type of first signal line L12. The orthographic projection of the second type of first signal line L12 on the substrate 01 does not overlap with the orthographic projection of the corresponding light-emitting device group 02 on the substrate 01. That is, the orthographic projections of some of the first signal lines L1 included in the display panel 001 and the light-emitting devices 20 electrically connected to them on the substrate 01 are arranged along the first direction Y.

[0055] The absence of overlap between the orthographic projection of the second type of first signal line L12 on the substrate 01 and the orthographic projection of its corresponding light-emitting device group 02 on the substrate 01 means that the second type of first signal line L12 and the corresponding light-emitting device group 02 are disposed in different areas of the display panel 001. Therefore, the orthographic projection of the second type of first signal line L12 on the substrate 01 and the orthographic projection of the cathode pads 220 and anode pads 210 electrically connected to the cathodes and anodes of the multiple light-emitting devices 20 in the corresponding light-emitting device group 02 on the substrate 01 along the second direction X do not overlap.

[0056] In one technical solution of this embodiment, the orthographic projection of the light-emitting device group 02, which is corresponding to the second type of first signal line L12, onto the substrate 01 is located between the orthographic projection of the corresponding second type of first signal line L12 onto the substrate 01 and the orthographic projection of the corresponding pixel circuit group 03 onto the substrate 01. That is, in the orthographic projections of the second type of first signal line L12 and its corresponding pixel circuit group 03 and light-emitting device group 02 onto the substrate 01, the orthographic projections of the pixel circuit group 03, the light-emitting device group 02, and the second type of first signal line L12 are arranged sequentially along the first direction Y.

[0057] Furthermore, since the second type of first signal line L12 and its electrically connected cathode pad 220 are arranged along the first direction Y, the second type of first signal line L12 and the cathode pad 230 do not overlap in the direction perpendicular to the surface of the display panel 001. Therefore, the area below the cathode pad 220 can have a relatively flat bearing surface. This ensures a high contact yield between the cathode pad 220 and the cathode 22 of the light-emitting device 20.

[0058] Figure 4 This is a schematic diagram of a display panel provided in an embodiment of this application. Figure 5 This is a schematic diagram of a display panel provided in an embodiment of this application.

[0059] In one embodiment of this application, such as Figure 1 , Figure 4 and Figure 5 As shown, among the multiple first signal lines L1 arranged along the first direction Y, at least one first signal line L1 near the edge of the display panel 001 is a first type of first signal line L11. For example, the first direction Y is the column direction and the second direction X is the row direction, such as... Figure 1 and Figure 5 As shown, the bottommost first signal line L1 of the display panel 001 can be a first type of first signal line L11, that is, the bottommost first signal line L1 of the display panel 001 can at least partially overlap with its corresponding light-emitting device group 02 in a direction perpendicular to the surface of the display panel 001; as Figure 4 and Figure 5 As shown, the first signal line L1 at the top of the display panel 001 can be a first type of first signal line L11, that is, the first signal line L1 at the top of the display panel 001 can at least partially overlap with its corresponding light-emitting device group 02 in a direction perpendicular to the surface of the display panel 001.

[0060] By setting the first signal line L1, which is closer to the edge of the display panel 001, as the first signal line L11 of the first type, the light-emitting device 20 is closer to the edge of the display panel 001, and the risk of black borders appearing on the display panel 001 during display can be greatly reduced.

[0061] In one technical solution corresponding to this embodiment, combined with Figure 1 , Figure 5 and Figure 3 The light-emitting device group 02 near the lower edge of the display panel 001 is disposed on the side of its corresponding pixel circuit group 03 facing the lower edge, and the first signal line L1 corresponding to the light-emitting device group 02 is a first type of first signal line L11 and overlaps with the light-emitting device group 02 in a direction perpendicular to the surface of the display panel 001.

[0062] Figure 6 for Figure 4 A partial detail diagram of area A2 in the display panel shown.

[0063] In one technical solution corresponding to this embodiment, combined with Figure 4 , Figure 5 and Figure 6 In one technical solution corresponding to this embodiment, combined with Figure 3 , Figure 4 and Figure 6 The light-emitting device group 02 near the upper edge of the display panel 001 is disposed on the side of its corresponding pixel circuit group 03 facing the upper edge, and the first signal line L1 corresponding to the light-emitting device group 02 is a first type of first signal line L11 and overlaps with the light-emitting device group 02 in a direction perpendicular to the surface of the display panel 001.

[0064] When the display panel 001 includes both a first type of first signal line L11 and a second type of first signal line L12, the second type of first signal line L12 can be the first signal line L1 that is far from the edge of the display panel 001. That is, the orthographic projection of the first type of first signal line L11 on the substrate 01 is located on the side of the orthographic projection of the second type of first signal line L12 on the substrate 01 that is close to the edge of the substrate 01.

[0065] Combination Figure 1 and Figure 3 , Figure 4 and Figure 6The second type of first signal line L12 and the corresponding light-emitting device group 02 are arranged along the first direction Y. The electrical connection between the second type of first signal line L12 and the corresponding cathode pad 220 can be achieved by a connecting wire extending along the first direction Y. When the first type of first signal line L11 overlaps with the corresponding light-emitting device group 02, the first type of first signal line L11 overlaps with the corresponding cathode pad 220. This reduces the space required to specifically set up the first signal line L1 in the planar area of ​​the display panel 001, and also reduces the space required to set up the connecting wire extending along the second direction Y and connecting the first signal line L1 to the cathode pad 220 in the planar area of ​​the display panel 001. Furthermore, when the second type of first signal line L12 is located away from the edge of the display panel 001 and the first type of first signal line L11 is located close to the edge of the display panel 001, the distance between the first type of first signal line L11 and the edge of the display panel 001 can be reduced, effectively avoiding the risk of black borders appearing on the display panel 001 during display.

[0066] Figure 7 This is a partially enlarged schematic diagram of a display panel provided in an embodiment of this application.

[0067] In one embodiment of this application, such as Figure 7 As shown, the width of the portion of the first signal line L11 that overlaps with the light-emitting device 20 is greater than the width of at least the portion of the first signal line L11 that does not overlap with the light-emitting device 20. Wherein, the first signal line L11 extends substantially along the second direction X, and the width of the first signal line L11 refers to the width of the first signal line L11 along the first direction Y.

[0068] In this embodiment, the width of the first type of first signal line L11 is differentiated. The portion of the first type of first signal line L11 that overlaps with the light-emitting device 20 in a direction perpendicular to the surface of the display panel 001 has a larger width. When the material of the first type of first signal line L11 is reflective metal, this portion can reflect the light emitted by the light-emitting device 20 towards the substrate 01 towards the light-emitting surface of the display panel 001, thereby increasing the brightness of the display panel 001. Furthermore, the width of at least the portion of the first type of first signal line L11 that does not overlap with the light-emitting device 20 in a direction perpendicular to the surface of the display panel 001 has a smaller width. This reduces the overlap area between the first type of first signal line L11 and other signal lines, thereby avoiding excessive influence of parasitic capacitance on signal transmission.

[0069] In one embodiment of this application, such as Figure 3 , Figure 6 and Figure 7As shown, the display panel 001 also includes multiple second signal lines L2, which are disposed on the same side of the substrate 01 as the first signal lines L1. The multiple second signal lines L2 are arranged along a second direction X and can extend substantially along a first direction Y. The orthographic projections of the first signal lines L1 and L2 on the substrate 01 intersect. Therefore, along a direction perpendicular to the surface of the display panel 001, the first type of first signal line L11 and the second signal line L1 at least partially overlap, meaning that the orthographic projections of the first type of first signal line L11 and the second signal line intersect on the substrate 01.

[0070] In this configuration, one of the first signal line L1 and the second signal line L2 is used to transmit a first power supply voltage, and the other is used to transmit a second power supply voltage. Specifically, the first power supply voltage can be a negative power supply voltage, and the second power supply voltage can be a positive power supply voltage. Therefore, when the first signal line L1 is electrically connected to the cathode pad 220, the first signal line L1 is used to transmit the first power supply voltage, and the second signal line L2 is used to transmit the second power supply voltage.

[0071] Figure 8 for Figure 3 and Figure 6 A cross-sectional view along the N1-N2 direction.

[0072] In one technical solution corresponding to this embodiment, combined with Figure 3 , Figure 6 and Figure 8 An insulating layer 04 is provided between the film layer containing the first signal line L1 and the film layer containing the second signal line L2. The thickness of this insulating layer 04 in the overlapping region of the first signal line L11 and the second signal line L2 is greater than the thickness in at least some other regions. Specifically, the insulating layer 04 located between the first signal line L11 and the second signal line L2 in the overlapping region is thickened.

[0073] like Figure 3 and Figure 6 As shown, since the first signal line L11 and the corresponding cathode pad 220 overlap in a direction perpendicular to the surface of the display panel 001, the location where the first signal line L11 overlaps with the second signal line L2 is closer to the cathode pad 220. During the assembly of the light-emitting device 20, the stress of assembly can damage the insulating layer near the cathode pad 220 and the anode pad 210, thus increasing the risk of damage to the insulating layer at the overlap location of the first signal line L11 and the second signal line L2. By increasing the thickness of the insulating layer 04 located between the first signal line L11 and the second signal line L2 and at their overlap location, the impact of damage to the insulating layer 04 at this location on the yield can be mitigated.

[0074] Furthermore, when the first signal line L11 and the second signal line L2 are used to transmit negative and positive power supply voltages respectively, the large voltage difference between the negative and positive power supply voltages increases the risk of the insulation layer 04 located between the first signal line L11 and the second signal line L2 being damaged and subsequently broken down. Increasing the thickness of this portion of the insulation layer 04 can effectively reduce this risk of breakdown.

[0075] Figure 9 This is a partially enlarged schematic diagram of a display panel provided in an embodiment of this application.

[0076] In one technical solution corresponding to this embodiment, such as Figure 9 As shown, the width of the portion of the second signal line L2 that overlaps with the first signal line L11 of the first type is less than the width of at least the portion of the second signal line L2 that does not overlap with the first signal line L11 of the first type. Wherein, the second signal line L2 extends substantially along the first direction Y, and the width of the second signal line L2 refers to the width of the second signal line L2 along the second direction X.

[0077] For example, such as Figure 9 As shown, the width of the portion of the second signal line L2 that overlaps with the first signal line L11 of the first type is smaller than the width of the portion of the second signal line L2 that overlaps with the second signal line L12 of the second type.

[0078] In this technical solution, the width of the second signal line L2 is differentiated. Specifically, the width of the portion of the second signal line L2 that overlaps with the first type of first signal line L11 in a direction perpendicular to the surface of the display panel 001 is smaller. This reduces the overlap area between the second signal line L2 and the first type of first signal line L11 in the direction perpendicular to the surface of the display panel 001. Consequently, the area of ​​the insulating layer 04 located between the second signal line L2 and the first type of first signal line L11 in their overlapping area is reduced, thus lowering the risk of the insulating layer 04 being punctured.

[0079] In addition, the width of at least a portion of the second signal line L2 that does not overlap with the first signal line L1 in the direction perpendicular to the surface of the display panel 001 is relatively large, which can alleviate the problem of excessive increase in impedance caused by the reduction in the width of some areas of the second signal line L2.

[0080] Figure 10 This is a partially enlarged schematic diagram of a display panel provided in an embodiment of this application.

[0081] In one technical solution corresponding to this embodiment, such as Figure 10As shown, the width of the portion of the first signal line L11 that overlaps with the second signal line L2 is less than the width of at least the portion of the first signal line L11 that does not overlap with the second signal line L2. Wherein, the first signal line L11 extends substantially along the second direction X, and the width of the first signal line L11 refers to the width of the first signal line L11 along the first direction Y.

[0082] In this technical solution, the width of the first type of first signal line L11 is differentiated. Specifically, the width of the portion of the first type of first signal line L11 that overlaps with the second signal line L2 in a direction perpendicular to the surface of the display panel 001 is smaller. This reduces the overlap area between the first type of first signal line L11 and the second signal line L2 in the direction perpendicular to the surface of the display panel 001. Consequently, the area of ​​the insulating layer 04 located between the first type of first signal line L11 and the second signal line L2 in their overlap area is reduced, thus lowering the risk of the insulating layer 04 being punctured.

[0083] In addition, the width of at least a portion of the first signal line L11 that does not overlap with the second signal line L2 in the direction perpendicular to the surface of the display panel 001 is relatively large, which can alleviate the problem of excessive increase in impedance caused by the reduction in the width of some areas of the first signal line L11.

[0084] Figure 11 This is a partially enlarged schematic diagram of a display panel provided in an embodiment of this application.

[0085] Furthermore, the overlap area between the second signal line L2 and the first type of first signal line L11 along the direction perpendicular to the surface of the display panel 001 can be reduced in other ways. For example, such as... Figure 11 The width of the portion of the first signal line L11 that overlaps with the second signal line L2 is less than the width of at least the portion of the first signal line L11 that does not overlap with the second signal line L2, and the width of the portion of the second signal line L2 that overlaps with the first signal line L11 is less than the width of at least the portion of the second signal line L2 that does not overlap with the first signal line L11.

[0086] Figure 12 This is a schematic diagram of a display device provided in an embodiment of this application.

[0087] like Figure 12 As shown in the figure, this application provides a display device, which includes the display panel 001 provided in the above embodiment. The display device provided in this application can be an electronic device such as a mobile phone, computer, television, smart wearable device (e.g., smartwatch), and in-vehicle display device, and this application does not specifically limit it.

[0088] In the display device, by setting the first signal line L11 of the first type in the area where the light-emitting device group 02 is located, the space required to set the first signal line L1 in the planar area of ​​the display device is reduced, and the layout design of the pixel circuit 30 and the signal lines electrically connected thereto is easier to realize.

[0089] Figure 13 This is a schematic diagram of another display device provided in an embodiment of this application.

[0090] In one embodiment of this application, such as Figure 13 As shown, the display device can be formed by splicing multiple display panels 001 as provided in the above embodiments. At least two display panels 001 are spliced ​​together along the first direction Y. Exemplarily, the spliced ​​display device can be a light-emitting diode splicing screen, a movie screen, a long-distance viewing electronic product, etc., and this application embodiment does not impose specific limitations.

[0091] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A display panel, characterized in that, include: Substrate; Multiple light-emitting device groups are disposed on one side of the substrate. The plurality of light-emitting device groups are arranged along a first direction, and the light-emitting device groups include a plurality of light-emitting devices arranged along a second direction; Multiple first signal lines are disposed on the same side of the substrate as the light-emitting device group; the multiple first signal lines are arranged along the first direction; the first signal lines are correspondingly disposed to the light-emitting device group, and the first signal lines are electrically connected to at least a portion of the light-emitting devices in the correspondingly disposed light-emitting device group; the first signal lines are electrically connected to the cathode of the light-emitting device or to the anode of the light-emitting device. Among them, the plurality of first signal lines include at least a first type of first signal line; the orthographic projection of the first type of first signal line on the substrate and the orthographic projection of the corresponding light-emitting device group on the substrate at least partially overlap; The plurality of first signal lines also includes a second type of first signal line; the orthographic projection of the second type of first signal line on the substrate does not overlap with the orthographic projection of the corresponding light-emitting device group on the substrate. The orthographic projection of the first type of first signal line on the substrate is located on the side of the orthographic projection of the second type of first signal line on the substrate closer to the edge of the substrate.

2. The display panel according to claim 1, characterized in that, The display panel also includes: Multiple pixel circuit groups are disposed on the same side of the substrate as the light-emitting device group; the multiple pixel circuit groups are arranged along the first direction and each pixel circuit group includes multiple pixel circuits arranged along the second direction; the pixel circuit groups are correspondingly disposed to the light-emitting device groups, and the pixel circuits in the pixel circuit groups are electrically connected to the light-emitting devices in the correspondingly disposed light-emitting device groups. Wherein, the orthographic projection of the pixel circuit group on the substrate does not overlap with the orthographic projection of the corresponding light-emitting device group on the substrate; The orthographic projection of the light-emitting device group corresponding to the second type of first signal line on the substrate is located between the orthographic projection of the corresponding second type of first signal line on the substrate and the orthographic projection of the corresponding pixel circuit group on the substrate.

3. The display panel according to claim 1, characterized in that, The display panel also includes: Multiple second signal lines are disposed on the same side of the substrate as the first signal line; the multiple second signal lines are arranged along the second direction; Wherein, along the direction perpendicular to the surface where the display panel is located, the first type of first signal line and the second signal line at least partially overlap.

4. The display panel according to claim 3, characterized in that, An insulating layer is provided between the film layer containing the first signal line and the film layer containing the second signal line, and the thickness of the insulating layer in the overlapping area of ​​the first signal line and the second signal line is greater than the thickness of the insulating layer in at least some other areas.

5. The display panel according to claim 3, characterized in that, The width of the portion of the second signal line that overlaps with the first signal line of the first type is less than the width of at least the portion of the second signal line that does not overlap with the first signal line of the first type.

6. The display panel according to claim 3, characterized in that, The width of the portion of the first signal line that overlaps with the second signal line is less than the width of at least the portion of the first signal line that does not overlap with the second signal line.

7. The display panel according to any one of claims 3, characterized in that, The first signal line is used to transmit a first power supply voltage and the second signal line is used to transmit a second power supply voltage.

8. The display panel according to claim 1, characterized in that, The width of the portion of the first signal line of the first type that overlaps with the light-emitting device is greater than the width of at least the portion of the first signal line of the first type that does not overlap with the light-emitting device.

9. The display panel according to claim 1, characterized in that, The light-emitting device is either a micro light-emitting diode or a sub-millimeter light-emitting diode.

10. A display device, characterized in that, Includes the display panel as described in any one of claims 1-9.

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