Buck converter

Abstract

A voltage reducing converter is provided that improves power efficiency. A voltage reducing converter of one embodiment of the invention is used to convert an input voltage to an output voltage and can include an inductor that is charged or discharged to regulate the output voltage, a voltage shifting component for shifting the input voltage to a lower level than the input voltage for charging the inductor, and a discharge branch coupled to the inductor when the inductor is discharged.

Description

Technical Field

[0001] This invention relates to the field of circuit technology, and in particular to a buck converter. Background Technology

[0002] A buck converter reduces the input voltage (power supply) to the output voltage (load). It is a type of switched-mode power supply (SMPS) and typically uses an inductor as the energy storage device.

[0003] In traditional inductor-based buck converters operating at high conversion rates (e.g., from 4V to 1V), the main power loss is switching loss (CV). 2 F). High input voltages (e.g., 4V) lead to significant switching losses. In addition to switching losses, conduction losses (IR) should also be considered when designing a buck converter. 2 ).

[0004] A buck converter with high power efficiency is needed. Summary of the Invention

[0005] This invention provides a buck converter that improves power efficiency.

[0006] In one embodiment, the buck converter provided by the present invention is used to convert an input voltage into an output voltage, and may include: an inductor, which is charged or discharged to stabilize the output voltage; a voltage shifting component for shifting the input voltage to a level lower than the input voltage for charging the inductor; and a discharge branch coupled to the inductor when the inductor is discharged. Attached Figure Description

[0007] Figure 1 A buck converter 100 according to an exemplary embodiment of the present invention is shown.

[0008] Figure 2A The diagram illustrates the charging phase (Φ1) of inductor L.

[0009] Figure 2B The diagram illustrates the discharge phase (Φ2) of inductor L.

[0010] Figure 3 A buck converter 300 according to another exemplary embodiment of the present invention is shown. Detailed Implementation

[0011] Certain terms are used in the specification and claims to refer to specific components. Those skilled in the art will understand that hardware manufacturers may use different names to refer to the same component. This specification and claims do not distinguish components based on differences in name, but rather on differences in function. The terms "comprising" and "including" used throughout the specification and claims are open-ended and should be interpreted as "comprising but not limited to." "Substantially" or "approximately" means that, within an acceptable margin of error, those skilled in the art can solve the technical problem and substantially achieve the technical effect. Furthermore, the terms "coupled" or "coupled" herein include any direct and indirect electrical connection means. Therefore, if a first device is described as coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means.

[0012] The following description is for illustrative purposes only and should not be construed as limiting. The scope of the invention is best determined by referring to the appended claims.

[0013] Figure 1 A buck converter 100 according to an exemplary embodiment of the present invention is shown.

[0014] A buck converter 100 that converts an input voltage VIN to an output voltage VA includes an inductor L, a voltage shift component 102, and a discharge branch 104. The inductor L is charged and discharged to stabilize the output voltage VA. The voltage shift component 102 shifts the input voltage VIN to a lower level VLX to charge the inductor L through level VLX. When the inductor L discharges, the discharge branch 104 is coupled to the inductor L.

[0015] Due to the voltage displacement component 102, the switching loss (CV) 2 F) is significantly suppressed by the lower operating voltage supplied to the parasitic capacitor. Figure 1 In this embodiment, the voltage displacement component 102 is a capacitor C, but the capacitor C can be replaced by any other component capable of voltage displacement.

[0016] Because of the discharge branch 104, the total current in the circuit is suppressed, thereby reducing the conduction loss (IR). 2 () was significantly suppressed.

[0017] The voltage shifting component 102 also suppresses the voltage ripple of VLX, reducing it from VIN (VIN-VA). Therefore, the inductor current ripple is also suppressed, thereby further suppressing inductor alternating current resistance (ACR) losses.

[0018] The following paragraphs describe the specific details of the buck converter 100.

[0019] As shown in the figure, the buck converter 100 includes a first switch SW1. In the buck converter 100, the first switch SW1 is a p-channel metal-oxide-semiconductor (PMOS) transistor, but is not limited thereto. When the first switch SW1 is turned on, it couples the input voltage VIN to a first terminal nC1 of the voltage shifting component 102. The voltage shifting component 102 includes a second terminal nC2, which is coupled to a first terminal nL1 of the inductor L. The inductor L includes a second terminal nL2, which is coupled to an output terminal of the buck converter 100 for providing the output voltage VA.

[0020] The buck converter 100 includes a second switch SW2 and a third switch SW3. In the buck converter 100, the second switch SW2 and the third switch SW3 are n-channel metal-oxide-semiconductor (NMOS) transistors, but are not limited to these. When the second switch SW2 is turned on, it couples the first terminal nL1 of the inductor L to ground (GND). Regarding the third switch SW3, the turned-on third switch SW3 couples the output terminal (VA) of the buck converter 100 to the first terminal nC1 of the voltage shifting component 102.

[0021] In an exemplary embodiment, the first switch SW1 is turned on during the charging phase Φ1 of inductor L, and the second switch SW2 and the third switch SW3 are turned on during the discharging phase Φ2 of inductor L. In another exemplary embodiment, when the first switch SW1 is turned on during the charging phase Φ1 of inductor L, the second switch SW2 and the third switch SW3 are turned off. When the second switch SW2 and the third switch SW3 are turned on during the discharging phase Φ2 of inductor L, the first switch SW1 is turned off.

[0022] During the discharge phase Φ2 of inductor L, a voltage displacement Vcap, provided by voltage displacement component 102, is set to reduce the input voltage VIN. In this example, during the discharge phase Φ2 of inductor L, the voltage displacement Vcap is set to VA.

[0023] Figure 2AThe diagram illustrates the charging phase (Φ1) of inductor L. First switch SW1 is turned on, and voltage shifting component 102 and inductor L form a voltage divider between the input (VIN) and output (VA) terminals of buck converter 100. While providing voltage VIN to parasitic capacitor C1 at terminal nC1, a voltage divider (VIN-VA) is provided to parasitic capacitor C2 at terminal nC2.

[0024] Figure 2B The diagram illustrates the discharge phase (Φ2) of inductor L. Second switch SW2 and third switch SW3 are turned on (Φ2), and the current flowing through inductor L is reduced by the branch current flowing through the turned-on third switch SW3. Terminal nC1 (with parasitic capacitor C1) is at the output voltage VA due to the turned-on third switch SW3. Terminal nC2 (with parasitic capacitor C2) is at ground voltage GND due to the turned-on second switch SW2. Capacitor C is charged to store a voltage (VA-GND) as the voltage displacement Vcap required for the charging phase (Φ1) of inductor L.

[0025] In this design, the voltage swing across parasitic capacitor C1 is VIN to VA, and the voltage swing across parasitic capacitor C2 is (VIN - VA) to GND. Switching losses (CV) 2 F) is:

[0026] C1(VIN-VA) 2 F+C2(VIN-VA-GND) 2 F,

[0027] That is, (C1+C2)(VIN-VA) 2 F. (VIN-VA) 2 Usually much smaller than VIN 2 Switching loss (CV) 2 F) was significantly suppressed.

[0028] For example, when the input voltage VIN is 4V and the output voltage VA is 1V, (VIN-VA) 2 It is 9, far less than the VIN of 16. 2 Compared to conventional buck converters, the power efficiency of the voltage converter 100 is significantly improved by suppressing switching losses.

[0029] Regarding conduction loss (IR) 2 ), which is:

[0030] (IL*D) 2 *Rp+(IL*(1-D)) 2 *Rn1+Ic 2 *Rn2+IL 2 *RDC

[0031] Where IL is the current flowing through inductor L, D is the charging / discharging duty cycle of inductor L, Ic is the current flowing through capacitor C, Rp is the parasitic resistance of the first switch SW1 (PMOS transistor), Rn1 is the parasitic resistance of the second switch SW2 (NMOS transistor), Rn2 is the parasitic resistance of the third switch SW3 (NMOS transistor), and RDC is the equivalent impedance of inductor L. Due to the design of the discharge branch, the currents Ic and IL in the conduction loss function are significantly suppressed, thereby significantly suppressing the conduction loss.

[0032] In this design, the conventional inductor current is divided into Ic and IL, with each of Ic and IL being half the conventional inductor current. Therefore, the conduction power is reduced to (1 / 2). 2 +(1 / 2) 2 It is half the traditional conduction loss.

[0033] Furthermore, this section discusses the duty cycle D of the buck converter 100. To operate the buck converter 100, the duty cycle D should be set to VA / (VIN-VA). Conventional buck converters without a voltage divider design typically operate at a duty cycle of VA / VIN. For a 4V to 1V conversion, the buck converter 100 has a duty cycle of 1 / 3, which provides better power efficiency compared to conventional buck converters with a 1 / 4 duty cycle.

[0034] The power efficiency of this invention is much better than that of traditional buck converter circuits.

[0035] In the preceding example, the output (VA) of the buck converter 100 is directly coupled to the capacitor C via a third switch SW3 during the discharge phase (Φ2) of the inductor L, to charge the capacitor C and store the output voltage VA as the voltage displacement Vcap required for the discharge phase (Φ2) of the inductor L. In other embodiments, the capacitor C may be charged to store other voltages as voltage displacement Vcap.

[0036] Figure 3 A buck converter 300 according to another exemplary embodiment of the present invention is shown.

[0037] The buck converter 300 includes a voltage displacement setting circuit 302 for converting the output voltage VA of the buck converter 300 into a desired voltage Ve for charging the capacitor C during the discharge phase Φ2 of the inductor L. Therefore, during the charging phase Φ1 of the inductor L, the capacitor C provides Ve (=Ve-GND) as a voltage displacement Vcap.

[0038] In an exemplary embodiment, the desired voltage Ve is b times the output voltage VA, where b is a number. Ve = b * VA, for example, b could be 2.

[0039] In an exemplary embodiment, the desired voltage Ve is b times the output voltage VA plus c, where b and c are two numbers. Ve = b * VA + c.

[0040] In another exemplary embodiment, the desired voltage Ve can be generated in a non-linear manner based on the output voltage VA.

[0041] Any circuit that can generate a desired voltage Ve based on the output voltage VA can be implemented as a voltage displacement setting circuit 302.

[0042] In the preceding embodiments, the voltage shifting component is implemented using a capacitor C. Such a buck converter can be named a series capacitor-inductor buck converter. However, the voltage shifting component is not limited to the single capacitor C shown in the figure.

[0043] It can be noted that the buck converter provided by this invention does not add too many switches to the circuit. Compared to other buck converters that use a large number of switches, the buck converter provided by this invention, which uses a limited number of switches, does reduce switching losses and does not require complex circuit design.

[0044] While the invention has been described by way of example and according to preferred embodiments, it should be understood that the invention is not limited to the disclosed embodiments. Rather, it is intended to cover various modifications and similar arrangements (which will be apparent to those skilled in the art). Therefore, the scope of the appended claims should be given the broadest interpretation to cover all such modifications and similar arrangements.

Claims

1. A buck converter, characterized in that, Used to convert input voltage to output voltage, including: The inductor is charged or discharged to stabilize the output voltage; A voltage shifting component for shifting the input voltage to a lower level than the input voltage used to charge the inductor; and The discharge branch is coupled to the inductor when the inductor is discharged; A voltage displacement setting circuit is used to convert the output voltage of the buck converter to a desired voltage during the discharge phase of the inductor, so that the voltage displacement component provides the desired voltage as the voltage displacement.

2. The buck converter as described in claim 1, characterized in that, Also includes: A first switch, when the first switch is turned on, is used to couple the input voltage to a first terminal of the voltage displacement component; in: The second end of the voltage displacement component is coupled to the first end of the inductor; The second terminal of the inductor is coupled to the output terminal of the buck converter used to provide the output voltage.

3. The buck converter as described in claim 2, characterized in that, Also includes: A second switch, when turned on, is used to couple the first terminal of the inductor to ground.

4. The buck converter as described in claim 3, characterized in that, Also includes: A third switch, when turned on, is used to couple the output terminal of the buck converter to the first terminal of the voltage displacement component.

5. The buck converter as described in claim 4, characterized in that: The first switch is turned on during the charging phase of the inductor; and The second and third switches are turned on during the discharge phase of the inductor.

6. The buck converter as described in claim 5, characterized in that: During the discharge phase of the inductor, the voltage displacement component is configured to reduce the voltage displacement of the input voltage.

7. The buck converter as described in claim 6, characterized in that: The voltage displacement component is implemented using a capacitor.

8. The buck converter as described in claim 7, characterized in that: During the discharge phase of the inductor, the output terminal of the buck converter is directly coupled to the capacitor via the third switch.

9. The buck converter as described in claim 7, characterized in that: During the discharge phase of the inductor, the capacitor is charged to store the output voltage as the voltage displacement.

10. The buck converter as described in claim 7, characterized in that, The voltage displacement setting circuit is used to convert the output voltage of the buck converter into a desired voltage for charging the capacitor during the discharge phase of the inductor, so that the capacitor provides the desired voltage as the voltage displacement during the charging phase of the inductor.

11. The buck converter as described in claim 10, characterized in that: During the discharge phase of the inductor, the desired voltage is coupled to the capacitor via the third switch.

12. The buck converter as described in claim 11, characterized in that: The desired voltage is b times the output voltage, where b is a number.

13. The buck converter as described in claim 11, characterized in that: The desired voltage is b times the output voltage plus c, where b and c are two numbers.

14. The buck converter as described in claim 5, characterized in that: The first switch is a p-channel metal-oxide-semiconductor transistor; and The second switch and the third switch are n-channel metal-oxide-semiconductor transistors.

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