Solar cell fabrication method using photomask to prepare localized deposition film layers

Abstract

This invention discloses a method for fabricating solar cells using a photomask to prepare a locally deposited film layer, belonging to the field of solar cell fabrication technology. This method uses developing ink as a mask and achieves localized retention of the globally deposited film layer through localized exposure and cleaning. This indirectly realizes localized deposition of the film layer and allows for precise control of the localized deposition area. Compared to traditional photolithography, it eliminates the need for additional photolithography equipment and materials, significantly reducing production costs and facilitating mass production.

Description

Technical Field

[0001] This invention relates to the field of solar cell fabrication technology, and more specifically, to a method for fabricating solar cells using a photomask to prepare a localized deposition film layer. Background Technology

[0002] Traditional HBC solar cells combine the excellent passivation performance of HJT solar cells with the excellent high Jsc performance of IBC solar cells with no front electrode. The PN junction and positive and negative electrodes are placed on the back of the cell, achieving high Jsc and Uoc. Since the PN junction and positive and negative electrodes are placed locally on the back, it adds considerable difficulty to the technology of global deposition (HJT).

[0003] In existing technologies for the fabrication of HBC solar cells, the localization of masks and localized deposition requires additional equipment and materials for photolithography, resulting in high costs and making it unsuitable for mass production.

[0004] Furthermore, given that the use of photomasks is not applicable in mass production, as silicon wafers deform during PECVD thermal deposition, resulting in a mismatch between the design size of the photomask and the deformation of the silicon wafer, making it difficult to accurately control the localized deposition area, this invention proposes a method for preparing solar cells using photomasks to localized deposition films, which is more feasible for mass production than photomasks. Summary of the Invention

[0005] 1. The technical problem that the invention aims to solve

[0006] The existing HBC solar cell fabrication process basically requires photolithography, which is costly and not feasible for mass production. Therefore, this invention provides a method for fabricating solar cells using a photomask to prepare a localized deposition film layer, which can replace photolithography. This allows for the mass production of HBC solar cells, significantly reduces costs compared to photolithography, and does not add any complicated steps.

[0007] 2. Technical Solution

[0008] To achieve the above objectives, the technical solution provided by the present invention is as follows: a method for preparing a solar cell using a photomask to prepare a localized deposition film layer, comprising: S100: selecting a silicon wafer of a certain size and texturing the surface of the silicon wafer;

[0009] S200: After texturing, an intrinsic amorphous silicon i layer is deposited on both sides of the silicon wafer by PECVD, and then a layer of microcrystal n is deposited on both sides by PECVD to achieve the deposition of front and back fields. Finally, a layer of SiNx or SiOx is deposited on the double-sided microcrystal n.

[0010] S300: After step S200, a layer of developing ink is printed on the entire back of the sample, followed by drying, exposure, and development steps;

[0011] S400: On the back side of the cleaned sample after step S300, continue to deposit an i and p layer and a SiNx or SiOx layer by PECVD throughout the entire area, and then perform etching to complete the preparation of the selective i+p layer.

[0012] S500: On the back side of the sample, another transparent conductive film TCO is deposited;

[0013] S600: The sample completed in step S500 is subjected to copper electroplating, and then cleaned to complete the battery preparation.

[0014] As a further improvement of the present invention, in step S100, the texturing process specifically includes rough polishing, pre-cleaning, texturing, SC1, acid washing, SC2, slow lifting, and drying of the original silicon wafer.

[0015] As a further improvement of the present invention, in step S200, the thickness of the intrinsic amorphous silicon i-layer is 1 nm to 20 nm.

[0016] The sheet resistance of the microcrystal n is 0.1 MΩ to 1 GΩ, the refractive index of the microcrystal n at a wavelength of 632 nm is between 2.5 and 3.2, and its thickness is 1 nm to 50 nm; the film deposition temperature of SiNx or SiOx does not exceed 210 °C, the refractive index at a wavelength of 632 nm is 2.0 to 2.5, and the thickness is 10 nm to 100 nm.

[0017] As a further improvement of the present invention, the thickness of the intrinsic amorphous silicon i-layer is 5nm to 10nm, the thickness of the microcrystalline n-layer is 10nm to 30nm, and the thickness of the SiNx or SiOx film layer is 60nm to 80nm.

[0018] As a further improvement of the present invention, step 300 specifically involves: printing a layer of developing ink over the entire sample surface completed in step 200, i.e., the surface where SiNx or SiOx has not been deposited, and exposing the areas where amorphous i and p layers need to be deposited. The ink in the unexposed areas is removed with NaCO3 solution, then the SiNx or SiOx layers in the ink-removed areas are etched away with HF solution, and the remaining ink layer is removed with KOH solution. The exposed i+n layers are then removed with a KOH solution of less than 10%, followed by washing and drying to complete the cleaning step. Step S400 specifically involves:

[0019] After step 300, a layer of i and p layers and a layer of SiNx or SiOx are deposited on the back side of the sample using PECVD. The deposition conditions of the i layer are the same as those for the amorphous silicon i layer described in step 200. The p layer is a boron-doped layer, and the conditions for the SiNx or SiOx layer are the same as those described in step 200. Then, a layer of ink is printed over the entire sample. The areas where ink needs to be retained are then exposed. These areas refer to the areas in step 300 other than those where the amorphous i and microcrystalline n layers are retained. The ink in the unexposed parts of the sample is then removed with Na2CO3 solution. Subsequently, the amorphous i and p layers in the unexposed parts are etched away with KOH solution with a concentration of less than 20%. Since the n layer is protected by SiNx or SiOx, the alkaline washing process of i+p will not etch the i+n layers below. The remaining ink is then removed with KOH, and finally, SiNx or SiOx is removed with HF, completing the preparation of the selective i+p layer.

[0020] As a further improvement of the present invention, in step S500, the transparent conductive film TCO is a single layer or a stack of layers, and the thickness of the transparent conductive film is 50nm to 200nm.

[0021] As a further improvement of the present invention, in step S600, the copper electroplating pattern is a PN doped region, and the P region copper electrode is isolated from the N region copper electrode, with the isolation width between 1μm and 200μm.

[0022] As a further improvement of the present invention, the isolation width of the copper electroplating is 20μm to 100μm.

[0023] As a further improvement of the present invention, in step S600, the sample after copper electroplating is cleaned to remove the TCO in the area outside the copper electrode, forming a PN junction isolation, and then the battery is prepared after cleaning and drying.

[0024] The present invention also provides another method for preparing solar cells using a photomask to prepare a localized deposition film, comprising: S1: selecting a texturized n-type silicon wafer and depositing a CVD intrinsic amorphous silicon i-layer and a microcrystalline silicon n-layer on both sides;

[0025] S2: Deposit another mask layer on the surface of the sample obtained in step S1;

[0026] S3: Print ink on the front and back of the sample obtained in step S2 to form a patterned ink on the back;

[0027] S4: Wash the sample obtained in step S3 in HF acid solution to remove the exposed mask;

[0028] S5: Place the sample obtained in step S4 in a solution that can etch away the ink, remove the ink from the printed ink area, and expose the surface mask layer.

[0029] S6: Place the sample obtained in step S5 in a silicon etching solution to remove the exposed intrinsic i-layer and n-layer.

[0030] S7: The sample obtained in step S6 is coated again to deposit an intrinsic i-layer and a mask layer.

[0031] S8: Continue to print ink on the sample obtained in step S7 to form patterned ink on the back of the sample;

[0032] S9: The sample obtained in step S8 is washed in HF acid solution to remove the bare mask layer, thereby exposing the i layer above the n region;

[0033] S10: Place the sample obtained in step S9 into a solution that can etch away the ink, remove the ink from the printed ink area, and expose the mask layer below the ink.

[0034] S11: Place the sample obtained in step S10 in a silicon etching solution to remove the exposed i-layer;

[0035] S12: The sample obtained in step S11 is washed in HF acid solution to remove the mask layer, thereby exposing the n-layer in the n-region and the i-layer outside the n-region.

[0036] S13: Prepare a boron-doped microcrystalline silicon p-layer on the back side of the sample obtained in step S12 to complete the preparation of the p-region and the tunneling n-region, and deposit an anti-reflection layer on the entire front side of the sample.

[0037] S14: A TCO layer is deposited on the back side of the sample obtained in step S13;

[0038] S15: Pattern the TCO layer on the back side of the sample obtained in step S14, thereby separating the TCO layers above the n region and the p region.

[0039] S16: Screen print Ag electrodes or electroplate copper onto the TCO of the sample obtained in step S15. The two types of gate lines are narrower than TCO to avoid conduction in the NP region, thereby completing the preparation of tunneling HBC.

[0040] Furthermore, in steps S4, S9, and S12, the concentration of the HF acid solution is between 1% and 20%, the temperature is at room temperature, and the cleaning time is between 30 seconds and 300 seconds.

[0041] Furthermore, in step S13, the thickness of the antireflective layer is between 70-90 nm, and the refractive index is between 1.9-2.1.

[0042] 3. Beneficial effects

[0043] Compared with the prior art, the technical solution provided by this invention has the following advantages:

[0044] The present invention provides a method for fabricating solar cells using a photomask to prepare a localized deposition film. This method uses developing ink as a mask and achieves localized retention of the globally deposited film through localized exposure and cleaning. This indirectly realizes the localized deposition of the film and allows for precise control of the localized deposition area. Compared with traditional photolithography technology, it eliminates the need for additional photolithography equipment and materials, greatly reducing production costs and facilitating mass production. Attached Figure Description

[0045] Figure 1 This is a schematic diagram of the sample obtained in step S200 in the first embodiment of the present invention.

[0046] Figure 2 This is a schematic diagram of the sample obtained in step S301 of the first embodiment of the present invention.

[0047] Figure 3 This is a schematic diagram of the sample obtained in step S302 of the first embodiment of the present invention.

[0048] Figure 4 This is a schematic diagram of the sample obtained in step S303 of the first embodiment of the present invention.

[0049] Figure 5 This is a schematic diagram of the sample obtained in step S304 of the first embodiment of the present invention.

[0050] Figure 6 This is a schematic diagram of the sample obtained in step S401 of the first embodiment of the present invention.

[0051] Figure 7 This is a schematic diagram of the sample obtained in step S402 of the first embodiment of the present invention.

[0052] Figure 8 This is a schematic diagram of the sample obtained in step S403 of the first embodiment of the present invention.

[0053] Figure 9 This is a schematic diagram of the sample obtained in step S404 of the first embodiment of the present invention.

[0054] Figure 10 This is a schematic diagram of the sample obtained in step S405 of the first embodiment of the present invention.

[0055] Figure 11 This is a schematic diagram of the sample obtained in step S500 in the first embodiment of the present invention.

[0056] Figure 12 This is a schematic diagram of the sample obtained in step S601 of the first embodiment of the present invention.

[0057] Figure 13This is a schematic diagram of the sample obtained in step S602 of the first embodiment of the present invention.

[0058] Figure 14 This is a schematic diagram of the sample obtained in step S1 of the second embodiment of the present invention.

[0059] Figure 15 This is a schematic diagram of the sample obtained in step S2 of the second embodiment of the present invention.

[0060] Figure 16 This is a schematic diagram of the sample obtained in step S3 of the second embodiment of the present invention.

[0061] Figure 17 This is a schematic diagram of the sample obtained in step S4 of the second embodiment of the present invention.

[0062] Figure 18 This is a schematic diagram of the sample obtained in step S5 of the second embodiment of the present invention.

[0063] Figure 19 This is a schematic diagram of the sample obtained in step S6 of the second embodiment of the present invention.

[0064] Figure 20 This is a schematic diagram of the sample obtained in step S7 of the second embodiment of the present invention.

[0065] Figure 21 This is a schematic diagram of the sample obtained in step S8 of the second embodiment of the present invention.

[0066] Figure 22 This is a schematic diagram of the sample obtained in step S9 of the second embodiment of the present invention.

[0067] Figure 23 This is a schematic diagram of the sample obtained in step S10 of the second embodiment of the present invention.

[0068] Figure 24 This is a schematic diagram of the sample obtained in step S11 of the second embodiment of the present invention.

[0069] Figure 25 This is a schematic diagram of the sample obtained in step S12 of the second embodiment of the present invention.

[0070] Figure 26 This is a schematic diagram of the sample obtained in step S13 of the second embodiment of the present invention.

[0071] Figure 27 This is a schematic diagram of the sample obtained in step S14 of the second embodiment of the present invention.

[0072] Figure 28 This is a schematic diagram of the sample obtained in step S15 of the second embodiment of the present invention.

[0073] Figure 29This is a schematic diagram of the sample obtained in step S16 of the second embodiment of the present invention. Detailed Implementation

[0074] To further understand the content of this invention, a detailed description of the invention will be provided in conjunction with the accompanying drawings and embodiments.

[0075] The structures, proportions, and sizes illustrated in the accompanying drawings are merely for illustrative purposes and to aid those skilled in the art in understanding and reading the invention. They are not intended to limit the scope of the invention and therefore have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and purpose of the invention, should still fall within the scope of the technical content disclosed herein. Furthermore, terms such as "upper," "lower," "left," "right," and "middle" used in this specification are merely for clarity and not intended to limit the scope of implementation. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of the invention's implementation.

[0076] Example 1

[0077] The first embodiment of the present invention provides a method for fabricating solar cells using a photomask to prepare a locally deposited film layer. This method is suitable for mass production and can replace photolithography, a technology that is expensive and not suitable for mass production, without adding more complicated process steps. The method is as follows:

[0078] S100: Select a silicon wafer of a certain size and perform texturing on the surface of the silicon wafer;

[0079] In this step, the side length of the original silicon wafer of a certain size ranges from 100mm to 210mm, and the thickness ranges from 100μm to 200μm. Preferably, the side length of the original silicon wafer of a certain size is 166mm or 210mm, and the thickness ranges from 150μm to 170μm.

[0080] Furthermore, the original silicon wafer undergoes rough polishing, pre-cleaning, texturing, SC1, acid pickling, SC2, acid pickling, slow pulling, and drying to achieve surface texturing treatment. The resulting pyramid-shaped textured surface has a side length of 10nm to 20μm. SC1 cleaning (Standard clean 1) primarily aims to remove particulate contaminants and also removes some metallic impurities. SC2 cleaning primarily aims to remove metallic contaminants such as sodium, iron, magnesium, and calcium from the silicon wafer surface; SC2 can remove Fe and Zn at room temperature.

[0081] S200: After texturing, an intrinsic amorphous silicon i-layer is deposited on both sides of the silicon wafer using PECVD, followed by the deposition of an n-layer on both sides using PECVD to achieve front and back field deposition. The n-layer can be a phosphorus-doped microcrystalline silicon layer. Finally, a mask layer is deposited on the n-layer on both sides. The mask layer can be at least one of SiNx, SiOx, and SiNxOy.

[0082] In this step, the prepared sample is referenced Figure 1 The thickness of the intrinsic amorphous silicon i-layer is 1 nm to 20 nm, preferably 5 nm to 10 nm;

[0083] Furthermore, the refractive index of the n-layer at a wavelength of 632 nm is between 2.5 and 3.2, and its thickness is between 1 nm and 50 nm. Preferably, the thickness of the n-layer is between 10 nm and 30 nm.

[0084] Furthermore, the mask layer deposition temperature does not exceed 210℃, the refractive index at a wavelength of 632nm is 2.0~2.5, and the thickness is 10nm~500nm, preferably 100nm~200nm.

[0085] S300: A layer of photosensitive ink is printed over the entire back of the sample completed in step S200, and then dried, exposed and developed to form a patterned ink.

[0086] This step is specifically as follows:

[0087] S301: A layer of photosensitive ink is printed over the entire upper and lower surfaces of the sample completed in step 200, as shown in the reference. Figure 2 ;

[0088] S302: Expose the areas where the amorphous silicon i-layer and n-layer need to be preserved to remove the ink from the unexposed areas. NaCO3 solution can be used to remove the ink from the unexposed areas. (Refer to...) Figure 3 ;

[0089] S303: First, use HF solution to remove the mask layer from the exposed portion of the silicon wafer. Then, use the solution to remove the i+n layer from the exposed portion of the sample. Finally, wash and dry the sample to complete the cleaning process. Refer to [reference needed]. Figure 4 ;

[0090] S304: Finally, remove the corresponding ink from the remaining i+n layer to obtain the final sample. Refer to... Figure 5 .

[0091] S400: On the back side of the sample after step S300, a layer of i and p, as well as a mask layer, are deposited by PECVD over the entire area, and then an etching process is performed to complete the preparation of the selective i+p layer; wherein, the mask layer can be at least one of SiNx, SiOx, and SiNxOy.

[0092] This step is specifically as follows:

[0093] S401: Continue PECVD global deposition of an i and p layer, as well as a mask layer, on the back side of the sample completed in step 300, as per reference. Figure 6 The deposition conditions of the i-layer are the same as those of the amorphous silicon i-layer described in step 200. The p-layer is a boron-doped microcrystalline silicon layer. The mask layer can be at least one of SiNx, SiOx, and SiNxOy.

[0094] S402: Then, print another layer of ink over the entire area, and then expose the areas where ink needs to be retained. These areas refer to the areas in step 300 excluding the retained amorphous i-layer and n-layer. Then, remove the ink from the unexposed areas. Na2CO3 solution can be used to remove the ink from the unexposed areas. (Refer to...) Figure 7 ;

[0095] S403: Subsequently, the i and p layers deposited in the un-ink-covered areas are etched away. Since the n layer is protected by a mask layer, the removal of the i+p layer will not etch the underlying i+n layer. (Refer to...) Figure 8 ;

[0096] S404: Then remove the remaining ink, refer to... Figure 9 ;

[0097] S405: Finally, use HF to remove the mask layer above the i+n layer and i+p layer, completing the preparation of the selective i+p layer, and finally obtaining the sample reference. Figure 10 In this process, due to the presence of layer i, layers n and p are electrically insulated, and no insulation treatment process for layers n and p is required in subsequent processes, thus simplifying the process.

[0098] In this embodiment, the concentration of the HF acid solution is approximately 1%-20%, and the temperature is room temperature. A cleaning cycle of 30-300 seconds effectively removes the mask layer above the i+n and i+p layers. After the mask layer is etched away, the i+p layers located on the sidewalls of the mask layer, having nowhere to adhere, can also be removed. The resulting product is as shown in the attached image. Figure 10 The structure of will not be explained further here.

[0099] S500: On the back side of the sample after step S400, a transparent conductive film TCO is deposited.

[0100] In this step, the transparent conductive film (TCO) includes, but is not limited to, ITO, IWO, and AZO, and may also be a stack of two or more TCOs. The thickness of the transparent conductive film is 50 nm to 200 nm. The processed sample is referenced... Figure 11 .

[0101] S600: The sample completed in step S500 is subjected to copper electroplating and then etching to complete the battery fabrication.

[0102] This step specifically includes:

[0103] S601: Perform copper electroplating on the sample completed in step 500. The electrode spacing width is between 1μm and 200μm, preferably 20μm to 100μm, to complete the preparation of the battery electrodes. The prepared sample is used as a reference. Figure 12 .

[0104] S602: Place the completed sample on a chain HF cleaner. Using the protection of the copper electrodes, etch away the TCO film in the exposed copper electrode spacer area with HF to form a PN junction for isolation, and finally complete the battery fabrication.

[0105] In this embodiment, photosensitive ink is used as a mask, and the local retention of the globally deposited film layer is achieved through local exposure, development and etching. This indirectly realizes the local deposition of the film layer, replacing the expensive technology that originally required photolithography-related materials and equipment with photosensitive ink and wet etching process, and can be achieved through mass production, thus simplifying the process.

[0106] Example 2

[0107] Existing tunneling HBC technology requires the use of a hard mask during the selective microcrystalline n-layer fabrication. This technology is limited by the precision of the hard mask. Furthermore, hard mask deformation and CVD gas deflection issues prevent the required precision of the selective n-layer from being achieved. Relative displacement between the silicon wafer and the mask during carrier transport leads to pattern misalignment. These factors make mask technology difficult to mass-produce. A second embodiment of the present invention provides an implementation method for fabricating tunneling HBC solar cells using the localized deposition film layer fabrication method of the present invention via photomask, specifically including the following steps:

[0108] S1: Select an n-type silicon wafer after texturing, and deposit CVD intrinsic amorphous silicon i-layer and n-layer on both sides;

[0109] The texturing step of the silicon wafer is the same as the S100 step, and the thickness of the amorphous silicon i-layer is between 5nm and 20nm, preferably 7-10nm. The completed sample is referenced. Figure 14 .

[0110] As a preferred implementation method, the n-layer refers to a phosphorus-doped microcrystalline silicon n-layer, which serves as both a front passivation layer and a light-transmitting window layer. The coating method includes, but is not limited to, PECVD or Cat-CVD.

[0111] S2: Deposit another mask layer on the sample surface completed in S1;

[0112] The mask layer can be made of at least one layer selected from SiNx, SiOx, and SiNxOy. The completed sample is referenced. Figure 15 .

[0113] S3: Print ink on both sides of the sample completed in S2, forming a patterned ink on the back;

[0114] Completed sample reference Figure 16 The specific operation process involves first screen printing ink onto the entire surface, then drying, exposing, and developing it to form a patterned ink on the back.

[0115] S4: Wash the sample after S3 in HF acid solution to remove the exposed mask;

[0116] During cleaning, the concentration of HF acid solution is approximately 1%-20%, the temperature is room temperature, and the cleaning time is between 30s and 300s. The completed sample should be referenced... Figure 17 .

[0117] S5: Place the sample from S4 in a solution that can etch away the ink, remove the ink from the printed ink area, and expose the surface mask layer;

[0118] The solution must not react with the mask layer; the completed sample should refer to... Figure 18 .

[0119] S6: Place the sample after S5 in a silicon etching solution to remove the exposed intrinsic i-layer and n-layer;

[0120] In this step, the silicon etching solution must not react with the surface SiOx and SiNx layers. SC1 solution is preferred, but a simple alkaline solution with additives can also be used for polishing or texturing. The solution concentration and ratio are not limited here; the final goal is to remove the exposed intrinsic i-layer and n-layer. The completed sample should be referenced... Figure 19 .

[0121] S7: The sample after S6 is coated again, with an intrinsic i-layer and a mask layer.

[0122] The thickness of layer i is consistent with that described in S1, the masking conditions are consistent with those described in S2, and the deposition method includes, but is not limited to, PECVD or Cat-CVD. The completed sample is referenced. Figure 20 .

[0123] S8: Continue ink printing on the sample after S7 to form patterned ink on the back of the sample;

[0124] Specifically, the front of the battery is fully printed with protective coating, while the back is printed with ink. Through drying, exposure, and development, a patterned ink layer is formed on the back, exposing the i-layer and mask layer above region n. The exposed width is greater than or equal to the original width of region n, allowing subsequent etching to completely remove layer i above region n, thus exposing layer n. The completed sample is referenced. Figure 21 .

[0125] S9: Repeat the mask layer removal process described in S4 for the sample after S8 to expose the i layer above the n region. The completed sample is referenced. Figure 22 .

[0126] S10: Repeat the ink removal process described in S5 for the sample described in S9 to expose the mask layer beneath the ink. The completed sample is referenced. Figure 23 .

[0127] S11: Repeat the process of removing the exposed i-layer described in S6 for the sample described in S10, but this time is shorter than in S6, focusing on removing the exposed i-layer. The completed sample is referenced. Figure 24 .

[0128] S12: Repeat the mask removal process described in S4 for the sample described in S11, thereby exposing layer n in region n and layer i outside region n (i.e., p-type region). The completed sample is referenced. Figure 25 .

[0129] S13: Prepare a boron-doped microcrystalline silicon p-layer (hereinafter referred to as microcrystalline p-layer) on the back side of the sample described in S12, thus completing the preparation of the p-region and the tunneling n-region. Then, deposit an anti-reflection layer on the entire surface with a thickness of 70-90 nm and a refractive index between 1.9 and 2.1 to complete the sample reference. Figure 26 .

[0130] S14: Deposit a TCO layer on the back side of the sample to complete the sample reference. Figure 27 .

[0131] S15: Pattern the TCO layer on the back side of the sample as described in S14, thereby separating the TCO layers above the n-region and p-region, completing the sample reference. Figure 28 .

[0132] S16: Screen-print an Ag electrode or electroplate copper onto the TCO of the sample described in S15. The gate lines can be narrower than the TCO to prevent conduction in the NP region, thus completing the fabrication of the tunneling HBC and completing the sample reference. Figure 29 .

[0133] In this application, the samples processed in steps S1 and S2 are largely the same as those processed in step S200, and the samples processed in steps S3 to S7 are also largely the same. Steps S8 to S12 repeat ink printing and some steps S4 to S6. Due to the different structures of different types of solar panels, the order and parameters of the preparation steps are adjusted accordingly, and different solar cells are finally produced. The preparation method of tunneling HBC solar panels is one of the improved schemes based on the ordinary HBC solar panel preparation method. Similar methods can also be used to prepare other types of solar panels.

[0134] The present invention and its embodiments have been described above illustratively. This description is not restrictive, and the figures shown are only one embodiment of the present invention; the actual structure is not limited thereto. Therefore, if those skilled in the art are inspired by this description and design similar structures and embodiments without departing from the spirit of the present invention, such designs should fall within the protection scope of the present invention.

Claims

1. A method for fabricating solar cells using a photomask to prepare a locally deposited film layer, characterized in that: include: S1: Select an n-type silicon wafer after texturing, and deposit a CVD intrinsic amorphous silicon i-layer and a microcrystalline silicon n-layer on both sides; S2: Deposit another mask layer on the surface of the sample obtained in step S1; S3: Print ink on the front and back of the sample obtained in step S2 to form a patterned ink on the back; S4: Wash the sample obtained in step S3 in HF acid solution to remove the exposed mask; S5: Place the sample obtained in step S4 in a solution that can etch away the ink, remove the ink from the printed ink area, and expose the surface mask layer. S6: Place the sample obtained in step S5 in a silicon etching solution to remove the exposed intrinsic i-layer and n-layer. S7: The sample obtained in step S6 is coated again to deposit an intrinsic i-layer and a mask layer. S8: Continue to print ink on the sample obtained in step S7 to form patterned ink on the back of the sample; S9: The sample obtained in step S8 is washed in HF acid solution to remove the bare mask layer, thereby exposing the i layer above the n region; S10: Place the sample obtained in step S9 in a solution that can etch away the ink, remove the ink from the printed ink area, and expose the mask layer below the ink. S11: Place the sample obtained in step S10 in a silicon etching solution to remove the exposed i-layer; S12: The sample obtained in step S11 is washed in HF acid solution to remove the mask layer, thereby exposing the n-layer in the n-region and the i-layer outside the n-region. S13: Prepare a boron-doped microcrystalline silicon p-layer on the back side of the sample obtained in step S12 to complete the preparation of the p-region and the tunneling n-region, and deposit an anti-reflection layer on the entire front side of the sample. S14: A TCO layer is deposited on the back side of the sample obtained in step S13; S15: Pattern the TCO layer on the back side of the sample obtained in step S14, thereby separating the TCO layers above the n region and the p region. S16: Screen print Ag electrodes or electroplate copper onto the TCO of the sample obtained in step S15. The two types of gate lines are narrower than TCO to avoid conduction in the NP region, thereby completing the preparation of tunneling HBC.

2. The method for fabricating a solar cell using a photomask to prepare a locally deposited film layer according to claim 1, characterized in that: In steps S4, S9, and S12, the concentration of the HF acid solution is between 1% and 20%, the temperature is at room temperature, and the cleaning time is between 30 and 300 seconds.

3. The method for fabricating a solar cell using a photomask to prepare a locally deposited film layer according to claim 2, characterized in that: In step S13, the thickness of the antireflective layer is between 70-90 nm, and the refractive index is between 1.9-2.

1.

4. The method for fabricating a solar cell using a photomask to prepare a locally deposited film layer according to claim 1, characterized in that, In step S1, the thickness of the amorphous silicon i-layer is between 5 nm and 20 nm.

5. The method for fabricating a solar cell using a photomask to prepare a locally deposited film layer according to claim 1, characterized in that, In step S1, the microcrystalline silicon n-layer is doped with phosphorus.

6. The method for fabricating a solar cell using a photomask to prepare a locally deposited film layer according to claim 1, characterized in that, In step S4, the concentration of the HF acid solution is between 1% and 20%, the cleaning temperature is room temperature, and the cleaning time is between 30s and 300s.

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