Current sharing power supply system and power module

Abstract

The application provides a current-sharing power supply system and a power supply module. The current-sharing power supply system comprises a current-sharing bus and a plurality of power supply modules. The power supply module comprises a controller and a conversion circuit. The controller of each power supply module is connected to the current-sharing bus. The conversion circuits of each power supply module are connected in parallel. The conversion circuits convert direct current provided by a direct current power supply and output the direct current to a load. The controller of each power supply module sends a pulse width modulation signal to the current-sharing bus. The controller adjusts the output current of the corresponding conversion circuit based on a target low-level duty cycle. The sum of the output currents of the plurality of power supply modules is equal to a target output current. The output currents of the conversion circuits are equal. The application can improve the current-sharing accuracy of the plurality of power supply modules. The circuit is simple. The current-sharing reliability and applicability are strong.

Description

Technical Field

[0001] This application relates to the field of electronic power, and more particularly to a current sharing power supply system and a power module. Background Technology

[0002] In power supply scenarios where electronic devices and loads require high-capacity DC power, since the power capacity of a single power supply component is limited, a large-capacity power supply system composed of multiple power supply components or modules is generally used. In parallel power supply systems formed by connecting multiple power supply components or modules in parallel, inconsistent and unbalanced output currents can occur. This imbalance can lead to excessive voltage and current stress on some power supply modules, causing some modules to reach their maximum current limit first, resulting in unstable operation of the power supply system. Existing current sharing techniques obtain a DC level by filtering the pulse width modulation (PWM) signals of each power supply module through a hardware RC circuit, and then use the average of the DC levels of multiple modules as a reference for current sharing. However, filtering the PWM signals through a hardware RC circuit results in the loss of phase and bandwidth of the PWM signals, and current sharing requires high-end hardware, complex circuitry, and has low accuracy. Summary of the Invention

[0003] This application provides a current sharing power supply system and power module, which can improve the current sharing accuracy of multiple power modules, with simple circuitry, reliable current sharing, and strong applicability.

[0004] In a first aspect, this application provides a current sharing power supply system, which includes a current sharing bus and multiple power modules. Each power module includes a controller and a conversion circuit. The controller of each power module is connected to the current sharing bus. The conversion circuits of each power module are connected in parallel to convert the input DC power and output it to the load. The controller of each power module is used to send a pulse width modulation (PWM) signal to the current sharing bus. Each controller is also used to adjust the output current of the conversion circuit corresponding to each controller based on a target low-level duty cycle, such that the sum of the output currents of the multiple power modules equals the target output current, and the output currents of the conversion circuits in each power module are equal. The low-level width of the PWM signal sent by each controller to the current sharing bus is proportional to the output current of the corresponding conversion circuit. The target low-level duty cycle is the largest low-level duty cycle among the multiple PWM signals on the current sharing bus, and the low-level duty cycle is the ratio of the low-level width of each PWM signal to its period.

[0005] In this application, each power module directly sends a pulse width modulation (PWM) signal to the current sharing bus via a controller. The controller also obtains the target low-level duty cycle of the PWM signal superimposed on the current sharing bus. Here, the low-level duty cycle of the PWM signal is equal to the target low-level duty cycle corresponding to the target PWM signal with the largest low-level width among the PWM signals output by the multiple controllers. Each power module adjusts the output current of its corresponding conversion circuit based on the target low-level duty cycle to achieve current sharing among multiple power modules. Obtaining the current sharing reference using a PWM signal improves the current sharing accuracy (due to the strong anti-interference capability of PWM signals) and speed of each power module. The circuit is simple, and the current sharing reliability and applicability are strong.

[0006] In conjunction with the first aspect, in a first possible implementation, each controller is further configured to adjust the output current of the corresponding conversion circuit based on a target low-level duty cycle. The controller in each power module is configured to increase the output current of the corresponding conversion circuit in the power module when the low-level duty cycle of the pulse width modulation signal sent to the current sharing bus is lower than the target low-level duty cycle, thereby ensuring that the output current of the conversion circuit in each power module in the current sharing power supply system is equal. Each power module directly sends a pulse width modulation signal to the current sharing bus through the controller, and obtains the target low-level duty cycle of the bus pulse width modulation signal superimposed on the current sharing bus through the controller. Based on this target low-level duty cycle, the output current of the corresponding conversion circuit is adjusted to achieve current sharing among multiple power modules. Obtaining the current sharing reference through a pulse width modulation signal improves the current sharing accuracy of each power module, resulting in a simple circuit, reliable current sharing, and strong applicability.

[0007] In conjunction with the first aspect or the first possible implementation of the first aspect, in the second possible implementation, multiple pulse width modulation (PWM) signals on each of the aforementioned current sharing buses are superimposed to obtain a bus PWM signal with a low-level duty cycle equal to the target low-level duty cycle. Each of the aforementioned controllers is further configured to acquire the target low-level duty cycle. Each of the aforementioned controllers is configured to start counting when the falling edge of the PWM signal is first detected on the aforementioned current sharing bus, and end counting when the rising edge of the aforementioned bus PWM signal is detected. The target low-level duty cycle is obtained based on the target count acquired after the end of counting and the period of the aforementioned bus PWM signal. Each power module directly sends a PWM signal to the current sharing bus through the controller, and acquires the target low-level duty cycle of the bus PWM signal superimposed on the current sharing bus through the controller. Based on the target low-level duty cycle, the output current of the corresponding conversion circuit is adjusted to achieve current sharing among multiple power modules.

[0008] In conjunction with the second possible implementation of the first aspect, in the third possible implementation, when the controller in each of the aforementioned power modules first detects the falling edge of the pulse width modulation signal on the current sharing bus, it is further configured to adjust the pulse width modulation signal sent to the current sharing bus, so that the falling edge time of the pulse width modulation signal sent by the controller in each of the aforementioned power modules is the same. Each power module synchronizes the pulse width modulation signal sent to the current sharing bus through the controller, so that the falling edge time of the pulse width modulation signal sent by each controller is the same. Thus, the low-level duty cycle of the bus pulse width modulation signal obtained after superposition on the current sharing bus is equal to the target low-level duty cycle of the target pulse width modulation signal with the widest low-level width among the pulse width modulation signals sent by each controller. Based on this target low-level duty cycle, the output current of the corresponding conversion circuit is adjusted to achieve current sharing among multiple power modules.

[0009] In a fourth possible implementation, combining any of the first to third possible embodiments of the first aspect, each power module further includes a pull-up resistor and a diode. The controller in each of the aforementioned power modules is connected to the current-sharing bus power supply via the pull-up resistor. The pull-up resistor and the diode are connected in parallel. The diode is used to clamp the peak voltage of the pulse width modulation (PWM) signal to the minimum peak voltage of each PWM signal, ensuring that the peak voltages of the PWM signals sent by each controller are the same. Here, the diode in each power module can clamp the peak voltage of the PWM signal when the peak voltages of the PWM signals sent by the controllers in each power module are different, thereby ensuring that the peak voltages of the PWM signals sent by each controller are equal.

[0010] Secondly, this application provides a power module including a controller and a conversion circuit. The controller is connected to a current-sharing bus, and the conversion circuit converts the input DC power and outputs it to a load. The power module is used in a current-sharing power supply system, which includes the current-sharing bus and multiple power modules. The controllers of the multiple power modules are all connected to the current-sharing bus. The controllers send pulse-width modulation (PWM) signals to the current-sharing bus. The controllers are also used to adjust the output current of the conversion circuit corresponding to the controller based on a target low-level duty cycle, such that the sum of the output currents of the multiple power modules in the current-sharing power supply system equals the target output current, and the output current of the conversion circuit in each power module is equal. The low-level width of the PWM signal sent by the controller to the current-sharing bus is proportional to the output current of the conversion circuit corresponding to the controller. The target low-level duty cycle is the largest low-level duty cycle among the multiple PWM signals on the current-sharing bus, and the low-level duty cycle is the ratio of the low-level width of each PWM signal to its period.

[0011] In this application, each power module directly sends a pulse width modulation (PWM) signal to the current sharing bus via a controller. The controller also obtains the target low-level duty cycle of the PWM signal superimposed on the current sharing bus. Here, the low-level duty cycle of the PWM signal is equal to the target low-level duty cycle corresponding to the target PWM signal with the widest low-level width among the PWM signals output by the multiple power modules. Each power module adjusts the output current of its corresponding conversion circuit based on the target low-level duty cycle to achieve current sharing among the multiple power modules. Obtaining the current sharing reference using a PWM signal improves the current sharing accuracy of each power module (PWM signals have strong anti-interference capabilities), simplifies the circuit, and enhances the reliability and applicability of current sharing.

[0012] In conjunction with the second aspect, in the first possible implementation, the controller is further configured to adjust the output current of the corresponding conversion circuit based on a target low-level duty cycle. The controller in the power module is configured to increase the output current of the conversion circuit in the power module when the low-level duty cycle of the pulse width modulation signal sent to the current sharing bus is lower than the target low-level duty cycle, thereby ensuring that the output current of the conversion circuit in each power module in the current sharing power supply system is equal. Each power module achieves current sharing by adjusting the output current of its corresponding conversion circuit based on the target low-level duty cycle. The method of obtaining the current sharing reference through a pulse width modulation signal improves the current sharing accuracy of each power module, resulting in a simple circuit, reliable current sharing, and strong applicability.

[0013] In conjunction with the second aspect or the first possible implementation of the second aspect, in the second possible implementation, multiple pulse width modulation (PWM) signals on the current sharing bus are superimposed to obtain a bus PWM signal with a low-level duty cycle equal to the target low-level duty cycle. The controller is further configured to acquire the target low-level duty cycle. The controller in the power module is configured to start counting when the falling edge of the PWM signal is first detected on the current sharing bus, and end counting when the rising edge of the bus PWM signal is detected. The target low-level duty cycle is obtained based on the target count acquired after the counting ends and the period of the bus PWM signal. Each power module directly sends a PWM signal to the current sharing bus through the controller, and acquires the target low-level duty cycle of the bus PWM signal superimposed on the current sharing bus through the controller. Based on the target low-level duty cycle, the output current of the corresponding conversion circuit is adjusted to achieve current sharing among multiple power modules.

[0014] In conjunction with the second possible implementation of the second aspect, in the third possible implementation, when the controller in the power module first detects the falling edge of the pulse width modulation signal on the current sharing bus, it further adjusts the pulse width modulation signal sent to the current sharing bus, so that the falling edge time of the pulse width modulation signal sent by the controller in each power module in the current sharing power supply system is the same. Each power module synchronizes the pulse width modulation signal sent to the current sharing bus through the controller, so that the falling edge time of the pulse width modulation signal sent by each controller is the same. Thus, the low-level duty cycle of the bus pulse width modulation signal obtained after superposition on the current sharing bus is equal to the target low-level duty cycle of the target pulse width modulation signal with the widest low-level width among the pulse width modulation signals sent by each controller. Based on this target low-level duty cycle, the output current of the corresponding conversion circuit is adjusted to achieve current sharing among multiple power modules.

[0015] In conjunction with the third possible implementation of the second aspect, in the fourth possible implementation, the power module further includes a pull-up resistor and a diode. Each controller in the power module is connected to the current-sharing bus power supply via the pull-up resistor. The pull-up resistor and the diode are connected in parallel. The diode is used to clamp the peak voltage of the pulse width modulation (PWM) signal to the minimum peak voltage of each PWM signal, ensuring that the peak voltages of the PWM signals sent by each controller are the same. Here, the diode in each power module can clamp the peak voltage of the PWM signal when the peak voltages of the PWM signals sent by the controllers in each power module are different, thus ensuring that the peak voltages of the PWM signals sent by each controller are equal. Attached Figure Description

[0016] Figure 1This is a schematic diagram illustrating the application scenario of the current sharing power supply system provided in this application;

[0017] Figure 2 This is a structural schematic diagram of the current sharing power supply system provided in this application;

[0018] Figure 3 This is a waveform diagram of the pulse width modulation signal provided in this application;

[0019] Figure 4 This is another waveform diagram of the pulse width modulation signal provided in this application;

[0020] Figure 5 This is another structural schematic diagram of the current sharing power supply system provided in this application. Detailed Implementation

[0021] See Figure 1 , Figure 1 This is a schematic diagram illustrating an application scenario of the current sharing power supply system provided in this application. The current sharing power supply system provided in this application may include multiple power modules connected in parallel (including power module 1 to power module n), a DC power supply, and a current sharing bus. Each power module may include a conversion circuit (…). Figure 1 (Not shown in the diagram) The conversion circuit can convert the DC power supplied by the DC power source into DC power and output the converted DC power to the load to supply power to the load (which may be communication equipment (switches, routers, etc.), batteries, or household appliances, etc.).

[0022] exist Figure 1 In the application scenario shown, the power supply capacity of the current sharing system to the load can be the sum of the power supplies of multiple power sources in the system (e.g., the sum of the power supplies of power module 1, power module 2, ..., power module n) to support power supply scenarios with large-capacity DC power. In power supply scenarios with multiple power modules connected in parallel, when there is an inconsistency or imbalance in the output current of each power module, it will cause some power modules to bear excessive voltage and current stress, and some power modules will reach their maximum current limit first, resulting in the instability of the power supply system. Therefore, for multiple power modules connected in parallel, current sharing technology is needed to ensure that each power module evenly shares the load current to ensure the normal operation of the system. Current current sharing technology obtains a DC level by filtering the pulse width modulation (PWM) signals of each power module through a hardware RC circuit, and performs current sharing based on the average value of the DC levels of multiple modules. However, the pulse width modulation signal loses phase and bandwidth after being filtered by the hardware RC circuit, and the current sharing requires high hardware requirements, complex circuitry, and has low accuracy.

[0023] In the current sharing power supply system provided in this application, each power module may include a controller ( Figure 1 (Not shown in the diagram), the controller of each power module is coupled to the current sharing bus, and the controller can also send pulse width modulation signals to the current sharing bus. Here, among the multiple power modules (e.g., Figure 1 Power modules 1, 2, ..., n are listed. The controller of one of these power modules (for simplicity, it can be described as a target voltage module) sends a pulse width modulation (PWM) signal (for simplicity, it can be described as a target PWM signal) to the current sharing bus. The PWM signal has the largest low-level duty cycle, or the widest low-level width in one signal cycle. The PWM signals output by the controllers of multiple power modules are superimposed on the current sharing bus. The low-level duty cycle of the superimposed PWM signal (for simplicity, it can be described as a bus PWM signal) is equal to the low-level duty cycle of the target PWM signal (for simplicity, it can be described as a target low-level duty cycle). The controllers in each power module can obtain the target low-level duty cycle of the bus PWM signal and adjust the output current of the corresponding conversion circuit based on this target low-level duty cycle, ensuring that the output currents of the conversion circuits in the multiple power modules are equal, and the sum of the output currents of each conversion circuit equals the target output current. Here, each power module sends a pulse width modulation signal directly to the current sharing bus through the controller, and obtains the target low-level duty cycle of the bus pulse width modulation signal superimposed on the current sharing bus through the controller. Based on the target low-level duty cycle, the output current of the corresponding conversion circuit is adjusted to achieve current sharing among multiple power modules. The method of obtaining the current sharing reference through the pulse width modulation signal can improve the current sharing accuracy (pulse width modulation signal has strong anti-interference ability) and current sharing speed of each power module. The circuit is simple, and the current sharing reliability and applicability are strong.

[0024] See Figure 2 , Figure 2 This is a structural schematic diagram of the current sharing power supply system provided in this application. Figure 2 The current sharing power supply system shown includes multiple power modules. Taking two power modules as an example, Figure 2The system includes power module 1 and power module 2. DC power supply a is coupled to the load via conversion circuit a in power module 1, and DC power supply b is coupled to the load via conversion circuit b in power module 2. The first output terminals of conversion circuits a and b are connected to one end of the load, and the second output terminals of conversion circuits a and b are connected to the other end of the load. Controller a in power module 1 and controller b in power module 2 are respectively connected to the current sharing bus. Conversion circuits a and b can perform DC power conversion on the DC power supplied by power supplies a and b, and output the converted DC power to the load (which can be a switch, router, battery, or household appliance, etc.).

[0025] In some feasible implementations, Figure 2 In the current sharing power supply system shown, the controllers of each power module can send pulse width modulation (PWM) signals to the current sharing bus. Controller a sends a first PWM signal to the current sharing bus, and controller b sends a second PWM signal. If the low-level duty cycle of the first PWM signal is greater than the low-level duty cycle of the second PWM signal, then the low-level duty cycle of the bus PWM signal obtained by superimposing the first and second PWM signals on the current sharing bus is equal to the low-level duty cycle of the first PWM signal. Controllers a and b can obtain the low-level duty cycle (or target low-level duty cycle) of the bus PWM signal and adjust the output current of the corresponding conversion circuit based on the target low-level duty cycle, so that the output currents of conversion circuit a and conversion circuit b are equal, and the sum of the output currents of conversion circuit a and conversion circuit b is equal to the target output current. Here, each power module sends a pulse width modulation signal directly to the current sharing bus through the controller, and obtains the target low-level duty cycle of the bus pulse width modulation signal superimposed on the current sharing bus through the controller. Based on the target low-level duty cycle, the output current of the corresponding conversion circuit is adjusted to achieve current sharing among multiple power modules. The method of obtaining the current sharing reference through the pulse width modulation signal can improve the current sharing accuracy of each power module (the pulse width modulation signal has strong anti-interference ability), and the circuit is simple, with reliable current sharing and strong applicability.

[0026] The following will combine Figures 2 to 5The current sharing power supply system provided in this application is illustrated by example. In some feasible implementations, the controller of each power module in the current sharing power supply system can send a pulse width modulation signal (or PWM signal) to the current sharing bus and obtain the low-level duty cycle (or target low-level duty cycle) of the bus pulse width modulation signal obtained by superimposing multiple pulse width modulation signals on the current sharing bus. When the low-level duty cycle of the pulse width modulation signal sent to the current sharing bus is lower than the target low-level duty cycle (or, when the low-level width of the pulse width modulation signal is lower than the low-level width of the target pulse width modulation signal), the controller in each power module can control the output current of the conversion circuit to increase, so that the ratio of the output current of the conversion circuit to the rated current value is equal to the target low-level duty cycle. Specifically, as described above... Figure 2 Taking the current sharing power supply system shown as an example, controllers a and b send the first and second pulse width modulation signals to the current sharing bus. The low-level duty cycle of the first pulse width modulation signal is 60%, and the low-level duty cycle of the second pulse width modulation signal is 40%. Here, the magnitude of the current output by the conversion circuit can be proportional to the low-level duty cycle of the pulse width modulation signal, that is, the magnitude of the current output by the conversion circuit I = k*(1-D), where D is the high-level duty cycle of the pulse width modulation signal, and k can be the rated current value (in other words, the low-level duty cycle of the pulse width modulation signal is equal to the ratio of the output current of the conversion circuit to the rated current value). The target low-level duty cycle of the bus pulse width modulation signal obtained by superimposing the first and second pulse width modulation signals on the current sharing bus is 60%. Controllers a and b can then obtain the low-level duty cycle of the aforementioned bus pulse width modulation signal. Since the low-level duty cycle of the second pulse width modulation signal is lower than the target low-level duty cycle, controller b can control the output current of converter circuit b to increase, making the ratio of the output current of converter circuit b to its rated current equal to 60%, and ensuring that the output current of converter circuit b is equal to the output current of converter circuit a. Each power module directly sends a pulse width modulation signal to the current sharing bus through the controller and obtains the target low-level duty cycle of the bus pulse width modulation signal superimposed on the current sharing bus through the controller. Based on this target low-level duty cycle, the output current of the corresponding converter circuit is adjusted to achieve current sharing among multiple power modules. Obtaining the current sharing reference through the pulse width modulation signal improves the current sharing accuracy of each power module, and the circuit is simple, with high reliability and applicability in current sharing.

[0027] In some feasible implementations, the controller in each power module can also cyclically count within the signal period of the pulse width modulation signal sent to the current sharing bus. Specifically, when the pulse width modulation signal is first detected to change from high to low on the current sharing bus (specifically, this can be detected via the ECAP port), the controller in each power module can control the cyclic count of the pulse width modulation signal sent to the current sharing bus to be reset to zero and the pulse width modulation signal to be resent to the current sharing bus. Figure 2 Taking the current sharing power supply system shown as an example, controllers a and b send first and second pulse width modulation signals to the current sharing bus. Controllers a and b can cyclically count within the signal period of the pulse width modulation signal sent to the current sharing bus (for example, cyclically counting from 0 to 100). Please refer to [the relevant documentation / reference]. Figure 3 , Figure 3 This is a waveform diagram of the pulse width modulation signal provided in this application, as shown below. Figure 3 As shown, at time t1, the pulse width modulation (PWM) signal first changes from high to low on the current sharing bus (the first PWM signal changes from high to low), while the second PWM signal remains high. Therefore, controller b can resend the second PWM signal to the current sharing bus, ensuring that the falling edges of the first and second PWM signals occur at the same time; in other words, ensuring that the first and second PWM signals are in phase. Please refer to [further details omitted]. Figure 4 , Figure 4 This is another waveform diagram of the pulse width modulation signal provided in this application, as shown below. Figure 4As shown, the first and second pulse width modulation (PWM) signals sent by controllers a and b to the current sharing bus have the same period and their falling edges are synchronized. The low-level width of the second PWM signal is greater than that of the first PWM signal (or, the low-level duty cycle of the second PWM signal is greater than that of the first PWM signal). The first and second PWM signals are superimposed on the current sharing bus. The second PWM signal can pull down part of the high-level signal of the first PWM signal. For example, between time t1 and time t2, the ab segment of the first PWM signal is high and the ab segment of the second PWM signal is low. After the first and second PWM signals are superimposed on the current sharing bus, the ab segment of the first PWM signal will be pulled down to a low level, so that the low-level width of the bus PWM signal obtained after superposition is equal to the low-level width of the second PWM signal (or, the low-level duty cycles are equal). Each power module synchronizes the pulse width modulation (PWM) signal sent to the current sharing bus through the controller, so that the falling edge time of the PWM signals sent by each controller is the same. As a result, the low-level duty cycle of the bus PWM signal obtained after superposition on the current sharing bus is equal to the target low-level duty cycle of the target PWM signal with the widest low-level width among the PWM signals sent by each controller. The output current of the corresponding conversion circuit is adjusted based on the target low-level duty cycle to achieve current sharing among multiple power modules.

[0028] In some feasible implementations, the controller in each power module can also acquire a target count of the moment when the bus pulse width modulation signal changes from low to high, and obtain a target low-level duty cycle based on the target count and the signal period of the bus pulse width modulation signal. Specifically, the controller in each power module can detect the change from low to high of the bus pulse width modulation signal through the ECAP port (which may be an ECAP port integrated into the controller) and acquire the target count of the moment when the bus pulse width modulation signal changes from low to high. For example, with Figure 4 Taking the bus pulse width modulation signal as an example, the controller can detect the change of the bus pulse width modulation signal from high level to low level (falling edge) at time t1 through the ECAP port, and detect the change of the bus pulse width modulation signal from low level to high level (rising edge) at time t2 through the ECAP port, and obtain the target count of the counter at time t2 as 60. The signal period of the measured bus pulse width modulation signal is 100 (the controller counts cyclically from 0 to 100 within the signal period), thereby obtaining the target low level duty cycle as 60%. The controllers in each power module can adjust the output current of the corresponding conversion circuit based on this target low level duty cycle to achieve current sharing among multiple power modules.

[0029] For some feasible implementation methods, please refer to Figure 5 , Figure 5 This is another structural schematic diagram of the current sharing power supply system provided in this application. For example... Figure 5 As shown, Figure 5 The current sharing power supply system can include multiple power modules. Taking two power modules as an example, Figure 5 The system includes power supply module 1 and power supply module 2. DC power supply a is coupled to the load through conversion circuit a in power supply module 1, and DC power supply b is coupled to the load through conversion circuit b in power supply module 2. The first output terminals of conversion circuits a and b are connected to one end of the load, and the second output terminals of conversion circuits a and b are connected to the other end of the load. The controller in power supply module 1 includes a microcontroller unit (MCU), which can be referred to as MCU1 for convenience. The PWM port of MCU1 is connected to the current sharing bus power supply (which can be a 3.3V DC power supply) through a pull-up resistor (which can be referred to as R11 for convenience). MCU1 is grounded through a pull-down resistor (which can be referred to as R12 for convenience). Resistor R12 is connected in parallel with capacitor C1. The PWM port and ECAP port of MCU1 are connected to the current sharing bus (which can be a PWM-type current sharing bus). The controller in power module 2 includes MCU2, pull-up resistor R21, pull-down resistor R22, and capacitor C2. The connection relationships of each component are similar to those in power module 1, and will not be repeated here. Capacitors C1 and C2 have small capacitance values ​​and are used to filter out high-frequency noise on the line between the MCU and the current sharing bus. R11 and R21 are connected in parallel with diodes D1 and D2, respectively. Diodes D1 and D2 clamp the peak voltage of the pulse width modulation (PWM) signals sent by MCU1 and MCU2 through the PWM port to the minimum peak voltage of the PWM signals sent by each controller, ensuring that the peak voltage of the PWM signals sent by each controller is the same. Figure 5In the current sharing power supply system shown, the controllers of each power module can send pulse width modulation signals to the current sharing bus through the PWM port. MCU1 sends a first pulse width modulation signal to the current sharing bus, and MCU2 sends a second pulse width modulation signal to the current sharing bus. The first pulse width modulation signal and the second pulse width modulation signal are superimposed on the current sharing bus to obtain the bus pulse width modulation signal. The low-level duty cycle of the bus pulse width modulation signal is equal to the low-level duty cycle of the first pulse width modulation signal or the low-level duty cycle of the second pulse width modulation signal (if the low-level duty cycle of the first pulse width modulation signal is the largest, then the low-level duty cycle of the bus pulse width modulation signal is equal to the low-level duty cycle of the first pulse width modulation signal; otherwise, it is equal to the low-level duty cycle of the second pulse width modulation signal). MCU1 and MCU2 can obtain the low-level duty cycle (or target low-level duty cycle) of the bus pulse width modulation signal through the ECAP port, and adjust the output current of the corresponding conversion circuit based on the target low-level duty cycle, so that the output current of conversion circuit a and conversion circuit b are equal, and the sum of the output currents of conversion circuit a and conversion circuit b is equal to the target output current. Here, each power module sends a pulse width modulation signal directly to the current sharing bus through the controller, and obtains the target low-level duty cycle of the bus pulse width modulation signal superimposed on the current sharing bus through the controller. Based on the target low-level duty cycle, the output current of the corresponding conversion circuit is adjusted to achieve current sharing among multiple power modules. The method of obtaining the current sharing reference through the pulse width modulation signal can improve the current sharing accuracy and current sharing speed of each power module. The circuit is simple, and the current sharing reliability and applicability are strong.

[0030] In this application, the current sharing power supply system includes multiple power modules and a current sharing bus. The controller of each power module can send a pulse width modulation (PWM) signal to the current sharing bus (e.g., via a PWM port). The PWM signals output by the controllers of multiple power modules are superimposed on the current sharing bus, resulting in a bus PWM signal. Here, the low-level duty cycle of this bus PWM signal is equal to the target low-level duty cycle corresponding to the target PWM signal with the widest low-level width among the PWM signals output by the multiple controllers. The controllers of each power module can obtain (e.g., by detecting the rising and falling edges of the bus PWM signal via an ECAP port to obtain the target low-level duty cycle) the low-level duty cycle (or the target low-level duty cycle) of the bus PWM signal and adjust the output current of the corresponding conversion circuit based on the target low-level duty cycle. The controller in each power module can control the output current of the converter circuit to increase when the low-level duty cycle of the pulse width modulation signal sent to the current sharing bus is lower than the target low-level duty cycle (or when the low-level width of the pulse width modulation signal is lower than the target low-level width of the pulse width modulation signal), so that the ratio of the output current of the converter circuit to the rated current value is equal to the target low-level duty cycle. Here, each power module directly sends a pulse width modulation signal to the current sharing bus through the controller, and obtains the target low-level duty cycle of the bus pulse width modulation signal superimposed on the current sharing bus through the controller. Based on the target low-level duty cycle, the output current of the corresponding converter circuit is adjusted to achieve current sharing among multiple power modules. The method of obtaining the current sharing reference through the pulse width modulation signal can improve the current sharing accuracy (pulse width modulation signal has strong anti-interference ability) and current sharing speed of each power module. The circuit is simple, and the current sharing reliability and applicability are strong.

Claims

1. A current sharing power supply system, characterized by, The current sharing power supply system includes a current sharing bus and multiple power modules. Each power module includes a controller and a conversion circuit. The controller of each power module is connected to the current sharing bus. The conversion circuits of each power module are connected in parallel to convert the input DC power and output it to the load. The controller of each power module is used to send a pulse width modulation signal to the current sharing bus; Each controller is further configured to adjust the output current of the conversion circuit corresponding to each controller based on the target low-level duty cycle, such that the sum of the output currents of the plurality of power modules is equal to the target output current, and the output current of the conversion circuit in each power module is equal; Wherein, the low-level width of the pulse width modulation signal sent by each controller to the current sharing bus is proportional to the output current of the corresponding conversion circuit of the controller, the target low-level duty cycle is the largest low-level duty cycle among the multiple pulse width modulation signals on the current sharing bus, and the low-level duty cycle is the ratio of the low-level width of each pulse width modulation signal to the signal period.

2. The equal current power supply system of claim 1, wherein, Each of the controllers is further configured to adjust the output current of the corresponding conversion circuit based on a target low-level duty cycle, including: The controller in each power module is further configured to, when the low-level duty cycle of the pulse width modulation signal sent to the current sharing bus is lower than the target low-level duty cycle, control the output current of the conversion circuit in the corresponding power module to increase, so that the output current of the conversion circuit in each power module in the current sharing power supply system is equal.

3. The current sharing power supply system of claim 1 or 2, wherein, Each of the controllers is also configured to acquire the target low-level duty cycle, including: Each controller is configured to start counting when the falling edge of the pulse width modulation signal is first detected on the current sharing bus, end counting when the rising edge of the pulse width modulation signal is detected on the bus, and obtain the target low-level duty cycle based on the target count obtained after the end of counting and the period of the pulse width modulation signal on the bus.

4. The power system of claim 3, wherein, When each controller first detects the falling edge of the pulse width modulation signal on the current sharing bus, it is also used to adjust the pulse width modulation signal sent to the current sharing bus so that the falling edge time of the pulse width modulation signal sent by the controller in each power module is the same.

5. The power system of claim 4, wherein, Each power module further includes a pull-up resistor and a diode. The controller in each power module is connected to the current sharing bus power supply through the pull-up resistor. The pull-up resistor and the diode are connected in parallel. The diode is used to clamp the peak voltage of the pulse width modulation signal to the minimum peak voltage of each pulse width modulation signal, so that the peak voltage of the pulse width modulation signal sent by each controller is the same.

6. A power module, characterized by The power module includes a controller and a conversion circuit. The controller is connected to the current sharing bus, and the conversion circuit converts the input DC power and outputs it to the load. The power module is used in a current sharing power supply system. The current sharing power supply system includes the current sharing bus and multiple power modules. The controllers of the multiple power modules are all connected to the current sharing bus. The controller sends a pulse width modulation signal to the current sharing bus; The controller is also used to adjust the output current of the conversion circuit corresponding to the controller based on the target low-level duty cycle, so that the sum of the output currents of the multiple power modules in the current sharing power supply system is equal to the target output current, and the output current of the conversion circuit in each power module is equal. Wherein, the low-level width of the pulse width modulation signal sent by the controller to the current sharing bus is proportional to the output current of the corresponding conversion circuit of the controller, the target low-level duty cycle is the largest low-level duty cycle among the multiple pulse width modulation signals on the current sharing bus, and the low-level duty cycle is the ratio of the low-level width of each pulse width modulation signal to the signal period.

7. The power module of claim 6, wherein, The controller is also used to adjust the output current of the corresponding conversion circuit based on the target low-level duty cycle, including: The controller in the power supply module is further configured to, when the low-level duty cycle of the pulse width modulation signal sent to the current sharing bus is lower than the target low-level duty cycle, control the output current of the conversion circuit in the power supply module to increase, so that the output current of the conversion circuit in each power supply module in the current sharing power supply system is equal.

8. The power module of claim 6 or 7, characterized in that The controller is also used to obtain the target low-level duty cycle, including: The controller in the power module is also configured to start counting when the falling edge of the pulse width modulation signal is first detected on the current sharing bus, end counting when the rising edge of the pulse width modulation signal is detected on the bus, and obtain the target low-level duty cycle based on the target count obtained after the end of counting and the period of the pulse width modulation signal on the bus.

9. The power module according to claim 8, characterized in that, When the controller in the power supply module first detects the falling edge of the pulse width modulation signal on the current sharing bus, it is also used to adjust the pulse width modulation signal sent to the current sharing bus so that the falling edge time of the pulse width modulation signal sent by the controller of each power supply module in the current sharing power supply system is the same.

10. The power module according to claim 9, characterized in that, The power module also includes a pull-up resistor and a diode. The controller in the power module is connected to the current sharing bus power supply through the pull-up resistor. The pull-up resistor and the diode are connected in parallel. The diode is used to clamp the peak voltage of the pulse width modulation signal to the minimum peak voltage of each pulse width modulation signal, so that the peak voltage of the pulse width modulation signal sent by each controller is the same.

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