A battery voltage acquisition circuit and method

Abstract

The application discloses a battery voltage acquisition circuit and method, wherein the circuit is connected with a battery module, the battery module comprises battery cells, and the circuit comprises voltage acquisition modules; each voltage acquisition module comprises a voltage acquisition channel and a sampling module; each battery cell is connected with a voltage acquisition channel, each voltage acquisition channel comprises a first MOS tube connected with the battery cell in series, the first MOS tubes of the voltage acquisition channels are connected in series, the drain of each first MOS tube is connected with the source of the adjacent first MOS tube, and the first MOS tubes are of the same type; the sampling module is used for acquiring the source voltage of the first MOS tube, and the first end of the sampling module is connected with the source of the first MOS tube. In this way, the source voltage of each first MOS tube is acquired through the voltage acquisition module, current is prevented from being generated on the acquisition line, the problem of the battery cell power imbalance caused by the current on the acquisition line is prevented, and the voltage acquisition cost is relatively low.

Description

Technical Field

[0001] This invention relates to the field of electronic technology, and in particular to a battery voltage acquisition circuit and method. Background Technology

[0002] A battery cell refers to a small battery within the power battery of a new energy vehicle. A power battery pack is generally composed of multiple battery cells assembled into a module, and then multiple modules are combined to form a battery pack. The battery cell mainly consists of positive electrode material, negative electrode material, electrolyte, and separator.

[0003] Strict usage restrictions are imposed on battery modules to ensure safety. Data such as the voltage of each cell needs to be collected, and each cell needs to be monitored in real time to ensure that it does not exceed the usage restrictions.

[0004] In related technologies, battery voltage acquisition generally employs two methods. One method is to use a dedicated AFE (Analog Front End) to read the cell voltage, but this method is costly. The other method is to directly acquire the voltage using a resistor divider, which is less costly, but the resistor divider can cause inconsistent leakage current in each cell, leading to cell power imbalance over time. Summary of the Invention

[0005] The present invention aims to at least solve the technical problems existing in the prior art. To this end, the first aspect of the present invention proposes a battery voltage acquisition circuit, the circuit being connected to a battery module, the battery module including n cells, the circuit including n voltage acquisition modules, the n voltage acquisition modules being used to acquire the voltage of the n cells; Each voltage acquisition module includes a voltage acquisition channel and a sampling module; each battery cell is connected to a voltage acquisition channel, each voltage acquisition channel includes a first MOS transistor connected in series with the battery cell, the first MOS transistors of each voltage acquisition channel are connected in series, the drain of each first MOS transistor is connected to the source of the adjacent first MOS transistor, and the first MOS transistors are of the same type; The sampling module is used to acquire the source voltage of the first MOS transistor. The first terminal of the sampling module is connected to the source of the first MOS transistor, and the second terminal of the sampling module is connected to the second terminal of an adjacent sampling module. The source voltage is used to calculate the voltage of the battery cell.

[0006] Optionally, when the first MOSFET is an N-type transistor, the gate of the N-type first MOSFET is connected to the positive terminal of the battery cell, and the lowest voltage terminal of the battery module is connected in series with a first voltage divider resistor. The highest voltage terminal of the battery module is also connected to a second MOSFET. The circuit also includes an (n+1)th voltage acquisition module for acquiring the source voltage of the second MOSFET. The second MOSFET and the first MOSFET are of the same type.

[0007] Optionally, when the first MOSFET is N-type, the circuit further includes a Vgs voltage detection module, which includes a fifth voltage divider resistor, a Vgs detection unit, and a third MOSFET connected in sequence; the Vgs detection unit includes a voltage follower, a low-pass filter circuit, and an analog-to-digital converter circuit connected in sequence; the first end of the fifth voltage divider resistor is connected to the highest voltage cell, and the second end of the fifth voltage divider resistor is connected to the first end of the Vgs detection unit; the third MOSFET is of the same type as the first MOSFET. When the third MOS transistor is N-type, the second terminal of the Vgs detection unit is connected to the gate and drain of the N-type third MOS transistor, the source of the N-type third MOS transistor is connected to the second terminal of the Vgs detection unit, and the gate of the N-type third MOS transistor is connected to the first terminal of the Vgs detection unit. When the third MOS transistor is P-type, the second terminal of the Vgs detection unit is connected to the source of the P-type third MOS transistor, the drain of the P-type third MOS transistor is connected to the second terminal of the sampling module, and the gate of the P-type third MOS transistor is connected to the first terminal of the sampling module.

[0008] Optionally, when the first MOSFET is P-type, the gate of the first MOSFET located at the lowest voltage terminal of the battery module is connected to the negative terminal of the battery module, and the highest voltage terminal of the battery module is connected in series with a first voltage divider resistor.

[0009] Optionally, each of the sampling modules includes a second voltage divider resistor, a sampling unit, and a third voltage divider resistor connected in sequence. The sampling unit includes a voltage follower, a low-pass filter circuit, and an analog-to-digital converter circuit connected in sequence. The voltage follower is used to buffer current signals. The low-pass filter circuit includes a capacitor and a resistor to filter out high-frequency signals flowing from the source of the first MOS transistor into the low-pass filter circuit. The analog-to-digital converter circuit is used to convert the voltage signal flowing into the low-pass filter circuit into a digital signal. The first end of the second voltage divider resistor is the first end of the sampling module, the second end of the second voltage divider resistor is connected to the first end of the sampling unit, the second end of the sampling unit is connected to the first end of the third voltage divider resistor, and the second end of the third voltage divider resistor is the second end of the sampling module.

[0010] Optionally, a fourth voltage divider resistor is further included between the battery cell and the first MOSFET, with the first end of the fourth voltage divider resistor connected to the battery cell and the second end of the fourth voltage divider resistor connected to the gate of the first MOSFET. The target MOSFET is connected to a Zener diode. The target MOSFET is a first MOSFET connected to a cell whose voltage is higher than a first voltage threshold. The first terminal of the Zener diode is connected to the source of the target MOSFET, and the second terminal of the Zener diode is connected to the gate of the target MOSFET.

[0011] A second aspect of this invention provides a battery voltage acquisition method, applied to the battery voltage acquisition circuit described in the first aspect, the method comprising: The source voltages of the n first MOS transistors collected by the sampling module are obtained to obtain n first source voltages; the n first source voltages include the highest source voltage of the MOS transistor located at the highest voltage end of the battery module, the lowest source voltage of the MOS transistor located at the lowest voltage end of the battery module, and the source voltages of the remaining MOS transistors located between the highest voltage end and the lowest voltage end; For the cells other than the lowest voltage cell, the difference between the first source voltage of the current cell and the first source voltage of the previous cell is taken as the cell voltage of the current cell; the previous cell is the cell located in the direction of the lowest voltage cell among the two adjacent cells of the current cell. For all cells other than the highest voltage cell, the difference between the first source voltage of the current cell and the first source voltage of the previous cell is taken as the cell voltage of the current cell.

[0012] Optionally, the method further includes: When the first MOSFET is N-type and the highest voltage terminal of the battery module is also connected to the second MOSFET, the source voltage of the second MOSFET is obtained to obtain the second source voltage. The difference between the second source voltage and the highest source voltage is determined, and the sum of the difference and the lowest source voltage is taken as the cell voltage of the cell located at the lowest voltage terminal of the battery module.

[0013] Optionally, the method further includes: When the first MOSFET is P-type, the difference between the highest source voltage and the first source voltage of its adjacent cell is determined, and the sum of the difference and the lowest source voltage is taken as the cell voltage of the cell located at the highest voltage terminal of the battery module.

[0014] Optionally, the method further includes: When the first MOS transistor is N-type and the circuit further includes a Vgs voltage detection module, the Vgs voltage collected by the analog-to-digital conversion circuit is acquired. The sum of the Vgs voltage and the lowest source voltage is determined, and the sum is used as the cell voltage of the cell located at the lowest voltage terminal of the battery module.

[0015] The embodiments of the present invention have the following beneficial effects: The battery voltage acquisition circuit provided in this embodiment of the invention is connected to a battery module, which includes n battery cells. The circuit includes n voltage acquisition modules for acquiring the voltage of the n battery cells. Each voltage acquisition module includes a voltage acquisition channel and a sampling module. Each battery cell is connected to a voltage acquisition channel, and each voltage acquisition channel includes a first MOSFET connected in series with the battery cell. The first MOSFETs of each voltage acquisition channel are connected in series, and the drain of each first MOSFET is connected to the source of an adjacent first MOSFET. The first MOSFETs are of the same type. The sampling module is used to acquire the source voltage of the first MOSFET. The first terminal of the sampling module is connected to the source of the first MOSFET, and the second terminal of the sampling module is connected to the second terminal of an adjacent sampling module. The source voltage is used to calculate the voltage of the battery cell. In this way, by acquiring the source voltage of each first MOSFET through the voltage acquisition module, the voltage of the individual battery cell is indirectly obtained through calculation, avoiding the generation of current on the acquisition line, thereby preventing the problem of battery cell power imbalance caused by current on the acquisition line. Furthermore, this solution does not require dedicated voltage acquisition equipment, resulting in lower voltage acquisition costs. Attached Figure Description

[0016] Figure 1 A circuit structure diagram of the first battery voltage acquisition circuit provided in an embodiment of the present invention; Figure 2 A circuit structure diagram of the second battery voltage acquisition circuit provided in an embodiment of the present invention; Figure 3 A circuit structure diagram of the third battery voltage acquisition circuit provided in this embodiment of the invention; Figure 4 This is a circuit structure diagram of the Vgs detection unit provided in an embodiment of the present invention; Figure 5 A circuit structure diagram of the sampling unit provided in an embodiment of the present invention; Figure 6 This is a flowchart of a battery voltage acquisition method provided in an embodiment of the present invention. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more. Furthermore, the use of "based on" or "according to" implies openness and inclusiveness, because processes, steps, calculations, or other actions "based on" or "according to" one or more of the stated conditions or values ​​may in practice be based on additional conditions or beyond the stated values.

[0019] Figure 1 The circuit structure diagram of the first battery voltage acquisition circuit provided in the embodiment of the present invention is shown.

[0020] like Figure 1 As shown, S1 is a battery module, which includes n cells, namely B0-B1, B1-B2, B2-B3...B(n-1)-Bn. Each cell corresponds to a voltage acquisition module, which is used to acquire the voltage of the cell.

[0021] This voltage acquisition module includes a voltage acquisition channel and a sampling module. For example... Figure 1 As shown, the voltage acquisition module for the B0-B1 segment cells includes: voltage acquisition channel S20 and sampling module S30; the voltage acquisition module for the B1-B2 segment cells includes: voltage acquisition channel S21 and sampling module S31; the voltage acquisition module for the B2-B3 segment cells includes: voltage acquisition channel S22 and sampling module S32; and the voltage acquisition module for the B(n-1)-Bn segment cells includes: voltage acquisition channel S2(n-1) and sampling module S3(n-1).

[0022] Each voltage acquisition channel includes a first MOSFET connected in series with the battery cell, and the first MOSFETs of each voltage acquisition channel are connected in series. For example... Figure 1 As shown, MOSFET Q0 is connected in series with the cells in the B0-B1 segment, MOSFET Q1 is connected in series with the cells in the B1-B2 segment, MOSFET Q2 is connected in series with the cells in the B2-B3 segment, and MOSFET Qn-1 is connected in series with the cells in the B(n-1)-Bn segment.

[0023] The drain of each first MOSFET is connected to the source of the adjacent first MOSFET, and the first MOSFETs are of the same type. For example... Figure 1 As shown, each of the first MOSFETs is an N-type MOSFET. The drain of Q0 is connected to the source of Q1, the drain of Q1 is connected to the source of Q2, and the drain of Qn-1 is connected to the source of Qn.

[0024] The sampling module is used to acquire the source voltage of the first MOS transistor. The first terminal of the sampling module is connected to the source of the first MOS transistor, and the second terminal of the sampling module is connected to the second terminal of an adjacent sampling module. The source voltage is used to calculate the voltage of the battery cell.

[0025] Figure 2 The circuit structure diagram of the second battery voltage acquisition circuit provided in the embodiment of the present invention is shown.

[0026] Figure 2 for Figure 1 A detailed diagram showing the connection relationship between the voltage acquisition channel and the sampling module. (See diagram for example.) Figure 2 As shown, the voltage acquisition channel corresponding to the B4-B5 segment of the battery cell includes the first MOS transistor Q5 and the voltage divider resistor R5, and the sampling module corresponding to the B4-B5 segment of the battery cell includes the voltage divider resistor R6, the sampling unit V_B5, and the voltage divider resistor R7.

[0027] In this sampling module, the first terminal P1 is connected to the source of the first MOSFET Q5, and the second terminal P2 is connected to the second terminal of the adjacent sampling module. The sampling unit is used to acquire the source voltage of the first MOSFET Q5.

[0028] Because the gate input impedance of the MOSFET is high, the voltage of the battery cell is transferred to the source of the MOSFET connected in series with the battery cell. Thus, taking the first MOSFET Q5 as an example, the following voltage relationship can be obtained: B5=Vgs(th)5+V5(1) Reference Figure 2 B5 represents the voltage at point B5, Vgs(th)5 ​​represents the minimum Vgs voltage required to turn on Q5, which is the turn-on threshold voltage of the MOSFET, and V5 represents the voltage at point V5.

[0029] The voltage at point B5 can be calculated from the above formula.

[0030] Similarly, taking the first MOSFET Q4 as an example, the following voltage relationship can be obtained: B4=Vgs(th)4+V4(2) Where B4 represents the voltage at point B4, Vgs(th)4 represents the minimum Vgs voltage that makes Q4 conduct, and V4 represents the voltage at point V4.

[0031] Thus, the voltage of the cell in segment B4-B5 is the difference between the voltage at point B5 and the voltage at point B4, i.e., V. B4-B5 =Vgs(th)5 ​​+ V5 - (Vgs(th)4 + V4). Since the turn-on threshold voltage of MOSFETs in the same batch is basically the same, i.e., Vgs(th)... 5= Vgs(th)4, then V B4-B5 =V5-V4.

[0032] Similarly, the voltage of other battery cells can be calculated using this method.

[0033] The lowest voltage terminal of the battery cell is segment B0-B1. Since the lowest voltage terminal of the battery is grounded, V0 cannot be measured by connecting the first MOSFET in series. Therefore, V cannot be calculated using the above method. B0-B1 Therefore, the voltage calculation method for the remaining cells other than the lowest voltage cell is as follows: V Bn-Bn-1 =Vn-V(n-1), (n≥2) (3) In this way, the voltage of the cells other than the lowest voltage cell can be obtained.

[0034] This invention utilizes the high gate input impedance of MOSFETs to transfer the battery pack line voltage to the source of the series-connected MOSFETs. By acquiring the source voltage of the MOSFETs, the voltage of the individual battery cells is indirectly obtained through calculation, avoiding the generation of current on the acquisition line and thus preventing the problem of cell power imbalance caused by current on the acquisition line.

[0035] In summary, the battery voltage acquisition circuit provided in this embodiment of the invention is connected to a battery module, which includes n battery cells. The circuit includes n voltage acquisition modules for acquiring the voltage of the n battery cells. Each voltage acquisition module includes a voltage acquisition channel and a sampling module. Each battery cell is connected to a voltage acquisition channel, and each voltage acquisition channel includes a first MOSFET connected in series with the battery cell. The first MOSFETs of each voltage acquisition channel are connected in series, and the drain of each first MOSFET is connected to the source of an adjacent first MOSFET. The first MOSFETs are of the same type. The sampling module is used to acquire the source voltage of the first MOSFET. The first terminal of the sampling module is connected to the source of the first MOSFET, and the second terminal of the sampling module is connected to the second terminal of an adjacent sampling module. The source voltage is used to calculate the voltage of the battery cell. In this way, by acquiring the source voltage of each first MOSFET through the voltage acquisition module, the voltage of the individual battery cell is indirectly obtained through calculation, avoiding the generation of current on the acquisition line, thereby preventing the problem of battery cell power imbalance caused by current on the acquisition line. Furthermore, this solution does not require dedicated voltage acquisition equipment, resulting in lower voltage acquisition costs.

[0036] In one possible implementation, when the first MOSFET is N-type, the gate of the N-type first MOSFET is connected to the positive terminal of the battery cell, and the lowest voltage terminal of the battery module is connected in series with a first voltage divider resistor; the highest voltage terminal of the battery module is also connected to a second MOSFET, and the circuit further includes an (n+1)th voltage acquisition module for acquiring the source voltage of the second MOSFET; the second MOSFET and the first MOSFET are of the same type.

[0037] Figure 3 This is a circuit structure diagram of the third battery voltage acquisition circuit provided in the embodiments of the present invention.

[0038] like Figure 3 As shown, the first MOS transistors Q1, Q2...Qn-1 are N-type MOS transistors. The gate of Q1 is connected to the positive terminal of the B0-B1 segment of the battery cell, the gate of Q2 is connected to the positive terminal of the B1-B2 segment of the battery cell, and the gate of Qn-1 is connected to the positive terminal of the Bn-1-Bn-2 segment of the battery cell.

[0039] A second MOSFET Qn is connected to the highest voltage terminal P3 of the battery module. The function of the second MOSFET is different from that of the first MOSFET. The first MOSFET is used to collect the cell voltage, while the second MOSFET is used to collect the Vgs voltage of the MOSFET.

[0040] Because the MOSFET has a high gate input impedance, the voltage of the battery cell is transferred to the source of the MOSFET connected in series with the battery cell. Thus, taking the second MOSFET Qn as an example, the following voltage relationship can be obtained: Bn=Vgs(th) n +Vn(4) Where Bn represents the positive voltage of the power supply, and Vn represents the source voltage of the second MOSFET. The positive voltage of the power supply is... Figure 3 V in + Then we can obtain Vgs(th). n =V + -Vn.

[0041] In this way, we obtained the value of Vgs(th) of the second MOSFET. Since the first and second MOSFETs have the same specifications, we also obtained the value of Vgs(th) of the first MOSFET by measuring the source voltage of the second MOSFET.

[0042] The lowest voltage terminal of a battery is the cell located at the negative terminal, such as... Figure 3 The B0-B1 segment of the battery cell. Similar to other first-stage MOSFETs, the B0-B1 segment of the battery cell has the following voltage relationship: B1=Vgs(th)1+V1(5) Where B1 represents the voltage at point B1, and V1 represents the voltage at point V1.

[0043] Since the lowest voltage terminal of the battery is grounded, V0 cannot be measured by connecting the first MOSFET in series. Therefore, the voltage of the cell in the B0-B1 segment can be calculated by substituting the Vgs(th) obtained above into the voltage relationship formula for the B0-B1 segment, when the first MOSFET is N-type. This voltage is the voltage of the cell located at the lowest voltage terminal of the battery, as detailed below: B1=Vgs(th)1+V1=(V + -Vn)+V1(n=1)(6) Thus, when the first MOSFET is N-type, this embodiment of the invention obtains the Vgs(th) voltage of the first MOSFET by connecting the second MOSFET and the (n+1)th voltage acquisition module to the highest voltage terminal of the battery module, thereby obtaining the voltage of the cell located at the lowest voltage terminal of the battery.

[0044] In one possible implementation, when the first MOSFET is N-type, the circuit further includes a Vgs voltage detection module. The Vgs voltage detection module includes a fifth voltage divider resistor, a Vgs detection unit, and a third MOSFET connected in sequence. The Vgs detection unit includes a voltage follower, a low-pass filter circuit, and an analog-to-digital converter circuit connected in sequence. The first terminal of the fifth voltage divider resistor is connected to the highest voltage cell, and the second terminal of the fifth voltage divider resistor is connected to the first terminal of the Vgs detection unit. The third MOSFET has the same type as the first MOSFET. When the third MOS transistor is N-type, the second terminal of the Vgs detection unit is connected to the gate and drain of the N-type third MOS transistor, the source of the N-type third MOS transistor is connected to the second terminal of the sampling module, and the gate of the N-type third MOS transistor is connected to the first terminal of the sampling module; when the third MOS transistor is P-type, the second terminal of the Vgs detection unit is connected to the source of the P-type third MOS transistor, the drain of the P-type third MOS transistor is connected to the second terminal of the sampling module, and the gate of the P-type third MOS transistor is connected to the first terminal of the sampling module.

[0045] In this embodiment of the invention, a Vgs voltage detection module can also be used to collect the Vgs voltage of the third MOSFET. Since the third MOSFET and the first MOSFET are of the same model, the Vgs voltage of the third MOSFET is the same as the Vgs voltage of the first MOSFET.

[0046] Reference Figure 2 The Vgs voltage detection module includes a fifth voltage divider resistor R18, a Vgs detection unit V-GS, and a third MOSFET Q6 connected in sequence.

[0047] like Figure 2As shown, the first terminal P4 of the fifth voltage divider resistor R18 is connected to the cell at the highest voltage terminal, and the second terminal P5 of the fifth voltage divider resistor R18 is connected to the first terminal of the Vgs detection unit V-GS.

[0048] Figure 2 The third MOSFET Q6 is an N-type transistor. The second terminal of the Vgs detection unit V-GS is connected to the drain and gate of the third MOSFET Q6. In this way, the voltage flowing through the gate and drain is equal to the Vgs(th) of the third MOSFET. The Vgs(th) of the third MOSFET can be obtained through the Vgs detection unit. The Vgs(th) of the first MOSFET is equal to the Vgs(th) of the third MOSFET.

[0049] Figure 4 This is a circuit structure diagram of the Vgs detection unit provided in an embodiment of the present invention.

[0050] like Figure 4 As shown, the Vgs detection unit includes a voltage follower U2-B, a low-pass filter circuit, and an analog-to-digital converter circuit AD_GS connected in sequence. The low-pass filter circuit includes a voltage divider resistor R22 and a capacitor C4.

[0051] In one possible implementation, when the first MOS transistor is P-type, the gate of the P-type first MOS transistor is connected to the negative terminal of the battery cell, and the highest voltage terminal of the battery module is connected in series with a first voltage divider resistor.

[0052] Reference Figure 1 , Figure 1 The first MOSFET in the circuit is a P-type MOSFET. For example... Figure 1 As shown, the gate of the first MOS transistor Q0, located at the lowest voltage end of the battery module, is connected to the negative terminal of the battery module, and the highest voltage end of the battery module is connected in series with the first voltage divider resistor R1.

[0053] When the total voltage remains constant, connecting a voltage divider resistor in series in the circuit will divide the voltage, thus reducing the voltage across that part of the circuit.

[0054] For a P-type MOSFET, the relationship between the negative terminal voltage of the battery and the source voltage of the first MOSFET is as follows: Bn = Vn - Vgs(th) n (7) Where Bn represents the voltage at point Bn of the nth cell, and Vn represents the voltage at point V. n The voltage at that point.

[0055] Thus, when the first MOSFET is P-type, the highest cell capacity of the battery is B. n-1 -B n The voltage of segment is: V(n-1) = Vn - V(n-1) + V0 (8) Where V(n-1) represents the voltage of the (n-1)th cell, Vn represents the voltage of the nth cell, and V0 represents the voltage of the 1st cell.

[0056] Thus, when the first MOSFET is P-type, cell B located at the highest voltage end of the battery is obtained. n-1 -B n The voltage of the segment.

[0057] In one possible implementation, each of the sampling modules includes a second voltage divider resistor, a sampling unit, and a third voltage divider resistor connected in sequence. The sampling unit includes a voltage follower, a low-pass filter circuit, and an analog-to-digital converter circuit connected in sequence. The voltage follower is used to buffer current signals. The low-pass filter circuit includes a capacitor and a resistor to filter out high-frequency signals flowing from the source of the first MOS transistor into the low-pass filter circuit. The analog-to-digital converter circuit is used to convert the voltage signal flowing into the low-pass filter circuit into a digital signal. The first end of the second voltage divider resistor is the first end of the sampling module, the second end of the second voltage divider resistor is connected to the first end of the sampling unit, the second end of the sampling unit is connected to the first end of the third voltage divider resistor, and the second end of the third voltage divider resistor is the second end of the sampling module.

[0058] like Figure 2 As shown, the sampling module corresponding to Q0 includes a second voltage divider resistor R16, a sampling unit V_B0, and a third voltage divider resistor R17 connected in sequence. The sampling module corresponding to Q1 includes a second voltage divider resistor R14, a sampling unit V_B1, and a third voltage divider resistor R15 connected in sequence. The sampling modules of other first MOS transistors also have the same circuit structure.

[0059] The first end of the second voltage divider resistor R16 is the first end of the sampling module. The second end of the second voltage divider resistor R16 is connected to the first end of the sampling unit V_B0. The second end of the sampling unit V_B0 is connected to the first end of the third voltage divider resistor R17. The second end of the third voltage divider resistor R17 is the second end of the sampling module.

[0060] Figure 5 The circuit structure diagram of the sampling unit provided in the embodiment of the present invention is shown.

[0061] like Figure 5 As shown, the sampling unit V_B0 includes a voltage follower U1-A, a low-pass filter circuit, and an analog-to-digital converter circuit AD0 connected in sequence. The low-pass filter circuit includes a resistor R19 and a capacitor C1, used to filter out high-frequency signals flowing from the source of the first MOS transistor Q0 into the low-pass filter circuit. The voltage follower is used to buffer current signals, and the analog-to-digital converter circuit is used to convert the voltage signal flowing from the low-pass filter circuit into a digital signal.

[0062] The circuit structures of the other sampling units V_B1 to V_Bn are all the same.

[0063] In one possible implementation, a fourth voltage divider resistor is further included between the battery cell and the first MOSFET, with the first end of the fourth voltage divider resistor connected to the battery cell and the second end of the fourth voltage divider resistor connected to the gate of the first MOSFET. like Figure 2 As shown, a fourth voltage divider resistor R1 is included between the battery cell B1 and the first MOSFET Q1. The first end of R1 is connected to the battery cell B1, and the second end is connected to the gate of the first MOSFET Q1.

[0064] In one possible implementation, the target MOSFET is connected to a Zener diode. The target MOSFET is a first MOSFET connected to a cell with a voltage higher than a first voltage threshold. The first terminal of the Zener diode is connected to the source of the target MOSFET, and the second terminal of the Zener diode is connected to the gate of the target MOSFET.

[0065] For battery cells with voltages exceeding a first voltage threshold, the first MOSFET connected to it is designated as the target MOSFET. To prevent the target MOSFET from being damaged by the high current from the battery cell, a Zener diode is connected to it. The first voltage threshold can be preset according to actual conditions, for example, it can be set to 20V.

[0066] like Figure 2 As shown, the voltage of the cell in segment B0-B1 is higher than the first voltage threshold, and the first MOSFET connected to it is Q1. Therefore, Q1 is the target MOSFET.

[0067] ZD1 represents a Zener diode, with its first terminal connected to the source of Q1 and its second terminal connected to the gate of Q1.

[0068] Figure 6 This is a flowchart illustrating the steps of a battery voltage acquisition method provided in an embodiment of the present invention. This method is applied to... Figures 1-5 The voltage acquisition circuit in the method includes: Step 101: Obtain the source voltages of the n first MOS transistors collected by the sampling module to obtain n first source voltages; the n first source voltages include the highest source voltage of the MOS transistor located at the highest voltage end of the battery module, the lowest source voltage of the MOS transistor located at the lowest voltage end of the battery module, and the source voltages of the remaining MOS transistors located between the highest voltage end and the lowest voltage end; Step 102: For the cells other than the lowest voltage cell, the difference between the first source voltage of the current cell and the first source voltage of the previous cell is taken as the cell voltage of the current cell; the previous cell is the cell located in the direction of the lowest voltage cell among the two adjacent cells of the current cell. Step 103: For the cells other than the highest voltage cell, the difference between the first source voltage of the current cell and the first source voltage of the previous cell is taken as the cell voltage of the current cell.

[0069] In steps 101-103, as follows Figure 2 As shown, the voltage acquisition channel corresponding to the B4-B5 segment of the battery cell includes the first MOS transistor Q5 and the voltage divider resistor R5, and the sampling module corresponding to the B4-B5 segment of the battery cell includes the voltage divider resistor R6, the sampling unit V_B5, and the voltage divider resistor R7.

[0070] In this sampling module, the first terminal P1 is connected to the source of the first MOSFET Q5, and the second terminal P2 is connected to the second terminal of the adjacent sampling module. The sampling unit is used to acquire the source voltage of the first MOSFET Q5.

[0071] Because the gate input impedance of the MOSFET is high, the voltage of the battery cell is transferred to the source of the MOSFET connected in series with the battery cell. Thus, taking the first MOSFET Q5 as an example, the following voltage relationship can be obtained: B5 = Vgs(th)5 ​​+ V5 Reference Figure 3 B5 represents the voltage at point B5, Vgs(th)5 ​​represents the minimum Vgs voltage required to turn on Q5, which is the turn-on threshold voltage of the MOSFET, and V5 represents the voltage at point V5.

[0072] The voltage at point B5 can be calculated from the above formula.

[0073] Similarly, taking the first MOSFET Q4 as an example, the following voltage relationship can be obtained: B4 = Vgs(th)4 + V4 Where B4 represents the voltage at point B4, Vgs(th)4 represents the minimum Vgs voltage that makes Q4 conduct, and V4 represents the voltage at point V4.

[0074] Thus, the voltage of the cell in segment B4-B5 is the difference between the voltage at point B5 and the voltage at point B4, i.e., V. B4-B5 =Vgs(th)5 ​​+ V5 - (Vgs(th)4 + V4). Since the turn-on threshold voltage of MOSFETs in the same batch is basically the same, i.e., Vgs(th)... 5= Vgs(th)4, then V B4-B5 =V5-V4.

[0075] Similarly, the voltage of other battery cells can be calculated using this method.

[0076] The lowest voltage terminal of the battery cell is segment B0-B1. Since the lowest voltage terminal of the battery is grounded, V0 cannot be measured by connecting the first MOSFET in series. Therefore, V cannot be calculated using the above method. B0-B1 Therefore, the voltage calculation method for the remaining cells other than the lowest voltage cell is as follows: V Bn-Bn-1 =Vn-V(n-1), (n≥2) In this way, the voltage of the cells other than the lowest voltage cell can be obtained.

[0077] In one possible implementation, the method further includes: When the first MOSFET is P-type, the difference between the highest source voltage and the first source voltage of its adjacent cell is determined, and the sum of the difference and the lowest source voltage is taken as the cell voltage of the cell located at the highest voltage terminal of the battery module.

[0078] Specifically, for a P-type MOSFET, the relationship between the negative terminal voltage of the battery and the source voltage of the first MOSFET is as follows: Bn = Vn - Vgs(th) n Where Bn represents the voltage at point Bn, and Vn represents the voltage at point V. n The voltage at that point.

[0079] The voltage relationship at point B(n-1) is: B(n-1) = V(n-1) - Vgs(th) n-1 Thus, when the first MOSFET is P-type, the highest cell capacity of the battery is B. n-1 -B n The voltage across the segment is: V(n-1) = Vn - V(n-1) + V0 Where V(n-1) represents the voltage of the (n-1)th cell, Vn represents the voltage of the nth cell, and V0 represents the voltage of the 1st cell.

[0080] In this way, when the first MOSFET is P-type, the voltage in the cell segment Bn-1-Bn at the highest voltage end of the battery is obtained.

[0081] In one possible implementation, the method further includes: Step 201: When the first MOS transistor is N-type and the circuit further includes a Vgs voltage detection module, the Vgs voltage collected by the analog-to-digital conversion circuit is acquired. Step 202: Determine the sum of the Vgs voltage and the lowest source voltage, and use the sum as the cell voltage of the cell located at the lowest voltage terminal of the battery module.

[0082] In steps 201-202, since the lowest voltage terminal of the battery is grounded, V0 cannot be measured by connecting the first MOSFET in series. Therefore, the voltage of the cell in the B0-B1 segment can be calculated by substituting the Vgs(th) obtained above into the voltage relationship formula for segment B0-B1 when the first MOSFET is N-type. This voltage is the voltage of the cell located at the lowest voltage terminal of the battery, as detailed below: B1=Vgs(th)1+V1=(V + -Vn)+V1(n=1) Thus, when the first MOSFET is N-type, this embodiment of the invention obtains the Vgs(th) voltage of the first MOSFET by connecting the second MOSFET and the (n+1)th voltage acquisition module to the highest voltage terminal of the battery module, thereby obtaining the voltage of the cell located at the lowest voltage terminal of the battery.

[0083] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. This computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and RAMbus dynamic RAM (RDRAM), etc.

[0084] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims.

[0085] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. A battery voltage acquisition circuit, characterized in that, The circuit is connected to the battery module, which includes n battery cells. The circuit includes n voltage acquisition modules, which are used to acquire the voltage of the n battery cells. Each voltage acquisition module includes a voltage acquisition channel and a sampling module; each battery cell is connected to a voltage acquisition channel, each voltage acquisition channel includes a first MOS transistor connected in series with the battery cell, the first MOS transistors of each voltage acquisition channel are connected in series, the drain of each first MOS transistor is connected to the source of the adjacent first MOS transistor, and the first MOS transistors are of the same type; The sampling module is used to acquire the source voltage of the first MOS transistor. The first terminal of the sampling module is connected to the source of the first MOS transistor, and the second terminal of the sampling module is connected to the second terminal of an adjacent sampling module. The source voltage is used to calculate the voltage of the battery cell. When the first MOS transistor is N-type, the gate of the N-type first MOS transistor is connected to the positive terminal of the battery cell, and the lowest voltage terminal of the battery module is connected in series with a first voltage divider resistor. The highest voltage terminal of the battery module is also connected to a second MOSFET. The circuit also includes an (n+1)th voltage acquisition module for acquiring the second source voltage of the second MOSFET. The second MOSFET and the first MOSFET are of the same type. The difference between the second source voltage and the highest source voltage is determined, and the sum of the difference and the lowest source voltage is taken as the cell voltage of the cell located at the lowest voltage terminal of the battery module; the highest source voltage refers to the source voltage of the MOS transistor located at the highest voltage terminal of the battery module, and the lowest source voltage refers to the source voltage of the MOS transistor located at the lowest voltage terminal of the battery module.

2. The circuit according to claim 1, characterized in that: When the first MOSFET is N-type, the circuit further includes a Vgs voltage detection module, which comprises a fifth voltage divider resistor, a Vgs detection unit, and a third MOSFET connected in sequence; the Vgs detection unit comprises a voltage follower, a low-pass filter circuit, and an analog-to-digital converter circuit connected in sequence; the first end of the fifth voltage divider resistor is connected to the highest voltage cell, and the second end of the fifth voltage divider resistor is connected to the first end of the Vgs detection unit; the third MOSFET is of the same type as the first MOSFET. When the third MOS transistor is N-type, the second terminal of the Vgs detection unit is connected to the gate and drain of the N-type third MOS transistor, the source of the N-type third MOS transistor is connected to the second terminal of the Vgs detection unit, and the gate of the N-type third MOS transistor is connected to the first terminal of the Vgs detection unit. When the third MOS transistor is P-type, the second terminal of the Vgs detection unit is connected to the source of the P-type third MOS transistor, the drain of the P-type third MOS transistor is connected to the second terminal of the sampling module, and the gate of the P-type third MOS transistor is connected to the first terminal of the sampling module.

3. The circuit according to claim 1, characterized in that: When the first MOS transistor is P-type, the gate of the first MOS transistor located at the lowest voltage terminal of the battery module is connected to the negative terminal of the battery module, and the highest voltage terminal of the battery module is connected in series with a first voltage divider resistor.

4. The circuit according to any one of claims 1-3, characterized in that, Each of the sampling modules includes a second voltage divider resistor, a sampling unit, and a third voltage divider resistor connected in sequence. The sampling unit includes a voltage follower, a low-pass filter circuit, and an analog-to-digital converter circuit connected in sequence. The voltage follower is used to buffer current signals. The low-pass filter circuit includes a capacitor and a resistor to filter out high-frequency signals flowing from the source of the first MOS transistor into the low-pass filter circuit. The analog-to-digital converter circuit is used to convert the voltage signal flowing into the low-pass filter circuit into a digital signal. The first end of the second voltage divider resistor is the first end of the sampling module, the second end of the second voltage divider resistor is connected to the first end of the sampling unit, the second end of the sampling unit is connected to the first end of the third voltage divider resistor, and the second end of the third voltage divider resistor is the second end of the sampling module.

5. The circuit according to any one of claims 1-3, characterized in that, The battery cell and the first MOSFET are further connected to a fourth voltage divider resistor, the first end of which is connected to the battery cell and the second end of which is connected to the gate of the first MOSFET. The target MOSFET is connected to a Zener diode. The target MOSFET is a first MOSFET connected to a cell whose voltage is higher than a first voltage threshold. The first terminal of the Zener diode is connected to the source of the target MOSFET, and the second terminal of the Zener diode is connected to the gate of the target MOSFET.

6. A method for acquiring battery voltage, characterized in that, The method, applied to the battery voltage acquisition circuit according to any one of claims 1-5, comprises: The source voltages of the n first MOS transistors collected by the sampling module are obtained to obtain n first source voltages; the n first source voltages include the highest source voltage of the MOS transistor located at the highest voltage end of the battery module, the lowest source voltage of the MOS transistor located at the lowest voltage end of the battery module, and the source voltages of the remaining MOS transistors located between the highest voltage end and the lowest voltage end; For the cells other than the lowest voltage cell, the difference between the first source voltage of the current cell and the first source voltage of the previous cell is taken as the cell voltage of the current cell; the previous cell is the cell located in the direction of the lowest voltage cell among the two adjacent cells of the current cell. For cells other than the highest voltage cell, the difference between the first source voltage of the current cell and the first source voltage of the previous cell is taken as the cell voltage of the current cell. The method further includes: When the first MOSFET is N-type and the highest voltage terminal of the battery module is also connected to the second MOSFET, the source voltage of the second MOSFET is obtained to obtain the second source voltage. The difference between the second source voltage and the highest source voltage is determined, and the sum of the difference and the lowest source voltage is taken as the cell voltage of the cell located at the lowest voltage terminal of the battery module.

7. The method according to claim 6, characterized in that, The method further includes: When the first MOSFET is P-type, the difference between the highest source voltage and the first source voltage of its adjacent cell is determined, and the sum of the difference and the lowest source voltage is taken as the cell voltage of the cell located at the highest voltage terminal of the battery module.

8. The method according to claim 6, characterized in that, The method further includes: When the first MOS transistor is N-type and the circuit further includes a Vgs voltage detection module, the Vgs voltage collected by the analog-to-digital conversion circuit is acquired. The sum of the Vgs voltage and the lowest source voltage is determined, and the sum is used as the cell voltage of the cell located at the lowest voltage terminal of the battery module.

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