A multi-target drone recognition device and method based on radio frequency array

Abstract

The application discloses a kind of multi-target unmanned plane identification device and method based on radio frequency array.The application includes radio frequency antenna array, receiver, AD acquisition module, FPGA data processing board, FPGA data conversion board, signal processor, the Zynq development board of support PYNQ;Radio frequency antenna array receives airspace unmanned plane signal, configuration receiver and AD module acquisition obtain multi-channel digital signal, realize beam forming algorithm in FPGA data processing board Signal acquisition completes airspace filtering, upload signal processor through FPGA data conversion board to the signal of acquisition, design the deep learning scheme of secondary target auxiliary identification and identify each suspected target unmanned plane, finally deploy depth neural network in Zynq board Realization off-line real-time identification.The application can realize unmanned plane identification in complex multi-target scene, angle is introduced using radio frequency array, compared with the cost of single-target radio frequency identification scheme is not greatly improved, because it realizes off-line real-time operation and can be applied to the actual deployment of urban environment anti-unmanned plane system.

Description

Technical Field

[0001] This invention relates to a method for identifying multiple targets of unmanned aerial vehicles (UAVs), and more particularly to a multi-target UAV identification device and method based on radio frequency arrays, employing deep learning, and implemented on an FPGA. Background Technology

[0002] With the development of technologies such as artificial intelligence and modern control, the civilian drone industry, primarily composed of multi-rotor drones, has grown rapidly. While civilian drones play a greater role in daily life, they also bring security and privacy risks. Researching effective countermeasures against these illegally intruding drones has become an urgent need. Identifying drones is a crucial step in most countermeasures. Currently, drone detection methods can be categorized into four types: radar, video, radio frequency (RF), and audio. RF detection has become the mainstream drone identification method due to its characteristics of no electromagnetic radiation, long range, and immunity to obstructions.

[0003] Radio frequency (RF) identification of drones typically involves detecting the drone's image transmission signals. Current research largely relies on a single antenna and targets single-target scenarios. This single-channel data acquisition method cannot address issues encountered in multi-target drone identification tasks, such as false alarm angles caused by interference from other sources, the mixing of multiple signals in the acquired data, and distortion of the spectral characteristics of the primary identification signal source by other signal sources. Existing RF identification methods for drones have significant limitations in complex multi-target scenarios, and a real-time multi-target drone identification system running offline on an FPGA is currently unavailable. Summary of the Invention

[0004] To address the shortcomings in the prior art, this invention aims to propose a multi-target UAV identification device and method based on a radio frequency array. Compared with existing technologies, this invention utilizes a radio frequency array to introduce angle information, completes spatial filtering signal acquisition through a beamforming algorithm designed and implemented on an FPGA, designs a deep neural network using a multi-channel time-frequency map as model input, and introduces an attention mechanism to complete secondary target assisted identification based on the included angle. Finally, the trained model is deployed to a Zynq development board, realizing real-time UAV identification in multi-target scenarios running offline on an FPGA.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0006] According to a first aspect of this specification, a multi-target UAV identification device based on a radio frequency array is provided. The device includes a radio frequency antenna array, a receiver, an AD acquisition module, an FPGA data processing board, an FPGA data conversion board, a signal processor, and a Zynq development board supporting PYNQ. The radio frequency antenna array is connected to the RF input terminal of the receiver via a radio frequency cable for multi-channel acquisition of UAV image transmission signals in the airspace. The radio frequency signal is converted into an intermediate frequency signal by a superheterodyne receiver. The IF output terminal of the receiver is connected to the AD acquisition module via a radio frequency cable, and the intermediate frequency analog signal is converted into a multi-channel digital signal for subsequent signal processing.

[0007] The user I / O port of the FPGA data processing board is connected to the rectangular interface pins on the receiver for configuring receiver functions via DuPont wires. The FPGA data processing board is connected to the AD acquisition module via the FMC-HPC interface. The FPGA data processing board configures the functions of the receiver and AD acquisition module via the SPI protocol, and also realizes data transmission between the AD acquisition module and the FPGA data processing board.

[0008] The FPGA data processing board is connected to the FPGA data conversion board via optical fiber. The FPGA data conversion board is connected to the signal processor and the Zynq development board that supports PYNQ via Ethernet cable. The signal processor is a computer terminal.

[0009] Furthermore, the radio frequency antenna array in this device is compatible with two implementation methods and two linear array methods:

[0010] 1) Two implementation methods for radio frequency antenna arrays include:

[0011] 1.1) A patch antenna array consisting of rectangular microstrip antennas operates at the frequency band of the UAV image transmission signal. The fixed position of the antenna is determined by the array arrangement and is obtained through calculation.

[0012] 1.2) The antenna array is obtained by combining the antenna fixing bracket obtained by 3D printing with the glue rod antenna. The working frequency of the glue rod antenna is in the frequency band of the UAV image transmission signal. The fixed position of the antenna is determined by the array arrangement and is obtained by calculation.

[0013] Both implementations require that the total number of array elements not exceed the number of receiver channels and that the RF port be an SMA interface.

[0014] 2) Two linear array configurations for radio frequency antenna arrays include:

[0015] 2.1) The spacing between the array elements of the antenna array in both implementation methods is a uniform half wavelength calculated from the detection frequency, that is, the array elements are evenly arranged.

[0016] 2.2) The spacing between the array elements of the antenna arrays in both implementations satisfies a specific sparse array arrangement rule based on the detection frequency, namely, various coprime array arrangements and nested array arrangements where the total number of array elements is less than the number of receiver channels.

[0017] Furthermore, the FPGA data conversion board is connected to a signal processor or a PYNQ-enabled Zynq development board via an Ethernet cable. The FPGA data conversion board connected to the signal processor processes the acquired data to obtain a multi-target UAV recognition model. The FPGA data conversion board connected to the PYNQ-enabled Zynq development board outputs the multi-target UAV recognition results.

[0018] The signal processor supports WiFi connection with the Zynq development board that supports PYNQ, enabling the hardware deployment of a multi-target UAV recognition model based on PYNQ.

[0019] According to a second aspect of this specification, a method for multi-target UAV identification based on a radio frequency array is provided, the method comprising the following steps:

[0020] 1) Design the FPGA data processing board, constraining the user I / O ports and FMC-HPC interface to configure the receiver and AD acquisition module functions. According to the FIFO IP core depth setting N in the FPGA design project file, it can obtain digital sampling signals with M channels and N sampling snapshots.

[0021] X = [x1(n), x2(n), ..., x M (n)] T n = 1, 2, ..., N, where x m (n) represents the AD sampling output result of the nth sampling snapshot of the mth channel, where m = 1, 2, ..., M. T This represents the matrix transpose operation;

[0022] Step 1) specifically refers to:

[0023] By configuring the receiver with an FPGA, the system can automatically select the channel through which the UAV is communicating to collect a single sampling data of M channels and N sampling snapshots.

[0024] The communication frequency band of the UAV image transmission signal is 2.400~2.483GHz, which can be divided into 8 channels, each with a bandwidth of 10MHz. When the UAV is operating, it usually adaptively selects the channel for communication based on environmental interference. The superheterodyne receiver (2) has a working bandwidth of 80MHz or more, covering the UAV image transmission signal frequency band, and has a frequency selection function. That is, the output bandwidth of the intermediate frequency filter is 10MHz, which can accurately capture a single channel and filter out interference. The frequency selection of the receiver is achieved by the FPGA based on the SPI protocol design control signal to control the frequency division function of the receiver PLL (phase-locked loop), thereby selecting the local oscillator frequency.

[0025] The design of FPGA control signals requires selecting the local oscillator frequency through pre-acquired data. The basic principle is to iterate through each local oscillator frequency, acquiring a certain length of data at each frequency. After the iteration, the channel corresponding to the data with the largest total value is the currently communicating channel. When the FIFO IP core depth is set to 1024, the data acquired by the m-th channel is: x m (1),x m (2),…,x m (1024) Extract the first and last 10 frames of data from each of the multiple channels, take the absolute value, and sum the highest two bits to obtain the channel strength flag ξ:

[0026]

[0027] Where abs(·) represents the function of taking the absolute value of the two's complement, and [D-2:D-3] represents the highest two valid data bits of the AD output with D-bit resolution after removing the sign bit;

[0028] By traversing 8 channels and processing the collected data, 8 channel strength indicators ξ are obtained. The channel corresponding to the largest ξ value is the channel currently in communication, and this channel should be selected for configuring the receiver's local oscillator frequency.

[0029] In step 1), the acquired digital sampling signals X = [x1(n), x2(n), ..., x2(n)] from M channels and N sampling snapshots are obtained. M (n)] T The specific description of n = 1, 2, ..., N is as follows:

[0030] The data rate obtained by high-speed multi-channel AD sampling exceeds the transmission rate limit of the subsequent interface. Therefore, the data stream received by the signal processor is a splicing of several consecutively sampled segments. The length of the consecutively sampled segments is determined by the settings of the buffer function in the FPGA, which specifically depends on the depth setting of the FIFO.

[0031] The length of a continuous sampling segment is determined by the number of single-channel data items contained in a burst when the Ethernet interface is configured.

[0032] The signal spliced ​​together from several consecutively sampled segments has less loss of frequency domain features compared to the original signal.

[0033] 2) The sampling covariance matrix is ​​calculated from the digital sampled signal X: in,[·] H The complex conjugate transpose of the matrix is ​​used to implement the DOA algorithm on an FPGA using the sampled multi-channel digital signals to obtain estimated angles θ1, θ2, ..., θ K K represents the total number of suspected UAV targets and interfering targets in the airspace estimated by a pre-defined method for estimating the number of target directions or information sources.

[0034] 3) Traverse the estimated angles θ1, θ2, ..., θ1 output by the DOA algorithm. K , with angle θ k Construct a beamformer for the angle of interest to obtain the optimal weight W for that angle. k W k Let W be a vector of length M. k yes and guiding vector a(θ) k The function of ), that is:

[0035]

[0036] Wherein, the guiding vector a(θ) k ) is a specific angle θ k The vector representing the spatial phase difference between array elements is as follows:

[0037]

[0038] Where S1, S2, ..., S M-1 λ represents the distance between the 2nd to Mth array elements and the 1st array element, and λ is the detection wavelength;

[0039] 4) The weight vector W obtained by using the beamformer k The data from M channels are weighted and summed to acquire spatial filtered signals, resulting in spatial filtered output data Y. An optical fiber interface is configured to transmit data Y from the FPGA data processing board to the FPGA data conversion board. Data format conversion is performed in the FPGA data conversion board, and an Ethernet interface is configured to upload and output data.

[0040] Steps 3) and 4) specifically refer to:

[0041] Implement the MVDR beamforming algorithm in the FPGA and output the spatial filtering sampling results;

[0042] Implement the MVDR algorithm at the FPGA RTL level to obtain the weights W. k :

[0043]

[0044] The corresponding angle of interest θ is calculated in real time. k Spatial domain filtered output data Y k :

[0045]

[0046] Output data Y k The final uploaded data Y from the integrated sample is obtained:

[0047]

[0048] 5) The signal processor processes a certain angle θ in the uploaded data. k Data sequence Y k Perform a short-time Fourier transform (STFT) to obtain the time-frequency graph P corresponding to this angle data. k With time-frequency graph P k As input to the model, define and train a deep neural network to obtain a multi-target UAV recognition model;

[0049] Step 5) specifically refers to: a deep learning scheme for multi-target UAV recognition based on radio frequency arrays.

[0050] For data sequence Y k Performing a short-time Fourier transform (STFT) yields the time-frequency plot P. k The ResNet feature extraction network is used to extract time-frequency map features, which are then fed into a fully connected layer to output the various angles of interest θ. k The drone identification results;

[0051] After determining K, plot the time-frequency graphs P1, P2, ..., P K As input to the ResNet feature extraction network, the time-frequency maps are arranged according to the main target and the secondary targets whose angle with the main target increases sequentially, and the channels are stacked. An initial weight sequence is then assigned to the feature channels corresponding to the above time-frequency maps: 1, α2, α3, ..., α K ,

[0052] α i =g(θ) i -θ1)

[0053] Where g(·) is a decreasing function characterizing the relationship between the initial value of the feature channel weights and the angle between the primary and secondary targets, θ1 represents the angle of the primary target (i.e., the detection direction), and θ i Indicates the angle of each target;

[0054] Based on this, the SE attention mechanism is introduced to further improve the sensitivity of the network to radio frequency features in the time-frequency map acquired from different directions by automatically learning feature weights based on the loss through a fully connected network. This also helps the main target identification task by introducing features in the secondary target time-frequency map after spatial filtering.

[0055] 6) A multi-target UAV recognition model is used to predict the target recognition results from various angles. The model is deployed on the Zynq development board in PYNQ mode, and the FPGA data conversion board is connected to the Zynq development board to complete real-time multi-target recognition.

[0056] The beneficial effects of this invention are as follows: This invention utilizes radio frequency arrays to introduce angle information, completes spatial filtering signal acquisition through beamforming algorithms designed and implemented on FPGA, designs deep neural networks using multi-channel time-frequency maps as model inputs, and introduces an attention mechanism to complete secondary target-assisted recognition based on the included angle. Finally, the trained model is deployed to a Zynq development board, realizing real-time UAV recognition in multi-target scenarios running offline on FPGA. Attached Figure Description

[0057] Figure 1 This is a schematic diagram of the modules in an embodiment of the present invention;

[0058] Figure 2 This is a structural block diagram of an embodiment of the present invention;

[0059] Figure 3 This is a flowchart illustrating the implementation of automatic channel selection;

[0060] Figure 4 This is a schematic diagram illustrating the processing of spliced ​​signals during specific implementation;

[0061] Figure 5 This is a schematic diagram of the FPGA implementation structure of the beamforming algorithm;

[0062] Figure 6 Flowchart of the attention mechanism in this target-assisted recognition;

[0063] In the diagram: 1. RF antenna array, 2. Receiver, 3. AD acquisition module, 4. FPGA data processing board, 5. FPGA data conversion board, 6. Signal processor, 7. Zynq development board supporting PYNQ. Detailed Implementation

[0064] The invention will be further described below with reference to the accompanying drawings.

[0065] like Figure 1As shown in the figure, the multi-target UAV identification device based on radio frequency array provided by this embodiment of the invention includes a radio frequency antenna array 1, a receiver 2, an AD acquisition module 3, an FPGA data processing board 4, an FPGA data conversion board 5, a signal processor 6, and a Zynq development board 7 supporting PYNQ. In this embodiment, the specific selection of each part is as follows: the antenna array 1 is a glue rod antenna array and a patch antenna array with a center frequency of 2.44GHz and an element spacing that meets the half-wavelength distance condition under this frequency; the receiver 2 is a customized superheterodyne receiver, providing a rectangular interface to realize the function of local oscillator frequency tuning; the AD acquisition module 3 is an FMC144-eight-channel 14-bit 250MSPS AD FMC-HPC analog-to-digital converter board, supporting analog-to-digital acquisition with an upper limit of 250M sampling rate for eight channels; the FPGA data processing board 4 is an FPGA expansion board based on the Virtex-7 690t chip, providing rich I / O ports, FMC-HPC interfaces and fiber optic interfaces; the FPGA data conversion board 5 is based on Artix-7 The FPGA expansion version of the 100t chip has multiple fiber optic and Ethernet interfaces; the Zynq development board 7 supporting PYNQ uses the Ultra 96v2; and the signal processor 6 is a computer terminal.

[0066] The radio frequency antenna array is connected to the receiver's RF input terminal via radio frequency cables to acquire UAV image transmission signals in the airspace through multiple channels. The radio frequency signal is converted into an intermediate frequency signal by a superheterodyne receiver. The receiver's IF output terminal is connected to the AD acquisition module via radio frequency cables, and the intermediate frequency analog signal is converted into a multi-channel digital signal for subsequent signal processing.

[0067] In practice, given that the AD module has a resolution of 14 bits, all acquired data is processed as 2 bytes during buffering and relay, with 0s added to the two high bits. When integrating the data from 8 channels, the data needs to be aligned and output to the FIFO simultaneously. The values ​​output by each of the 8 FIFOs are combined with a snapshot flag to form a sampling snapshot for subsequent processing.

[0068] The user I / O ports of the Virtex-7 FPGA data processing board are connected to the rectangular interface pins on the receiver used for configuring receiver functions via DuPont wires. The Virtex-7 FPGA data processing board is connected to the AD acquisition module via the FMC-HPC interface. The Virtex-7 FPGA data processing board configures the functions of the receiver and AD acquisition module through the SPI protocol, and at the same time realizes the data transmission between the AD acquisition module and the FPGA data processing board.

[0069] The Virtex-7 FPGA data processing board is connected to the Artix-7 FPGA data conversion board via fiber optic cable. The Artix-7 FPGA data conversion board is connected to the signal processor and the PYNQ-enabled Zynq development board Ultra 96v2 via Ethernet cable.

[0070] In practice, the SPI protocol configuration refers to the configuration timing diagram in the user manual provided by the receiver and AD module. The configuration of the fiber optic interface transceiver ends is implemented by instantiating the Aurora IP core, the Ethernet interface configuration is implemented by instantiating the tri-speed Ethernet IP core, and the Ultra 96v2 development board deploys the neural network via WiFi.

[0071] like Figure 2 As shown, a multi-target UAV identification method based on radio frequency array is implemented in an FPGA data processing board, an FPGA data conversion board, a signal processor, and a Zynq development board supporting PYNQ, including the following steps:

[0072] Step 1) Design the FPGA data processing board, constraining the user I / O ports and FMC-HPC interface to configure the receiver and AD acquisition module functions. According to the FIFO IP core depth N in the FPGA design project file, this will allow the acquisition of M channels and N sampling snapshots of digital sampling signals X = [x1(n), x2(n), ..., x...]. M (n)] T n = 1, 2, ..., N, where x m (n) represents the AD sampling output result of the nth sampling snapshot of the mth channel, where m = 1, 2, ..., M. T This represents the matrix transpose operation;

[0073] Step 1) specifically refers to:

[0074] By configuring the receiver with an FPGA, the system can automatically select the channel through which the UAV is communicating to collect a single sampling data of M channels and N sampling snapshots.

[0075] The communication frequency band for UAV image transmission signals is 2.400–2.483 GHz, which can be divided into 8 channels, each with a bandwidth of 10 MHz. During operation, UAVs typically adaptively select the channel for communication based on environmental interference. The superheterodyne receiver has a working bandwidth of 80 MHz or higher, covering the UAV image transmission signal frequency band, and has a frequency selection function. That is, the output bandwidth of the intermediate frequency filter is 10 MHz, which can accurately capture a single channel and filter out interference. The frequency selection of the receiver is achieved by the FPGA-based SPI protocol-designed control signal controlling the frequency division function of the receiver PLL, thereby selecting the local oscillator frequency.

[0076] The design of FPGA control signals requires selecting the local oscillator frequency through pre-acquired data. The basic principle is to iterate through each local oscillator frequency, acquiring a certain length of data at each frequency. After the iteration, the channel corresponding to the data with the largest total value is the currently communicating channel. When the FIFO IP core depth is set to 1024, the data acquired by the m-th channel is: x m (1),x m (2),…,x m (1024) Extract the first and last 10 frames of data from each of the multiple channels, take the absolute value, and sum the highest two bits to obtain the channel strength flag ξ:

[0077]

[0078] Where abs(·) represents the function of taking the absolute value of the two's complement, and [D-2:D-3] represents the two most significant bits of the AD output with D-bit resolution after removing the sign bit; in this embodiment, D is 14;

[0079] By traversing 8 channels and processing the collected data, 8 channel strength indicators ξ are obtained. The channel corresponding to the largest ξ value is the channel currently in communication, and this channel should be selected for configuring the receiver's local oscillator frequency.

[0080] In specific implementation, such as Figure 3 As shown, the automatic channel selection algorithm is interspersed throughout the data acquisition process. Specifically, after acquiring a certain amount of data, an automatic channel selection is initiated. The receiver is configured via SPI to traverse each local oscillator frequency to obtain sample sampling results. Based on the sampling results, the channel strength flag ξ is obtained. Finally, the currently communicating channel is compared to obtain the channel. At this point, an automatic channel selection is completed, and this communication channel is selected to continue data acquisition.

[0081] In step 1), the acquired digital sampling signals X = [x1(n), x2(n), ..., x2(n)] from M channels and N sampling snapshots are obtained. M (n)] T The specific description of n = 1, 2, ..., N is as follows:

[0082] The data rate obtained by high-speed multi-channel AD sampling exceeds the transmission rate limit of the subsequent interface. Therefore, the data stream received by the signal processor is a splicing of several consecutively sampled segments. The length of the consecutively sampled segments is determined by the settings of the buffer function in the FPGA, which specifically depends on the depth setting of the FIFO.

[0083] The length of a continuous sampling segment is determined by the number of single-channel data items contained in a burst when the Ethernet interface is configured.

[0084] The signal spliced ​​together from several consecutively sampled segments has less loss of frequency domain features compared to the original signal.

[0085] In specific implementation, such as Figure 4 As shown, the data output from the 8 FIFOs is combined to obtain a sampling snapshot. A data packet with a length of 1024 bytes contains 56 snapshots. Each data packet obtained from sampling, i.e., these 56 snapshots are obtained continuously. Between data packets, there is a time interval for the acquisition command set by a timer, which is set to 10ms in the specific implementation.

[0086] 2) The sampling covariance matrix is ​​calculated from the digital sampled signal X: in,[·] H The complex conjugate transpose of the matrix is ​​used to implement the DOA algorithm on an FPGA using the sampled multi-channel digital signals to obtain estimated angles θ1, θ2, ..., θ K K represents the total number of suspected UAV targets and interfering targets in the airspace estimated by a pre-defined method for estimating the number of target directions or information sources.

[0087] In practice, the DOA algorithm selected in this step is the MUSIC algorithm;

[0088] 3) Traverse the estimated angles θ1, θ2, ..., θ1 output by the DOA algorithm. K , with angle θ k Construct a beamformer for the angle of interest to obtain the optimal weight W for that angle. k W k Let W be a vector of length M. k yes and guiding vector a(θ) k The function of ), that is:

[0089]

[0090] Wherein, the guiding vector a(θ) k ) is a specific angle θ k The vector representing the spatial phase difference between array elements is as follows:

[0091]

[0092] Where S1, S2, ..., S M-1 λ represents the distance between the 2nd to Mth array elements and the 1st array element, and λ is the detection wavelength;

[0093] 4) The weight vector W obtained by using the beamformer kThe data from M channels are weighted and summed to acquire spatial filtered signals, resulting in spatial filtered output data Y. An optical fiber interface is configured to transmit data Y from the FPGA data processing board to the FPGA data conversion board. Data format conversion is performed in the FPGA data conversion board, and an Ethernet interface is configured to upload and output data.

[0094] Steps 3) and 4) specifically refer to:

[0095] Implement the MVDR beamforming algorithm in the FPGA and output the spatial filtering sampling results;

[0096] Implement the MVDR algorithm at the FPGA RTL level to obtain the weight W. k :

[0097]

[0098] The corresponding angle of interest θ is calculated in real time. k Spatial domain filtered output data Y k :

[0099]

[0100] Output data Y k The final uploaded data Y from the integrated sample is obtained:

[0101]

[0102] like Figure 5 As shown, the beamforming algorithm is based on the angle estimation result of the DOA (Directory of Alignment). The steering vector a(θ) is calculated based on the DOA angle. k The weight vector W is then calculated. k Using this weight vector W k The outputs of the multi-channel FIFO at a certain moment are simultaneously weighted, and the multiplication and addition are used to obtain the signal after spatial filtering corresponding to this sampling snapshot beamforming. This value is then output and written into the FIFO used for optical fiber communication for buffering.

[0103] 5) The signal processor processes a certain angle θ in the uploaded data. k Data sequence Y k Perform a short-time Fourier transform (STFT) to obtain the time-frequency graph P corresponding to this angle data. k With time-frequency graph P k As input to the model, define and train a deep neural network to obtain a multi-target UAV recognition model;

[0104] Step 5) specifically refers to: a deep learning scheme for multi-target UAV recognition based on radio frequency arrays.

[0105] For data sequence Y k Performing a short-time Fourier transform (STFT) yields the time-frequency plot P. k The ResNet feature extraction network is used to extract time-frequency map features, which are then fed into a fully connected layer to output the various angles of interest θ. k The drone identification results;

[0106] After determining K, plot the time-frequency graphs P1, P2, ..., P K As input to the ResNet feature extraction network, the time-frequency maps are arranged according to the main target and the secondary targets whose angle with the main target increases sequentially, and the channels are stacked. An initial weight sequence is then assigned to the feature channels corresponding to the above time-frequency maps: 1, α2, α3, ..., α K ,

[0107] α i =g(θ) i -θ1)

[0108] Where g(·) is a linearly decreasing function characterizing the relationship between the initial value of the feature channel weights and the angle between the primary and secondary targets, θ1 represents the angle of the primary target (i.e., the detection direction), and θ i Indicates the angle of each target;

[0109] like Figure 6 As shown, based on this, the SE attention mechanism is introduced to further learn feature weights automatically based on the loss through a fully connected network. Global average pooling is performed on the stitched feature map to compress the time-frequency map features into a real number. Each feature channel is assigned a weight, which is learned by the network. The trained weights are then weighted onto the time-frequency map corresponding to each target, improving the network's sensitivity to radio frequency features in the time-frequency map acquired from different directions. The features in the secondary target's time-frequency map after spatial filtering are introduced to help with the main target recognition task.

[0110] 6) A multi-target UAV recognition model is used to predict the target recognition results from various angles. The model is deployed on the Zynq development board in PYNQ mode, and the FPGA data conversion board is connected to the Zynq development board to complete real-time multi-target recognition.

[0111] The above description is merely a preferred embodiment of the present invention. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make many possible variations and modifications to the technical solutions of the present invention using the methods and techniques disclosed above, or modify them into equivalent embodiments with equivalent changes, without departing from the scope of the technical solutions of the present invention. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solutions of the present invention shall still fall within the protection scope of the technical solutions of the present invention.

Claims

1. A method for identifying multiple targets of unmanned aerial vehicles based on radio frequency arrays, characterized in that, The method utilizes a multi-target UAV identification device based on a radio frequency array. This device includes a radio frequency antenna array (1), a receiver (2), an AD acquisition module (3), an FPGA data processing board (4), an FPGA data conversion board (5), a signal processor (6), and a Zynq development board supporting PYNQ (7). The radio frequency antenna array (1) is connected to the RF input of the receiver (2) via a radio frequency cable for multi-channel acquisition of UAV image transmission signals in the airspace. The radio frequency signal is converted into an intermediate frequency signal by the superheterodyne receiver (2). The IF output of the receiver (2) is connected to the AD acquisition module (3) via a radio frequency cable, and the intermediate frequency analog signal is converted into a multi-channel digital signal for subsequent signal processing. The FPGA data processing board (4), FPGA data conversion board (5), signal processor (6), and Zynq development board supporting PYNQ (7) are used. 4) The user I / O port is connected to the rectangular interface pins on the receiver (2) for configuring receiver functions via DuPont wires. The FPGA data processing board (4) is connected to the AD acquisition module (3) via the FMC-HPC interface. The FPGA data processing board (4) configures the receiver (2) and AD acquisition module (3) via the SPI protocol, and simultaneously realizes data transmission between the AD acquisition module (3) and the FPGA data processing board (4). The FPGA data processing board (4) is connected to the FPGA data conversion board (5) via optical fiber. The FPGA data conversion board (5) is connected to the signal processor (6) and the Zynq development board (7) supporting PYNQ via Ethernet cable. The method includes the following steps: Step 1: Design the FPGA data processing board (4), constrain the user I / O port and FMC-HPC interface to configure the functions of the receiver (2) and AD acquisition module (3), and set the depth N of the FIFO IP core according to the FPGA design project file to obtain digital sampling signals of M channels and N sampling snapshots. , ,in, This represents the AD sampling output result of the nth sampling snapshot in the mth channel. , This represents the matrix transpose operation; Step 2: From digital sampling signal The sampling covariance matrix is ​​calculated as follows: ,in, The complex conjugate transpose of the matrix is ​​used to implement the DOA algorithm on an FPGA to obtain the estimated angle using the sampled multi-channel digital signal. K represents the total number of suspected UAV targets and interfering targets in the airspace estimated by a pre-defined method for estimating the number of target directions or information sources. Step 3: Iterate through the estimated angles output by the DOA algorithm , from the angle Construct a beamformer for the angle of interest to obtain the optimal weights for that angle. , Let M be a vector. yes and guiding vector The function, that is: Among them, the guiding vector It is a specific angle The vector representing the spatial phase difference between array elements is as follows: in, This represents the distance between the 2nd to Mth array elements and the 1st array element. For detection wavelength; Step 4: Calculate the weight vector using the beamformer By weighted summation of data from M channels, spatial domain filtered signal acquisition is achieved, yielding spatial domain filtered output data. Configure the fiber optic interface to complete the data transfer. The data transfer from the FPGA data processing board (4) to the FPGA data conversion board (5) is completed in the FPGA data conversion board (5), and the Ethernet interface is configured to realize the data upload and output. Implement the MVDR beamforming algorithm in the FPGA and output the spatial filtering sampling results; Implement the MVDR algorithm at the FPGA RTL level to obtain the weights. : The corresponding angle of interest is calculated in real time. Spatial domain filtering output data : Output data The final uploaded data from one sampling is obtained by integration. : Step 5: The signal processor (6) processes a certain angle in the uploaded data. Data sequence Perform a short-time Fourier transform (STFT) to obtain the time-frequency diagram corresponding to the angle data. , using time-frequency graph As input to the model, a deep neural network is defined and trained to obtain a multi-target UAV recognition model; specifically: a deep learning scheme for multi-target UAV recognition based on radio frequency arrays. For data sequences The time-frequency diagram is obtained by performing a short-time Fourier transform. The ResNet feature extraction network is used to extract time-frequency map features, which are then fed into a fully connected layer to output the features at each angle of interest. The drone identification results; After determining K, the time-frequency graph is... As input to the ResNet feature extraction network, the time-frequency maps are arranged according to the main target and the secondary targets whose angle with the main target increases sequentially, and the channels are stacked. Then, a sequence of initial weight values ​​is assigned to the feature channels corresponding to the above time-frequency maps in turn: , in, It is a decreasing function that characterizes the relationship between the initial value of the feature channel weights and the angle between the primary and secondary targets. Indicates the perspective of the main objective. Indicate the angle of each target; Based on this, the SE attention mechanism is introduced to further learn feature weights automatically based on the loss through a fully connected network, thereby improving the network's sensitivity to radio frequency features in the time-frequency maps acquired from different directions. The features in the secondary target time-frequency map after spatial filtering are introduced to help the main target identification task. Step 6: Use a multi-target UAV recognition model to predict the target recognition results from various angles, deploy the model on the Zynq development board (7) in PYNQ mode, connect the FPGA data conversion board (5) and the Zynq development board (7) to complete the real-time recognition of multiple targets.

2. The method for multi-target UAV identification based on radio frequency array according to claim 1, characterized in that, The radio frequency antenna array (1) is compatible with two implementation methods and two linear array methods: 1) Two implementation methods for the radio frequency antenna array (1) include: 1.1) A patch antenna array consisting of rectangular microstrip antennas operates at the frequency band of the UAV image transmission signal. The fixed position of the antenna is determined by the array arrangement and is obtained through calculation. 1.2) The antenna array is obtained by combining the antenna mounting bracket obtained by 3D printing with the glue rod antenna. The working frequency of the glue rod antenna is in the frequency band of the UAV image transmission signal. The fixed position of the antenna is determined by the array arrangement and is obtained through calculation. Both implementation methods must satisfy the following conditions: the total number of array elements is not greater than the number of receiver channels, and the RF port is an SMA interface; 2) The two linear array arrangements of the radio frequency antenna array (1) include: 2.1) The spacing between the array elements of the antenna array in both implementations is a uniform half wavelength calculated from the detection frequency, that is, the array elements are evenly arranged. 2.2) The spacing between the array elements of the antenna arrays in both implementations satisfies a specific sparse array arrangement rule based on the detection frequency, that is, various coprime array arrangements or nested array arrangements where the total number of array elements is less than the number of receiver channels.

3. The multi-target UAV identification method based on radio frequency array according to claim 1, characterized in that, The FPGA data conversion board (5) is connected to the signal processor (6) or the Zynq development board (7) that supports PYNQ via an Ethernet cable. The FPGA data conversion board (5) is connected to the signal processor (6) to process the collected data to obtain a multi-target UAV recognition model. The FPGA data conversion board (5) is connected to the Zynq development board (7) that supports PYNQ to output the multi-target UAV recognition results. The signal processor (6) and the Zynq development board (7) that supports PYNQ are connected via WiFi to realize the hardware deployment of a multi-target UAV recognition model based on PYNQ.

4. The multi-target UAV identification method based on radio frequency array according to claim 1, characterized in that, Step 1 specifically involves: By configuring the receiver using an FPGA, the system can automatically select the channel that the UAV is communicating with and collect a single sampling data of M channels and N sampling snapshots. The communication frequency band of the UAV image transmission signal is 2.400~2.483GHz, which can be divided into 8 channels, each with a bandwidth of 10MHz. When the UAV is in operation, it usually adaptively selects the channel for communication based on environmental interference. The superheterodyne receiver (2) has a working bandwidth of 80MHz or more, covering the UAV image transmission signal frequency band, and has a frequency selection function. That is, the output bandwidth of the intermediate frequency filter is 10MHz, which can accurately capture a single channel and filter out interference. The frequency selection of the receiver is achieved by the FPGA based on the SPI protocol design control signal to control the frequency division function of the receiver PLL, thereby selecting the local oscillator frequency. The design of FPGA control signals requires selecting the local oscillator frequency using pre-acquired data. The basic principle is to iterate through each local oscillator frequency, acquiring a certain length of data at each frequency. After the iteration, the channel corresponding to the data with the largest total value is the currently communicating channel. When the FIFO IP core depth is set to 1024, the data acquired by the m-th channel is: The channel strength flag is obtained by extracting the first and last 10 frames of data from each of the multiple channels, taking the absolute value, and then summing the two highest-value bits. : in, This represents a function that takes the absolute value of the two's complement. This indicates that the highest two bits of valid data are the AD output with D-bit resolution after removing the sign bit. By traversing 8 channels and processing the collected data, 8 channel strength indicators are obtained. The largest value The corresponding channel is the channel currently in communication, and this channel should be selected for configuring the receiver's local oscillator frequency.

5. The multi-target UAV identification method based on radio frequency array according to claim 1, characterized in that, In step 1, the acquired digital sampling signals are obtained from M channels and N sampling snapshots. , Specifically described as follows: The data rate obtained by high-speed multi-channel AD sampling exceeds the transmission rate limit of the subsequent interface. Therefore, the data stream received by the signal processor is a splicing of several consecutively sampled segments. The length of the consecutively sampled segments is determined by the settings of the buffer function in the FPGA, which specifically depends on the depth setting of the FIFO. The length of a continuous sampling segment is determined by the number of single-channel data items contained in a burst when the Ethernet interface is configured. The signal spliced ​​together from several consecutively sampled segments has less loss of frequency domain features compared to the original signal.

Images