Method for selecting memory granule phases for embedded systems

Abstract

The application discloses a method for selecting memory grain phase of an embedded system. The prior art memory grain configuration scheme has poor stability and high cost. After boot, the optimal value of the read-write phase parameter stored in the nonvolatile storage device is read, the optimal value of the parameter is configured to the memory grain controller, and the device is started. If the optimal value cannot be read, phase detection is started. The phase detection first uses the middle value of the read phase parameter range to test data reading and writing, if the reading and writing are successful, the left and right boundaries are detected step by step to the two sides of the middle value, if not successful, the left and right boundaries are detected to one side first, if the minimum parameter is still not detected, the left and right boundaries are detected to the other side. The average value of the left and right boundary parameters of the read-write phase is taken as the optimal value of the read-write phase parameter, and is written into the nonvolatile storage device. The application avoids a large amount of memory grain test work in the early stage of the project, avoids unstable hidden dangers, and is more convenient for later maintenance and replacement.

Description

Technical Field

[0001] This invention belongs to the field of embedded system technology, and specifically relates to a method for selecting memory chip phase in an embedded system. Background Technology

[0002] Memory chips, or Dynamic Random Access Memory (DRAM), are a type of volatile storage. Data is lost when power is turned off and is not persistently stored.

[0003] Memory chips primarily perform storage functions. It's often said that computers operate on the binary system of 0s and 1s; the capacitors and transistors inside the memory chip play this operational role. When a capacitor is fully charged with electrons, it represents a 1 or a 0, while the transistor acts as a switch, allowing the control circuitry to read or change the capacitor's state.

[0004] A capacitor and a transistor form a pair called a storage cell. Because they require periodic replenishment of electrons to maintain their state, they are called "dynamic" memory, or memory chips. Memory chips include Synchronous Dynamic Memory (SDRAM) and various types of Double Data Rate Dynamic Memory (DDRAM).

[0005] Embedded systems typically use a single memory chip to provide storage space for the embedded software during runtime. The stability of the memory chip determines the stability of the embedded software, and the memory chip has various configurable parameters to meet the stable operation requirements of different embedded development environments.

[0006] Parameters affecting the stability of memory chip operation include: OEM, ODT, read phase, and write phase. Among these, read phase and write phase are the most likely to require adjustment. Differences in read and write phases exist between different memory chips of the same model, and even between different models of memory chips. Therefore, ensuring compatibility with the read and write phase requirements of different memory chips is a challenge. Traditional solutions mainly include two approaches: Solution 1: Specify several candidate memory chips at the beginning of the project, and determine a set of read and write phases through eye diagram and phase testing to meet the requirements of all candidate chips; Solution 2: Use a memory controller with automatic read and write phase adaptation.

[0007] The drawback of traditional solution 1 is that it cannot fully adapt to all types of memory chips. Even memory chips of the same type can have read / write phase differences between different individuals, leading to stability risks for the overall system. Furthermore, this solution incurs significant testing costs. The drawback of traditional solution 2 is that memory controllers with automatic read / write phase adaptation are relatively expensive, increasing the overall system cost, which is why many embedded systems avoid it due to cost considerations. Summary of the Invention

[0008] The purpose of this invention is to address the shortcomings of existing technologies by providing a method for selecting memory chip phase in embedded systems. This method can adaptively select memory chip read / write phase without increasing hardware costs, thereby improving system stability and saving significant manpower and testing time.

[0009] The method of this invention is as follows:

[0010] Step (1) Power on the device, boot up, and boot read the optimal value P of the read phase parameter stored in the non-volatile storage device. R And write the optimal value of the phase parameter P W If the read fails, proceed to step (2); otherwise, proceed to step (4).

[0011] Step (2) initiates phase detection to obtain the optimal values ​​of the read and write phase parameters of the memory chips. Specifically:

[0012] (2-1) Obtain the midpoint of the memory chip read phase parameter range A to B. A and B are natural numbers, and [·] represents rounding. Use the intermediate value C of the reading phase parameter to test the data reading. If the data reading is successful, execute steps (2-2) to (2-7); otherwise, execute step (2-8).

[0013] (2-2) Use the reading phase parameter CS to test the data reading. If the data reading is successful, proceed to step (2-3); otherwise, CS is the left boundary parameter L of the reading phase; S is the set step size of the reading phase parameter, S = 0.1~0.5.

[0014] (2-3) Use the reading phase parameter C-2×S to test the reading data. If the reading data is successful, proceed to step (2-4); otherwise, C-2×S is the left boundary parameter L of the reading phase.

[0015] (2-4) Continue in this manner until data reading fails, then determine the left boundary parameter L of the read phase;

[0016] (2-5) Use the reading phase parameter C+S to test the data reading. If the data reading is successful, proceed to step (2-6); otherwise, C+S is the right boundary parameter R of the reading phase.

[0017] (2-6) Use the reading phase parameter C+2×S to test the reading data. If the reading data is successful, proceed to step (2-7); otherwise, C+2×S is the right boundary parameter R of the reading phase.

[0018] (2-7) Continue in this manner until data reading fails, determine the right boundary parameter R of the read phase, and execute step (2-16);

[0019] (2-8) Use the reading phase parameter CS to test the data reading. If the data reading fails, use the reading phase parameter C-2×S to test the data reading. Continue in this way until the data reading is successful. The reading phase parameter Cn×S corresponding to the successful reading is the right boundary parameter R of the reading phase, where n is the number of tests to determine the right boundary parameter. Execute steps (2-9) to (2-11). If the data reading is still unsuccessful even after reaching the minimum reading phase parameter A, execute steps (2-12) to (2-15).

[0020] (2-9) Use the reading phase parameter C-(n+1)×S to test the reading data. If the reading data is successful, proceed to step (2-10); otherwise, C-(n+1)×S is the left boundary parameter L of the reading phase.

[0021] (2-10) Use the reading phase parameter C-(n+2)×S to test the reading data. If the reading data is successful, proceed to step (2-11); otherwise, C-(n+2)×S is the left boundary parameter L of the reading phase.

[0022] (2-11) Continue in this manner until data reading fails, determine the left boundary parameter L of the read phase, and execute step (2-16);

[0023] (2-12) Use the reading phase parameter C+S to test the reading data. If the reading data fails, use the reading phase parameter C+2×S to test the reading data. Continue in this way until the reading data is successful. The reading phase parameter C+m×S corresponding to the successful reading is the left boundary parameter L of the reading phase, where m is the number of tests to determine the left boundary parameter.

[0024] (2-13) Use the reading phase parameter C+(m+1)×S to test the reading data. If the reading data is successful, execute (2-14); otherwise, C+(m+1)×S is the right boundary parameter R of the reading phase.

[0025] (2-14) Use the reading phase parameter C+(m+2)×S to test the reading data. If the reading data is successful, execute (2-15); otherwise, C+(m+2)×S is the right boundary parameter R of the reading phase.

[0026] (2-15) Continue in this manner until data reading fails, determine the right boundary parameter R of the read phase, and execute step (2-16);

[0027] (2-16) Determine the optimal value of the reading phase parameter Indicates rounding up;

[0028] (2-17) Following the same method as (2-1) to (2-16), determine the optimal value P of the phase parameter. W .

[0029] Step (3) read the optimal value P of the phase parameter. R And write the optimal value of the phase parameter P W Write to a non-volatile storage device.

[0030] Step (4) read the optimal value P of the phase parameter. R And write the optimal value of the phase parameter P W Configure the memory chip controller and start the device.

[0031] If a new memory chip is replaced, the optimal value P of the read phase parameter stored in the non-volatile storage device is deleted. R And write the optimal value of the phase parameter P W Execute steps (1) to (4) to restart the device.

[0032] By using the method of this invention, the embedded system can automatically use the optimal read and write phase of the memory chip when it starts up, avoiding a lot of memory chip testing work in the early stage of the project, and avoiding the instability risks caused by the difference in read and write phase between different memory chips. It also makes it more convenient to repair and replace memory chips in the later stage, and eliminates a lot of testing work. Attached Figure Description

[0033] Figure 1 This is a schematic diagram of the process of the present invention. Detailed Implementation

[0034] like Figure 1 As shown, a method for selecting memory chip phase in an embedded system is described below:

[0035] Step (1) Power on the device, boot up, and boot read the optimal value P of the read phase parameter stored in the non-volatile storage device. R And write the optimal value of the phase parameter P W If the read fails, proceed to step (2); otherwise, proceed to step (4).

[0036] Step (2) initiates phase detection to obtain the optimal values ​​of the read and write phase parameters of the memory chips. Specifically:

[0037] (2-1) Obtain the midpoint of the memory chip read phase parameter range A to B. A and B are natural numbers, and [·] represents rounding down. Or round up The range of the read phase parameter is the attribute of the memory chip itself; use the intermediate value C of the read phase parameter to test the data reading. If the data reading is successful, execute steps (2-2) to (2-7); otherwise, execute step (2-8).

[0038] (2-2) Use the reading phase parameter CS to test the data reading. If the data reading is successful, proceed to step (2-3); otherwise, CS is the left boundary parameter L of the reading phase.

[0039] S is the set step size for the reading phase parameter. S = 0.1 to 0.5. The smaller the set value, the higher the accuracy, but the greater the computational load.

[0040] (2-3) Use the reading phase parameter C-2×S to test the reading data. If the reading data is successful, proceed to step (2-4); otherwise, C-2×S is the left boundary parameter L of the reading phase.

[0041] (2-4) Continue in this manner until data reading fails, then determine the left boundary parameter L of the read phase;

[0042] (2-5) Use the reading phase parameter C+S to test the data reading. If the data reading is successful, proceed to step (2-6); otherwise, C+S is the right boundary parameter R of the reading phase.

[0043] (2-6) Use the reading phase parameter C+2×S to test the reading data. If the reading data is successful, proceed to step (2-7); otherwise, C+2×S is the right boundary parameter R of the reading phase.

[0044] (2-7) Continue in this manner until data reading fails, determine the right boundary parameter R of the read phase, and execute step (2-16);

[0045] (2-8) Use the reading phase parameter CS to test the data reading. If the data reading fails, use the reading phase parameter C-2×S to test the data reading. Continue in this way until the data reading is successful. The reading phase parameter Cn×S corresponding to the successful reading is the right boundary parameter R of the reading phase, where n is the number of tests to determine the right boundary parameter. Execute steps (2-9) to (2-11). If the data reading is still unsuccessful even after reaching the minimum reading phase parameter A, execute steps (2-12) to (2-15).

[0046] (2-9) Use the reading phase parameter C-(n+1)×S to test the reading data. If the reading data is successful, proceed to step (2-10); otherwise, C-(n+1)×S is the left boundary parameter L of the reading phase.

[0047] (2-10) Use the reading phase parameter C-(n+2)×S to test the reading data. If the reading data is successful, proceed to step (2-11); otherwise, C-(n+2)×S is the left boundary parameter L of the reading phase.

[0048] (2-11) Continue in this manner until data reading fails, determine the left boundary parameter L of the read phase, and execute step (2-16);

[0049] (2-12) Use the reading phase parameter C+S to test the reading data. If the reading data fails, use the reading phase parameter C+2×S to test the reading data. Continue in this way until the reading data is successful. The reading phase parameter C+m×S corresponding to the successful reading is the left boundary parameter L of the reading phase, where m is the number of tests to determine the left boundary parameter.

[0050] (2-13) Use the reading phase parameter C+(m+1)×S to test the reading data. If the reading data is successful, execute (2-14); otherwise, C+(m+1)×S is the right boundary parameter R of the reading phase.

[0051] (2-14) Use the reading phase parameter C+(m+2)×S to test the reading data. If the reading data is successful, execute (2-15); otherwise, C+(m+2)×S is the right boundary parameter R of the reading phase.

[0052] (2-15) Continue in this manner until data reading fails, determine the right boundary parameter R of the read phase, and execute step (2-16);

[0053] (2-16) Determine the optimal value of the reading phase parameter Indicates rounding up;

[0054] (2-17) Following the same method as (2-1) to (2-16), determine the optimal value P of the phase parameter. W .

[0055] Step (3) read the optimal value P of the phase parameter. R And write the optimal value of the phase parameter P W Write to a non-volatile storage device.

[0056] Step (4) read the optimal value P of the phase parameter. R And write the optimal value of the phase parameter P W Configure the memory chip controller and start the device.

[0057] If a new memory chip is replaced, the optimal value P of the read phase parameter stored in the non-volatile storage device is deleted. R And write the optimal value of the phase parameter P W After executing steps (1) to (4), the device will restart. Specifically, the following procedure can be used:

[0058] Step (a) The user sends an update DRAM read / write phase command, and then executes step (b);

[0059] In step (b), the device receives an instruction to start the DRAM read / write phase detection program and executes step (c).

[0060] Step (c) determines whether the read operation detects the DRAM read / write phase. If not, proceed to step (d); if detected, proceed to step (g).

[0061] Step (d) notifies the user that the read / write phase detection failed, and then proceeds to step (e).

[0062] Step (e) determines whether re-probing is needed; if yes, return to step (b); otherwise, execute step (f).

[0063] Step (f) stops the read / write phase update, and the process ends;

[0064] Step (g) notifies the user of the obtained read / write phase and executes step (h);

[0065] Step (h) determines whether to use the detected read / write phase. If not, proceed to step (i); if so, proceed to step (j).

[0066] Step (i) determines whether the read / write phase needs to be re-probeed. If yes, return to step (b); otherwise, return to step (f).

[0067] Step (j) updates the read / write phases stored in the non-volatile memory, and the device restarts.

Claims

1. A method for selecting memory chip phase in an embedded system, characterized in that: Step (1) Power on the device, boot up, and boot read the optimal value of the read phase parameter stored in the non-volatile storage device. And write the optimal value of the phase parameter If the read fails, proceed to step (2); otherwise, proceed to step (4). Step (2) initiates phase detection to obtain the optimal values ​​of the read and write phase parameters of the memory chips. Specifically: (2-1) Obtain the range of memory chip read phase parameters median value , and For natural numbers, Indicates rounding; utilizes the intermediate value of the phase parameter. Perform a data reading test. If the data reading is successful, proceed to steps (2-2) to (2-7); otherwise, proceed to step (2-8). (2-2) Using phase parameters Perform a data reading test. If the data reading is successful, proceed to steps (2-3); otherwise... That is, the left boundary parameter of the reading phase. ; The set step size for the read phase parameter. ; (2-3) Using phase parameters Perform a data reading test. If the data reading is successful, proceed to steps (2-4); otherwise... That is, the left boundary parameter of the reading phase. ; (2-4) Continue in this manner until data reading fails, then determine the left boundary parameter of the read phase. ; (2-5) Using phase parameters Perform a data reading test. If the data reading is successful, proceed to steps (2-6); otherwise... That is, the right boundary parameter of the read phase. ; (2-6) Using phase parameters Perform a data reading test. If the data reading is successful, proceed to step (2-7); otherwise... That is, the right boundary parameter of the read phase. ; (2-7) Continue in this manner until data reading fails, then determine the right boundary parameter of the read phase. Execute step (2-16); (2-8) Using phase parameters Perform a data read test. If the data read fails, then utilize the read phase parameter. Perform data reading tests, and so on, until data is successfully read. The corresponding read phase parameter is then determined upon successful read. That is, the right boundary parameter of the read phase. , To determine the number of tests for the right boundary parameter, execute steps (2-9) to (2-11); if until the minimum phase parameter is read... If data still cannot be read successfully, proceed to steps (2-12) to (2-15). (2-9) Using phase parameters Perform a data reading test. If the data reading is successful, proceed to step (2-10); otherwise... That is, the left boundary parameter of the reading phase. ; (2-10) Using phase parameters Perform a data reading test. If the data reading is successful, proceed to step (2-11); otherwise... That is, the left boundary parameter of the reading phase. ; (2-11) Continue in this manner until data reading fails, then determine the left boundary parameter of the read phase. Execute step (2-16); (2-12) Using phase parameters Perform a data read test. If the data read fails, then utilize the read phase parameter. Perform data reading tests, and so on, until data is successfully read. The corresponding read phase parameter is then determined upon successful read. That is, the left boundary parameter of the reading phase. , To determine the number of tests required to determine the left boundary parameters; (2-13) Using phase parameters Perform a data reading test. If the data reading is successful, execute (2-14); otherwise... That is, the right boundary parameter of the read phase. ; (2-14) Using phase parameters Perform a data reading test. If the data reading is successful, execute (2-15); otherwise... That is, the right boundary parameter of the read phase. ; (2-15) Continue in this manner until data reading fails, then determine the right boundary parameter of the read phase. Execute step (2-16); (2-16) Determine the optimal value of the reading phase parameter , Indicates rounding up; (2-17) Following the same method as (2-1) to (2-16), determine the optimal value of the phase parameter. ; Step (3) read the optimal value of the phase parameter. And write the optimal value of the phase parameter Write to a non-volatile storage device; Step (4) read the optimal value of the phase parameter. And write the optimal value of the phase parameter Configure the memory chip controller and start the device; If you replace the memory chips with new ones, delete the optimal read phase parameter value stored in the non-volatile storage device. And write the optimal value of the phase parameter Execute steps (1) to (4) to restart the device.

2. The method for selecting memory chip phase in an embedded system as described in claim 1, characterized in that: The rounding in step (2-1) is rounding down. Or round up .

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