Layout rasterization calculation method and full-chip simulation method

Abstract

The application discloses a layout grating calculation method and a full-chip simulation method. The layout grating calculation method comprises the following steps: selecting partial pixel points and calculating grating results of the partial pixel points; dividing Manhattan figures on a layout into multiple rectangles; judging whether the vertices of the rectangles are the partial pixel points; if yes, finding grating results of four intermediate rectangles respectively formed by extending the four vertices of the rectangle as origins from the calculated grating results according to the coordinates of the four vertices of the rectangle; and performing corresponding superposition based on the grating results of the four intermediate rectangles to obtain the grating result of the rectangle. The application can greatly reduce the calculation amount of the layout grating.

Description

Technical Field

[0001] This invention relates to the field of photolithography technology in semiconductor manufacturing, and more particularly to a method for calculating the rasterization of a layout. Background Technology

[0002] In the manufacturing process of integrated circuits (ICs), to obtain the target pattern on the wafer, it is necessary to transfer the pattern from the photomask to the surface of the silicon wafer, a process known as photolithography. Photolithography typically involves exposure, development, and etching steps. During exposure, light emitted from a light source passes through the transparent areas of the photomask and illuminates the silicon wafer coated with photoresist. The areas of the photoresist not blocked by the photomask undergo a chemical reaction upon exposure to light. In the development step, the different solubility of the developer in the photoresist and the unphotoresisted areas create a photolithographic pattern, transferring the pattern from the photomask to the photoresist. In the etching step, the silicon wafer is etched based on the photolithographic pattern formed by the photoresist layer, further transferring the pattern from the photomask onto the silicon wafer. As Moore's Law advances and design dimensions continue to shrink, the minimum size of the design pattern is getting closer and closer to the limit of the photolithography imaging system. The diffraction effect of light becomes more and more obvious, and the image pattern obtained by exposure is severely distorted compared to the pattern on the mask. In the end, the actual pattern formed on the silicon wafer by photolithography is different from the design pattern. This phenomenon is called the Optical Proximity Effect (OPE).

[0003] To correct the optical proximity effect, Optical Proximity Correction (OPC) was developed. By correcting the pattern on the mask, the optical proximity effect is counteracted, resulting in a lithography result that better matches the expected target.

[0004] To perform optical proximity correction, the entire photolithography process must first be modeled. A relatively accurate approach to optical system modeling is using the Abbe imaging principle. In the calculations, (f...) x `,f y `) represents the direction of light as it travels from the light source to the mask, (f) x ,f y The angle () represents the deflection angle of the diffracted ray relative to the principal axis.

[0005] I(x,y,f x `,f y `)=E(x,y,f x `,f y `)·E * (x,y,f x `,f y `)

[0006] Where E(x,y,f) x `,f y `) is the electric field function, obtained from the following equation:

[0007]

[0008] In the formula, T m (f x ,f y P(f) is the mask transmission coefficient, obtained by Fourier transform of the mask function M(x,y); x ,f y Let ) be the pupil function, expressed as:

[0009]

[0010]

[0011] Expanding on this, we obtain the formula for calculating light intensity:

[0012]

[0013] Strictly applying the Abbe imaging principle has significant drawbacks. In full-chip simulation, the chip size is large, and the mask transmission function T... m (f x ,f y ,f x `,f y Furthermore, since it is related to the light source, the optical system cannot be calculated independently of the mask system, making the calculations extremely time-consuming. Therefore, a method that sacrifices accuracy is usually adopted: approximating the mask as a thin mask.

[0014] T m (f x ,f y ,f x `,f y `)≈T m (f x -f x `,f y -f y `)

[0015] This approximation allows us to use the Hopkins model to alter the imaging computation process. We first calculate the cross-transmission matrix (TCC) of the light source and the lens group pupil, and then perform calculations with the thin mask.

[0016]

[0017] By separating the mask portion from the optical imaging portion using Hopkins theory, full-chip simulation can be performed using fixed optical conditions, requiring only different layouts to simulate the entire chip.

[0018] However, from the existing map data structure to calculating the spatial image based on the Hopkins model, an important step is needed: rasterization. The data provided by the map, whether GDSII or OASIS, consists of the endpoints of all polygons on the map. To calculate the diffraction and imaging of a mask for a given area, a bitmap of pixels for that area is needed. Each pixel in the bitmap records the transmittance of light to the corresponding area. For the most common 0 / 1 mask, the transmittance is 0 or 1 depending on whether light is transmitted through the pixel location; for more complex phase-shift masks, the transmittance has more complex values. Transforming the polygon data structure into the required pixel array is a computationally expensive project.

[0019] Furthermore, pixelating the complete layout generates a massive amount of data, requiring convolution for filtering to blur the layout information—a process known as rasterization—to obtain the mask function M(x,y) and mask transmission function T that can be used in the actual model calculations. m (f x ,f y ,f x `,f y And due to the chip version Figure 1 Generally, the size is relatively large, and for a full-chip OPC, the rasterization calculation of the entire layout is too expensive, so it needs to be accelerated through algorithms. Summary of the Invention

[0020] To address the technical problem of the large computational load in layout rasterization in existing technologies, this invention proposes a layout rasterization calculation method and a full-chip simulation method.

[0021] The rasterization calculation method for the layout of the present invention includes:

[0022] Select a subset of pixels and calculate their rasterization result;

[0023] Divide the Manhattan graphic on the map into multiple rectangles;

[0024] Determine if the vertices of the rectangle are selected partial pixels; if so, find the rasterization results of the four intermediate rectangles formed by extending from the four vertices of the rectangle as the origin, based on the coordinates of the four vertices of the rectangle.

[0025] The rasterization results of the four intermediate rectangles are superimposed to obtain the rasterization result of the rectangle.

[0026] Furthermore, selecting a subset of pixels and calculating their rasterization results includes the following steps:

[0027] Set the pixel unit size;

[0028] The corresponding region is divided into a grid array with the pixel unit size being a square grid with side lengths;

[0029] Calculate the rasterization result for each point on the grid array.

[0030] Furthermore, a lookup table is created for the coordinates of each point on the grid array and its corresponding rasterization result.

[0031] Furthermore, the rasterization result of each point on the grid array is obtained using the formula...

[0032]

[0033] It is calculated that M(x,y) is the mask function and K(x,y) is the convolution kernel required in the fuzzification calculation.

[0034] Furthermore, if the vertices of the rectangle are not selected partial pixels, the rasterization result of the rectangle's vertices is obtained by using linear interpolation through the coordinates of the grid points closest to the vertices of the rectangle.

[0035] Furthermore, using the formula

[0036]

[0037] Calculate the rasterization results of the vertices of the rectangle.

[0038] Furthermore, the concave point splitting method is used to divide the Manhattan graphic on the map into multiple rectangles.

[0039] Furthermore, the four intermediate rectangles are formed by extending from the lower left corner vertex of the rectangle to the upper right; and when the four intermediate rectangles are superimposed, the rasterization result of the intermediate rectangle with the upper left corner vertex and the lower right corner vertex of the rectangle as the lower left corner vertex is generated as a negative value, and then superimposed with the rasterization result of the intermediate rectangle with the lower left corner vertex and the upper right corner vertex of the rectangle as the lower left corner vertex to obtain the rasterization result of the rectangle.

[0040] The full-chip simulation method proposed in this invention uses the rasterization calculation method of the layout described in the above technical solution to perform rasterization calculation on the chip layout.

[0041] This invention first calculates the rasterization results of a subset of pixels, then segments the Manhattan pattern and uses a superposition method to calculate the resulting rectangles. It provides a fast algorithm for calculating mask rasterization for process nodes of any size, and this algorithm can be applied to the entire chip simulation process, especially for process nodes below 28nm. Since smaller nodes have higher requirements for speed and accuracy, this invention can meet the calculation speed and accuracy requirements for mask rasterization of process nodes below 28nm. This invention can provide high-speed thin mask simulation images for Manhattan pattern layouts, with an efficiency approximately 100 times that of traditional algorithms. Attached Figure Description

[0042] The present invention will now be described in detail with reference to the embodiments and accompanying drawings, wherein:

[0043] Figure 1 This is a flowchart of an embodiment of the present invention.

[0044] Figure 2 This is a schematic diagram of the superimposed rectangular rasterization result according to an embodiment of the present invention.

[0045] Figure 3 This is a schematic diagram of the point arrangement of a non-grid array according to an embodiment of the present invention.

[0046] Figure 4 This is a schematic diagram of the splitting and drawing of a Manhattan polygon according to an embodiment of the present invention. Detailed Implementation

[0047] To make the technical problems to be solved, the technical solutions, and the beneficial effects of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0048] Therefore, a feature pointed out in this specification is used to describe one feature of one embodiment of the invention, and does not imply that every embodiment of the invention must have the described feature. Furthermore, it should be noted that this specification describes many features. Although certain features may be combined to illustrate possible system designs, these features may also be used in other combinations not explicitly stated. Therefore, unless otherwise stated, the described combinations are not intended to be limiting.

[0049] like Figure 1 As shown, the rasterization calculation method for the layout proposed in this invention includes the following steps in one embodiment.

[0050] Select a subset of pixels and calculate their rasterization result;

[0051] Divide the Manhattan graphic on the map into multiple rectangles;

[0052] The algorithm determines whether the vertices of the rectangle correspond to the selected pixel set. If so, it finds the rasterization results of four intermediate rectangles extending from the four vertices of the rectangle as their origins, based on the coordinates of the rectangle's four vertices. These four intermediate rectangles are then superimposed to obtain the final rasterization of the rectangle. For example, it finds the rasterization results of four intermediate rectangles extending to the right from the bottom left corner of the rectangle. Similarly, it can extend from the top right corner to the bottom left to obtain the corresponding intermediate rectangles and then superimpose them. Likewise, it can start from the top left or bottom right corner.

[0053] For any layout file, the conventional approach is to first discretize it, then smooth it, and finally sample it. However, due to the need to ensure accuracy, the discretized and smoothed images have a high resolution, making the calculations time-consuming. Due to the special nature of layout files, for layout files containing only Manhattan graphics (i.e., all graphics on the layout are polygons with all polygon edges along horizontal or vertical directions), this invention employs the aforementioned method to transform any Manhattan graphic on the layout into known graphics and perform addition and subtraction operations between the calculation results.

[0054] In one embodiment, the present invention generates a negative value for the rasterization result of the middle rectangle with the top left and bottom right vertices of the rectangle as the bottom left vertices, and then superimposes it with the rasterization result of the middle rectangle with the bottom left and top right vertices of the rectangle as the bottom left vertices to obtain the rasterization result of the rectangle.

[0055] See details Figure 2 To get Figure 2 The black rectangle on the left side of the equals sign can be obtained by adding the first and second black middle rectangles on the right side of the equals sign, and then subtracting the third and fourth black middle rectangles. Let's take a scenario where large areas of black pixels are represented by 1 and large areas of white pixels by 0.

[0056] The first black middle rectangle is formed by extending the bottom left corner of the first black rectangle upwards to the right, causing all pixels within its area to be 1. The second black middle rectangle is formed by extending the top right corner of the first black rectangle upwards to the right. When the second black middle rectangle is superimposed on the first, all pixels within its area become 2, while the pixels of the first black middle rectangle outside the second remain 1. The third black middle rectangle is formed by extending the top left corner of the first black rectangle upwards to the right. Because its pixel value is negative, when superimposed on the previous two black middle rectangles, all pixels within the area of ​​the second black middle rectangle become 1, while the pixels of the first black middle rectangle to the left of the second black middle rectangle become 0, and the pixels of the other parts of the first black middle rectangle remain 1. Finally, the fourth black middle rectangle is formed by extending the bottom right corner of the first black rectangle upwards to the right. Because its pixel value is negative, when superimposed on the previous three black middle rectangles, all pixels within the area of ​​the second black middle rectangle become 0, and the pixels of the first black middle rectangle below the second black middle rectangle become 0. This ultimately forms the rectangle on the left side of the equals sign.

[0057] In one embodiment, the present invention employs the following method to select a subset of pixels and calculate their rasterization results.

[0058] First, set the pixel unit size;

[0059] The corresponding region (i.e., a local area of ​​the map) is divided into a grid array with the pixel unit size being a square grid with side lengths;

[0060] Calculate the rasterization result for each point on the grid array.

[0061] In one embodiment, a lookup table can be created for the coordinates of each point on the grid array and its corresponding rasterization result. The rasterization result for each point on the grid array can be obtained using a formula.

[0062]

[0063] It is calculated that M(x,y) is the mask function, and K(x,y) is the convolution kernel required in the blurring calculation, that is, the convolution kernel required in the rasterization processing calculation.

[0064] The following example illustrates how to create a lookup table for rasterization results.

[0065] For a selected region, which is chosen by the user according to their needs to be rasterized, and then a pixel unit size 'a' is provided, the region is divided into a square close-packed grid array with side length 'a'. For a given computational region of size (a*m, a*n), in this invention, the computational region usually refers to the rectangles after dividing the Manhattan polygon, which can be divided into a grid array of size (m,n). The lower left corner coordinates of the array are set to (0,0), and the upper right corner is set to (m,n). For each point (x,y) on the array, the corresponding value of the grid in the lookup table is calculated. This value is used to represent the rectangular region determined by points (x,y) and (m,n), that is, (x,y) is the lower left vertex of the determined rectangular region, extending to the upper right of (m,n), such that (m,n) is the upper right corner of the determined rectangular region.

[0066] The calculation results are obtained through convolution. Assuming the mask function is M(x,y), the function distribution after rasterization is as follows:

[0067]

[0068] Here, K(x,y) is the convolution kernel required for fuzzification calculation, and the kernel size is (p,q). In practical applications, the Gaussian function is usually used. In practical applications, performing two-dimensional convolution calculations on each pixel will bring huge computational overhead. Therefore, the calculation is accelerated by pre-calculating part of the convolution results and reusing the results.

[0069] If the vertices of the rectangle are not selected partial pixels, the rasterization result of the rectangle's vertices is obtained by using a linear method through the coordinates of the grid points closest to the rectangle's vertices.

[0070] In one embodiment, the present invention employs bilinear interpolation. For example... Figure 3 As shown, dst is the target vertex, and src is the obtained mesh vertex. The rasterization result lookup table already contains the rasterization calculation results for each src point, therefore the formula is used.

[0071]

[0072] This allows us to calculate the rasterization results of the vertices of rectangles that do not fall on the grid vertices.

[0073] In one embodiment, the present invention employs a concave point segmentation method to divide the Manhattan graphic on the layout into multiple rectangles. There are many existing methods for segmenting Manhattan graphics based on the concave points of the Manhattan graphic.

[0074] Any Manhattan polygon on the map can be divided into multiple rectangles. Considering the characteristics of Manhattan polygons on the map and the computational complexity, it is necessary to divide Manhattan polygons into as few rectangles as possible, and the corresponding concave point division method is used for this purpose.

[0075] by Figure 4 Taking the Manhattan polygon as an example, first, filter all endpoints (also called vertices) of the Manhattan polygon to select all concave points. A concave point is a point on the smallest circle centered at that point that lies within 270 degrees of the polygon. Then, select pairs of concave points and connect them. Note that a concave point may correspond to more than one point, so all of them need to be connected. Next, find pairs of concave points that intersect (excluding those with common endpoints), and arbitrarily remove one of the connecting lines, retaining as many non-intersecting concave point connections as possible. Use these lines to divide the polygon. Here, the maximum number refers to the maximum number of non-intersecting concave point connections. Finally, take out the concave points that have not been divided from all the concave points, and divide the previously divided sub-polygons along any direction (x or y). At this point, the rectangular division of the polygon is complete.

[0076] Since a Manhattan polygon is a combination of multiple rectangles, it can be represented by the expression:

[0077] By rasterizing and recombining all the divided rectangles, the original polygon can be rasterized:

[0078]

[0079] The concave point segmentation method can achieve the minimum number of segments for Manhattan polygons while ensuring segmentation efficiency, thus minimizing computational overhead in subsequent calculations.

[0080] Next, the rasterization result of each split rectangle is calculated. That is, any rectangle can be transformed into the superposition of four intermediate rectangles. These four superimposed intermediate rectangles are obtained by retrieving the results from a lookup table based on the orientation of the four vertices of the rectangle to be calculated.

[0081] The present invention also protects a full-chip simulation method, which uses the rasterization calculation method of the layout of the above-mentioned technical solution to perform rasterization calculation on the chip layout.

[0082] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for rasterization calculation of a layout, characterized in that, include: Select a subset of pixels and calculate their rasterization result; Divide the Manhattan graphic on the map into multiple rectangles; Determine if the vertices of the rectangle are part of the selected pixel set; If so, then based on the coordinates of the four vertices of the rectangle, find the rasterization results of the four intermediate rectangles formed by extending from the four vertices of the rectangle to the upper right, respectively, from the already calculated rasterization results; The rasterization results of the four intermediate rectangles are added and subtracted to obtain the rasterization result of the rectangle; The mutual addition and subtraction operations include: adding the rasterization results of the two intermediate rectangles formed by extending from the lower left and upper right vertices of the rectangle, and subtracting the rasterization results of the two intermediate rectangles formed by extending from the upper left and lower right vertices of the rectangle.

2. The rasterization calculation method for a layout as described in claim 1, characterized in that, Selecting a subset of pixels and calculating its rasterization result involves the following steps: Set the pixel unit size; The corresponding region is divided into a grid array with the pixel unit size being a square grid with side lengths; Calculate the rasterization result for each point on the grid array.

3. The rasterization calculation method for a layout as described in claim 2, characterized in that, Create a lookup table for the coordinates of each point on the grid array and its corresponding rasterization result.

4. The rasterization calculation method for a layout as described in claim 2, characterized in that, The rasterization result of each point on the grid array is expressed by the formula. ； The calculation shows that the For the mask function, the The size of the convolution kernel required for fuzzification calculation is . .

5. The rasterization calculation method for a layout as described in claim 2, characterized in that, If the vertices of the rectangle are not selected pixels, the rasterization result of the rectangle's vertices is obtained by using linear interpolation through the coordinates of the grid points closest to the rectangle's vertices.

6. The rasterization calculation method for a layout as described in claim 5, characterized in that, Using formula Calculate the rasterization result of the vertices of the rectangle, Dst(x d ,y d Src represents the coordinates of the target vertex, and Src represents the vertices of the resulting mesh. s ,y s () represents the coordinates of the lower left vertex of the resulting grid.

7. The rasterization calculation method for a layout as described in claim 1, characterized in that, The Manhattan graphic on the map is divided into multiple rectangles using the concave point splitting method.

8. The rasterization calculation method for a layout as described in claim 1, characterized in that, The four intermediate rectangles are formed by extending from the lower left corner of the rectangle to the upper right. When the four intermediate rectangles are superimposed, the rasterization result of the intermediate rectangle with the upper left corner and lower right corner as the lower left corner is generated as a negative value, and then superimposed with the rasterization result of the intermediate rectangle with the lower left corner and upper right corner as the lower left corner to obtain the rasterization result of the rectangle.

9. A full-chip simulation method, characterized in that, The layout of the chip is rasterized using the layout rasterization calculation method as described in any one of claims 1 to 8.

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