A laser parameter setting method and computing device for injecting faults into memory

Abstract

This application discloses a laser parameter setting method and computing device for injecting faults into memory, relating to the storage field. It can reflect real memory fault problems and meets the testing, development, and verification scenarios of most RAS solutions. The method includes: determining parameter information of a pulsed laser; the parameter information includes the physical properties of the pulsed laser; generating a control signal based on the parameter information; wherein the control signal includes the parameter information of the pulsed laser; sending the control signal to a laser generator; wherein the control signal is used to instruct the laser generator to generate a pulsed laser based on the parameter information; the pulsed laser is used to irradiate the wafer surface of the memory to be injected with faults, so as to cause memory faults to occur on the irradiated wafer surface.

Description

Technical Field

[0001] This application relates to the field of storage, and more particularly to a laser parameter setting method and computing device for injecting faults into memory. Background Technology

[0002] With the development of computing technology, the memory in computing devices, such as dynamic random access memory (DRAM), is becoming increasingly integrated and its manufacturing process is becoming shorter. However, memory failures, such as the basic failure rate, are also increasing. To address the memory failure problem, a technique for memory failure prediction and recovery based on memory failures is proposed. This technique requires injecting memory failures and performing fault prediction and recovery by simulating memory failures to complete the technical test.

[0003] Current technologies mostly simulate memory failures by writing fault data into the corresponding registers in memory or by injecting (or adding) fault data into the data during memory transfer. However, simulating memory failures not only fails to reflect real memory problems, but also requires specialized hardware or software tools to work with the computing device, leading to hardware or software compatibility issues. Furthermore, simulating memory failures has limited applicability and cannot effectively support the testing, development, and validation of reliability, availability, and serviceability (RAS) solutions for memory. Summary of the Invention

[0004] This application provides a laser parameter setting method and computing device for injecting faults into memory. It can reflect real memory fault problems and meets the testing, development, and verification scenarios of most RAS solutions.

[0005] To achieve the above technical objectives, this application adopts the following technical solution:

[0006] In a first aspect, embodiments of this application provide a laser parameter setting method for injecting faults into memory. The method includes: determining parameter information of a pulsed laser; the parameter information includes physical properties of the pulsed laser; generating a control signal based on the parameter information; the control signal includes the parameter information; and sending the control signal to a laser generator; wherein the control signal is used to instruct the laser generator to generate a pulsed laser based on the parameter information; and the pulsed laser is used to irradiate the wafer surface of the memory to be injected with faults, so that a memory fault occurs on the irradiated wafer surface.

[0007] Understandably, since pulsed lasers are high-energy light with specific physical properties, they can induce single-particle effects on the wafer surface of memory, resulting in real physical faults in the memory. Compared to simulating faults, which requires hardware or software tools, this fault injection method is independent of the computing device and can be applied to the testing, development, and verification of RAS solutions from different manufacturers and for different memory types.

[0008] In one possible implementation, the physical properties of the pulsed laser include its wavelength. The parameters determining the pulsed laser include: determining the wavelength based on the material properties and thickness of the memory wafer; wherein, the material properties of the memory wafer include the bandgap width, with a larger bandgap resulting in a shorter pulsed laser wavelength; and a thicker memory wafer resulting in a longer pulsed laser wavelength; the pulsed laser wavelength is within a preset wavelength range, where wavelengths within this range are capable of inducing single-event effects on the wafer and penetrating the wafer; single-event effects can cause physical failures in the memory.

[0009] In one example, when the memory wafer is silicon and the memory wafer thickness is 1 mm, the wavelength is [1030 nm, 1107 nm].

[0010] Understandably, different wafers have different material properties (such as bandgap), so the wavelengths of pulsed lasers that can generate single-event effects also vary. The shorter the wavelength of the pulsed laser, the higher the energy. Therefore, the wavelength of the pulsed laser can only induce single-event effects on the wafer within a certain wavelength range.

[0011] In another possible implementation, the physical properties of the pulsed laser include the size of the pulsed laser spot. The parameter information for determining the pulsed laser includes: determining the size of the pulsed laser spot based on the size of the memory fault granularity; the larger the memory fault granularity, the larger the pulsed laser spot.

[0012] It is understandable that the larger the memory fault granularity, the larger the pulse laser spot needs to irradiate the larger memory granularity. Therefore, the size of the laser spot is determined based on the fault granularity of the wafer to be injected, thereby generating a fault of a specific granularity.

[0013] In another possible implementation, the parameter information also includes the peak power of the pulsed laser and the irradiation time of the pulsed laser. The parameter information for determining the pulsed laser includes: determining the peak power of the pulsed laser and the irradiation time of the pulsed laser based on the memory fault type; the memory fault type includes correctable fault type or uncorrectable fault type; the peak power of the pulsed laser is equal to the average power of the pulsed laser / (pulse laser frequency * pulse laser pulse width).

[0014] It is understandable that different pulsed laser parameters and different irradiation durations can produce different types of memory faults. Therefore, it is necessary to set the pulsed laser parameters based on the type of memory fault to be generated in order to produce a specific type of memory fault.

[0015] In another possible implementation, when the peak power is less than a first threshold and the pulsed laser irradiation time is less than or equal to a second threshold, the physical fault type is a correctable fault type; when the peak power is greater than or equal to the first threshold and the pulsed laser irradiation time is greater than or equal to the second threshold, the physical fault type is an uncorrectable fault type; the first threshold is the laser damage threshold of the wafer.

[0016] Understandably, a lower peak power and shorter irradiation time can induce the desired correctable memory fault; conversely, a higher peak power and longer irradiation time can induce the desired uncorrectable memory fault. Therefore, the parameters of the pulsed laser and the irradiation duration are not fixed; several factors must be combined to produce a specific type of memory fault.

[0017] In another possible implementation, the parameter information also includes the target position of the pulsed laser spot on the wafer surface of the memory. The parameter information for determining the pulsed laser includes: determining the target position based on the physical position of the wafer to be injected with the fault in the memory; wherein, the target position is the physical position.

[0018] In another possible implementation, the control signal is also used to control the movement of the laser generator so that the position of the pulsed laser spot on the wafer surface of the memory is the target position.

[0019] It is understandable that the position of the pulsed laser spot is determined based on the position of the wafer to be injected with the fault, thereby enabling the injection of the fault at a specific location in the memory.

[0020] In another possible implementation, the parameter information also includes the distance between the laser generator's exit port and the wafer surface to be injected with the fault, and the angle between the pulsed laser beam and the wafer surface to be injected with the fault. Determining the parameter information of the pulsed laser includes: determining the distance between the laser generator's exit port and the wafer surface to be injected with the fault based on the distance between the exit port and the pulsed laser focus; wherein, the distance between the laser generator's exit port and the wafer surface to be injected with the fault is equal to the distance between the exit port and the pulsed laser focus, and the angle between the pulsed laser beam and the wafer surface to be injected with the fault is in the range of [80°, 90°].

[0021] In another possible implementation, the control signal is also used to control the movement of the laser generator such that the distance between the laser generator's beam outlet and the wafer surface to be injected with the fault is equal to the distance between the beam outlet and the focal point of the pulsed laser, and the angle between the pulsed laser beam and the wafer surface to be injected with the fault is [80°, 90°].

[0022] It is understandable that, since the energy of the laser pulse is concentrated at the focal point of the pulsed laser, the distance between the laser generator's output port and the surface of the wafer to be injected with faults is equal to the distance between the output port and the focal point of the pulsed laser. Furthermore, the perpendicularity of the pulsed laser beam to the surface of the wafer to be injected with faults ensures that the energy of the laser pulse can be focused on the wafer to be injected with faults on the memory surface, thereby improving the fault injection efficiency.

[0023] Secondly, this application proposes a method for verifying memory performance, applied to a computing device. The method includes: receiving an instruction to enable the memory ECS function; the instruction instructs the computing device to enable the memory ECS function; the memory ECS function is used to periodically inspect the data stored in the memory; collecting first fault information; the first fault information is information recorded in the memory before a memory fault occurs on the wafer surface irradiated by a pulsed laser; the parameters of the pulsed laser are set according to the laser parameter setting method for injecting faults into the memory in the execution of the first aspect and any possible implementation thereof; collecting second fault information; the second fault information is information recorded in the memory after a memory fault occurs on the wafer surface irradiated by a pulsed laser; collecting third fault information; the third fault information is information recorded in the memory after a preset time period following the memory fault occurring on the wafer surface irradiated by a pulsed laser; and verifying memory performance based on the first fault information, the second fault information, and the third fault information.

[0024] In one possible implementation, the computing device includes a baseboard management controller (BMC), and first fault information, second fault information, and third fault information are collected by the BMC.

[0025] Thirdly, embodiments of this application provide a computing device, including: one or more processors, memory, and a baseboard management controller (BMC); the processor is configured to receive an instruction and enable the memory ECS function; the memory is configured to receive pulsed laser irradiation and generate a memory fault; the BMC is configured to collect first fault information of the memory before receiving pulsed laser irradiation, second fault information after receiving pulsed laser irradiation, and third fault information after a preset time period following receiving pulsed laser irradiation; the parameters of the pulsed laser are set according to the laser parameter setting method for injecting faults into the memory as described in the first aspect and any possible implementation thereof.

[0026] Fourthly, embodiments of this application provide a controller, including a memory and a processor. The memory and the processor are coupled; the memory stores computer program code, which includes computer instructions. When the processor executes the computer instructions, it causes the controller to perform a laser parameter setting method for injecting faults into memory, as described in the first aspect and any possible implementation thereof.

[0027] Fifthly, this application provides a computer-readable storage medium including computer instructions. When executed on a controller, the computer instructions cause the controller to perform a laser parameter setting method for injecting a fault into memory, as described in the first aspect and any possible implementation thereof.

[0028] Sixthly, this application provides a computer program product comprising computer instructions. When the computer instructions are executed on a controller, the controller causes the controller to perform a laser parameter setting method for injecting a fault into memory, as described in the first aspect and any possible implementation thereof.

[0029] For a detailed description of aspects three through six and their various implementations in this application, please refer to the detailed description in aspect one or two and their various implementations; and for a detailed analysis of the beneficial effects of aspects three through six and their various implementations in aspect one or two and their various implementations, please refer to the beneficial effect analysis in aspect one or two and their various implementations, which will not be repeated here.

[0030] These or other aspects of this application will become more readily apparent in the following description. Attached Figure Description

[0031] Figure 1 A system architecture diagram provided for an embodiment of this application;

[0032] Figure 2 A schematic diagram of a memory structure provided in an embodiment of this application;

[0033] Figure 3 A flowchart illustrating a laser parameter setting method for injecting faults into memory, provided in an embodiment of this application;

[0034] Figure 4 A graph showing the relationship between the wavelength of a pulsed laser and the penetration depth of the pulsed laser in silicon, provided for embodiments of this application;

[0035] Figure 5 A schematic diagram of pulsed laser position provided for an embodiment of this application;

[0036] Figure 6 A schematic diagram of a human-computer interaction interface provided in an embodiment of this application;

[0037] Figure 7 A flowchart illustrating a memory performance verification method provided in this application embodiment;

[0038] Figure 8 This is a schematic diagram of the structure of a controller provided in an embodiment of this application;

[0039] Figure 9 This is a schematic diagram of another controller provided in an embodiment of this application. Detailed Implementation

[0040] For ease of understanding, the relevant terms used in the embodiments of this application will be briefly introduced below:

[0041] (1) Single event effect: refers to a radiation effect that causes abnormal changes in the state of electronic devices when a single high-energy particle passes through the sensitive area of ​​a microelectronic device, including single event flip, single event lock, single event burn-out, single event gate breakdown, etc.

[0042] (2) Band gap: This is an important material characteristic of semiconductors. Its size is mainly determined by the energy band structure of the semiconductor, which is related to the crystal structure and the bonding properties of atoms. Since the energy of electrons in a solid is not continuous and consists of discontinuous energy bands, free electrons or holes must exist for conductivity to occur. The energy band where free electrons exist is called the conduction band (which can conduct electricity), and the energy band where free holes exist is called the valence band (which can also conduct electricity). For bound electrons to become free electrons or holes, they must obtain sufficient energy to transition from the valence band to the conduction band. The minimum value of this energy is the band gap.

[0043] (3) On-die error checking and correction (On-die ECC): The fifth-generation double data rate (DDR) 5 device adds on-die ECC function to improve data integrity in DRAM by implementing internal error correction ECC in memory chip without the CPU's awareness.

[0044] (4) Error Check and Scrub (ECS): One of the new features of DDR5, it reads data inside DRAM, corrects single-bit errors, and writes the corrected data bits back to the array when the CPU is unaware of memory failure; when the entire array is cleaned, the DRAM reports the error information corrected during the cleanup to the CPU.

[0045] (5) The terms “first,” “second,” and “third,” etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as “first,” “second,” or “third,” etc., may explicitly or implicitly include one or more of that feature.

[0046] In the aforementioned background technology, the fault injection methods used to simulate memory faults mainly include two types: 1. Writing fault information to the corresponding registers of the memory through external hardware or software tool interfaces to simulate memory faults. 2. Installing a memory fault injection card between the memory and the central processing unit (CPU), and forcibly changing the data transmitted from memory to the CPU through the memory fault injection card, such as changing the data 1 transmitted from memory to the CPU to 0, to simulate memory faults. Both methods, whether using hardware or software tool interfaces in method 1 or a memory fault injection card in method 2, require the installation of dedicated software drivers. These dedicated software drivers are heavily coupled with the basic input / output system (BIOS) and operating system (OS), and are difficult to be compatible with different manufacturers and different OSes. For DDR5 memory, because DDR5 memory has ECS and on-die ECC functions, it can achieve internal single-error correction without going through the CPU. However, simulated faults cannot be used to verify the ECS and ECC functions of DDR5, meaning that the applicable scenarios for simulating memory faults are limited and cannot be well adapted to the testing, development, and verification of memory RAS solutions.

[0047] Based on this, this application proposes a laser parameter setting method for injecting faults into memory. In this method, a controller controls a laser generator to generate pulsed laser light, which irradiates the wafer surface of the memory to be injected with faults, thereby causing memory faults to occur on the irradiated wafer surface. It is understood that, since pulsed laser light is a high-energy light with specific physical properties, it can induce single-event effects on the wafer surface of the memory, achieving real physical faults in the memory. Compared to simulating faults, which requires hardware or software tools, this fault injection method is independent of the computing device and can be applied to the testing, development, and verification of RAS solutions from different manufacturers and with different memory types.

[0048] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0049] Please refer to Figure 1 This diagram illustrates a system architecture related to the laser parameter setting method for injecting faults into memory, as provided in an embodiment of this application. Figure 1As shown, the system architecture may include: a controller 100, a laser generator 110, and a computing device 120. The computing device 120 includes: memory 130. The controller 100 communicates with the laser generator 110, and the controller 100 can control the laser generator 110 to emit laser pulses to the memory 130 of the computing device 120 to inject faults into the memory 130.

[0050] The controller 100 is a device capable of generating control signals to control the laser generator 110 to generate laser pulses. Optionally, the controller 100 includes a human-machine interface for receiving user input parameters.

[0051] Laser generator 110 is a device capable of generating pulsed laser light. The pulsed laser light is used to irradiate memory 130, causing it to generate a memory fault.

[0052] In one implementation, the controller 100 and the laser generator 110 can be integrated together, independent of the computing device 120.

[0053] In another implementation, the controller 100 is a component of the computing device 120, such as a CPU, and the controller 100 is set up independently of the laser generator 110.

[0054] In addition to memory 130, computing device 120 may also include baseboard management controller (BMC) 140, CPU 150 and memory chip 160. Memory 130, BMC 140 and memory chip 160 of computing device 120 are all connected to CPU 150 and perform corresponding functions under the control of CPU 150.

[0055] The computing device 120 can be a device such as a server, tablet computer, desktop computer, laptop computer, netbook, etc. This application does not limit the specific form of the computing device 120.

[0056] Memory 130 is a component of computing device 120 used to store programs and data. When computing device 120 starts running, the OS will transfer the data that needs to be processed from memory 130 to CPU 150 for processing. When the processing is completed, CPU 150 will send out the results.

[0057] For example, memory 130 includes DDR4, DDR5, etc. Among them, DDR5 introduces an ECC error correction mechanism, which can avoid risks, improve reliability and reduce defect rate.

[0058] In one example, please refer to Figure 2 , Figure 2 A structural diagram of a 130-memory memory is shown. Figure 2The memory module 130 shown includes a PCB board, gold fingers, and memory chips (wafers). The gold fingers and memory chips are integrated on the PCB board, together forming the memory module 130.

[0059] Memory chips are composed of wafer packages, such as silicon wafers. Manufacturers use optical and chemical etching methods to fabricate circuits and electronic components onto silicon wafers. Each finished silicon wafer contains a large number of semiconductor chips, and these processed circular silicon wafers are called wafers.

[0060] The BMC140 can be used to collect various information from the computing device 120 and provide it to the network administrator. It can perform operations such as firmware upgrades and device monitoring on the computing device 120 even when it is not powered on.

[0061] For example, different computing device manufacturers use different names for the BMC140; some companies call it BMC, some call it iLO, and another company calls it iDRAC. Regardless of whether it is called BMC, iLO, or iDRAC, it can be understood as the BMC in this embodiment of the invention.

[0062] CPU150 is the computing and control core of computing device 120, and is the final execution unit for information processing and program execution.

[0063] The memory chip stores the BIOS program, hereinafter referred to as BIOS. The BIOS is executed by the CPU 150. The BIOS stores the computer's most important basic input / output programs, power-on self-test programs, and system startup programs. It can read and write specific system settings information from complementary metal-oxide-semiconductor (CMOS). Its main function is to provide the lowest-level and most direct hardware settings and control for the computing device 120.

[0064] Optionally, the BIOS includes RAS algorithms, such as ECS, On-die ECC, and Single Device Data Correction (SDDC), which can be used to detect and correct memory faults, such as memory fault location, memory fault prediction, and memory fault repair. Running RAS algorithms in the BIOS can verify memory RAS.

[0065] The following text combines Figure 1 The system architecture shown illustrates the laser parameter setting method for injecting faults into memory provided in this application embodiment:

[0066] Please refer to Figure 3This is a flowchart illustrating a laser parameter setting method for injecting faults into memory, provided in an embodiment of this application. The method is applied to a controller connected to a laser generator. Figure 3 As shown, the method may include S101-S104.

[0067] S101: The controller determines the parameter information of the pulsed laser.

[0068] The parameter information includes the physical properties of the pulsed laser, such as the wavelength, spot size, frequency, pulse width, and average power of the pulsed laser.

[0069] Methods for determining the wavelength of pulsed lasers include: the controller determines the wavelength of the pulsed laser based on the material properties and thickness of the memory wafer.

[0070] Among them, the material characteristics of memory wafers include the bandgap width. The larger the bandgap width, the shorter the wavelength of the pulsed laser. The thicker the memory wafer, the longer the wavelength of the pulsed laser. The wavelength of the pulsed laser is within a preset wavelength range. The wavelength within the preset wavelength range is the wavelength that can cause the wafer to produce a single-event effect and can penetrate the wafer. The single-event effect can cause physical failure of the memory.

[0071] In one example, the wafer is 1mm thick silicon, such as Figure 4 As shown, Figure 4 The graph shows the relationship between the wavelength of a pulsed laser and its penetration depth in silicon. Figure 4 It is known that the thicker the silicon wafer, the longer the wavelength of the pulsed laser required. A silicon wafer thickness of 1 mm corresponds to a wavelength of at least 1030 nm penetrating 1 mm; and since the bandgap of silicon is 1.12 eV, the energy of the pulsed laser needs to be greater than or equal to 1.12 eV to induce a single-event effect in silicon. The relationship between the energy and wavelength of the pulsed laser is E = h / k * C / wavelength, where h is Planck's constant, k is a constant, and C is the beam size, h = 6.63 * 10⁻⁶. -34 J / s, k = 1.6 * 10 -19 J / eV, C = 3 * 10 17 If the energy is nm / s, then E = 1240 / wavelength; therefore, when the energy is 1.12 eV, the corresponding wavelength is 1240 / 1.12 eV = 1107 nm. Thus, the maximum wavelength that can cause single-event effects in silicon is 1107 nm.

[0072] Based on the above example, it can be seen that for a 1mm thick silicon wafer, the wavelength values ​​are [1030nm, 1107nm].

[0073] The method for determining the spot size of the pulsed laser includes: the controller determines the spot size of the pulsed laser based on the size of the memory fault granularity. The larger the memory fault granularity, the larger the pulsed laser spot size.

[0074] Fault granularity includes, but is not limited to: rank faults, device faults, bank faults, etc.

[0075] Optionally, the parameter information may also include the peak power of the pulsed laser and the irradiation time of the pulsed laser.

[0076] The methods for determining the peak power and irradiation time of a pulsed laser include: the controller determines the peak power and irradiation time of the pulsed laser based on the memory fault type.

[0077] Memory fault types include correctable fault types and uncorrectable fault types.

[0078] The type of memory failure that occurs in a wafer irradiated with memory is related to the frequency, pulse width, average power, and irradiation time of the pulsed laser.

[0079] In one example, the peak power of the pulsed laser is equal to the average power and the pulse width. When the peak power is less than the first threshold, the irradiation time of the pulsed laser is less than or equal to the second threshold, and the physical fault type is a correctable fault type. When the average power of the pulsed laser and the pulse width are greater than or equal to the first threshold, the irradiation time of the pulsed laser is greater than or equal to the second threshold, and the physical fault type is an uncorrectable fault type. The first threshold is the laser damage threshold of the wafer.

[0080] Laser damage threshold is an important parameter characterizing the resistance of a medium irradiated by a laser to laser damage. High concentration of laser energy can cause localized deformation or even complete damage to the medium, either internally or on its surface.

[0081] Because pulsed lasers generate heat accumulation when irradiating memory wafers, the longer the irradiation time, the higher the heat accumulation and the greater the damage to the memory wafers. Therefore, when the peak power of the pulsed laser exceeds the first threshold and the irradiation time of the memory wafer is greater than or equal to the second threshold, it will cause uncorrectable faults to the memory wafers.

[0082] Understandably, a lower peak power and shorter irradiation time can produce the desired correctable memory fault; conversely, a higher peak power and longer irradiation time can induce the desired uncorrectable memory fault. Therefore, the average power, frequency, pulse width, and irradiation duration of the pulsed laser are not fixed; several factors must be combined to produce a specific type of memory fault.

[0083] Optionally, the parameter information may also include the target location of the pulsed laser spot on the wafer surface of the memory.

[0084] The method for determining the target location includes: the controller determining the target location based on the physical location of the wafer to be injected with the fault in memory. Here, the target location is a physical location. The target location can be represented in two-dimensional coordinates.

[0085] Optionally, the parameter information may also include the distance between the laser generator's output port and the wafer surface to be injected with the fault, as well as the angle between the pulsed laser beam and the wafer surface to be injected with the fault.

[0086] The method for determining the distance between the laser generator's output port and the wafer surface to be injected with faulty laser light, and the angle between the pulsed laser beam and the wafer surface to be injected with faulty laser light, includes: determining the distance between the laser generator's output port and the wafer surface to be injected with faulty laser light based on the distance between the output port and the pulsed laser's focal point. Specifically, the distance between the laser generator's output port and the wafer surface to be injected with faulty laser light is equal to the distance between the output port and the pulsed laser's focal point, and the angle between the pulsed laser beam and the wafer surface to be injected with faulty laser light is [80°, 90°]. Generally, to ensure that the center of the pulsed laser's energy is most concentrated on the wafer surface, the angle between the pulsed laser beam and the wafer surface to be injected with faulty laser light is 90°.

[0087] In one example, such as Figure 5 As shown, Figure 5 The plane where the memory is located is taken as the horizontal reference plane. The upper left corner of the memory is selected as the reference origin. The two-dimensional coordinates (x1, y1) of the origin of the pulsed laser spot on the target position of the memory wafer surface are used to represent the position of the laser spot. The distance between the laser generator's output port and the wafer surface to be injected with the fault is h. The angle between the pulsed laser beam and the wafer surface to be injected with the fault is 90°.

[0088] The above parameter information is determined by the controller based on manual operation or automatically based on a pre-set program.

[0089] In one possible implementation, such as Figure 6 As shown, Figure 6 The controller includes a human-machine interface (HMI), through which operators can input information such as the wafer material, wafer thickness, fault size, physical location, distance between the beam exit and the pulsed laser focus, and the angle between the beam and the wafer surface to be injected with the fault. Based on this information, the controller automatically determines the pulsed laser parameters.

[0090] S102: The controller generates control signals based on parameter information.

[0091] The control signals include parameter information.

[0092] S103: The controller sends a control signal to the laser generator.

[0093] The control signal is used to instruct the laser generator to generate pulsed laser; the pulsed laser is used to irradiate the wafer surface of the memory to be injected with faults, so as to cause memory faults to occur on the irradiated wafer surface.

[0094] Optionally, the control signal is also used to control the movement of the laser generator so that the position of the pulsed laser spot on the wafer surface of the memory is the target position.

[0095] Optionally, the control signal is also used to control the movement of the laser generator so that the distance between the laser generator's beam outlet and the wafer surface to be injected with the fault is equal to the distance between the beam outlet and the pulsed laser focus, and the angle between the pulsed laser beam and the wafer surface to be injected with the fault is [80°, 90°].

[0096] S104: The laser generator receives a control signal, generates a pulsed laser according to the control signal, and emits the pulsed laser onto the wafer surface of the memory to be injected with the fault, so that the wafer surface of the memory to be injected with the fault is irradiated by the pulsed laser, thereby generating a memory fault.

[0097] Optionally, before emitting a pulsed laser beam onto the wafer surface to be injected with the faulty memory, the laser generator can adjust its position according to a control signal. For example, the distance between the laser generator's beam outlet and the wafer surface to be injected with the faulty memory can be adjusted to be equal to the distance between the beam outlet and the focal point of the pulsed laser, and the pulsed laser beam is perpendicular to the wafer surface to be injected with the faulty memory. The laser generator's pulsed laser spot moves to the wafer surface to be injected with the faulty memory.

[0098] In one example, the control signals include, for example: Figure 5 The laser generator moves the beam outlet to a height h from the wafer surface of the memory chip, and generates a continuous visible light beam at the beam outlet that will not cause memory failure on the wafer surface. The beam spot is then moved to the position (x1, y1) on the wafer surface of the memory chip, with the angle between the beam and the wafer surface being 90°, thus completing the movement.

[0099] The above method involves the controller automatically moving the laser generator via control signals. The laser generator can also be manually adjusted to change the position and direction of the beam, thereby altering the irradiation position of the pulsed laser spot and generating a real memory fault by inducing a wafer injection fault at a specific location in the memory.

[0100] It should be understood that before irradiating the memory with a pulsed laser, the plastic seal on the surface of the memory wafer can be removed by machine or manually to expose the memory wafer.

[0101] Based on the single-event effect principle of pulsed lasers, when a high-energy pulsed laser is injected into the wafer surface of a memory module, valence band electron transitions generate a large number of electron-hole pairs along the laser propagation path. These charge carriers form charges, potentially altering the conductive state of the memory wafer (semiconductor), thus changing the state of the physical components within the memory. Since real memory faults are caused by state changes in the physical components, high-energy pulsed laser injection can be used to inject real memory faults. For example, when a high-energy pulsed laser acts on the wafer surface of a memory module, the resulting junction current causes the memory capacitors to discharge / charge. If the stored information in the capacitor is in state 1, the single-event effect causes the stored information to flip, changing to state 0 or a high-resistivity state, thus inducing a real fault in the memory.

[0102] The laser parameter setting method for injecting faults into memory proposed in this application allows for the generation of realistic and recoverable faults in the memory by setting the wavelength, frequency, pulse width, power, and irradiation duration of the pulsed laser. This satisfies the testing, development, and verification functions of most current RAS solutions. Furthermore, this method does not rely on hardware, software, BIOS, or OS for memory fault injection, enabling the memory fault injection tool to be independent of the computing device and allowing for RAS verification of different manufacturers and memory types.

[0103] The following presents a method for verifying memory performance, such as Reliability Analysis (RAS). This method is based on memory fault information and is illustrated using RAS verification of the memory's ECS (Elastic Compute Service) function as an example. The memory is installed in a computing device. Figure 7 As shown, the method includes S201-S205.

[0104] S201: The computing device receives an instruction to enable the memory ECS function.

[0105] The instruction is used to instruct the computing device to enable the memory ECS function; the memory ECS function is used to periodically inspect the data stored in memory.

[0106] Specifically, the CPU in the computing device receives and responds to the instruction to enable the memory ECS function, and calls the BIOS to enable the memory ECS function.

[0107] When the ECS function of the memory is enabled, the memory can periodically inspect the data in the memory. If a single bit error occurs, the memory can correct the single bit error on its own. If there are many errors, the memory can record the space address of the data with more than a certain number of errors and the error cause and other relevant information in the memory register.

[0108] Optionally, data can be pre-stored in most of the memory storage space (e.g., 95% of the storage space), and the computing device can simultaneously read and write data to the memory after enabling the memory ECS function.

[0109] The computing device performs data read and write operations on memory to collect information on memory read / write failures, thereby verifying whether the ECS function can correct these failures. Setting the memory storage space to occupy a large portion of the memory's storage area allows the data to overwrite most of the memory space, thus verifying whether read / write failures exist in that large portion of the memory's storage area. The computing device does not limit the time spent on memory read / write operations; for example, the computing device might perform read / write operations on 95% of the total memory capacity for 20 minutes.

[0110] S202: The computing device collects the first fault information.

[0111] The first fault information is the information recorded in the memory before the memory failed due to the wafer surface being irradiated by the pulsed laser. This information is stored in the memory's registers.

[0112] Specifically, the BMC of the computing device obtains information from the registers in memory, namely the first fault information.

[0113] The BMC in the computing device retrieves information from the memory registers multiple times at different times after the ECS function of the memory is enabled. The information retrieved by the BMC from the memory registers.

[0114] The methods by which the BMC of the aforementioned computing device obtains information from the registers in memory include, but are not limited to, method 1 or method 2:

[0115] Method 1: The CPU of the computing device calls the BIOS to read the information in the memory registers and reports it to the BMC.

[0116] Method 2: The BMC obtains information from the registers in memory via an external bus.

[0117] S203: The computing device collects second fault information.

[0118] The second fault information is the information recorded in the memory after a memory failure occurs on the wafer surface irradiated by a pulsed laser.

[0119] After the computing device collects the first fault information, the memory in the computing device receives... Figure 3 The pulsed laser irradiation shown is followed by the computer collecting second fault information from memory after the irradiation ends.

[0120] S204: The computing device collects third fault information.

[0121] The third fault information is the information recorded in the memory after a preset time period following a memory fault occurring on the wafer surface irradiated by a pulsed laser.

[0122] In S202, S203, and S204 above, the computing device may collect memory fault information under manual instruction, or the computing device may automatically collect memory fault information according to a pre-set time. This application does not limit the method by which the computing device triggers the collection of memory fault information.

[0123] S205: The computing device verifies memory performance based on the first fault information, the second fault information, and the third fault information.

[0124] In one possible implementation, after the computing device collects memory fault information at different stages, it can analyze the number of memory faults contained in the first fault information, the second fault information, and the third fault information to verify the RAS of the memory ECS function.

[0125] In one example, the first fault information contains 0 memory faults, indicating that the memory wafer was intact before being irradiated by the pulsed laser; the second fault information contains 10 memory faults, indicating that the memory wafer developed 10 faults after being irradiated by the pulsed laser; the third fault information contains 0 memory faults, indicating that the memory ESC function can repair memory faults. Thus, the RAS of the memory ESC function can be verified through the above first, second, and third fault information.

[0126] In another possible implementation, the computing device outputs the first fault information, the second fault information, and the third fault information through an output device, and the information is analyzed by humans or other devices to verify the memory performance.

[0127] It is understandable that computing devices, by acquiring information from memory registers—specifically memory fault information—can further parse this information to achieve applications such as memory fault location, memory fault prediction, and memory fault repair. This application only uses the verification of memory performance as an example for illustration.

[0128] The foregoing primarily describes the solutions provided by the embodiments of this application from a methodological perspective. To achieve the aforementioned functions, it includes corresponding hardware structures and / or software modules for executing each function. Those skilled in the art should readily recognize that, in conjunction with the units and algorithm steps of the various examples described in the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0129] This application also provides a controller 200. For example... Figure 8 The diagram shown is a structural schematic of a controller 200 provided in an embodiment of this application.

[0130] The controller 200 includes: a determining unit 201 for determining parameter information of the pulsed laser; the parameter information includes the physical properties of the pulsed laser; a generating unit 202 for generating a control signal based on the parameter information; the control signal includes the parameter information; and a sending unit 203 for sending the control signal to the laser generator; wherein the control signal instructs the laser generator to generate a pulsed laser based on the parameter information; the pulsed laser is used to irradiate the wafer surface of the memory to be injected with a fault, so as to cause a memory fault to occur on the irradiated wafer surface. For example, combined with... Figure 3 The determining unit 201 is used in S101 of the method embodiment, the generating unit 202 is used in S102 of the method embodiment, and the sending unit 203 is used in S103 of the method embodiment.

[0131] Optionally, the physical properties of the pulsed laser include its wavelength. The determining unit 201 is specifically used to determine the wavelength of the pulsed laser based on the material characteristics and thickness of the memory wafer. The material characteristics of the memory wafer include the bandgap; a larger bandgap results in a shorter pulsed laser wavelength, and a thicker memory wafer results in a longer pulsed laser wavelength. The pulsed laser wavelength is within a preset wavelength range, where wavelengths within this range are those capable of inducing a single-event event (SEE) on the wafer and penetrating the wafer. The SEE can cause physical failures in the memory. For example, combined with... Figure 3 The determining unit 201 is used in S101 of the method embodiment.

[0132] Optionally, when the memory wafer is silicon and the memory wafer thickness is 1mm, the wavelength is in the range of [1030nm, 1107nm].

[0133] Optionally, the physical properties of the pulsed laser include the size of the pulsed laser spot. The determining unit 201 is specifically used to determine the size of the pulsed laser spot based on the size of the memory fault granularity; the larger the memory fault granularity, the larger the pulsed laser spot.

[0134] Optionally, the parameter information also includes the peak power and irradiation time of the pulsed laser. Specifically, the determining unit 201 is used to determine the peak power and irradiation time of the pulsed laser based on the memory fault type; the memory fault type includes correctable fault types or uncorrectable fault types; the peak power of the pulsed laser is equal to the average power of the pulsed laser / (pulse laser frequency * pulse laser pulse width). For example, combined with... Figure 3 The determining unit 201 is used in S101 of the method embodiment.

[0135] Optionally, when the peak power is less than the first threshold and the pulsed laser irradiation time is less than or equal to the second threshold, the physical fault type is a correctable fault type; when the peak power is greater than or equal to the first threshold and the pulsed laser irradiation time is greater than or equal to the second threshold, the physical fault type is an uncorrectable fault type; the first threshold is the laser damage threshold of the wafer.

[0136] Optionally, the parameter information also includes the target position of the pulsed laser spot on the wafer surface of the memory. Specifically, the determining unit 201 is used to determine the target position based on the physical position of the wafer to be injected with the fault within the memory; wherein, the target position is a physical position. For example, combined with... Figure 3 The determining unit 201 is used in S101 of the method embodiment.

[0137] Optionally, the control signal is also used to control the movement of the laser generator so that the position of the pulsed laser spot on the wafer surface of the memory is the target position.

[0138] Optionally, the parameter information also includes the distance between the laser generator's beam exit and the wafer surface to be injected with the fault, and the angle between the pulsed laser beam and the wafer surface to be injected with the fault. Specifically, the determining unit 201 is used to determine the distance between the laser generator's beam exit and the wafer surface to be injected with the fault based on the distance between the beam exit and the pulsed laser focus; wherein the distance between the laser generator's beam exit and the wafer surface to be injected with the fault is equal to the distance between the beam exit and the pulsed laser focus, and the angle between the pulsed laser beam and the wafer surface to be injected with the fault is [80°, 90°]. For example, combined with... Figure 3 The determining unit 201 is used in S101 of the method embodiment.

[0139] Optionally, the control signal is also used to control the movement of the laser generator so that the distance between the laser generator's beam outlet and the wafer surface to be injected with the fault is equal to the distance between the beam outlet and the pulsed laser focus, and the angle between the pulsed laser beam and the wafer surface to be injected with the fault is [80°, 90°].

[0140] Of course, the controller 200 provided in this application embodiment includes, but is not limited to, the modules described above.

[0141] Figure 9 This is a schematic diagram of the controller 300 provided in an embodiment of this application. The controller 300 can be a computing device such as a server, tablet computer, desktop computer, laptop computer, netbook, etc. Figure 9 As shown, the controller 300 includes a processor 301, a memory 302, and a network interface 303.

[0142] The processor 301 includes one or more CPUs. The CPU can be a single-core CPU or a multi-core CPU.

[0143] The memory 302 includes, but is not limited to, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), flash memory, or optical memory.

[0144] Optionally, the processor 301 implements the laser parameter setting method for injecting faults into memory provided in this application embodiment by reading instructions stored in the memory 302; or, the processor 301 implements the laser parameter setting method for injecting faults into memory provided in this application embodiment by internally stored instructions. When the processor 301 implements the method in the above embodiments by reading instructions stored in the memory 302, the memory 302 stores instructions for implementing the laser parameter setting method for injecting faults into memory provided in this application embodiment.

[0145] Network interface 303 is a type of device that includes a transmitter and a receiver for communicating with other devices or communication networks. It can be a wired interface (port), such as a fiber distributed data interface (FDDI) or a gigabit Ethernet interface (GE). Alternatively, network interface 303 can be a wireless interface. It should be understood that network interface 303 includes multiple physical ports and is used for communication, etc.

[0146] Optionally, the controller 300 also includes a bus 304, through which the processor 301, memory 302, and network interface 303 are typically interconnected, or in other ways.

[0147] In actual implementation, the determining unit 201, generating unit 202, and sending unit 203 can be implemented by the processor calling computer program code in memory. The specific execution process can be found in the description of the method section above, and will not be repeated here.

[0148] Another embodiment of this application provides a controller, including a memory and a processor. The memory and the processor are coupled; the memory stores computer program code, which includes computer instructions. When the processor executes the computer instructions, it causes the controller to perform the steps of the laser parameter setting method for injecting faults into memory as described in the above-described method embodiments.

[0149] Another embodiment of this application also provides a computer-readable storage medium storing computer instructions that, when executed on a controller, cause the controller to perform the various steps of the laser parameter setting method flow for injecting faults into memory as shown in the above method embodiment.

[0150] Another embodiment of this application provides a chip system applied to a controller. The chip system includes one or more interface circuits and one or more processors. The interface circuits and processors are interconnected via lines. The interface circuits are used to receive signals from the controller's memory and send signals to the processors, the signals including computer instructions stored in the memory. When the controller processor executes the computer instructions, the controller performs the various steps of the laser parameter setting method flow for injecting faults into memory shown in the above method embodiment.

[0151] In another embodiment of this application, a computer program product is also provided, which includes computer instructions that, when executed on a controller, cause the controller to perform the various steps of the laser parameter setting method flow for injecting faults into memory as shown in the above method embodiment.

[0152] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any combination thereof. When implemented using software programs, the above embodiments can be implemented, in whole or in part, as a computer program product. This computer program product includes one or more computer instructions. When these computer instructions are loaded and executed on a computer, all or part of the flow or function according to the embodiments of this application is generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a server, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device containing one or more servers, data centers, etc., that can be integrated with the medium. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state disks, SSDs).

[0153] The above description is merely a specific embodiment of this application. Any variations or substitutions conceived by those skilled in the art based on the specific embodiments provided in this application should be covered within the protection scope of this application.

Claims

1. A method for setting laser parameters to inject faults into memory, characterized in that, include: Determine the parameter information of the pulsed laser; the parameter information includes the physical properties of the pulsed laser; The physical properties of the pulsed laser include the wavelength of the pulsed laser, which is within a preset wavelength range. The wavelengths within the preset wavelength range are wavelengths that can induce a single-event effect on the wafer and can penetrate the wafer. The single-event effect can cause physical failures in the memory. The physical properties of the pulsed laser also include the spot size of the pulsed laser; the larger the memory failure particle size, the larger the spot size of the pulsed laser. Based on the parameter information, a control signal is generated; the control signal includes the parameter information. The control signal is sent to the laser generator; wherein the control signal is used to instruct the laser generator to generate the pulsed laser based on the parameter information; the pulsed laser is used to irradiate the wafer surface of the memory to be injected with a fault, so as to cause a memory fault to occur on the irradiated wafer surface; The parameter information also includes the peak power of the pulsed laser and the irradiation time of the pulsed laser. Determining the parameter information of the pulsed laser includes: Based on the memory fault type, the peak power of the pulsed laser and the irradiation time of the pulsed laser are determined; the memory fault type includes correctable fault type or uncorrectable fault type; the peak power of the pulsed laser is equal to the average power of the pulsed laser / (the frequency of the pulsed laser * the pulse width of the pulsed laser).

2. The method according to claim 1, characterized in that, The parameter information for determining the pulsed laser includes: The wavelength of the pulsed laser is determined based on the material properties and thickness of the memory wafer; wherein, the material properties of the memory wafer include the bandgap width, the larger the bandgap width, the shorter the wavelength of the pulsed laser; the thicker the memory wafer, the longer the wavelength of the pulsed laser.

3. The method according to claim 2, characterized in that, When the wafer of the memory is silicon and the thickness of the memory wafer is 1mm, the wavelength is in the range of [1030nm, 1107nm].

4. The method according to claim 1, characterized in that, When the peak power is less than the first threshold and the irradiation time of the pulsed laser is less than or equal to the second threshold, the physical fault type is a correctable fault type. When the peak power is greater than or equal to the first threshold, the irradiation time of the pulsed laser is greater than or equal to the second threshold, the type of physical fault is an uncorrectable fault type; the first threshold is the laser damage threshold of the wafer.

5. The method according to any one of claims 1 to 4, characterized in that, The parameter information also includes the target position of the pulsed laser spot on the wafer surface of the memory, and the parameter information for determining the pulsed laser includes: The target location is determined based on the physical location of the wafer to be injected with the fault in the memory; wherein, the target location is the physical location.

6. The method according to claim 5, characterized in that, The control signal is also used to control the laser generator to move so that the position of the pulsed laser spot on the wafer surface of the memory is the target position.

7. The method according to claim 1, characterized in that, The parameter information also includes the distance between the laser generator's beam outlet and the wafer surface to be injected with the fault, and the angle between the pulsed laser beam and the wafer surface to be injected with the fault. The parameter information for determining the pulsed laser includes: Based on the distance between the output port of the laser and the focal point of the pulsed laser, the distance between the output port of the laser generator and the wafer surface to be injected with the fault is determined; wherein, the distance between the output port of the laser generator and the wafer surface to be injected with the fault is equal to the distance between the output port and the focal point of the pulsed laser, and the angle between the beam of the pulsed laser and the wafer surface to be injected with the fault is in the range of [80°, 90°].

8. The method according to claim 7, characterized in that, The control signal is also used to control the laser generator to move such that the distance between the laser generator's beam outlet and the wafer surface to be injected with the fault is equal to the distance between the beam outlet and the focal point of the pulsed laser, and the angle between the pulsed laser beam and the wafer surface to be injected with the fault is in the range of [80°, 90°].

9. A method for verifying memory performance, characterized in that, Applied to a computing device, the method includes: Receive an instruction to enable the memory ECS function; the instruction is used to instruct the computing device to enable the memory ECS function; the memory ECS function is used to periodically inspect the data stored in the memory; Collect first fault information; the first fault information is information recorded in the memory before a memory fault occurs on the wafer surface irradiated by the pulsed laser; the parameters of the pulsed laser are set according to the laser parameter setting method for injecting faults into the memory according to any one of claims 1 to 8; Collect second fault information; the second fault information is the information recorded in the memory after a memory fault occurs on the wafer surface irradiated by the pulsed laser. Collect third fault information; the third fault information is information recorded in the memory after a preset time period following a memory fault occurring on the wafer surface irradiated by the pulsed laser. The memory performance is verified based on the first fault information, the second fault information, and the third fault information.

10. The method according to claim 9, characterized in that, The computing device includes a baseboard management controller (BMC), and the first fault information, the second fault information, and the third fault information are collected by the BMC.

11. A computing device, characterized in that, include: One or more processors, memory, and baseboard management controllers (BMCs); The processor shown is used to receive instructions and enable memory error checking and ECS cleanup functions; The memory is used to receive pulsed laser irradiation to generate a memory fault; the parameters of the pulsed laser are set according to the laser parameter setting method for injecting faults into the memory as described in any one of claims 1 to 8. The BMC is used to collect first fault information before receiving the pulsed laser irradiation, second fault information after receiving the pulsed laser irradiation, and third fault information after a preset time period after receiving the pulsed laser irradiation.

12. A controller, characterized in that, The system includes a memory and a processor; the memory and the processor are coupled; the memory is used to store computer program code, the computer program code including computer instructions; wherein, when the processor executes the computer instructions, it causes the controller to perform the laser parameter setting method for injecting faults into memory as described in any one of claims 1-8.

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