Display substrate and display device

Abstract

The application provides a display substrate and a display device, and relates to the technical field of display, and aims to solve the problem that the current through a polysilicon thin film transistor is different during the pixel reset, compensation and other stages of a display product, thereby affecting the low gray scale display quality of the display product when the display product is manufactured by using an ELA process. The display substrate comprises a first reset signal line and a plurality of sub-pixels; the sub-pixel comprises a sub-pixel driving circuit and a light emitting element; the sub-pixel driving circuit comprises a light emitting reset transistor; the first reset signal line comprises at least part extending along a first direction; the light emitting reset transistor comprises a light emitting reset active pattern, the light emitting reset active pattern is used for forming a channel part of the light emitting reset transistor, a first pole of the light emitting reset transistor and a second pole of the light emitting reset transistor, the light emitting reset active pattern extends along a second direction, the second direction has a first included angle with the first direction, and the first included angle is less than 90 degrees.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a display substrate and a display device. Background Technology

[0002] With the increasing demand for high resolution, fast response speed, and narrow bezels in the flat panel display industry, polycrystalline silicon thin-film transistors (TFTs) have attracted widespread attention. Compared to amorphous silicon TFTs, polycrystalline silicon TFTs formed by excimer laser crystallization (ELA) have higher carrier mobility and lower material costs, thus research in this field has been quite active in recent years.

[0003] When polycrystalline silicon thin-film transistors (TFTs) are fabricated using the ELA process in display products, due to the hardware structure of the equipment, the angle at which the laser hits the pixel is approximately 1°. Furthermore, fluctuations in the process itself cause uneven laser energy. During the fabrication of TFTs in display products using the ELA process, interference regions are generated between the laser and the polycrystalline silicon film layer. This results in different crystallinity levels in different areas of the TFTs, leading to variations in their characteristics. Consequently, during pixel reset and compensation stages, the current flowing through the TFTs differs, affecting the low-grayscale display quality of the display product. Summary of the Invention

[0004] The purpose of this invention is to provide a display substrate and a display device to solve the problem that when polysilicon thin-film transistors are fabricated using ELA technology, the different currents flowing through the polysilicon thin-film transistors during pixel reset, compensation, and other stages affect the low grayscale display quality of the display product.

[0005] To achieve the above objectives, the present invention provides the following technical solution:

[0006] A first aspect of the present invention provides a display substrate, comprising: a substrate, and a first reset signal line, a first initialization signal line, and a plurality of sub-pixels disposed on the substrate; each sub-pixel includes a sub-pixel driving circuit and a light-emitting element; the sub-pixel driving circuit includes:

[0007] A light-emitting reset transistor, wherein the gate of the light-emitting reset transistor is coupled to the corresponding first reset signal line, the first terminal of the light-emitting reset transistor is coupled to the first initialization signal line, and the second terminal of the light-emitting reset transistor is coupled to the light-emitting element;

[0008] The first reset signal line includes at least a portion extending along a first direction;

[0009] The light-emitting reset transistor includes a light-emitting reset active pattern, which is used to form the channel portion of the light-emitting reset transistor, a first electrode and a second electrode of the light-emitting reset transistor, and the light-emitting reset active pattern extends along a second direction, with a first angle between the second direction and the first direction, the first angle being less than 90 degrees.

[0010] Optionally, the sub-pixel driving circuit further includes: a driving transistor and a compensation transistor; the first terminal of the compensation transistor is coupled to the second terminal of the driving transistor, and the second terminal of the compensation transistor is coupled to the gate of the driving transistor;

[0011] The compensation transistor includes a compensation active pattern, the compensation active pattern being used to form the channel portion of the compensation transistor, the first electrode of the compensation transistor, and the second electrode of the compensation transistor;

[0012] The compensated active pattern extends along a third direction, and the third direction has a second angle with the first direction, the second angle being less than 90 degrees.

[0013] Optionally, the driving transistor includes a driving active pattern, which includes a first part to a fifth part connected end to end in sequence;

[0014] The first part, the third part and the fifth part all extend along the first direction, the second part and the fourth part all extend along the fourth direction, and the fourth direction has a third angle with the first direction, the third angle being less than 90 degrees.

[0015] Optionally, the sub-pixel driving circuit further includes a light-emitting control transistor, wherein the first terminal of the light-emitting control transistor is coupled to the second terminal of the driving transistor, and the second terminal of the light-emitting control transistor is coupled to the second terminal of the light-emitting reset transistor;

[0016] The light-emitting control transistor includes a light-emitting control active pattern, which is used to form the channel portion of the light-emitting control transistor, the first electrode of the light-emitting control transistor, and the second electrode of the light-emitting control transistor;

[0017] The light-emitting active pattern extends along a fifth direction, and the fifth direction has a fourth angle with the first direction, the fourth angle being less than 90 degrees.

[0018] Optionally, the second direction is parallel to the third direction; and / or,

[0019] The fourth direction is parallel to the fifth direction; and / or,

[0020] The second direction intersects with the fourth direction.

[0021] Optionally, the first included angle is between 45 degrees and 75 degrees; and / or,

[0022] The second included angle is between 45 degrees and 75 degrees; and / or,

[0023] The third included angle is between 45 degrees and 75 degrees; and / or,

[0024] The fourth included angle is between 45 degrees and 75 degrees.

[0025] Optionally, the display substrate further includes a data line; the sub-pixel driving circuit further includes a data writing transistor, the first terminal of the data writing transistor being coupled to the corresponding data line, and the second terminal of the data writing transistor being coupled to the first terminal of the driving transistor.

[0026] The data writing transistor includes a data writing active pattern, which is used to form the channel portion of the data writing transistor, a first electrode of the data writing transistor, and a second electrode of the data writing transistor.

[0027] The data is written to the active graphic, which extends along a sixth direction. The sixth direction has a fifth angle with the first direction, and the fifth angle is less than 90 degrees.

[0028] Optionally, the display substrate further includes a power line; the sub-pixel driving circuit further includes a power control transistor, the first terminal of which is coupled to the power line, and the second terminal of which is coupled to the first terminal of the driving transistor.

[0029] The power control transistor includes a power control active pattern, which is used to form the channel portion of the power control transistor, the first electrode of the power control transistor, and the second electrode of the power control transistor.

[0030] The power control active pattern extends along a seventh direction, and the seventh direction has a sixth angle with the first direction, the sixth angle being less than 90 degrees.

[0031] Optionally, the display substrate further includes a second reset signal line and a second initialization signal line; the sub-pixel driving circuit further includes a first reset transistor, the gate of the first reset transistor is coupled to the corresponding second reset signal line, the first electrode of the first reset transistor is coupled to the second initialization signal line, and the second electrode of the first reset transistor is coupled to the gate of the driving transistor.

[0032] The first reset transistor includes a first reset active pattern, which is used to form the channel portion of the first reset transistor, a first electrode of the first reset transistor, and a second electrode of the second reset transistor.

[0033] The second reset active pattern extends along an eighth direction, and the eighth direction has a seventh angle with the first direction, the seventh angle being less than 90 degrees.

[0034] Optionally, the display substrate further includes a reference signal line; the sub-pixel driving circuit further includes a second reset transistor, the gate of the second reset transistor being coupled to the corresponding first reset signal line, the first terminal of the second reset transistor being coupled to the reference signal line, and the second terminal of the second reset transistor being coupled to the first terminal of the driving transistor;

[0035] The second reset transistor further includes a second reset active pattern, which is used to form the channel portion of the second reset transistor, the first electrode of the second reset transistor, and the second electrode of the second reset transistor;

[0036] The second reset active pattern extends along a ninth direction, and the ninth direction has an eighth angle with the first direction, the eighth angle being less than 90 degrees.

[0037] Optionally, the sixth direction is parallel to the third direction; and / or,

[0038] The seventh direction is parallel to the fifth direction; and / or,

[0039] The eighth direction is parallel to the second direction; and / or,

[0040] The ninth direction is parallel to the second direction.

[0041] Based on the above-described display substrate technical solution, a second aspect of the present invention provides a display device including the above-described display substrate.

[0042] In the technical solution provided by the present invention, by setting the first reset signal line to include at least a portion extending along a first direction, and the light-emitting reset active pattern extending along a second direction, with a first angle between the second direction and the first direction, the first angle being less than 90 degrees, the light-emitting reset active pattern extends a shorter distance in the vertical direction perpendicular to the first direction. This avoids the light-emitting reset active pattern from forming an interference region with the ELA laser during the ELA process, thereby reducing the differences in the characteristics of the light-emitting reset transistors in different regions, improving the low grayscale image quality of the display substrate, and avoiding the formation of large areas of dirt. Attached Figure Description

[0043] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this invention, illustrate exemplary embodiments of the invention and are used to explain the invention, but do not constitute an undue limitation of the invention. In the drawings:

[0044] Figure 1 This is a circuit structure diagram of the sub-pixel driving circuit provided in an embodiment of the present invention;

[0045] Figure 2 A schematic diagram of the layout of the active layer included in the sub-pixel provided in an embodiment of the present invention;

[0046] Figure 3 A schematic diagram of the layout of the active layer included in the sub-pixel provided in an embodiment of the present invention;

[0047] Figure 4 A schematic diagram of ELA laser interference when the fourth included angle is equal to 45 degrees, provided for an embodiment of the present invention;

[0048] Figure 5 A schematic diagram of ELA laser interference when the fourth included angle is equal to 60 degrees, provided for an embodiment of the present invention;

[0049] Figure 6 A schematic diagram of ELA laser interference when the fourth included angle is equal to 75 degrees, provided for an embodiment of the present invention. Detailed Implementation

[0050] To further illustrate the display substrate and display device provided in the embodiments of the present invention, a detailed description is provided below with reference to the accompanying drawings.

[0051] Based on the problems existing in the background technology, research has found that in current low-temperature polycrystalline silicon oxide (LTPO) technology development projects, different pixel designs lead to different levels of low grayscale image quality. When the pixels in the display product are all designed with a vertical structure, they are prone to forming interference areas with the ELA laser, causing differences in the characteristics of low-temperature polycrystalline silicon transistors in different areas, which in turn leads to poor low grayscale image quality and the formation of large areas of dirt.

[0052] Based on the above findings, this application improves the pixel design and provides the following technical solution.

[0053] Please see Figures 1 to 3 This invention provides a display substrate, comprising: a substrate, and a first reset signal line Reset1, a first initialization signal line Vini1, and a plurality of sub-pixels disposed on the substrate; each sub-pixel includes a sub-pixel driving circuit and a light-emitting element; the sub-pixel driving circuit includes:

[0054] The light-emitting reset transistor T7 has its gate coupled to the corresponding first reset signal line Reset1, its first terminal coupled to the first initialization signal line Vini1, and its second terminal coupled to the light-emitting element EL.

[0055] The first reset signal line Reset1 includes at least a portion extending along a first direction;

[0056] The light-emitting reset transistor T7 includes a light-emitting reset active pattern 70, which is used to form the channel portion of the light-emitting reset transistor T7, a first electrode and a second electrode of the light-emitting reset transistor T7, and the light-emitting reset active pattern 70 extends along a second direction, with a first angle a1 between the second direction and the first direction, the first angle a1 being less than 90 degrees.

[0057] For example, the display substrate includes a plurality of sub-pixels, and the plurality of sub-pixel driving circuits included in the plurality of sub-pixel ...

[0058] For example, the sub-pixel includes a sub-pixel driving circuit and a light-emitting element. The sub-pixel driving circuit is coupled to the anode of the light-emitting element and is used to provide a driving signal to the light-emitting element to drive it to emit light.

[0059] For example, the sub-pixel driving circuit includes a 9T1C (i.e., 9 transistors and one capacitor) circuit structure, but is not limited to this.

[0060] For example, the sub-pixel driving circuit includes a light-emitting reset transistor T7. The second terminal of the light-emitting reset transistor T7 is coupled to the anode of the light-emitting element EL. Under the control of the corresponding first reset signal line Reset1, it provides the first initialization signal transmitted by the first initialization signal line Vini1 to the anode of the light-emitting element EL, thereby resetting the anode of the light-emitting element EL. The cathode of the light-emitting element EL receives the negative power supply signal VSS.

[0061] For example, the light-emitting reset transistor T7 includes a low-temperature polycrystalline silicon transistor.

[0062] For example, the first included angle a1 is less than 90 degrees, or the first included angle a1 is less than or equal to 85 degrees, or the first included angle a1 is less than or equal to 80 degrees.

[0063] As can be seen from the specific structure of the display substrate described above, in the display substrate provided by the embodiments of the present invention, by setting the first reset signal line Reset1 to include at least a portion extending along a first direction, and the light-emitting reset active pattern 70 extending along a second direction, with a first angle a1 between the second direction and the first direction, the first angle a1 being less than 90 degrees; this makes the light-emitting reset active pattern 70 extend a shorter distance in the vertical direction perpendicular to the first direction, avoiding the formation of an interference region between the light-emitting reset active pattern 70 and the ELA laser during the ELA process, thereby reducing the differences in the characteristics of the light-emitting reset transistor T7 in different regions, ensuring that there is no difference in the pre-charge voltage of the anode of the light-emitting element, improving the low grayscale image quality of the display substrate, and avoiding the formation of large-area dirt.

[0064] like Figures 1 to 3 As shown, in some embodiments, the sub-pixel driving circuit further includes: a driving transistor T3 and a compensation transistor T2; the first terminal of the compensation transistor T2 is coupled to the second terminal of the driving transistor T3, and the second terminal of the compensation transistor T2 is coupled to the gate of the driving transistor T3;

[0065] The compensation transistor T2 includes a compensation active pattern 20, which is used to form the channel portion of the compensation transistor T2, the first electrode of the compensation transistor T2, and the second electrode of the compensation transistor T2.

[0066] The compensated active pattern 20 extends along a third direction, and the third direction has a second included angle a2 with the first direction, the second included angle a2 being less than 90 degrees.

[0067] For example, the display substrate includes multiple first gate lines Gate_P, and the gate of the compensation transistor T2 is coupled to the corresponding first gate line Gate_P.

[0068] For example, the sub-pixel driving circuit further includes an oxide transistor T8, and the second terminal of the compensation transistor T2 is coupled to the gate of the driving transistor T3 through the oxide transistor T8. For example, the display substrate further includes multiple second gate lines Gate_N, the gate of the oxide transistor T8 is coupled to the corresponding second gate line Gate_N, the first terminal of the oxide transistor T8 is coupled to the second terminal of the compensation transistor T2, and the second terminal of the oxide transistor T8 is coupled to the gate of the driving transistor T3.

[0069] For example, the compensation transistor T2 includes a low-temperature polycrystalline silicon transistor.

[0070] For example, the second included angle a2 is less than 90 degrees, or the second included angle a2 is less than or equal to 85 degrees, or the second included angle a2 is less than or equal to 80 degrees.

[0071] In the display substrate provided in the above embodiments, by setting the compensation active pattern 20 to extend along a third direction, and the third direction having a second included angle a2 with the first direction, the second included angle a2 being less than 90 degrees, the compensation active pattern 20 extends a shorter distance in the vertical direction perpendicular to the first direction. This avoids the formation of an interference region between the compensation active pattern 20 and the ELA laser during the ELA process, thereby reducing the difference in the T2 characteristics of the compensation transistors in different regions, ensuring that the driving transistors are turned on at a consistent level in low grayscale images, and thus improving the low grayscale image quality of the display substrate and avoiding the formation of large areas of dirt.

[0072] like Figures 1 to 3 As shown, in some embodiments, the driving transistor T3 includes a driving active pattern 30, which includes a first portion 301 to a fifth portion 305 connected end to end in sequence.

[0073] The first part 301, the third part 303 and the fifth part 305 all extend along the first direction, and the second part 302 and the fourth part 304 all extend along the fourth direction. The fourth direction and the first direction have a third included angle a3, which is less than 90 degrees.

[0074] For example, the driven active pattern 30 includes a first portion 301, a second portion 302, a third portion 303, a fourth portion 304, and a fifth portion 305 connected end to end in sequence. The second portion 302, the third portion 303, and the fourth portion 304 form an inclined U-shaped structure.

[0075] For example, the driving transistor T3 includes a low-temperature polycrystalline silicon transistor.

[0076] For example, the third included angle a3 is less than 90 degrees, or the third included angle a3 is less than or equal to 85 degrees, or the third included angle a3 is less than or equal to 80 degrees.

[0077] In the display substrate provided in the above embodiments, by setting the second part 302 and the fourth part 304 to both extend along the fourth direction, and the fourth direction having a third included angle a3 with the first direction, the third included angle a3 being less than 90 degrees, the driving active pattern 30 extends a shorter distance in the vertical direction perpendicular to the first direction, avoiding the formation of an interference region between the driving active pattern 30 and the ELA laser during the ELA process, thereby reducing the difference in the T3 characteristics of the driving transistors in different regions, improving the low grayscale image quality of the display substrate, and avoiding the formation of large areas of dirt.

[0078] like Figures 1 to 3 As shown, in some embodiments, the sub-pixel driving circuit further includes a light-emitting control transistor T6, the first terminal of which is coupled to the second terminal of the driving transistor T3, and the second terminal of which is coupled to the second terminal of the light-emitting reset transistor T7;

[0079] The light-emitting control transistor T6 includes a light-emitting control active pattern 60, which is used to form the channel portion of the light-emitting control transistor T6, the first electrode of the light-emitting control transistor T6, and the second electrode of the light-emitting control transistor T6.

[0080] The light-emitting active pattern 60 extends along a fifth direction, and the fifth direction has a fourth included angle a4 with the first direction, the fourth included angle a4 being less than 90 degrees.

[0081] For example, the display substrate includes multiple light-emitting control signal lines EM, and the gate of the light-emitting control transistor T6 is coupled to the corresponding light-emitting control signal line EM.

[0082] For example, the light-emitting control transistor T6 includes a low-temperature polycrystalline silicon transistor.

[0083] For example, the fourth included angle a4 is less than 90 degrees, or the fourth included angle a4 is less than or equal to 85 degrees, or the fourth included angle a4 is less than or equal to 80 degrees.

[0084] In the display substrate provided in the above embodiments, by setting the light-emitting active pattern 60 to extend along a fifth direction, and the fifth direction having a fourth included angle a4 with the first direction, the fourth included angle a4 being less than 90 degrees, the light-emitting active pattern 60 extends a shorter distance in the vertical direction perpendicular to the first direction. This avoids the light-emitting active pattern 60 from forming an interference region with the ELA laser during the ELA process, thereby reducing the differences in the characteristics of the light-emitting control transistor T6 in different regions, improving the low grayscale image quality of the display substrate, and avoiding the formation of large areas of dirt.

[0085] In some embodiments, the second direction is parallel to the third direction; and / or, the fourth direction is parallel to the fifth direction; and / or, the second direction intersects the fourth direction.

[0086] For example, the second direction is parallel to the third direction, the fourth direction is parallel to the fifth direction, and the second direction intersects with the fourth direction.

[0087] The above configuration allows for the formation of a bent active layer in the display substrate, thereby forming a bent pixel structure. This better reduces the characteristic differences of low-temperature polysilicon thin-film transistors caused by ELA laser interference, especially improving the characteristic differences of key thin-film transistors in the reset and compensation stages, thus effectively improving poor low-grayscale image quality.

[0088] like Figures 1 to 3 As shown, in some embodiments, the first included angle a1 is between 45 degrees and 75 degrees; and / or, the second included angle a2 is between 45 degrees and 75 degrees; and / or, the third included angle a3 is between 45 degrees and 75 degrees; and / or, the fourth included angle a4 is between 45 degrees and 75 degrees.

[0089] For example, the first included angle a1 can take values ​​including 45 degrees, 50 degrees, 55 degrees, 60 degrees, 65 degrees, 70 degrees, 75 degrees, etc., but is not limited to these.

[0090] For example, the second included angle a2 can take values ​​including 45 degrees, 50 degrees, 55 degrees, 60 degrees, 65 degrees, 70 degrees, 75 degrees, etc., but is not limited to these.

[0091] For example, the included angle a3 can take values ​​of 45 degrees, 50 degrees, 55 degrees, 60 degrees, 65 degrees, 70 degrees, 75 degrees, etc., but is not limited to these.

[0092] For example, the fourth included angle a4 can take values ​​including: 45 degrees, 50 degrees, 55 degrees, 60 degrees, 65 degrees, 70 degrees, 75 degrees, etc., but is not limited to these.

[0093] The above configuration minimizes the impact of ELA laser interference, effectively improving low-grayscale image quality. It also avoids limitations on pixel horizontal arrangement, ensuring the resolution of the display substrate. Figure 4 A schematic diagram of ELA laser interference when the fourth included angle is equal to 45 degrees, provided for an embodiment of the present invention; Figure 5 A schematic diagram of ELA laser interference when the fourth included angle is equal to 60 degrees, provided for an embodiment of the present invention; Figure 6 A schematic diagram of ELA laser interference when the fourth included angle is equal to 75 degrees, provided for an embodiment of the present invention.

[0094] like Figures 1 to 3 As shown, in some embodiments, the display substrate further includes a data line Data; the sub-pixel driving circuit further includes a data writing transistor T4, the first terminal of the data writing transistor T4 being coupled to the corresponding data line Data, and the second terminal of the data writing transistor T4 being coupled to the first terminal of the driving transistor T3;

[0095] The data writing transistor T4 includes a data writing active pattern 40, which is used to form the channel portion of the data writing transistor T4, the first electrode of the data writing transistor T4, and the second electrode of the data writing transistor T4.

[0096] The data is written to the active graphic 40, which extends along a sixth direction. The sixth direction and the first direction have a fifth included angle a5, which is less than 90 degrees.

[0097] For example, the display substrate further includes multiple first gate lines Gate_P, and the gate of the data writing transistor T4 is coupled to the corresponding first gate line Gate_P.

[0098] For example, the data writing transistor T4 includes a low-temperature polycrystalline silicon transistor.

[0099] For example, the fifth included angle a5 is less than 90 degrees, or the fifth included angle a5 is less than or equal to 85 degrees, or the fifth included angle a5 is less than or equal to 80 degrees.

[0100] In the display substrate provided in the above embodiments, by setting the data writing active pattern 40 to extend along a sixth direction, and the sixth direction having a fifth included angle a5 with the first direction, the fifth included angle a5 being less than 90 degrees, the data writing active pattern 40 extends a shorter distance in the vertical direction perpendicular to the first direction. This avoids the formation of an interference region between the data writing active pattern 40 and the ELA laser during the ELA process, thereby reducing the differences in the T4 characteristics of the data writing transistors in different regions, improving the low grayscale image quality of the display substrate, and avoiding the formation of large areas of dirt.

[0101] like Figures 1 to 3 As shown, in some embodiments, the display substrate further includes a power line VDD; the sub-pixel driving circuit further includes a power control transistor T5, the first terminal of which is coupled to the power line VDD, and the second terminal of which is coupled to the first terminal of the driving transistor T3.

[0102] The power control transistor T5 includes a power control active pattern 50, which is used to form the channel portion of the power control transistor T5, the first electrode of the power control transistor T5, and the second electrode of the power control transistor T5.

[0103] The power control active pattern 50 extends along a seventh direction, and the seventh direction has a sixth included angle a6 with the first direction, the sixth included angle a6 being less than 90 degrees.

[0104] For example, the display substrate further includes multiple light-emitting control signal lines EM, and the gate of the power control transistor T5 is coupled to the corresponding light-emitting control signal line EM.

[0105] For example, the power control transistor T5 includes a low-temperature polycrystalline silicon transistor.

[0106] For example, the sixth included angle a6 is less than 90 degrees, or the sixth included angle a6 is less than or equal to 85 degrees, or the sixth included angle a6 is less than or equal to 80 degrees.

[0107] In the display substrate provided in the above embodiments, by setting the power control active pattern 50 to extend along a seventh direction, and the seventh direction having a sixth included angle a6 with the first direction, the sixth included angle a6 being less than 90 degrees, the power control active pattern 50 extends a shorter distance in the vertical direction perpendicular to the first direction. This avoids the formation of an interference region between the power control active pattern 50 and the ELA laser during the ELA process, thereby reducing the differences in the T5 characteristics of the power control transistors in different regions, improving the low grayscale image quality of the display substrate, and avoiding the formation of large areas of dirt.

[0108] like Figures 1 to 3 As shown, in some embodiments, the display substrate further includes a second reset signal line Reset_P and a second initialization signal line Vini2; the sub-pixel driving circuit further includes a first reset transistor T1, the gate of the first reset transistor T1 is coupled to the corresponding second reset signal line Reset_P, the first terminal of the first reset transistor T1 is coupled to the second initialization signal line Vini2, and the second terminal of the first reset transistor T1 is coupled to the gate of the driving transistor T3;

[0109] The first reset transistor T1 includes a first reset active pattern 10, which is used to form the channel portion of the first reset transistor T1, the first electrode of the first reset transistor T1, and the second electrode of the second reset transistor T9.

[0110] The second reset active pattern 90 extends along an eighth direction, and the eighth direction has a seventh included angle a7 with the first direction, the seventh included angle a7 being less than 90 degrees.

[0111] For example, the second terminal of the first reset transistor T1 is coupled to the gate of the driving transistor T3 through the oxide transistor T8. For example, the second terminal of the first reset transistor T1 is coupled to the first terminal of the oxide transistor T8, and the second terminal of the oxide transistor T8 is coupled to the gate of the driving transistor T3. The first reset transistor T1, under the control of the second reset signal line Reset_P, provides the second initialization signal provided by the second initialization signal line Vini2 to the gate of the driving transistor T3, thereby resetting the gate of the driving transistor T3.

[0112] For example, the first reset transistor T1 includes a low-temperature polysilicon transistor.

[0113] For example, the seventh included angle a7 is less than 90 degrees, or the seventh included angle a7 is less than or equal to 85 degrees, or the seventh included angle a7 is less than or equal to 80 degrees.

[0114] For example, the first reset transistor T1 in the current row sub-pixel shares the first reset signal line Reset1 with the light-emitting reset transistor T7 in the adjacent previous row sub-pixel. That is, the first reset signal line Reset1 connected to the light-emitting reset transistor T7 in the adjacent previous row sub-pixel is multiplexed into the second reset signal line Reset_P connected to the first reset transistor T1 in the current row sub-pixel.

[0115] In the display substrate provided in the above embodiments, by setting the second reset active pattern 90 to extend along the eighth direction, and the eighth direction having a seventh included angle a7 with the first direction, the seventh included angle a7 being less than 90 degrees, the first reset active pattern 10 extends a shorter distance in the vertical direction perpendicular to the first direction, avoiding the formation of an interference region between the first reset active pattern 10 and the ELA laser during the ELA process, thereby reducing the difference in the characteristics of the first reset transistor T1 in different regions, improving the low grayscale image quality of the display substrate, and avoiding the formation of large-area dirt.

[0116] like Figures 1 to 3As shown, in some embodiments, the display substrate further includes a reference signal line Vref; the sub-pixel driving circuit further includes a second reset transistor T9, the gate of the second reset transistor T9 is coupled to the corresponding first reset signal line Reset1, the first terminal of the second reset transistor T9 is coupled to the reference signal line Vref, and the second terminal of the second reset transistor T9 is coupled to the first terminal of the driving transistor T3;

[0117] The second reset transistor T9 further includes a second reset active pattern 90, which is used to form the channel portion of the second reset transistor T9, the first electrode of the second reset transistor T9, and the second electrode of the second reset transistor T9.

[0118] The second reset active pattern 90 extends along a ninth direction, and the ninth direction has an eighth included angle a8 with the first direction, the eighth included angle a8 being less than 90 degrees.

[0119] For example, the second reset transistor T9 includes a low-temperature polysilicon transistor.

[0120] For example, the eighth included angle a8 is less than 90 degrees, or the eighth included angle a8 is less than or equal to 85 degrees, or the eighth included angle a8 is less than or equal to 80 degrees.

[0121] In the display substrate provided in the above embodiments, by setting the second reset active pattern 90 to extend along the ninth direction, and the ninth direction having an eighth included angle a8 with the first direction, the eighth included angle a8 being less than 90 degrees, the extension distance of the second reset active pattern 90 in the vertical direction perpendicular to the first direction is relatively short. This avoids the formation of an interference region between the second reset active pattern 90 and the ELA laser during the ELA process, thereby reducing the differences in the characteristics of the second reset transistor T9 in different regions, improving the low grayscale image quality of the display substrate, and avoiding the formation of large areas of dirt.

[0122] In some embodiments, the sixth direction is parallel to the third direction; and / or, the seventh direction is parallel to the fifth direction; and / or, the eighth direction is parallel to the second direction; and / or, the ninth direction is parallel to the second direction.

[0123] The above configuration allows for the formation of a bent active layer in the display substrate, thereby creating a bent pixel structure. This better reduces the characteristic differences in low-temperature polysilicon thin-film transistors caused by ELA laser interference, and thus effectively improves poor low-grayscale image quality.

[0124] The above configuration can reduce the layout space occupied by sub-pixels, which is beneficial to improving the resolution of the display substrate.

[0125] This invention also provides a display device, including the display substrate provided in the above embodiments.

[0126] It should be noted that the display device can be any product or component with display function, such as a television, monitor, digital photo frame, mobile phone, or tablet computer. The display device also includes flexible circuit boards, printed circuit boards, and backplanes.

[0127] In the display substrate provided in the above embodiments, the active pattern of each sub-pixel extends a short distance in the vertical direction perpendicular to the first direction, avoiding the formation of interference areas between the active pattern and the ELA laser during the ELA process. This reduces the differences in thin-film transistor characteristics in different regions, improves the low grayscale image quality of the display substrate, and avoids the formation of large-area contamination.

[0128] The display device provided in the embodiments of the present invention, when including the above-described display substrate, also has the above-described beneficial effects, which will not be repeated here.

[0129] It should be noted that the signal line extending along the X direction means that the signal line includes a main part and a secondary part connected to the main part. The main part is a line, line segment, or strip-shaped body. The main part extends along the X direction, and the length of the main part extending along the X direction is greater than the length of the secondary part extending in other directions.

[0130] It should be noted that, in the embodiments of the present invention, "same layer" can refer to film layers located on the same structural layer. Alternatively, for example, film layers located on the same layer can be layer structures formed by using the same film deposition process to form a specific pattern, and then patterning the film layer using the same photomask through a single patterning process. Depending on the specific pattern, the single patterning process may include multiple exposure, development, or etching processes, and the specific pattern in the formed layer structure can be continuous or discontinuous. These specific patterns may also be at different heights or have different thicknesses.

[0131] In the various method embodiments of the present invention, the sequence numbers of each step are not intended to limit the order of the steps. For those skilled in the art, any changes in the order of the steps without creative effort are also within the scope of protection of the present invention.

[0132] It should be noted that the various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the method embodiments are basically similar to the product embodiments, so the description is relatively simple, and the relevant parts can be referred to the description of the product embodiments.

[0133] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as “connection,” “coupled,” or “linked” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as “upper,” “lower,” “left,” and “right” are used only to indicate relative positional relationships; these relative positional relationships may change accordingly when the absolute position of the described object changes.

[0134] It is understandable that when a component such as a layer, film, region, or substrate is referred to as being "above" or "below" another component, the component may be "directly" located "above" or "below" the other component, or there may be intermediate components present.

[0135] In the description of the above embodiments, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0136] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A display substrate, characterized in that, include: A substrate, and a first reset signal line, a first initialization signal line and a plurality of sub-pixels disposed on the substrate; The sub-pixel includes a sub-pixel driving circuit and a light-emitting element; The sub-pixel driving circuit includes: A light-emitting reset transistor, wherein the gate of the light-emitting reset transistor is coupled to the corresponding first reset signal line, the first terminal of the light-emitting reset transistor is coupled to the first initialization signal line, and the second terminal of the light-emitting reset transistor is coupled to the light-emitting element; The first reset signal line includes at least a portion extending along a first direction; The light-emitting reset transistor includes a light-emitting reset active pattern, which is used to form the channel portion of the light-emitting reset transistor, a first electrode and a second electrode of the light-emitting reset transistor, and the light-emitting reset active pattern extends along a second direction, with a first angle between the second direction and the first direction, the first angle being less than 90 degrees.

2. The display substrate according to claim 1, characterized in that, The sub-pixel driving circuit further includes: a driving transistor and a compensation transistor; the first terminal of the compensation transistor is coupled to the second terminal of the driving transistor, and the second terminal of the compensation transistor is coupled to the gate of the driving transistor; The compensation transistor includes a compensation active pattern, the compensation active pattern being used to form the channel portion of the compensation transistor, the first electrode of the compensation transistor, and the second electrode of the compensation transistor; The compensated active pattern extends along a third direction, and the third direction has a second angle with the first direction, the second angle being less than 90 degrees.

3. The display substrate according to claim 2, characterized in that, The driving transistor includes a driving active pattern, which includes a first part to a fifth part connected end to end in sequence. The first part, the third part and the fifth part all extend along the first direction, and the second part and the fourth part all extend along the fourth direction. The fourth direction and the first direction have a third angle, which is less than 90 degrees.

4. The display substrate according to claim 3, characterized in that, The sub-pixel driving circuit further includes a light-emitting control transistor, wherein the first terminal of the light-emitting control transistor is coupled to the second terminal of the driving transistor, and the second terminal of the light-emitting control transistor is coupled to the second terminal of the light-emitting reset transistor; The light-emitting control transistor includes a light-emitting control active pattern, which is used to form the channel portion of the light-emitting control transistor, the first electrode of the light-emitting control transistor, and the second electrode of the light-emitting control transistor; The light-emitting active pattern extends along a fifth direction, and the fifth direction has a fourth angle with the first direction, the fourth angle being less than 90 degrees.

5. The display substrate according to claim 4, characterized in that, The second direction is parallel to the third direction; and / or, The fourth direction is parallel to the fifth direction; and / or, The second direction intersects with the fourth direction.

6. The display substrate according to claim 4, characterized in that, The first included angle is between 45 degrees and 75 degrees; and / or, The second included angle is between 45 degrees and 75 degrees; and / or, The third included angle is between 45 degrees and 75 degrees; and / or, The fourth included angle is between 45 degrees and 75 degrees.

7. The display substrate according to any one of claims 3 to 6, characterized in that, The display substrate further includes a data line; the sub-pixel driving circuit further includes a data writing transistor, the first terminal of the data writing transistor is coupled to the corresponding data line, and the second terminal of the data writing transistor is coupled to the first terminal of the driving transistor. The data writing transistor includes a data writing active pattern, which is used to form the channel portion of the data writing transistor, a first electrode of the data writing transistor, and a second electrode of the data writing transistor. The data is written to the active graphic, which extends along a sixth direction. The sixth direction has a fifth angle with the first direction, and the fifth angle is less than 90 degrees.

8. The display substrate according to claim 7, characterized in that, The display substrate further includes a power line; the sub-pixel driving circuit further includes a power control transistor, the first terminal of which is coupled to the power line, and the second terminal of which is coupled to the first terminal of the driving transistor. The power control transistor includes a power control active pattern, which is used to form the channel portion of the power control transistor, the first electrode of the power control transistor, and the second electrode of the power control transistor. The power control active pattern extends along a seventh direction, and the seventh direction has a sixth angle with the first direction, the sixth angle being less than 90 degrees.

9. The display substrate according to claim 8, characterized in that, The display substrate further includes a second reset signal line and a second initialization signal line; the sub-pixel driving circuit further includes a first reset transistor, the gate of the first reset transistor is coupled to the corresponding second reset signal line, the first electrode of the first reset transistor is coupled to the second initialization signal line, and the second electrode of the first reset transistor is coupled to the gate of the driving transistor. The first reset transistor includes a first reset active pattern, which is used to form the channel portion of the first reset transistor, a first electrode of the first reset transistor, and a second electrode of the first reset transistor. The first reset active pattern extends along an eighth direction, and the eighth direction has a seventh angle with the first direction, the seventh angle being less than 90 degrees.

10. The display substrate according to claim 9, characterized in that, The display substrate further includes a reference signal line; the sub-pixel driving circuit further includes a second reset transistor, the gate of the second reset transistor is coupled to the corresponding first reset signal line, the first terminal of the second reset transistor is coupled to the reference signal line, and the second terminal of the second reset transistor is coupled to the first terminal of the driving transistor; The second reset transistor further includes a second reset active pattern, which is used to form the channel portion of the second reset transistor, the first electrode of the second reset transistor, and the second electrode of the second reset transistor; The second reset active pattern extends along a ninth direction, and the ninth direction has an eighth angle with the first direction, the eighth angle being less than 90 degrees.

11. The display substrate according to claim 10, characterized in that, The sixth direction is parallel to the third direction; and / or, The seventh direction is parallel to the fifth direction; and / or, The eighth direction is parallel to the second direction; and / or, The ninth direction is parallel to the second direction.

12. A display device, characterized in that, It includes the display substrate as described in any one of claims 1 to 11.

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