A flexible four-junction solar cell, a preparation method and application thereof

Abstract

The application discloses a flexible four-junction solar cell and a preparation method and application thereof. x GaIn y P sub-cell layer / Al z GaAs sub-cell layer / Ga k In 1‑k As m P 1‑m sub-cell layer / In h GaAs sub-cell layer; wherein x=0-0.22, y=0.48-1, z=0-0.12, k=0.12-0.16, m=0.28-0.42, and h=0.50-0.55. The flexible four-junction solar cell of the application specifically relates to various battery combinations and corresponding structures, realizes lattice matching and photoelectric current matching between sub-cells in the solar cell, and makes the photoelectric conversion efficiency of the flexible four-junction solar cell of the application reach 35.1%, and the power mass ratio reach 0.728KW / Kg.

Description

Technical Field

[0001] This invention relates to the field of solar cell technology, and in particular to a flexible four-junction solar cell, its preparation method, and its application. Background Technology

[0002] III-V compound multi-junction solar cells are widely used in the aerospace field due to their superior stability and ultra-high photoelectric conversion performance. Traditional III-V solar cells are grown on InP or GaAs substrates using epitaxial growth techniques and then fabricated through cell processing. Because III-V semiconductor materials are brittle and rigid, most fabricated cells retain the substrate portion, resulting in the majority of the cell's weight being concentrated on the substrate, leading to a power-to-weight ratio of only around 200 W / kg. Thin-film flexible solar cells, due to their light weight, high power-to-weight ratio, flexibility, and adaptability to various environments, have attracted significant attention in the aerospace, military, and even civilian markets. Current flexible thin-film cells mainly include polycrystalline silicon (a-Si) flexible solar cells, copper indium gallium selenide (CIGS) flexible solar cells, organic flexible solar cells (OSC), and other types of flexible solar cells. However, due to limitations in their fabrication materials, these cells often have relatively low efficiency. Thin-film multi-junction solar cells based on III-V group materials have the advantages of wide absorption band, high light absorption coefficient, good high temperature resistance, and excellent radiation resistance. They also have the highest power-to-weight ratio and have great application potential in many fields. Therefore, GaAs thin-film solar cells have been rapidly developed in recent years.

[0003] Currently, the mainstream structure for flexible gallium arsenide multijunction solar cells is the flip-chip growth of GaInP, GaAs, and In. 0.3 Ga 0.7 GaInP / GaAs / In obtained from As sub-cell 0.3 Ga 0.7 As a flexible triple-junction solar cell. The cell structure has a bandgap combination of 1.9 / 1.42 / 1.0 eV. However, due to the unreasonable distribution of the solar spectrum by the cell structure, the solar cell is limited by the current of the series structure, which prevents it from fully converting and utilizing the long-wavelength solar energy beyond 1240 nm, thus limiting the improvement of cell performance.

[0004] Therefore, increasing the number of cell junctions is an effective method to achieve lattice matching and photocurrent matching among the sub-cells. Currently, the technical approach for fabricating multi-junction solar cells using semiconductor direct bonding technology involves sequentially growing wide-bandgap sub-cells on a GaAs substrate in reverse epitaxial growth, and sequentially growing narrow-bandgap sub-cells on an InP substrate in forward epitaxial growth. These are then integrated together using semiconductor direct bonding. Afterward, the GaAs substrate is peeled off, and finally, the multi-junction solar cell is fabricated using conventional solar cell device processes.

[0005] The advantage of this method is that it overcomes the limitations of lattice matching, avoiding material quality problems caused by using new materials or structures, such as dilute nitrogen compounds and lattice mismatch techniques. The key process in the direct bonding technology for III-V group multi-junction solar cells is the polishing and activation of the wafer interface. However, the disadvantages are also obvious. Unlike the direct bonding of Si wafers, which can be annealed to thousands of degrees Celsius, this process often requires a high annealing temperature (800-1000) °C to obtain sufficiently high silicon-silicon wafer bonding strength. This annealing temperature is close to the melting point of silicon (1410 °C). III-V group materials decompose at such high temperatures. Furthermore, due to the difference in thermal expansion coefficients between GaAs and InP substrates, excessively high bonding and annealing temperatures can cause warping and void formation after bonding. High temperatures can also lead to the diffusion of heavily doped tunnel junction dopants between sub-cells, thus affecting cell performance. Additionally, the current method often ultimately prepares GaInP / GaAs / InGaAsP / In substrates. 0.52 Ga 0.48 As rigid solar cells, their power-to-weight ratio remains low; moreover, the growth of large-diameter InP single crystals is difficult, making 4-inch InP substrates very expensive, thus increasing the cost of solar cell manufacturing. Furthermore, existing flexible quad-junction solar cells still suffer from imperfect cell structure and bandgap combinations, limiting their performance.

[0006] Therefore, there is an urgent need for a new type of solar cell to solve the above problems. Summary of the Invention

[0007] The first technical problem to be solved by this invention is:

[0008] A flexible four-junction solar cell is provided.

[0009] The second technical problem to be solved by this invention is:

[0010] A method for fabricating the flexible four-junction solar cell is provided.

[0011] The third technical problem to be solved by this invention is:

[0012] Application of the flexible four-junction solar cell.

[0013] To solve the first technical problem, the technical solution adopted by the present invention is as follows:

[0014] A flexible quad-junction solar cell, the flexible quad-junction solar cell comprising the following structure;

[0015] Al x Gain y P-subcell layer / Al z GaAs sub-cell layer / Ga k In 1-k As m P 1-m Sub-cell layer / In h GaAs sub-cell layer;

[0016] Where x = 0 to 0.22, y = 0.48 to 1, z = 0 to 0.12, k = 0.12 to 0.16, m = 0.28 to 0.42, and h = 0.50 to 0.55.

[0017] According to embodiments of the present invention, one of the technical solutions has at least one of the following advantages or beneficial effects:

[0018] The flexible quad-junction solar cell of the present invention specifically involves various combinations and corresponding structures, realizing lattice matching and photocurrent matching between the sub-cells in the solar cell, so that the photoelectric conversion efficiency of the flexible quad-junction solar cell of the present invention can reach at least 35.1% and the power-to-weight ratio can reach at least 0.728KW / Kg.

[0019] According to one embodiment of the present invention, the flexible quad-junction solar cell has the following bandgap combination:

[0020] One of 1.90 / 1.42 / 1.03 / 0.75 and 2.02 / 1.52 / 1.12 / 0.75. This bandgap combination achieves lattice matching and photocurrent matching between the sub-cells in the solar cell.

[0021] According to one embodiment of the present invention, a flexible four-junction solar cell, wherein the bandgap combination comprises the following structures in sequence;

[0022] Al x Gain y P-subcell layer / Al z GaAs sub-cell layer / Ga k In 1-k As m P 1-m Sub-cell layer / In h GaAs sub-cell layer;

[0023] When the bandgap combination is 1.90 / 1.42 / 1.03 / 0.75, x = 0, y = 1, z = 0, k = 0.12~0.16, m = 0.38~0.42, h = 0.50~0.54;

[0024] When the band gap combination is 2.02 / 1.52 / 1.12 / 0.75, x = 0.18~0.22, y = 0.48~0.52, z = 0.08~0.12, k = 0.12~0.16, m = 0.28~0.32, h = 0.51~0.55.

[0025] According to one embodiment of the present invention, when the bandgap combination is 1.90 / 1.42 / 1.03 / 0.75, x = 0, y = 1, z = 0, k = 0.13~0.16, m = 0.39~0.42, and h = 0.51~0.54.

[0026] According to one embodiment of the present invention, when the bandgap combination is 1.90 / 1.42 / 1.03 / 0.75, x = 0, y = 1, z = 0, k = 0.14~0.16, m = 0.40~0.42, and h = 0.52~0.54.

[0027] According to one embodiment of the present invention, when the bandgap combination is 1.90 / 1.42 / 1.03 / 0.75, x = 0, y = 1, z = 0, k = 0.15~0.16, m = 0.41~0.42, and h = 0.53~0.54.

[0028] According to one embodiment of the present invention, when the bandgap combination is 2.02 / 1.52 / 1.12 / 0.75, x = 0.19–0.22, y = 0.49–0.52, z = 0.09–0.12, k = 0.13–0.16, m = 0.29–0.32, and h = 0.52–0.55.

[0029] According to one embodiment of the present invention, when the bandgap combination is 2.02 / 1.52 / 1.12 / 0.75, x = 0.20–0.22, y = 0.50–0.52, z = 0.10–0.12, k = 0.14–0.16, m = 0.30–0.32, and h = 0.53–0.55.

[0030] According to one embodiment of the present invention, when the bandgap combination is 2.02 / 1.52 / 1.12 / 0.75, x = 0.21~0.22, y = 0.49~0.52, z = 0.11~0.12, k = 0.13~0.16, m = 0.31~0.32, and h = 0.54~0.55.

[0031] According to one embodiment of the present invention, when the bandgap combination is 2.02 / 1.52 / 1.12 / 0.75, x = 0.21~0.22, y = 0.50~0.52, z = 0.11~0.12, k = 0.14~0.16, m = 0.31~0.32, and h = 0.54~0.55.

[0032] According to one embodiment of the present invention, when the bandgap combination is 2.02 / 1.52 / 1.12 / 0.75, x = 0.21~0.22, y = 0.51~0.52, z = 0.11~0.12, k = 0.15~0.16, m = 0.31~0.32, and h = 0.54~0.55.

[0033] According to one embodiment of the present invention, the flexible quad-junction solar cell has the following structure arranged in sequence:

[0034] Upper electrode;

[0035] Al x Gain y P-sub-cell layer;

[0036] Al z GaAs sub-cell layer;

[0037] n-type-Al a GaAs bonding layer;

[0038] Ga k In 1-k As m P 1-m Sub-cell layer;

[0039] In h GaAs sub-cell layer;

[0040] Lower electrode;

[0041] Where a = 0 to 1.

[0042] According to one embodiment of the present invention, the flexible quad-junction solar cell has the following specific structure:

[0043] Upper electrode;

[0044] An n-type GaAs ohmic contact layer is disposed on the lower surface of the upper electrode;

[0045] Al x Gain y P-sub-cell layer, the Al x Gain y The P-sub-cell layer is disposed on the lower surface of the n-type GaAs ohmic contact layer;

[0046] The first tunnel junction, the first tunnel junction being disposed at Al x Gain y The lower surface of the P-sub-cell layer;

[0047] Al z GaAs sub-cell layer, the Al z The GaAs sub-cell layer is disposed on the lower surface of the first tunnel junction;

[0048] The second tunnel junction is disposed at A1 z The lower surface of the GaAs sub-cell layer;

[0049] n-type-Al a GaAs buffer layer, n-type Al a A GaAs buffer layer is disposed on the lower surface of the second tunnel junction;

[0050] n-type-Al a GaAs bonding layer, n-Al a GaAs bonding layer is disposed on the n-type Al a The lower surface of the GaAs buffer layer;

[0051] n-type-In 0.52 AlAs buffer layer, n-In 0.52 An AlAs buffer layer is disposed on the n-type Al a The lower surface of the GaAs bonding layer;

[0052] Ga k In 1-k As m P 1-m Sub-cell layer, the Ga k In 1-k As m P 1-m Sub-cell layer is disposed on the n-type-In 0.52 The lower surface of the AlAs buffer layer;

[0053] The third tunnel junction is disposed in the Ga k In 1-k As m P 1-m The lower surface of the sub-cell layer;

[0054] In h GaAs sub-cell layer, the In h The GaAs sub-cell layer is disposed on the lower surface of the third tunnel junction;

[0055] p-type AlGaInAs ohmic contact layer, the p-type AlGaInAs ohmic contact layer being disposed on the In h The lower surface of the GaAs sub-cell layer;

[0056] The lower electrode, wherein the first lower electrode is disposed on the lower surface of the p-type AlGaInAs ohmic contact layer;

[0057] When the bandgap combination of the flexible four-junction solar cell is 1.90 / 1.42 / 1.03 / 0.75, a = 0;

[0058] When the bandgap combination of the flexible four-junction solar cell is 2.02 / 1.52 / 1.12 / 0.75, a = 1.

[0059] According to one embodiment of the present invention, the Al x Gain y The thickness of the P-sub-cell layer is 600–700 nm.

[0060] According to one embodiment of the present invention, the Al z The thickness of the GaAs sub-cell layer is 3000–3200 nm.

[0061] According to one embodiment of the present invention, the n-type-Al a The thickness of the GaAs bonding layer is 3–10 μm.

[0062] To solve the second technical problem, the technical solution adopted by the present invention is as follows:

[0063] A method for preparing the flexible quad-junction solar cell includes the following steps:

[0064] Al is grown sequentially on a GaAs substrate x Gain y P-sub-cell layer and Al z GaAs sub-cell layer, to obtain the first semiconductor layer;

[0065] In is grown sequentially on an InP substrate h GaAs sub-cell layer and Ga k In 1-k As m P 1-m The sub-cell layer is used to obtain the second semiconductor layer;

[0066] In Al z GaAs sub-cell layer and Ga k In 1-k As m P 1-m n-type Al deposition between sub-cell layers aGaAs bonding layer to connect the first semiconductor layer and the second semiconductor layer;

[0067] By removing the GaAs substrate and the InP substrate, a first flexible quad-junction solar cell is obtained.

[0068] Where a = 0 to 1.

[0069] According to embodiments of the present invention, one of the technical solutions has at least one of the following advantages or beneficial effects:

[0070] 1. The GaAs substrate and the InP substrate have different lattice constants. The substrate of the first semiconductor layer is a GaAs substrate, and the lattice constants of each layer in the first semiconductor layer are matched with the GaAs substrate (there are no specific requirements for the buffer layer, barrier layer, and sacrificial layer to be removed); the substrate of the second semiconductor layer is an InP substrate, and the lattice constants of each layer in the second semiconductor layer are matched with the InP substrate (there are no specific requirements for the buffer layer, barrier layer, and sacrificial layer to be removed). In the solar cell of this invention, all sub-cells are epitaxially deposited on their respective lattice-matched substrates. Compared with a four-junction solar cell grown using a graded buffer layer with lattice mismatch, this invention can improve the crystal quality of the material, reduce dislocations, and improve the photoelectric conversion efficiency of the solar cell.

[0071] 2. The InP substrate removed by this invention can be reused after chemical mechanical polishing (CMP) process, saving epitaxial costs.

[0072] A method for preparing the flexible quad-junction solar cell includes the following steps:

[0073] A GaAs buffer layer, a GaInP etch barrier layer, an n-type GaAs ohmic contact layer, and an Al layer are sequentially grown on a GaAs substrate. x Gain y P-subcell layer, first tunnel junction, Al z GaAs sub-cell layer, second tunnel junction and n-type Al a GaAs buffer layer, to obtain the first semiconductor layer;

[0074] A first InP buffer layer, an AlAs sacrificial layer, a second InP buffer layer, a p-type AlGaInAs ohmic contact layer, and an InP buffer layer are sequentially grown on an InP substrate. h GaAs sub-cell layer, third tunnel junction, Ga k In 1-k As m P 1-m Sub-cell layer and n-type-In 0.52 An AlAs buffer layer is formed to obtain the second semiconductor layer;

[0075] The first semiconductor layer and the second semiconductor layer are subjected to secondary epitaxy, and the n-type Al of the first semiconductor layer is formed. a GaAs buffer layer and second semiconductor layer n-type-In 0.52 n-type Al deposited between AlAs buffer layers a GaAs bonding layer to connect the first semiconductor layer and the second semiconductor layer;

[0076] By removing the GaAs substrate and the InP substrate, removing the GaAs buffer layer and the GaInP etching barrier layer, removing the first InP buffer layer, the AlAs sacrificial layer and the second InP buffer layer, and adding the first upper electrode and the first lower electrode, a first flexible quad-junction solar cell is obtained.

[0077] When the bandgap combination of the flexible four-junction solar cell is 1.90 / 1.42 / 1.03 / 0.75, a = 0;

[0078] When the bandgap combination of the flexible four-junction solar cell is 2.02 / 1.52 / 1.12 / 0.75, a = 1.

[0079] According to an embodiment of the present invention, n-type Al is deposited. a When using GaAs bonding layers, n-type Al a The GaAs bonding layer doping concentration is 5*10 17 ~2*10 18 cm -3 .

[0080] According to one embodiment of the present invention, the secondary epitaxy is performed using hydride vapor phase epitaxy (HVPE). HVPE is used for secondary epitaxy, employing vapor phase deposition technology instead of direct semiconductor bonding technology to directly deposit n-type Al between the two sub-cells at low temperature and ambient pressure. a GaAs bonding layers can confine a large number of defects and dislocations caused by lattice mismatch to a thin layer of a few micrometers at the bonding interface; the fastest GaAs deposition rate in HVPE vapor deposition can reach 300 μm / h. Therefore, this vapor deposition bonding method has the advantages of high efficiency, low temperature and normal pressure vapor deposition, and no damage to the epitaxial structure.

[0081] Existing methods for fabricating quad-junction solar cells utilize semiconductor direct bonding and chemical mechanical polishing (CMP). The semiconductor direct bonding process presents challenges: firstly, III-V group materials decompose at high temperatures; secondly, its key process involves polishing and activating the wafer interface, requiring sufficiently smooth and flat wafer surfaces, typically with a roughness of less than 1 nm. Epitaxial growth of typical matching structures generally results in a roughness of around 10 nm. To reduce the required roughness of the bonded epitaxial wafer, chemical mechanical polishing is necessary. While using CMP to polish the epitaxial surface to reduce roughness, the polishing thickness must be strictly controlled, demanding extremely high CMP polishing precision. However, this process is highly susceptible to damaging the epitaxial structure of the sub-cells, thereby affecting electrical performance.

[0082] According to one embodiment of the present invention, n-type Al is deposited. a When using GaAs bonding layers, the bonding temperature is typically 350–500°C. In existing quad-junction solar cells, some use Si wafers as substrates. During fabrication, to achieve sufficiently high silicon-silicon wafer bonding strength, a relatively high annealing temperature (800–1000°C) is often required, which is close to the melting point of silicon (1410°C). Others use GaAs and InP as substrates, but the bonding strength is temperature-dependent; within a certain temperature range, higher temperatures result in better bonding strength. However, higher temperatures also lead to greater thermal stress on the materials, which can severely degrade bonding, slippage, cracking, plastic deformation, or mismatched dislocations. This degrades the structure and performance of the entire material, rendering it unusable. This invention optimizes the bonding temperature to 350–500°C to address these issues.

[0083] According to one embodiment of the present invention, a lateral epitaxial growth method is used to remove the GaAs substrate and the InP substrate.

[0084] Another aspect of the present invention relates to the application of the flexible quad-junction solar cell in photovoltaic power generation equipment. This includes the flexible quad-junction solar cell described in the first aspect embodiment above. Since this application employs all the technical solutions of the aforementioned flexible quad-junction solar cell, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments.

[0085] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. Attached Figure Description

[0086] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0087] Figure 1This is a schematic diagram of the structure of the flexible four-junction solar cell in Example 1.

[0088] Figure 2 This is a flowchart illustrating the fabrication process of the flexible four-junction solar cell in Example 1.

[0089] Figure 3 This is a schematic diagram of the structure of the flexible four-junction solar cell in Example 2.

[0090] Figure 4 This is a flowchart illustrating the fabrication process of the flexible four-junction solar cell in Example 2. Detailed Implementation

[0091] The embodiments of the present invention are described in detail below. Throughout the embodiments, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. The embodiments described below are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0092] In the description of this invention, the use of terms such as "first," "second," etc., is for the purpose of distinguishing technical features only and should not be construed as indicating or implying relative importance, or implicitly indicating the number of technical features indicated, or implicitly indicating the order of the technical features indicated.

[0093] In the description of this invention, it should be understood that the orientation descriptions, such as up, down, etc., are based on the orientation or positional relationship shown in the embodiments, and are only for the purpose of facilitating the description of this invention and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this invention.

[0094] In the description of this invention, it should be noted that, unless otherwise explicitly defined, terms such as "setting," "installation," and "connection" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.

[0095] The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of the present invention.

[0096] Unless otherwise specified, the reagents, methods and equipment used in this invention are all conventional reagents, methods and equipment in this technical field.

[0097] Example 1

[0098] A flexible quad-junction solar cell with a bandgap combination of 1.90 / 1.42 / 1.00 / 0.75 eV has the following characteristics: Figure 1 The structure shown is as follows:

[0099] Upper electrode;

[0100] n-type GaAs ohmic contact layer, wherein the n-type GaAs ohmic contact layer is disposed on the lower surface of the upper electrode;

[0101] GaInP sub-cell layer, wherein the GaInP sub-cell layer is disposed on the lower surface of the n-type GaAs ohmic contact layer;

[0102] The first tunnel junction is disposed on the lower surface of the GaInP sub-cell layer.

[0103] GaAs sub-cell layer, wherein the GaAs sub-cell layer is disposed on the lower surface of the first tunnel junction;

[0104] The second tunnel junction is disposed on the lower surface of the GaAs sub-cell layer;

[0105] n-type GaAs buffer layer, wherein the n-type GaAs buffer layer is disposed on the lower surface of the second tunnel junction;

[0106] The n-type GaAs bonding layer is disposed on the lower surface of the n-type GaAs buffer layer;

[0107] n-type-In 0.52 AlAs buffer layer, the above n-type-In 0.52 An AlAs buffer layer is disposed on the lower surface of the above-mentioned n-type GaAs bonding layer;

[0108] Ga 0.14 In 0.86 As 0.4 P 0.6 Sub-cell layer, the aforementioned Ga 0.14 In 0.86 As 0.4 P 0.6 The sub-cell layer is located on the above-mentioned n-type-In 0.52 The lower surface of the AlAs buffer layer;

[0109] The third tunnel junction, the aforementioned third tunnel junction being located in the aforementioned Ga 0.14 In 0.86 As 0.4 P 0.6 The lower surface of the sub-cell layer;

[0110] In 0.52 GaAs sub-cell layer, the above In0.52 The GaAs sub-cell layer is disposed on the lower surface of the aforementioned third tunnel junction;

[0111] p-type AlGaInAs ohmic contact layer, wherein the p-type AlGaInAs ohmic contact layer is disposed on the In h The lower surface of the GaAs sub-cell layer;

[0112] The lower electrode is disposed on the lower surface of the p-type AlGaInAs ohmic contact layer.

[0113] To prepare the above-mentioned flexible four-junction solar cell, such as... Figure 2 As shown, it includes the following steps:

[0114] The method specifically includes the following steps:

[0115] 1) Select a GaAs substrate and grow the following layers in sequence, in a direction that gradually moves away from the GaAs substrate: lattice-matched GaAs buffer layer, GaInP etch barrier layer, GaAs ohmic contact layer, GaInP subcell, first tunnel junction, GaAs subcell, second tunnel junction, and GaAs buffer layer.

[0116] 2) The thickness of the GaAs buffer layer is 400 nm, the thickness of the GaInP etch barrier layer is 150 nm, and the thickness of the n-type heavily doped GaAs ohmic contact layer is 400 nm, with a doping concentration of 0.5–2 × 10⁻⁶. 19 cm -3 .

[0117] 3) The above-mentioned GaInP sub-cell includes a 30nm n-type AlInP window layer, a 50nm n-type GaInP emitter region, a 600nm p-type GaInP base region, and a 30nm p-type AlGaInP back field layer arranged in a direction gradually moving away from the GaAs substrate; the band gap of the above-mentioned GaInP material is about 1.9eV.

[0118] 4) The first tunnel junction mentioned above includes a 12nm p-type AlGaAs heavily doped layer and a 12nm n-type GaInP heavily doped layer disposed sequentially in a direction gradually moving away from the GaAs substrate.

[0119] 5) The above-mentioned GaAs sub-cell includes a 30nm n-type AlInP window layer, a 100nm n-type GaInP emitter region, a 3000nm p-type GaAs base region, and a 60nm p-type GaInP back field layer arranged in a direction gradually moving away from the GaAs substrate; the band gap of the above-mentioned GaAs sub-cell is about 1.42eV.

[0120] 6) The second tunnel junction mentioned above includes a 12nm p-type AlGaAs heavily doped layer and a 12nm n-type GaAs heavily doped layer disposed sequentially in a direction gradually moving away from the GaAs substrate.

[0121] 7) The thickness of the above-mentioned n-type GaAs buffer layer is designed to be 400 nm, and the doping concentration is 0.8~3*10 18 cm -3 .

[0122] 8) Select an InP substrate and sequentially grow a lattice-matched InP buffer layer, a lattice-mismatched AlAs sacrificial layer, a lattice-matched InP buffer layer, an AlGaInAs ohmic contact layer, and an InP buffer layer, respectively, in a direction gradually moving away from the InP substrate. 0.52 GaAs sub-cells, third tunnel junctions, Ga 0.14 In 0.86 As 0.40 P 0.60 Sub-battery, In 0.52 AlAs buffer layer.

[0123] 9) The thickness of the InP buffer layer is 400 nm, the thickness of the AlAs sacrificial layer is 10 nm, the thickness of the InP buffer layer is 400 nm, and the thickness of the p-type heavily doped AlGaInAs ohmic contact layer is 400 nm.

[0124] 10) The above In 0.52 GaAs sub-cells include a 100nm p-type InP back field layer, a 2500nm p-type InP back field layer, and a 100nm p-type InP back field layer arranged gradually away from the InP substrate. 0.52 GaAs base region, 100nm n-type In 0.52 GaAs emitter region, 30nm n-type InP window layer; the above In 0.52 The band gap of GaAs sub-cells is approximately 0.75 eV.

[0125] 11) The aforementioned third tunnel junction includes n-type In atoms arranged in a direction gradually moving away from the InP substrate, with each 15nm layer being formed. 0.52 AlAs heavily doped layer and 15nm p-type In 0.52 AlAs heavily doped layer.

[0126] 12) The above Ga 0.14 In 0.86 As 0.40 P 0.60 The sub-cell includes a 100nm p-type InP back field layer and a 2500nm p-type Ga layer arranged sequentially away from the InP substrate. 0.14 In 0.86 As 0.40 P 0.60Base region, 100nm n-type Ga 0.14 In 0.86 As 0.40 P 0.60 Emitter region, 30nm n-type InP window layer; the aforementioned Ga 0.14 In 0.86 As 0.40 P 0.60 The sub-cell bandgap is approximately 1.03 eV.

[0127] 13) The above n-type In 0.52 The AlAs buffer layer is designed to be 400 nm thick, with a doping concentration of 0.8–3 × 10⁻⁶. 18 cm -3 .

[0128] 14) Place the GaAs substrate epitaxial wafer and the InP substrate epitaxial wafer in HVPE (hydride vapor phase epitaxy), with the epitaxial surfaces facing each other and close together. Deposit a 3 μm n-type GaAs bonding layer at low temperature and ambient pressure, with a doping concentration of 0.8–3 × 10⁻⁶. 18 cm -3 .

[0129] 15) The epitaxial wafer bonded by vapor deposition is placed in an etching solution of HF:H2O (1:10) to etch away the AlAs sacrificial layer and obtain an epitaxial wafer with the GaAs-based InP buffer layer facing upward.

[0130] 16) Use a selective etching solution of H3PO4:HCl (1:3) to etch the InP buffer layer of the epitaxial wafer with the GaAs-based InP buffer layer facing upwards.

[0131] 17) Electroplating copper lower electrode on the newly exposed p-type AlGaInAs ohmic contact layer;

[0132] 18) Use H2SO4:H2O2:H2O (1:1:10) selective etching solution to etch away the GaAs substrate from the above-mentioned electroplated copper epitaxial wafer;

[0133] 19) The GaInP etching barrier layer of the above-mentioned electroplated copper epitaxial wafer was etched clean using a selective etching solution of H3PO4:HCl (1:3) to obtain a newly exposed n-type GaAs ohmic contact layer electroplated copper flexible quad-junction solar cell epitaxial wafer.

[0134] The above-mentioned flexible quadjunction solar cell epitaxial wafer is bonded to a temporary support substrate, an antireflection film and an upper electrode are prepared on an n-type GaAs ohmic contact layer, and the temporary support substrate is removed to obtain the target flexible quadjunction solar cell chip.

[0135] Example 2

[0136] A flexible quad-junction solar cell with a bandgap combination of 2.02 / 1.52 / 1.12 / 0.75 has the following characteristics: Figure 3 The structure shown is as follows:

[0137] Upper electrode;

[0138] n-type GaAs ohmic contact layer, wherein the n-type GaAs ohmic contact layer is disposed on the lower surface of the upper electrode;

[0139] (Al 0.2 Ga)In 0.5 P-sub-cell layer, the above (Al) 0.2 Ga)In 0.5 The P-sub-cell layer is disposed on the lower surface of the above-mentioned n-type GaAs ohmic contact layer;

[0140] The first tunnel connection, the aforementioned first tunnel connection is located at the aforementioned (Al) 0.2 Ga)In 0.5 The lower surface of the P-sub-cell layer;

[0141] Al 0.10 GaAs sub-cell layer, the aforementioned Al 0.10 The GaAs sub-cell layer is disposed on the lower surface of the first tunnel junction;

[0142] The second tunnel connection, the aforementioned second tunnel connection being located at the aforementioned Al 0.10 The lower surface of the GaAs sub-cell layer;

[0143] n-type AlGaAs buffer layer, wherein the n-type AlGaAs buffer layer is disposed on the lower surface of the second tunnel junction;

[0144] The n-type AlGaAs bonding layer is disposed on the lower surface of the n-type AlGaAs buffer layer;

[0145] n-type-In 0.52 AlAs buffer layer, the above n-type-In 0.52 An AlAs buffer layer is disposed on the lower surface of the above-mentioned n-type AlGaAs bonding layer;

[0146] Ga 0.14 In 0.86 As 0.30 P 0.70 Sub-cell layer, the aforementioned Ga 0.14 In 0.86 As 0.30 P 0.70 The sub-cell layer is located on the above-mentioned n-type-In 0.52 The lower surface of the AlAs buffer layer;

[0147] The third tunnel junction, the aforementioned third tunnel junction being located in the aforementioned Ga 0.14 In 0.86 As 0.30 P 0.70 The lower surface of the sub-cell layer;

[0148] In 0.52 GaAs sub-cell layer, the above In 0.52 The GaAs sub-cell layer is disposed on the lower surface of the aforementioned third tunnel junction;

[0149] p-type AlGaInAs ohmic contact layer, wherein the p-type AlGaInAs ohmic contact layer is disposed on the In 0.52 The lower surface of the GaAs sub-cell layer;

[0150] The lower electrode is disposed on the lower surface of the p-type AlGaInAs ohmic contact layer.

[0151] To prepare the above-mentioned flexible four-junction solar cell, such as... Figure 4 As shown, it includes the following steps:

[0152] The method specifically includes the following steps:

[0153] 1) Select a GaAs substrate and grow, in sequence, a lattice-matched GaAs buffer layer, a GaInP etch barrier layer, a GaAs ohmic contact layer, and an (Al) layer, respectively, in a direction that gradually moves away from the GaAs substrate. 0.2 Ga)In 0.5 P-cell, first tunnel junction, Al 0.1 GaAs sub-cell, second tunnel junction, AlGaAs buffer layer.

[0154] 2) The thickness of the GaAs buffer layer is 400 nm, the thickness of the GaInP etch barrier layer is 150 nm, and the thickness of the n-type heavily doped GaAs ohmic contact layer is 400 nm, with a doping concentration of 0.5–2 × 10⁻⁶. 19 cm -3 .

[0155] 3) The above (Al) 0.2 Ga)In 0.5 The p-type sub-cell comprises, sequentially arranged in a direction gradually moving away from the GaAs substrate, a 30nm n-type AlInP window layer, a 50nm n-type GaInP emitter region, a 600nm p-type GaInP base region, and a 30nm p-type AlGaInP back field layer; the above (Al 0.2 Ga)In 0.5 The band gap of the P material is approximately 2.02 eV, and the Al / (Al+Ga) ratio is 0.17–0.23.

[0156] 4) The first tunnel junction mentioned above includes a 12nm p-type AlGaAs heavily doped layer and a 12nm n-type GaInP heavily doped layer disposed sequentially in a direction gradually moving away from the GaAs substrate.

[0157] 5) The above Al 0.1 The GaAs sub-cell includes a 30nm n-type AlInP window layer, a 100nm n-type GaInP emitter region, a 3000nm p-type GaAs base region, and a 60nm p-type GaInP back field layer, arranged sequentially away from the GaAs substrate; the aforementioned Al... 0.1 The band gap of the GaAs sub-cell is approximately 1.52 eV, and the Al / (Al+Ga) ratio is 0.07–0.13.

[0158] 6) The second tunnel junction mentioned above includes a 12nm p-type AlGaAs heavily doped layer and a 12nm n-type AlGaAs heavily doped layer disposed sequentially in a direction gradually moving away from the GaAs substrate.

[0159] 7) The thickness of the above-mentioned n-type AlGaAs buffer layer is designed to be 400 nm, and the doping concentration is 0.8~3*10 18 cm -3 .

[0160] 8) Select an InP substrate and sequentially grow a lattice-matched InP buffer layer, a lattice-mismatched AlAs sacrificial layer, a lattice-matched InP buffer layer, an AlGaInAs ohmic contact layer, and an InP buffer layer, respectively, in a direction gradually moving away from the InP substrate. 0.52 GaAs sub-cells, third tunnel junctions, Ga 0.14 In 0.86 As 0.30 P 0.70 Sub-battery, In 0.52 AlAs buffer layer.

[0161] 9) The thickness of the InP buffer layer is 400 nm, the thickness of the AlAs sacrificial layer is 10 nm, the thickness of the InP buffer layer is 400 nm, and the thickness of the p-type heavily doped AlGaInAs ohmic contact layer is 400 nm.

[0162] 10) The above In 0.52 GaAs sub-cells include a 100nm p-type InP back field layer, a 2500nm p-type InP back field layer, and a 100nm p-type InP back field layer arranged gradually away from the InP substrate. 0.52 GaAs base region, 100nm n-type In 0.52 GaAs emitter region, 30nm n-type InP window layer; the above In 0.52 The band gap of GaAs sub-cells is approximately 0.75 eV.

[0163] 11) The aforementioned third tunnel junction includes n-type In atoms arranged in a direction gradually moving away from the InP substrate, with each 15nm layer being formed. 0.52 AlAs heavily doped layer and 15nm p-type In 0.52 AlAs heavily doped layer.

[0164] 12) The above Ga 0.14 In 0.86 As 0.30 P 0.70 The sub-cell includes a 100nm p-type InP back field layer and a 2500nm p-type Ga layer arranged sequentially away from the InP substrate. 0.14 In 0.86 As 0.30 P 0.70 Base region, 100nm n-type Ga 0.14 In 0.86 As 0.30 P 0.70 Emitter region, 30nm n-type InP window layer; the aforementioned Ga 0.14 In 0.86 As 0.30 P 0.70 The sub-cell bandgap is approximately 1.12 eV.

[0165] 13) The above n-type In 0.52 The AlAs buffer layer is designed to be 400 nm thick, with a doping concentration of 0.8–3 × 10⁻⁶. 18 cm -3 .

[0166] 14) Place the GaAs substrate epitaxial wafer and the InP substrate epitaxial wafer in HVPE (hydride vapor phase epitaxy), with the epitaxial surfaces facing each other. Deposit a 3 μm n-type AlGaAs bonding layer at low temperature and ambient pressure, with a doping concentration of 0.8–3 × 10⁻⁶. 18 cm -3 .

[0167] 15) The epitaxial wafer bonded by vapor deposition is placed in an etching solution of HF:H2O (1:10) to etch away the AlAs sacrificial layer and obtain an epitaxial wafer with the GaAs-based InP buffer layer facing upward.

[0168] 16) Use a selective etching solution of H3PO4:HCl (1:3) to etch the InP buffer layer of the epitaxial wafer with the GaAs-based InP buffer layer facing upwards.

[0169] 17) Electroplating copper lower electrode on the newly exposed p-type AlGaInAs ohmic contact layer;

[0170] 18) Use H2SO4:H2O2:H2O (1:1:10) selective etching solution to etch away the GaAs substrate from the above-mentioned electroplated copper epitaxial wafer;

[0171] 19) The GaInP etching barrier layer of the above-mentioned electroplated copper epitaxial wafer was etched clean using a selective etching solution of H3PO4:HCl (1:3) to obtain a newly exposed n-type GaAs ohmic contact layer electroplated copper flexible quad-junction solar cell epitaxial wafer.

[0172] The above-mentioned flexible quadjunction solar cell epitaxial wafer is bonded to a temporary support substrate, an antireflection film and an upper electrode are prepared on an n-type GaAs ohmic contact layer, and the temporary support substrate is removed to obtain the target flexible quadjunction solar cell chip.

[0173] Comparative Example 1

[0174] Comparative Example 1 is a flexible triple-junction solar cell. The difference between this cell and Example 1 is that the bandgap combination of this flexible triple-junction solar cell is 1.90 / 1.42 / 1.0 eV.

[0175] The difference between the preparation method of this battery and that of Example 1 is that the battery of Comparative Example 1 was prepared using the IMM method.

[0176] Comparative Example 2

[0177] Comparative Example 2 is a rigid four-junction solar cell. The difference between this cell and Example 1 lies in the fabrication method. Comparative Example 2 is fabricated using the semiconductor direct bonding method.

[0178] Performance testing:

[0179] The batteries from Examples 1-2 and Comparative Examples 1-2 were used to conduct the following tests in accordance with the national standard GB / T 6494-2017 Test Method for Electrical Performance of Solar Cells for Aerospace Use. The test results are shown in Table 1.

[0180] Table 1

[0181]

[0182] The above are merely embodiments of the present invention and do not limit the patent scope of the present invention. Any equivalent modifications made based on the content of the present invention specification, or direct or indirect applications in related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. A flexible four-junction solar cell, characterized in that: The flexible quad-junction solar cell consists of the following structure: Upper electrode; An n-type GaAs ohmic contact layer is disposed on the lower surface of the upper electrode; Al x Gain y P-sub-cell layer, the Al x Gain y The P-sub-cell layer is disposed on the lower surface of the n-type GaAs ohmic contact layer; The first tunnel junction, the first tunnel junction being disposed at Al x Gain y The lower surface of the P-sub-cell layer; Al z GaAs sub-cell layer, the Al z The GaAs sub-cell layer is disposed on the lower surface of the first tunnel junction; The second tunnel junction is disposed at A1 z The lower surface of the GaAs sub-cell layer; n-type-Al a GaAs buffer layer, n-type Al a A GaAs buffer layer is disposed on the lower surface of the second tunnel junction; n-type-Al a GaAs bonding layer, n-Al a GaAs bonding layer is disposed on the n-type Al a The lower surface of the GaAs buffer layer; n-type-In 0.52 AlAs buffer layer, n-In 0.52 An AlAs buffer layer is disposed on the n-type Al a The lower surface of the GaAs bonding layer; Ga k In 1-k As m P 1-m Sub-cell layer, the Ga k In 1-k As m P 1-m Sub-cell layer is disposed on the n-type-In 0.52 The lower surface of the AlAs buffer layer; The third tunnel junction is disposed in the Ga k In 1-k As m P 1-m The lower surface of the sub-cell layer; In h GaAs sub-cell layer, the In h The GaAs sub-cell layer is disposed on the lower surface of the third tunnel junction; p-type AlGaInAs ohmic contact layer, the p-type AlGaInAs ohmic contact layer being disposed on the In h The lower surface of the GaAs sub-cell layer; The lower electrode is disposed on the lower surface of the p-type AlGaInAs ohmic contact layer. The flexible four-junction solar cell has a bandgap combination of 2.02 / 1.52 / 1.12 / 0.75, x=0.19~0.22, y=0.49~0.52, z=0.09~0.12, k=0.13~0.16, m=0.29~0.32, h=0.52~0.55, and a=1.

2. A flexible four-junction solar cell according to claim 1, characterized in that: The Al x Gain y The thickness of the P-sub-cell layer is 600~700nm.

3. A flexible four-junction solar cell according to claim 1, characterized in that: The Al z The thickness of the GaAs sub-cell layer is 3000~3200nm.

4. A flexible quad-junction solar cell according to claim 1, characterized in that: The n-type-Al a The thickness of the GaAs bonding layer is 3~10μm.

5. A method for preparing a flexible four-junction solar cell as described in any one of claims 1 to 4, characterized in that: Includes the following steps: Al is grown sequentially on a GaAs substrate x Gain y P-sub-cell layer and Al z GaAs sub-cell layer, to obtain the first semiconductor layer; In is grown sequentially on an InP substrate h GaAs sub-cell layer and Ga k In 1-k As m P 1-m The sub-cell layer is used to obtain the second semiconductor layer; In Al z GaAs sub-cell layer and Ga k In 1-k As m P 1-m n-type Al deposition between sub-cell layers a GaAs bonding layer to connect the first semiconductor layer and the second semiconductor layer; The flexible quad-junction solar cell is obtained by removing the GaAs substrate and the InP substrate. Where a=1.

6. The method according to claim 5, characterized in that: Deposition n-type Al a When bonding GaAs layers, the bonding temperature is 350~500℃.

7. The application of a flexible four-junction solar cell as described in any one of claims 1 to 4 in photovoltaic power generation equipment.

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