A semiconductor light-emitting diode

Abstract

This invention proposes a semiconductor light-emitting diode (LED), comprising a substrate and a carrier tunneling balance structure composed of a first n-type semiconductor layer, a second n-type semiconductor layer, a shallow quantum well layer, a quantum well layer, an electron blocking layer, and a p-type semiconductor layer, arranged sequentially from bottom to top. The Si / O concentration ratio of the first n-type semiconductor layer, the second n-type semiconductor layer, and the shallow quantum well layer is greater than 1, and the Si / O concentration ratio of the second n-type semiconductor layer is greater than that of the first n-type semiconductor layer and the shallow quantum well layer. The Si / O concentration ratio of the quantum well layer is less than 1. The Mg / H concentration ratio of the electron blocking layer and the p-type semiconductor layer is greater than 1, and the Mg / H concentration ratio of the quantum well layer is less than 1. This invention transforms the dominant transition modes of electron and hole carriers in the quantum well layer from drift, diffusion, and thermal emission to a tunneling transition mode dominated by the quantum well layer, thereby improving the luminous efficiency of the semiconductor LED.

Description

Technical Field

[0001] This application relates to the field of semiconductor optoelectronic devices, and more particularly to a semiconductor light-emitting diode. Background Technology

[0002] Semiconductor components, especially semiconductor light-emitting components, have a wide range of adjustable wavelengths, high luminous efficiency, energy saving and environmental protection, a long lifespan of over 100,000 hours, small size, multiple application scenarios, and strong design flexibility. As a result, they have gradually replaced incandescent and fluorescent lamps, becoming the light source for ordinary household lighting and are widely used in new scenarios, such as indoor high-resolution displays, outdoor displays, Mini-LED, Micro-LED, mobile phone TV backlights, backlighting, streetlights, car headlights, daytime running lights, car interior ambient lighting, flashlights, and other application areas.

[0003] Traditional nitride semiconductors are grown on sapphire substrates, resulting in large lattice and thermal mismatches, leading to high defect density and polarization effects, which reduce the luminous efficiency of semiconductor light-emitting devices. Simultaneously, the hole ionization efficiency of traditional nitride semiconductors is far lower than that of electron ionization, resulting in a hole concentration more than two orders of magnitude lower than the electron concentration. Excess electrons overflow from the multiple quantum wells to the second conductivity type semiconductor, causing non-radiative recombination. The low hole ionization efficiency makes it difficult for holes in the second conductivity type semiconductor to be effectively injected into the multiple quantum wells, resulting in low hole injection efficiency and thus low luminous efficiency of the multiple quantum wells. Furthermore, the non-centrosymmetric structure of nitride semiconductors generates strong spontaneous polarization along the c-axis, which, combined with the piezoelectric polarization effect of lattice mismatch, forms an intrinsic polarization field. This intrinsic polarization field, along the (001) direction, causes a strong quantum confinement Stark effect in the multiple quantum well layer, leading to band tilt and spatial separation of electron-hole wave functions, reducing the radiative recombination efficiency of electrons and holes, and consequently affecting the luminous efficiency of semiconductor light-emitting devices. Summary of the Invention

[0004] To address one of the aforementioned technical problems, the present invention provides a semiconductor light-emitting diode.

[0005] This invention provides a semiconductor light-emitting diode, comprising, from bottom to top, a substrate, a first n-type semiconductor layer, a second n-type semiconductor layer, a shallow quantum well layer, a quantum well layer, an electron blocking layer, and a p-type semiconductor layer;

[0006] The Si / O concentration ratios of the first n-type semiconductor layer, the second n-type semiconductor layer, and the shallow quantum well layer are all greater than 1. The Si / O concentration ratio of the second n-type semiconductor layer is greater than the Si / O concentration ratios of the first n-type semiconductor layer and the shallow quantum well layer. Furthermore, the Si / O concentration ratios among the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, and the quantum well layer exhibit a U-shaped distribution. The Si / O concentration ratio of the quantum well layer is less than 1.

[0007] The Mg / H concentration ratio of the electron blocking layer and the p-type semiconductor layer is greater than 1, while the Mg / H concentration ratio of the quantum well layer is less than 1.

[0008] The first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the quantum well layer, the electron blocking layer, and the p-type semiconductor layer form a carrier tunneling equilibrium structure.

[0009] Preferably, the quantum well layer is a periodic structure composed of a well layer and a barrier layer, the number of periods of the quantum well layer is x: 8≤x≤20, the thickness of the quantum well layer is a: 30 angstroms≤a≤70 angstroms, and the barrier layer of the quantum well layer is an ultrathin barrier layer with a thickness b: 20 angstroms≤b≤40 angstroms.

[0010] Preferably, the ratio of electron concentration to hole concentration in the quantum well layer is z: 1≤z≤5.

[0011] Preferably, the shallow quantum well layer is a periodic structure composed of a well layer and a barrier layer, the number of periods of the shallow quantum well layer is y: 5≤y≤30, the thickness of the well layer of the shallow quantum well layer is c: 10 angstroms≤c≤25 angstroms, and the thickness of the barrier layer of the shallow quantum well layer is d: 10 angstroms≤d≤30 angstroms.

[0012] Preferably, the thickness of the electron blocking layer is 50 angstroms to 400 angstroms.

[0013] Preferably, the thickness of the p-type semiconductor layer is 100 angstroms to 500 angstroms.

[0014] Preferably, the Al content of the electron blocking layer is higher than that of the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the quantum well layer, and the p-type semiconductor layer, and the Al content decreases from the quantum well layer, the shallow quantum well layer, the second n-type semiconductor layer to the first n-type semiconductor layer.

[0015] Preferably, the C / O concentration ratio of the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the quantum well layer, the electron blocking layer, and the p-type semiconductor layer is less than or equal to 1.

[0016] Preferably, the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the quantum well layer, the electron blocking layer, and the p-type semiconductor layer are any one or any combination of GaN, AlGaN, InGaN, AlInGaN, AlN, InN, AlInN, SiC, Ga2O3, BN, GaAs, GaP, InP, AlGaAs, AlInGaAs, AlGaInP, InGaAs, AlInAs, AlInP, AlGaP, and InGaP.

[0017] Preferably, the substrate comprises any one of sapphire, silicon, Ge, SiC, AlN, GaN, GaAs, InP, sapphire / SiO2 composite substrate, sapphire / AlN composite substrate, sapphire / SiNx, magnesium aluminum spinel MgAl2O4, MgO, ZnO, ZrB2, LiAlO2 and LiGaO2 composite substrate.

[0018] The beneficial effects of this invention are as follows: This invention designs a U-shaped distribution of Si / O concentration ratio gradients in the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, and the quantum well layer; a Mg / H concentration ratio gradient in the electron blocking layer, the p-type semiconductor layer, and the quantum well layer; and an ultrathin barrier layer in the quantum well layer together form a carrier tunneling equilibrium structure. This allows electron and hole carriers in the quantum well layer to change from a transition mode dominated by drift, diffusion, and thermal emission to a transition mode dominated by tunneling through the quantum well layer. Furthermore, it reduces the difference between electron and hole concentrations in the quantum well layer to less than one order of magnitude, thereby increasing the overlap probability and distribution uniformity of electron and hole wave functions in the quantum well layer, improving the radiative recombination probability of electrons and holes in the quantum well layer, reducing electron overflow, and improving the luminous efficiency of the semiconductor light-emitting diode. Attached Figure Description

[0019] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0020] Figure 1 This is a schematic diagram of the structure of the semiconductor light-emitting diode according to an embodiment of the present invention;

[0021] Figure 2 This is a SIMS secondary ion mass spectrum of the semiconductor light-emitting diode described in an embodiment of the present invention.

[0022] Figure label:

[0023] 100. Substrate; 101. First n-type semiconductor layer; 102. Second n-type semiconductor layer; 103. Shallow quantum well layer; 104. Quantum well layer; 105. Electron blocking layer; 106. P-type semiconductor layer; 107. Carrier tunneling balance structure. Detailed Implementation

[0024] To make the technical solutions and advantages of the embodiments of this application clearer, the exemplary embodiments of this application will be described in further detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not an exhaustive list of all embodiments. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.

[0025] like Figure 1 As shown, this embodiment proposes a semiconductor light-emitting diode, which includes a substrate 100, a first n-type semiconductor layer 101, a second n-type semiconductor layer 102, a shallow quantum well layer 103, a quantum well layer 104, an electron blocking layer 105, and a p-type semiconductor layer 106 arranged sequentially from bottom to top.

[0026] Specifically, such as Figure 2 As shown, the Si / O concentration ratios of the first n-type semiconductor layer 101, the second n-type semiconductor layer 102, and the shallow quantum well layer 103 are all greater than 1. The Si / O concentration ratio of the second n-type semiconductor layer 102 is greater than that of the first n-type semiconductor layer 101 and the shallow quantum well layer 103. Furthermore, the Si / O concentration ratios among the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, and the quantum well layer exhibit a U-shaped distribution. The Si / O concentration ratio of the quantum well layer 104 is less than 1. The Mg / H concentration ratios of the electron blocking layer 105 and the p-type semiconductor layer 106 are both greater than 1, while the Mg / H concentration ratio of the quantum well layer 104 is less than 1.

[0027] In this embodiment, by designing the Si / O concentration ratio gradient of the first n-type semiconductor layer 101, the second n-type semiconductor layer 102, the shallow quantum well layer 103, and the quantum well layer 104, and the Mg / H concentration ratio gradient of the electron blocking layer 105, the p-type semiconductor layer 106, and the quantum well layer 104, a carrier tunneling balance structure 107 is formed in combination with the ultrathin barrier layer quantum well layer 104. This structure enables electron and hole carriers to change from the dominant transition modes such as drift, diffusion, and thermal emission in the quantum well layer 104 to the dominant transition mode of tunneling through the quantum well layer 104. It also makes the difference between the electron and hole concentrations in the quantum well layer 104 less than one order of magnitude, thereby increasing the overlap probability and distribution uniformity of the electron and hole wave functions in the quantum well layer 104, improving the radiative recombination probability of electrons and holes in the quantum well layer 104, reducing electron overflow, and improving the luminous efficiency of the semiconductor light-emitting diode.

[0028] Furthermore, in this embodiment, the quantum well layer 104 is a periodic structure composed of a well layer and a barrier layer. The number of periods in the quantum well layer 104 is x: 8 ≤ x ≤ 20, and the thickness of the quantum well layer 104 is a: 35 Å ≤ a ≤ 70 Å. The barrier layer is an ultrathin barrier layer with a thickness b: 20 Å ≤ b ≤ 40 Å. The ultrathin barrier layer facilitates carrier tunneling within the quantum well. Electron and hole carriers transition from dominant transition modes such as drift, diffusion, and thermal emission in the quantum well layer 104 to a dominant transition mode via tunneling through the quantum well layer 104 with the ultrathin barrier layer, resulting in an electron-to-hole concentration ratio of z: 1 ≤ z ≤ 5 in the quantum well layer 104.

[0029] In this embodiment, the shallow quantum well layer 103 is also a periodic structure composed of a well layer and a barrier layer. The number of periods of the shallow quantum well layer 103 is y: 5≤y≤30, the thickness of the well layer of the shallow quantum well layer 103 is c: 10 angstroms≤c≤25 angstroms, and the thickness of the barrier layer of the shallow quantum well layer 103 is d: 10 angstroms≤d≤30 angstroms.

[0030] Furthermore, in this embodiment, the thickness of the electron blocking layer 105 is 50 angstroms to 400 angstroms. The Al content of the electron blocking layer 105 is higher than that of the first n-type semiconductor layer 101, the second n-type semiconductor layer 102, the shallow quantum well layer 103, the quantum well layer 104, and the p-type semiconductor layer 106, and the Al content decreases from the quantum well layer 104, the shallow quantum well layer 103, the second n-type semiconductor layer 102 to the first n-type semiconductor layer 101. The Al content decreases from 1E6 au to below 1E3 au, a decrease of more than 99%.

[0031] Furthermore, in this embodiment, the thickness of the p-type semiconductor layer 106 is 100 angstroms to 500 angstroms, and the C / O concentration ratio of the first n-type semiconductor layer 101, the second n-type semiconductor layer 102, the shallow quantum well layer 103, the quantum well layer 104, the electron blocking layer 105, and the p-type semiconductor layer 106 is all less than or equal to 1; the Si / O concentration ratio of the first n-type semiconductor layer 101, the second n-type semiconductor layer 102, and the shallow quantum well 103 forms a U-shaped distribution.

[0032] The first n-type semiconductor layer 101, the second n-type semiconductor layer 102, the shallow quantum well layer 103, the quantum well layer 104, the electron blocking layer 105, and the p-type semiconductor layer 106 are any one or any combination of GaN, AlGaN, InGaN, AlInGaN, AlN, InN, AlInN, SiC, Ga2O3, BN, GaAs, GaP, InP, AlGaAs, AlInGaAs, AlGaInP, InGaAs, AlInAs, AlInP, AlGaP, and InGaP.

[0033] The substrate 100 includes any one of sapphire, silicon, Ge, SiC, AlN, GaN, GaAs, InP, sapphire / SiO2 composite substrate, sapphire / AlN composite substrate, sapphire / SiNx, magnesium aluminum spinel MgAl2O4, MgO, ZnO, ZrB2, LiAlO2 and LiGaO2 composite substrate.

[0034] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A semiconductor light-emitting diode, characterized in that, It includes, from bottom to top, a substrate, a first n-type semiconductor layer, a second n-type semiconductor layer, a shallow quantum well layer, a quantum well layer, an electron blocking layer, and a p-type semiconductor layer; The Si / O concentration ratios of the first n-type semiconductor layer, the second n-type semiconductor layer, and the shallow quantum well layer are all greater than 1. The Si / O concentration ratio of the second n-type semiconductor layer is greater than the Si / O concentration ratios of the first n-type semiconductor layer and the shallow quantum well layer. Furthermore, the Si / O concentration ratios among the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, and the quantum well layer exhibit a U-shaped distribution. The Si / O concentration ratio of the quantum well layer is less than 1. The Mg / H concentration ratio of the electron blocking layer and the p-type semiconductor layer is greater than 1, while the Mg / H concentration ratio of the quantum well layer is less than 1. The first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the quantum well layer, the electron blocking layer, and the p-type semiconductor layer form a carrier tunneling balance structure; The quantum well layer is a periodic structure composed of a well layer and a barrier layer. The number of periods of the quantum well layer is x: 8≤x≤20. The thickness of the quantum well layer is a: 30 angstroms≤a≤70 angstroms. The barrier layer of the quantum well layer is an ultrathin barrier layer with a thickness b: 20 angstroms≤b≤40 angstroms. The Al content of the electron blocking layer is higher than that of the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the quantum well layer, and the p-type semiconductor layer. The Al content decreases from the quantum well layer, the shallow quantum well layer, the second n-type semiconductor layer to the first n-type semiconductor layer, and the Al content decreases from 1E6 au to below 1E3 au.

2. The semiconductor light-emitting diode according to claim 1, characterized in that, The ratio of electron concentration to hole concentration in the quantum well layer is z: 1≤z≤5.

3. The semiconductor light-emitting diode according to claim 1, characterized in that, The shallow quantum well layer is a periodic structure composed of a well layer and a barrier layer. The number of periods of the shallow quantum well layer is y: 5≤y≤30, the thickness of the well layer is c: 10 angstroms≤c≤25 angstroms, and the thickness of the barrier layer is d: 10 angstroms≤d≤30 angstroms.

4. The semiconductor light-emitting diode according to claim 1, characterized in that, The thickness of the electron blocking layer is 50 angstroms to 400 angstroms.

5. The semiconductor light-emitting diode according to claim 1, characterized in that, The thickness of the p-type semiconductor layer is from 100 angstroms to 500 angstroms.

6. The semiconductor light-emitting diode according to claim 1, characterized in that, The C / O concentration ratio of the first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the quantum well layer, the electron blocking layer, and the p-type semiconductor layer is all less than or equal to 1.

7. The semiconductor light-emitting diode according to claim 1, characterized in that, The first n-type semiconductor layer, the second n-type semiconductor layer, the shallow quantum well layer, the quantum well layer, the electron blocking layer, and the p-type semiconductor layer are any one or any combination of GaN, AlGaN, InGaN, AlInGaN, AlN, InN, AlInN, SiC, Ga2O3, BN, GaAs, GaP, InP, AlGaAs, AlInGaAs, AlGaInP, InGaAs, AlInAs, AlInP, AlGaP, and InGaP.

8. The semiconductor light-emitting diode according to claim 1, characterized in that, The substrate includes any one of sapphire, silicon, Ge, SiC, AlN, GaN, GaAs, InP, sapphire / SiO2 composite substrate, sapphire / AlN composite substrate, sapphire / SiNx, magnesium aluminum spinel MgAl2O4, MgO, ZnO, ZrB2, LiAlO2 and LiGaO2 composite substrate.

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