Active power filter control method and device and storage medium

Abstract

The application provides an active power filter control method and device and a storage medium, the method comprising: collecting grid-connected end current of a harmonic load according to harmonic control requirements, and obtaining a first signal through harmonic extraction operation, the first signal being used to represent an instruction signal of a harmonic compensation current; obtaining a second signal of an active power filter, the second signal being used to represent a sampling signal of an actual harmonic compensation current emitted by the active power filter; creating a controller in a z domain, determining an error sequence signal input into the controller through the first signal and the second signal, and outputting a modulation wave signal through the controller, so that the error sequence signal of harmonic control converges at an expected speed. The harmonic current controller is designed in the z domain, so that the control frequency offset problem occurring in the analog-to-digital conversion process of the controller is avoided, and the zero steady-state error tracking effect can be achieved. The designed current controller can make the tracking error decay at an expected speed, and meet the individual requirements of harmonic dynamic control performance in multiple scenes.

Description

Technical Field

[0001] This invention relates to the field of electronic power control technology, and in particular to an active power filter control method, device, and storage medium. Background Technology

[0002] Power electronic interface devices possess wideband, high-order harmonic current emission characteristics, causing power quality problems in local power grids. Active power filters (APFs) are needed for harmonic mitigation. Factors affecting the mitigation effectiveness of APFs include: 1) whether the harmonic detection stage can accurately detect the real-time harmonic current of the polluted power grid; and 2) whether the compensation current emitted by the mitigation device can accurately track the reference current.

[0003] In practical engineering applications, the digital closed-loop control of the APF often employs two methods: deadbeat control and proportional-resonant control. The former, deadbeat control, heavily relies on the accuracy of the APF model parameter identification, making it difficult to achieve precise compensation for characteristic subharmonics. The latter, proportional-resonant control, is significantly affected by the discretization method: as the frequency of the harmonics increases, the resonant frequency of the digital proportional-resonant controller deviates further from the original analog controller's resonant frequency, leading to severe steady-state errors in the compensation current. Summary of the Invention

[0004] The main objective of this invention is to propose an active power filter control method, device, and storage medium to achieve zero steady-state error tracking and meet the dynamic harmonic control requirements in various scenarios.

[0005] One aspect of the present invention provides an active power filter control method, comprising:

[0006] According to the requirements of harmonic mitigation, the grid-connected current of the harmonic load is collected and a first signal is obtained through harmonic extraction calculation. The first signal is used to characterize the command signal of the harmonic compensation current.

[0007] Acquire a second signal from the active power filter, which is used to characterize the sampled signal of the actual harmonic compensation current emitted by the active power filter;

[0008] A controller is created in the z-domain. The error sequence signal input to the controller is determined by the first signal and the second signal. The controller outputs a modulation wave signal so that the error sequence signal of harmonic mitigation converges at the desired speed.

[0009] According to the active power filter control method described above, creating a controller in the z-domain includes:

[0010] Based on the expected convergence rate of the tracking error, the error transfer function is determined;

[0011] Based on the structural constraints of the unity negative feedback system, determine the closed-loop transfer function and the open-loop transfer function;

[0012] The controller is determined based on the open-loop transfer function;

[0013] The controller is optimized based on zero steady-state error;

[0014] And, the difference equation corresponding to the controller is obtained. According to the active power filter control method, the error transfer function is determined based on the expected convergence rate of the tracking error, including:

[0015] The proposed error transfer function T e (z) is

[0016]

[0017] Where n refers to the frequency of the characteristic harmonic, and n = 1, 2, 3...; T is the sampling period; ω0 refers to the fundamental angular frequency; a is the attenuation factor, and is a positive real number; z represents the z-transform operator; It is an exponentially decaying term;

[0018] Based on a unity negative feedback system, where the reference signal R(z), the error sequence E(z), and the error transfer function T are... e (z) satisfies the following relationship

[0019] E(z)=R(z·T) e (z),

[0020] in

[0021]

[0022]

[0023] The first signal is the reference signal R(z); This is an exponentially decaying term.

[0024] According to the active power filter control method described above, the closed-loop transfer function and open-loop transfer function are determined based on the structural constraints of the unity negative feedback system, including:

[0025] Based on the unit negative feedback system, determine T sys (z)+T e (z) = 1, where T sys (z) represents the closed-loop transfer function of the system, where T... e (z) is the error transfer function, which determines the closed-loop transfer function T. sys (z) is

[0026]

[0027] Based on a unity negative feedback system, the open-loop transfer function G... sys (z) and closed-loop transfer function T sys (z), Error transfer function T e Between (z), the following relationship is satisfied:

[0028]

[0029] Determine the open-loop transfer function G sys (z) is

[0030]

[0031] According to the active power filter control method described above, determining the controller based on the open-loop transfer function includes:

[0032] According to the open-loop transfer function G sys The relationship between (z) and the controller D(z)

[0033]

[0034] Among them G delay (z) represents the link z -1 G represents the control delay of one clock cycle required for the control system to move from sampling the current signal to loading the modulation signal. delay (z)=z -1 G plant (z) represents the generalized controlled object, G plant (z) Through link K pwm The circuit consists of the element (T / L) / (z-1), where (T / L) / (z-1) represents the discrete model of the L-type output filter of the active power filter, obtained through the step response invariance method. The element K... pwm The gain represents the average switching model of the active power filter;

[0035] The controller D(z) is determined to be

[0036]

[0037] Modifying the controller D(z) includes changing the link G. delay Ignoring (z), the modified controller D(z) is obtained as follows:

[0038]

[0039] According to the active power filter control method described above, the controller is optimized based on zero steady-state error, including:

[0040] According to the open-loop transfer function G sys (z), the controller D(z), G delay (z) and the generalized controlled object G plant The relationship between (z) is used to determine the static position error coefficient K by the static error coefficient method. p This corrects the zero position of the controller D(z) at 1 on the real axis;

[0041] Wherein, the open-loop transfer function G sys (z), the controller D(z), G delay (z) and the generalized controlled object G plant The relationship of (z) is:

[0042] G sys (z)=D(z)·G delay (z)·G plant (z),

[0043] Wherein, the static position error coefficient K p for

[0044]

[0045] Wherein, the controller D(z) to be corrected is

[0046]

[0047] Where k = 2cos(n·ω0T) - e -aT 1 / k is a real zero of the controller D(z), and the position of this zero on the real axis is determined by the attenuation factor a;

[0048] The modified controller D(z) is obtained as follows

[0049]

[0050] The modified open-loop transfer function G is obtained. sys (z) is

[0051]

[0052] Among them, z c This is the modified zero point position, and z c For a value less than 1, the filter inductance term 1 / (z-1) has no zero-point term (zz) with the controller D(z). c The static position error coefficient K is offset by the static position error coefficient K. p =∞.

[0053] According to the active power filter control method described above, the method further includes:

[0054] Add K to the controller D(z) gain The term is used to change the root locus gain of the system, and the controller D(z) is obtained as follows:

[0055]

[0056] Among them, K gain The project makes dynamic adjustments based on the stability of the negative feedback control system.

[0057] According to the active power filter control method described above, the method further includes:

[0058] According to the addition of K gain The difference equation of the controller D(z) is obtained by performing a difference equation on the controller D(z).

[0059] u c (k)=n2e(k)+n1e(k-1)+n0e(k-2)-d1u c (k-1)-d0u c (k-2)

[0060] in,

[0061]

[0062]

[0063] d1=-2cos(n·ω0T), d0=1.

[0064] Another aspect of the present invention provides an active power filter control device, comprising:

[0065] The first acquisition module is used to acquire the grid-connected current of the harmonic load according to the harmonic mitigation requirements, and obtain the first signal through harmonic extraction calculation. The first signal is used to characterize the command signal of the harmonic compensation current.

[0066] The second acquisition module is used to acquire the second signal of the active power filter, which is used to characterize the sampling signal of the actual harmonic compensation current emitted by the active power filter.

[0067] The controller processing module is used to create a controller in the z-domain, determine the error sequence signal input to the controller through the first signal and the second signal, and output a modulated wave signal through the controller so that the error sequence signal of harmonic mitigation converges at the desired speed.

[0068] This invention also discloses a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device can read the computer instructions from the computer-readable storage medium and execute the computer instructions, causing the computer device to perform the methods described above.

[0069] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0070] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0071] Figure 1 This is a flowchart illustrating the active power filter control method according to an embodiment of the present invention.

[0072] Figure 2 This is a schematic diagram of an active power filter control.

[0073] Figure 3 This is a schematic diagram of single-phase control according to an embodiment of the present invention.

[0074] Figure 4 This is a schematic diagram of the controller design process according to an embodiment of the present invention.

[0075] Figure 5 K is an embodiment of the present invention. gain A schematic diagram illustrating the effect of the value of on the closed-loop poles.

[0076] Figure 6a 6b is a schematic diagram comparing the sinusoidal responses of the actual closed-loop system when the attenuation factor a takes different values ​​according to an embodiment of the present invention.

[0077] Figure 7 This is a schematic diagram of the convergence of the sequence E(z) with and without considering the delay error when the attenuation factor a is 80 in an embodiment of the present invention.

[0078] Figure 8 This is a schematic diagram of the convergence of the delay error sequence E(z) with and without considering the delay error when the attenuation factor a is 500 in an embodiment of the present invention.

[0079] Figure 9 The diagram shows the Bode plot of the digital proportional resonant controller of this invention and the controller of this invention after 17 rounds of processing.

[0080] Figure 10 This is a schematic diagram of an active power filter control device according to an embodiment of the present invention. Detailed Implementation

[0081] The embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings. Throughout the description, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. In the following description, suffixes such as "module," "part," or "unit" used to denote elements are used only for the purpose of illustrative purposes and have no specific meaning in themselves. Therefore, "module," "part," or "unit" can be used interchangeably. Terms such as "first," "second," etc., are used only to distinguish technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the sequential relationship of the indicated technical features. In the following description, the consecutive reference numerals for method steps are for ease of review and understanding. Adjusting the implementation order of steps, in conjunction with the overall technical solution of the present invention and the logical relationship between the various steps, will not affect the technical effect achieved by the technical solution of the present invention. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0082] refer to Figure 1 It was made public Figure 1 This is a flowchart illustrating the active power filter control method according to an embodiment of the present invention, which includes, but is not limited to, steps S100 to S300:

[0083] S100: Based on the harmonic mitigation requirements, the grid-connected current of the harmonic load is collected, and a first signal is obtained through harmonic extraction calculation. The first signal is used to characterize the command signal for harmonic compensation current.

[0084] S200, acquire the second signal of the active power filter. The second signal is used to characterize the sampled signal of the actual harmonic compensation current emitted by the active power filter.

[0085] S300 creates a controller in the z-domain, determines the error sequence signal input to the controller through the first signal and the second signal, and outputs a modulation wave signal through the controller so that the error sequence signal of harmonic mitigation converges at the desired speed.

[0086] refer to Figure 2 , Figure 2 This is a schematic diagram of an Active Power Filter (APF) control system. Nonlinear loads are considered harmonic sources, injecting harmonic currents into the power grid. Parallel-connected APFs are used to mitigate harmonic current pollution caused by nonlinear loads. This device uses an algorithm to detect the load current in real time, extract its characteristic harmonic components, and emits a reverse harmonic current with a phase angle 180° different from these characteristic harmonic components. This cancels out the characteristic harmonic components emitted by the nonlinear load, thus improving power quality. In the diagram, subscripts a, b, and c refer to the signals of phases a, b, and c, respectively.g u dc These are the grid voltage and the DC-side voltage of the APF, respectively; i load i h i ref,n These refer to the load current, the harmonic compensation current emitted by the APF, and the reference current used by the APF to compensate for the nth characteristic harmonic, respectively; L is the filter inductance of the APF.

[0087] In some embodiments, reference Figure 3 This embodiment takes a single phase as an example and provides an active power filter control method in which the current tracking error converges at the desired speed. Figure 3 This is a block diagram of the single-phase control of an active power filter. Figure 3 In the diagram: R(z) is the reference current i of the nth characteristic harmonic. ref,n The sampled signal is R(z); and R(z) is simply referred to as the "reference signal"; D(z) is the controller to be designed. The input of D(z) is the error sequence signal E(z), and E(z) = R(z) - I. h (z), where I h (z) is the sampling signal of the harmonic compensation current emitted by the APF; the corresponding output of D(z) is the modulation wave signal U. m (z), used for pulse width modulation. Link z -1 This represents the one-step control delay required by the control system from sampling the current signal to loading the modulation signal, and is represented by G. delay (z) represents the link K. pwm The gain represents the average switching model of the APF. The element (T / L) / (z-1) represents the discrete model of the L-type output filter of the APF, obtained using the step response invariance method. Furthermore, element K... pwm The elements (T / L) / (z-1) constitute the generalized controlled object G. plant (z).

[0088] refer to Figure 4 It was made public Figure 4 This is a schematic diagram of the controller creation process according to an embodiment of the present invention, which includes, but is not limited to, steps S310 to S350:

[0089] S310, Based on the expected convergence rate of the tracking error, determine the error transfer function.

[0090] In some embodiments, to ensure that the tracking error converges at a desired rate, the error transfer function is formulated as follows:

[0091] The reference signal R(z) is sinusoidal, and its expression is:

[0092]

[0093] In the formula, ω0 refers to the fundamental angular frequency, which is 100π rad / s; n refers to the frequency of the fundamental wave or characteristic harmonic, and n = 1, 2, 3...; T is the sampling period.

[0094] To ensure that the active power filter control system has minimum-step control performance, the error transfer function T is proposed. e The form of (z) is given by equation (2). The so-called "minimum-cycle control" means minimizing the number of terms in the error sequence E(z); in other words, the control system achieves the minimum number of control cycles required to minimize the number of terms in I. h (z) tracks R(z).

[0095] T e (z)=1-2cos(n·ω0T)z -1 +z -2 (2)

[0096] Equation (2) is the denominator of the reference signal R(z).

[0097] Based on the structural characteristics of a unity negative feedback system, it can be seen that the error sequence E(z) and the error transfer function T e (z) satisfies the following relation:

[0098] E(z)=R(z·T) e (z) (3)

[0099] Substituting equations (1) and (2) into equation (3), we get:

[0100] E(z)=sin(n·ω0T)z -1 (4)

[0101] From equation (4), it can be seen that the error sequence contains only a 1-beat delay (z). -1 The term (2) indicates that the system only needs to undergo one control cycle to achieve zero steady-state error; in other words, the adjustment time of the control system is one cycle. However, an excessively short adjustment time will inevitably lead to excessive overshoot. Therefore, it is necessary to further modify the error transfer function T based on equation (2). e (z).

[0102] An exponential decay term can be added to equation (2) to make the error sequence E(z) decrease from containing only z. -1 The term is transformed into an infinite decay term, that is, the adjustment time of the control system is extended to reduce the system overshoot and meet the engineering requirements. After modification, the error transfer function T e (z) is in the form of:

[0103]

[0104] In the formula, a is the attenuation factor and is a positive real number; This is an exponentially decaying term.

[0105] Substituting equation (5) into equation (3), we obtain the new error sequence expression E(z):

[0106]

[0107] In equation (6), the exponential decay term can be expressed as a power series: 1 + e -aT z -1 +e -2aT z -2 +……; then, the power series form of the corresponding error sequence is: E(z)=sin(n·ω0T)·(z -1 +e -aT z -2 +e -2aT z -3 +……). Obviously, E(z) needs to converge to 0 after an infinite number of beats, but by changing the magnitude of the decay factor a, different error convergence rates can be obtained.

[0108] S320, based on the structural constraints of the unity negative feedback system, determine the closed-loop transfer function and the open-loop transfer function.

[0109] In some embodiments, the closed-loop and open-loop transfer functions are determined by the structural constraints of the unity negative feedback system, including:

[0110] Define T sys (z), G sys (z) represent the closed-loop and open-loop transfer functions of the system, respectively. The unity negative feedback system satisfies the following structural constraints: T sys (z)+T e (z) = 1. Now we know T e The form of (z), corresponding to equation (5), can be derived from the above structural constraints, T. sys The proposed form of (z):

[0111]

[0112] Furthermore, in a unity negative feedback system, the open-loop transfer function G sys (z) and closed-loop transfer function T sys (z), Error transfer function T e The following relationship exists between (z):

[0113]

[0114] Substituting equations (7) and (5) into equation (8), we can obtain G. sys The proposed form of (z):

[0115]

[0116] S330, the controller is determined based on the open-loop transfer function.

[0117] In some embodiments, the form of the controller is derived from the proposed open-loop transfer function, including:

[0118] Depend on Figure 2 It is easy to see that the controller D(z) and the proposed open-loop transfer function G sys (z) satisfies the following relation:

[0119]

[0120] G plant (z)=K pwm (T / L) / (z-1), G delay (z)=z -1 Substituting equation (9) into equation (10), we obtain the form of the controller D(z):

[0121]

[0122] From equation (11), it can be seen that the order of the numerator is greater than the order of the denominator, therefore the controller D(z) is unrealizable. Further analysis reveals that the reason D(z) is unrealizable is that its numerator contains an additional variable derived from G. delay The z-term introduced in the (z) stage should be understood in conjunction with equations (10) and (11). Therefore, G is ignored when designing the controller. delay In the (z) stage, if the order of the numerator in D(z) is equal to the order of the denominator, then the controller can be implemented. Therefore, the form of the controller D(z) is modified as follows:

[0123]

[0124] To facilitate observation of the zeros of the controller D(z), let k = 2cos(n·ω0T) - e -aT Equation (12) can then be expressed as:

[0125]

[0126] In the formula, 1 / k is a real zero of D(z), and the position of this zero on the real axis is determined by the attenuation factor a.

[0127] S340 optimizes the controller based on zero steady-state error.

[0128] In some embodiments, by Figure 3 It is easy to see that the actual open-loop transfer function G sys (z) has the following relationship:

[0129] G sys(z)=D(z)·G delay (z)·G plant (z) (14)

[0130] And equation (13), G delay (z)=z -1 G plant (z)=K pwm Substituting (T / L) / (z-1) into equation (14), we can obtain G. sys The expression for (z) is:

[0131]

[0132] in,

[0133] From equation (15), we can see that: This indicates that the (z-1) term in the D(z) molecule cancels out G. plant (z) The (z-1) term in the denominator; In fact, the controller and the active power filter filter inductor provide one zero and one pole respectively at 1+j0 on the real axis, and they cancel each other out; This downgrades the system type to type 0.

[0134] Static error coefficient method: According to equation (15), the static position error coefficient K can be obtained. p The expression is:

[0135]

[0136] K p The value of is not infinite, and the system has a steady-state error.

[0137] To achieve zero steady-state error control, the zero point of equation (13), i.e., D(z), at 1+j0 on the real axis, is shifted slightly to the left along the real axis so that it does not cancel out the pole 1+j0 provided by the filter inductor. Since the leftward shift of the zero point is very small, its impact on other control performance indicators can be ignored. Furthermore, the shifted zero point is denoted by the symbol z. c (z c If the value range is 0.8 to 0.99, then the corrected controller D(z) can be expressed as:

[0138]

[0139] Meanwhile, the actual open-loop transfer function expression is corrected to:

[0140]

[0141] It is easy to see from equation (18) that the filter inductance term 1 / (z-1) is not affected by the zero-point term (zz) of the controller.c If the error is offset by the static position error coefficient K, the system type is upgraded to Type I. Correspondingly, the static position error coefficient K of the system... p If =∞, then the steady-state error of the system is 0.

[0142] In some embodiments, the technical solution of the present invention further includes confirming the final expression of the controller D(z) to meet different index requirements. That is, in order to ensure the absolute stability of the system and to meet the relative stability (different dynamic performance index) requirements, K can be added to the controller D(z), i.e., to equation (18). gain The term is used to adjust the root locus gain. Therefore, the final expression for the controller D(z) is:

[0143]

[0144] refer to Figure 5 , Figure 5 The value of K is given when the value of a is fixed. gain The changes in the location of the closed-loop poles when K takes different values. Clearly, when the value of 'a' is fixed, the root locus is determined; but when K... gain When K = 1, there will be two closed-loop poles outside the unit circle, and the system is unstable; when K = 1, there will be two closed-loop poles outside the unit circle, and the system is unstable. gain When K = 0.04, the two poles outside the unit circle will return to the unit circle along the root locus, and the system will regain stability. Meanwhile, K... gain By taking different values, the closed-loop poles can be located at different positions within the unit circle, thus obtaining different dynamic performance requirements.

[0145] S350, obtain the difference equation corresponding to the controller.

[0146] In some embodiments, the difference equation of the controller D(z) is also included:

[0147] u c (k)=n2e(k)+n1e(k-1)+n0e(k-2)-d1u c (k-1)-d0u c (k-2) (20)

[0148] In the formula,

[0149]

[0150]

[0151] d1=-2cos(n·ω0T); d0=1.

[0152] For example, taking the control of a 50Hz signal as an example, the fundamental current controller can be obtained from equation (19):

[0153]

[0154] Accordingly, theoretically the error sequence E(z) is:

[0155]

[0156] Considering the control delay of the digital control system in one step, the actual error sequence E(z) is:

[0157]

[0158] From equation (23), it can be seen that the larger the value of a, that is, the smaller the corresponding k, the closer the decay form of the actual error sequence E(z) is to the expected exponential decay form [corresponding to equation (22)]. (Refer to...) Figure 6a and Figure 6b It provides an example of a schematic diagram comparing the sinusoidal response of a real closed-loop system when the attenuation factor a takes different values.

[0159] Figure 6a It can be seen that when the attenuation factor a = 80 is relatively small, the actual output signal I... h (z) requires a relatively long time to track the reference input signal R(z), and the tracking error is relatively large; while Figure 6b In the above, when the attenuation factor a = 500 is relatively large, the actual output signal I... h (z) can track the reference input signal R(z) in a relatively short time with a small tracking error. Therefore, by increasing the value of the attenuation factor a, a faster error convergence speed can be obtained.

[0160] Figure 7 , Figure 8 The convergence of the error sequence E(z) (corresponding to the actual and the proposed error sequences) is given for different values ​​of 'a', with and without considering the delay. Figure 7 When a = 80, consider the convergence of the delay error sequence E(z) with and without considering the convergence. Figure 8 When a = 500, consider the convergence of the delay error sequence E(z) with or without considering it.

[0161] Depend on Figure 7 It can be seen that when the attenuation factor a is small, taking a = 80 as an example, the error sequence E(z) considering the delay decays in a sinusoidal form. And from... Figure 8 It can be seen that when the attenuation factor a is large, taking a=500 as an example, the attenuation form of the delayed error sequence E(z) is close to the expected error sequence E(z); that is, the larger the attenuation factor a is, the closer the attenuation form of the actual error sequence E(z) is to the expected exponential attenuation form [corresponding to equation (22)].

[0162] also, Figure 9 The shift in the frequency corresponding to the resonance peak is presented when using a digital proportional resonant controller and the controller designed according to the technical solution of this invention to control the 17th harmonic. The proportional resonant controller is obtained by discretization using the Tustin method (bilinear transform method).

[0163] Depend on Figure 9 It can be seen that after discretization by the Tustin method, the resonant peak frequency of the digital proportional resonant controller is 831Hz, which deviates significantly from the design frequency of 850Hz, resulting in frequency offset. This makes it difficult for the control system to achieve zero steady-state error tracking. However, the controller designed by this method does not exhibit frequency offset at its resonant peak, ensuring that the harmonic compensation current emitted by the active power filter accurately tracks the reference current.

[0164] In summary, a controller in the form of equation (19) enables, as Figure 2 and Figure 3 The error signal of the active power filter control system shown converges to zero at the desired rate; simultaneously, this can be achieved by adjusting K. gain The value of satisfies the requirements for different dynamic performances and has no frequency offset for high-frequency signal control.

[0165] According to embodiments of the present invention, the technical solution of the present invention has at least the following beneficial effects: The harmonic current controller is designed directly in the z-domain, thus avoiding the control frequency offset problem that occurs during the analog-to-digital conversion of the controller, thereby achieving zero steady-state error tracking. The designed current controller allows the tracking error to decay at the desired rate, meeting the individual requirements for harmonic dynamic mitigation performance in various scenarios.

[0166] like Figure 10 As shown, this embodiment of the invention also provides an active power filter control device, which includes a first acquisition module 1001, a second acquisition module 1002, and a controller processing module 1003.

[0167] The system comprises the following modules: a first acquisition module, which acquires the grid-connected current of the harmonic load according to the harmonic mitigation requirements and obtains a first signal through harmonic extraction calculation; the first signal is used to characterize the command signal of the harmonic compensation current; a second acquisition module, which acquires the second signal of the active power filter; the second signal is used to characterize the sampling signal of the actual harmonic compensation current emitted by the active power filter; and a controller processing module, which creates a controller in the z-domain, determines the error sequence signal input to the controller through the first and second signals, and outputs a modulation wave signal through the controller to make the error sequence signal of harmonic mitigation converge at the desired speed.

[0168] Exemplarily, with the cooperation of the first acquisition module, the second acquisition module, and the controller processing module in the device, the embodiment device can implement any of the aforementioned active power filter control methods, namely, acquiring the grid-connected current of the harmonic load and obtaining a first signal through harmonic extraction calculation, the first signal being used to characterize the command signal of the harmonic compensation current; acquiring the second signal of the active power filter, the second signal being used to characterize the sampling signal of the actual harmonic compensation current emitted by the active power filter; creating a controller in the z-domain, determining the error sequence signal input to the controller through the first and second signals, and outputting a modulation wave signal through the controller to make the harmonic mitigation error sequence signal converge at the desired speed. The beneficial effects of the present invention are: the harmonic current controller is designed directly in the z-domain, thus avoiding the control frequency offset problem that occurs during the analog-to-digital conversion of the controller, thereby achieving zero steady-state error tracking effect. The designed current controller can make the tracking error decay at the desired speed, meeting the individual needs of harmonic dynamic mitigation performance in multiple scenarios.

[0169] This invention also provides a computer-readable storage medium storing a program that is executed by a processor to implement the active power filter control method described above.

[0170] In some alternative embodiments, the functions / operations mentioned in the block diagrams may not occur in the order shown in the operation diagrams. For example, depending on the functions / operations involved, two consecutively shown blocks may actually be executed substantially simultaneously, or the blocks may sometimes be executed in reverse order. Furthermore, the embodiments presented and described in the flowcharts of this invention are provided by way of example to provide a more comprehensive understanding of the technology. The disclosed methods are not limited to the operations and logic flows presented herein. Alternative embodiments are contemplated in which the order of various operations is altered and sub-operations described as part of a larger operation are executed independently.

[0171] This invention also discloses a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device can read the computer instructions from the computer-readable storage medium and execute the computer instructions, causing the computer device to perform the aforementioned active power filter control method.

[0172] Furthermore, although the invention has been described in the context of functional modules, it should be understood that, unless otherwise stated, one or more of the described functions and / or features may be integrated into a single physical device and / or software module, or one or more functions and / or features may be implemented in a separate physical device or software module. It is also understood that a detailed discussion of the actual implementation of each module is unnecessary for understanding the invention. Rather, given the properties, functions, and internal relationships of the various functional modules in the apparatus disclosed herein, the actual implementation of the module will be understood within the scope of conventional skill of an engineer. Therefore, those skilled in the art can implement the invention as set forth in the claims using ordinary techniques without excessive experimentation. It is also understood that the specific concepts disclosed are merely illustrative and not intended to limit the scope of the invention, which is determined by the full scope of the appended claims and their equivalents.

[0173] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0174] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device.

[0175] More specific examples of computer-readable media (a non-exhaustive list) include: electrical connections (electronic devices) having one or more wires, portable computer disk drives (magnetic devices), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Furthermore, computer-readable media can even be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in computer memory.

[0176] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0177] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0178] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

[0179] The above is a detailed description of the preferred embodiments of the present invention, but the present invention is not limited to the embodiments described. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention, and these equivalent modifications or substitutions are all included within the scope defined by the claims of this application.

Claims

1. A control method for an active power filter, characterized in that, include: According to the requirements of harmonic mitigation, the grid-connected current of the harmonic load is collected and a first signal is obtained through harmonic extraction calculation. The first signal is used to characterize the command signal of the harmonic compensation current. Acquire a second signal from the active power filter, which is used to characterize the sampled signal of the actual harmonic compensation current emitted by the active power filter; exist z A domain creation controller is established, which determines the error sequence signal input to the controller through the first signal and the second signal, and outputs a modulation wave signal through the controller so that the error sequence signal of harmonic mitigation converges at the desired speed. The above z Domain controller creation includes: Based on the expected convergence rate of the tracking error, the error transfer function is determined; Based on the structural constraints of the unity negative feedback system, determine the closed-loop transfer function and the open-loop transfer function; The controller is determined based on the open-loop transfer function; The controller is optimized based on zero steady-state error; And, obtain the difference equation corresponding to the controller; The step of determining the error transfer function based on the expected convergence rate of the tracking error includes: The proposed error transfer function T e ( z )for ， in, n The frequency of characteristic harmonics, and has n =1,2,3……; T The sampling period is ω 0 refers to the fundamental angular frequency; a It is the attenuation factor and is a positive real number; z represent z Transformation operators; Based on a unity negative feedback system, where the reference signal R ( z ), error sequence E ( z and error transfer function T e ( z ) satisfies the following relationship ， in ， ， The first signal is a reference signal R ( z ); The determination of the closed-loop transfer function and open-loop transfer function based on the structural constraints of the unity negative feedback system includes: Based on the unit negative feedback system, determine T sys ( z )+ T e ( z )=1, where T sys ( z ) represents the closed-loop transfer function of the system, the T e ( z Given the error transfer function, determine the closed-loop transfer function. T sys ( z )for ， Based on a unity negative feedback system, the open-loop transfer function... G sys ( z ) and closed-loop transfer function T sys ( z Error transfer function T e ( z Between ), the following relationship is satisfied: ， Determine the open-loop transfer function G sys ( z )for 。 2. The active power filter control method according to claim 1, characterized in that, The step of determining the controller based on the open-loop transfer function includes: According to the open-loop transfer function G sys ( z ) and the controller D ( z The relationship between ) ， in G delay ( z ) indicates a stage z 1 This represents the one-step control delay required by the control system from sampling the current signal to loading the modulation signal, i.e. G delay ( z )= z 1 ; G plant ( z () refers to the broad category of controlled entities. G plant ( z ) Through the process K pwm and links ( T / L ) / ( z 1) Composition, links ( T / L ) / ( z 1) Represents an active power filter L The discrete model of the output filter is obtained through the step response invariance method. K pwm The gain represents the average switching model of the active power filter; Determine the controller D ( z )for ， For the controller D ( z Modifications were made, including changes to the process. G delay ( z Ignore this, and you will get the modified controller. D ( z )for 。 3. The active power filter control method according to claim 2, characterized in that, The controller performs optimization based on zero steady-state error, including: According to the open-loop transfer function G sys ( z The controller D ( z ), the G delay ( z ) and the broadly controlled object G plant ( z The relationship between the static position error coefficient and the static position error coefficient is determined by the static error coefficient method. K p This leads to the correction of the controller. D ( z The zero point position at 1 on the real axis; Wherein, the open-loop transfer function G sys ( z The controller D ( z ), G delay ( z ) and the broadly controlled object G plant ( z The relationship is ， Wherein, the static position error coefficient K p for ， Among them, the controller to be corrected D ( z )for ， in , 1 / k For the controller D ( z A real zero of ), and the position of this zero on the real axis is determined by the attenuation factor. a Sure; The modified controller is obtained. D ( z )for ， The modified open-loop transfer function is obtained. G sys ( z )for ， in, z c This is the modified zero-point position, and z c For a value less than 1, the filter inductance term 1 / ( z 1) No connection with controller D ( z The zero point item () z z c The static position error coefficient is offset by the static position error coefficient. K p =∞.

4. The active power filter control method according to claim 3, characterized in that, The method further includes: For the controller D ( z )Add to K gain The term is used to change the root trajectory gain of the system, resulting in the controller. D ( z )for ； in, K gain The project makes dynamic adjustments based on the stability of the negative feedback control system.

5. The active power filter control method according to claim 4, characterized in that, The method further includes: According to the added K gain The controller of the item D ( z The controller is obtained by performing difference equations. D ( z The difference equation is: in, ， ， ， ， 。 6. An active power filter control device, characterized in that, For implementing the active power filter control method as described in any one of claims 1-5, the apparatus comprises: The first acquisition module is used to acquire the grid-connected current of the harmonic load according to the harmonic mitigation requirements, and obtain the first signal through harmonic extraction calculation. The first signal is used to characterize the command signal of the harmonic compensation current. The second acquisition module is used to acquire the second signal of the active power filter, which is used to characterize the sampling signal of the actual harmonic compensation current emitted by the active power filter. Controller processing module, used in z A domain creation controller is established to determine the error sequence signal input to the controller through the first signal and the second signal, and to output a modulation wave signal through the controller so that the error sequence signal of harmonic mitigation converges at the desired speed.

7. A computer-readable storage medium, characterized in that, The storage medium stores a program that is executed by a processor to implement the active power filter control method as described in any one of claims 1-5.

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