A resonant soft-switching inverter and a multi-envelope critical current control method thereof

Abstract

The present disclosure provides a resonant soft-switching inverter and a multi-envelope critical current control method thereof, the method comprising: controlling the first switch and the fourth switch to be turned on in a first time period; controlling the first switch, the second switch, the third switch and the fourth switch to be turned off in a second time period and a third time period; controlling the second switch and the third switch to be turned on and the first switch and the fourth switch to be turned off in a fourth time period; controlling the third switch to be turned on and the first switch, the second switch and the fourth switch to be turned off in a fifth time period and a sixth time period; controlling the third switch and the fourth switch to be turned on and the first switch and the second switch to be turned off in a seventh time period; controlling the fourth switch to be turned on and the first switch, the second switch and the third switch to be turned off in an eighth time period and a ninth time period; and controlling the first switch and the fourth switch to be turned on and the second switch and the third switch to be turned off in a tenth time period.

Description

Technical Field

[0001] This disclosure relates to the field of power technology, and in particular to a resonant soft-switching inverter and a multi-envelope critical current control method thereof. Background Technology

[0002] Current resonant soft-switching inverters typically employ the traditional critical current control method. However, the switching frequency at the zero-crossing point is 0 or the inductor current drop time at the zero-crossing point is relatively long, resulting in inductor current distortion, excessive total harmonic distortion, significant fluctuations in the transition between positive and negative half-cycles, and output voltage plateau issues. Summary of the Invention

[0003] Therefore, the purpose of this disclosure is to propose a resonant soft-switching inverter and its multi-envelope critical current control method.

[0004] Based on the above objectives, in a first aspect, this disclosure provides a multi-envelope critical current control method for a resonant soft-switching inverter. The resonant soft-switching inverter is connected between a DC-side power supply and a load, and includes: a full-bridge circuit, including a first switch, a second switch, a third switch, and a fourth switch; the first switch and the third switch are connected in series to form a first bridge arm, the second switch and the fourth switch are connected in series to form a second bridge arm, the first bridge arm and the second bridge arm are connected in parallel to the two ends of the DC-side power supply, the first switch and the second switch are connected to the positive terminal of the DC-side power supply, and the third switch and the fourth switch are connected to the negative terminal of the DC-side power supply; and a resonant inductor Ls, connected to the AC side of the full-bridge circuit, used to realize high-frequency resonance on the AC side of the resonant soft-switching inverter.

[0005] The method includes:

[0006] During the first time period, the first and fourth switches of the full-bridge circuit are turned on.

[0007] During the second and third time periods, the first, second, third, and fourth switches controlling the full-bridge circuit are all turned off.

[0008] During the fourth time period, the second and third switches controlling the full-bridge circuit are turned on, while the first and fourth switches are turned off.

[0009] During the fifth and sixth time periods, the third switch controlling the full-bridge circuit is turned on, while the first, second, and fourth switches are turned off.

[0010] During the seventh time period, the third and fourth switches controlling the full-bridge circuit are turned on, while the first and second switches are turned off.

[0011] During the eighth and ninth time periods, the fourth switch controlling the full-bridge circuit is turned on, while the first, second, and third switches are turned off.

[0012] During the tenth time period, the first and fourth switches controlling the full-bridge circuit are turned on, while the second and third switches are turned off.

[0013] In some embodiments, a first diode and a first capacitor are connected in parallel across the two ends of the first switch, a second diode and a second capacitor are connected in parallel across the two ends of the second switch, a third diode and a third capacitor are connected in parallel across the two ends of the third switch, and a fourth diode and a fourth capacitor are connected in parallel across the two ends of the fourth switch.

[0014] During the first time period, the second and third capacitors are charged, and the resonant current iLs of the resonant inductor Ls increases.

[0015] In some embodiments, during the second time period, the second diode and the third diode are turned on, the second capacitor and the third capacitor are discharged, the first capacitor and the fourth capacitor are charged, and the resonant current iLs of the resonant inductor Ls rises to the first current value ip1.

[0016] In some embodiments, during the third time period, the second diode and the third diode are turned on, and the DC power supply, the second diode, the resonant inductor, the filter circuit, the load, and the third diode form a loop.

[0017] In some embodiments, during the fourth time period, the second and third switches are turned on with zero voltage, and the resonant current iLs of the resonant inductor Ls decreases.

[0018] In some embodiments, during the fifth time period, the second switch is turned off with zero current, the fourth diode is turned on, the fourth capacitor is discharged, the second capacitor is charged, and the resonant current iLs of the resonant inductor Ls drops to the third current value ip3.

[0019] In some embodiments, during the sixth time period, the fourth diode is turned on, and the resonant current iLs of the resonant inductor Ls rises in the reverse direction.

[0020] In some embodiments, during the seventh time period, the fourth switch is turned on with zero voltage, and the resonant current iLs of the resonant inductor Ls rises in the reverse direction.

[0021] In some embodiments, during the eighth time period, the first diode is turned on, the first capacitor is discharged, the third capacitor is charged, and the resonant current iLs of the resonant inductor Ls rises in reverse to the second current value ip2; during the ninth time period, the first diode is turned on; and during the tenth time period, the first switch is turned on with zero voltage.

[0022] On the other hand, this disclosure provides a resonant soft-switching inverter that is controlled using the method described in the first aspect.

[0023] As can be seen from the above, the resonant soft-switching inverter and its multi-envelope critical current control method provided in this disclosure, under the multi-envelope critical current control mode, achieves zero-voltage turn-on and zero-current turn-off of the switching transistors through the resonance between the resonant inductor and the output capacitor of the switching transistors, with all four switching transistors operating at high frequency. This significantly reduces the inductor current fall time, alleviates phenomena such as zero-crossing distortion caused by excessively long switching cycles, and reduces output current harmonics. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in this disclosure or related technologies, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a schematic main circuit diagram of a resonant soft-switching inverter according to an embodiment of the present disclosure.

[0026] Figure 2 This is a schematic diagram of the envelope of different critical current modes according to embodiments of the present disclosure.

[0027] Figure 3a - Figure 3j This is a schematic diagram of the operation process of a resonant soft-switching inverter according to an embodiment of the present disclosure.

[0028] Figure 4 This is a schematic diagram of the resonant inductor waveform in the multi-envelope critical current mode according to an embodiment of the present disclosure.

[0029] Figure 5 The diagram shows the fall time curves of the resonant inductor current under three critical current modes according to embodiments of the present disclosure.

[0030] Figure 6 This is a waveform diagram of the multi-envelope critical current mode according to an embodiment of the present disclosure.

[0031] Figure 7 This is a waveform diagram of a multi-envelope critical current mode switching transistor according to an embodiment of the present disclosure.

[0032] Figure 8 This is a waveform diagram of a multi-envelope critical current mode switching transistor according to an embodiment of the present disclosure. Detailed Implementation

[0033] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.

[0034] It should be noted that, unless otherwise defined, the technical or scientific terms used in the embodiments of this disclosure should have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms "first," "second," and similar terms used in the embodiments of this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect.

[0035] The widespread application of renewable energy has made inverters crucial energy conversion devices. With increasing demands for high power density and high efficiency, soft-switching inverter technology has become a research hotspot. Soft-switching inverter technology can be categorized into DC resonant mode, resonant pole mode, buffer resonant circuit, and load-side resonant mode, depending on the location of the resonant and auxiliary components within the inverter. Load-side resonant inverter technology is primarily used in low-power inverters. Without adding any components, it achieves bidirectional inductor current flow by forming a resonant circuit through the junction capacitance of the switching transistor and the output inductor, thus forming zero-voltage switching (ZVS), also known as Boundary Current Mode (BCM). BCM can be further divided into various control modes based on differences in envelope, modulation strategy, and control method.

[0036] Currently, traditional unipolar constant-boundary current mode (CBCM) inverters offer high efficiency and low losses. However, the zero-crossing switching frequency leads to inductor current distortion, significant fluctuations during the transition between positive and negative half-cycles, and excessively high total harmonic distortion (THD). Unipolar sinusoidal hysteresis current mode (SHCM) sinusoidally transforms the envelope of traditional CBCM, ensuring the switching frequency is no longer zero at the zero-crossing point, effectively mitigating the zero-crossing problem and relatively reducing output current harmonics. However, the relatively long inductor current fall time at the zero-crossing point results in an excessively long switching cycle, still leading to inductor current distortion and output voltage plateau issues. Therefore, traditional critical current mode suffers from zero-crossing problems, and output current harmonics need to be reduced. Furthermore, traditional critical current control strategies exhibit inductor current distortion at the zero-crossing point, output voltage plateaus, and high total harmonic distortion of the output current, failing to meet the requirements of inverters. Improving existing control strategies requires mitigating issues such as zero-crossing distortion and reducing total harmonic distortion (THD). Therefore, improving zero-crossing distortion and output voltage plateau in inverter control, and reducing THD, has become a pressing technical challenge.

[0037] In view of this, the present disclosure provides a resonant soft-switching inverter and its control method. In the multi-envelope critical current control mode, zero-voltage turn-on and zero-current turn-off of the switching transistors can be achieved through the resonance of the resonant inductor and the output capacitor of the switching transistors, with all four switching transistors operating at high frequency. This significantly reduces the inductor current fall time, alleviates phenomena such as zero-crossing distortion caused by excessively long switching cycles, and reduces output current harmonics.

[0038] See Figure 1 , Figure 1 A schematic main circuit diagram of a resonant soft-switching inverter according to an embodiment of the present disclosure is shown. Figure 1 In this circuit, the resonant soft-switching inverter 100 can be a single-phase inverter connected between the DC power supply 200 and the load RL, used to convert the DC input voltage Vin of the DC power supply 200 into the load AC voltage vo on the load side.

[0039] In some embodiments, the resonant soft-switching inverter 100 may include:

[0040] A full-bridge circuit 110, with its DC-side input connected to a DC-side power supply 200, includes a first switching unit 111, a second switching unit 112, a third switching unit 113, and a fourth switching unit 114. The first switching unit 111 includes a first switching transistor Q1 and a first diode and a first capacitor Co1 connected in parallel with Q1. The second switching unit 112 includes a second switching transistor Q2 and a second diode and a second capacitor Co2 connected in parallel with Q2. The third switching unit 113 includes a third switching transistor Q3 and a third diode and a third capacitor Co3 connected in parallel with Q3. The fourth switching unit 114 includes a fourth switching transistor Q4 and a fourth diode and a fourth capacitor Co4 connected in parallel with Q4. The first switching transistor Q1 and the third switching transistor Q3 are connected in series across the DC-side power supply 200, forming a first bridge arm; the second switching transistor Q3 and the fourth switching transistor Q4 are connected in series across the DC-side power supply 200, forming a second bridge arm. The first connection point a between the first switch Q1 and the third switch Q3, and the second connection point b between the second switch Q2 and the fourth switch S4 serve as the AC output terminals of the full-bridge circuit 110. This full-bridge circuit 110 converts the DC input voltage Vin of the DC power supply 200 into the AC voltage of the inverter.

[0041] A resonant circuit 120 is connected to the AC side of the full-bridge circuit 110 (e.g., the AC output terminal or the first connection point a). The resonant circuit 120 may include a resonant inductor Ls for achieving high-frequency resonance of the AC side of the full-bridge current 110 of the inverter.

[0042] A filter circuit 130, connected between the resonant circuit 120 and the load RL, includes a filter inductor Lo and a filter capacitor Cs. The filter capacitor Cs is connected between the output terminal of the resonant inductor Ls and the second connection point b, and the filter inductor Lo is connected between the output terminal of the resonant inductor Ls and the load RL. This filter circuit 130 can be used to filter the output of the resonant circuit 120 to obtain a filtered voltage. Further, this filtered voltage is output to the load RL. The components include the resonant current iLS passing through the resonant inductor Ls, the filtered current io passing through the filter inductor Lo, the filtered voltage vLo across the filter inductor Lo, and the load voltage vo across the load RL.

[0043] Specifically, such as Figure 1 As shown, Vin is the DC input voltage, Vab is the midpoint voltage of the bridge arm, vo is the output voltage, Co1-Co4 are the output capacitors of switching transistors Q1-Q4 respectively, iLS and io are the resonant inductor current and output current respectively, iQ2 is the current flowing through switching transistor Q2, and RL is the load resistance. The resonant soft-switching inverter 100 utilizes the resonance between the resonant inductor Ls and the output capacitors of the switching transistors to achieve soft switching.

[0044] See Figure 2 , Figure 2 A schematic diagram of the envelope of different critical current modes according to embodiments of the present disclosure is shown. Figure 2 In the envelope of the unipolar constant critical current control mode (CBCM), ip+ is the upper envelope boundary of the positive half-cycle, ip- is the lower envelope boundary of the positive half-cycle, Iopeak is the peak value of the output current of the resonant soft-switching inverter, Io is the effective value of the output current of the resonant soft-switching inverter, ΔI is the bias (e.g., a constant), and w is the operating angular frequency. In the envelope of the unipolar sinusoidal hysteresis current mode (SHCM), ip1 is the upper envelope boundary of the positive half-cycle, ip2 is the lower envelope boundary of the positive half-cycle, Ilow is the peak value of the reset current, Io is the effective value of the output current, Iopeak is the peak value of the output current of the resonant soft-switching inverter, and w is the operating angular frequency. In the multi-envelope critical current control mode, ip1 is the upper envelope boundary of the positive half-cycle, ip2 is the middle envelope boundary, ip3 is the lower envelope boundary of the positive half-cycle, Ilow is the peak value of the reset current, Io is the effective value of the output current, Iopeak is the peak value of the resonant soft-switching inverter, and w is the operating angular frequency.

[0045] In the multi-envelope critical current control mode of this disclosure embodiment, zero-voltage turn-on and zero-current turn-off of the switching transistors can be achieved through the resonance between the resonant inductor Ls and the output capacitor of the switching transistors, with all four switching transistors operating at high frequency. Based on the polarity of the output voltage, the inverter process can be divided into positive and negative half-cycles. This disclosure analyzes the working principle of the multi-envelope critical current control mode using the positive half-cycle of the output voltage as an example. One switching cycle can be divided into 10 operating modes, and the inverter switching process is as follows: Figure 3a - Figure 3j As shown, Figure 3a - Figure 3j A schematic diagram illustrating the operation of a resonant soft-switching inverter according to an embodiment of this disclosure is shown.

[0046] In the first time period, Mode I (t0-t1): the resonant inductor Ls is charging. Starting at time t0, switches Q1 and Q4 are forward-biased, the midpoint voltage Vab of the bridge arm is equal to the DC input voltage Vin, and capacitors Co2 and Co3 charge, their voltage gradually rising to Vin. The equivalent circuit diagram is shown below. Figure 3a As shown. At this time, energy is transferred from the input side to the resonant inductor Ls and the load RL. The resonant inductor Ls is charged, and the current iLs in the resonant inductor Ls increases linearly, as shown. Figure 4 As shown, Figure 4 A schematic diagram of the resonant inductor waveform in a multi-envelope critical current mode according to an embodiment of the present disclosure is shown. The waveform expression of the current iLs in the resonant inductor Ls is:

[0047]

[0048] In the formula, vLo is the voltage across the filter inductor Lo.

[0049] In the second time period, Mode II (t1-t2): Before time t1, the current iLs in the resonant inductor Ls increases linearly, and switches Q1 and Q4 are turned on, while switches Q2 and Q3 are turned off. Starting at time t1, the inductor current iLs rises to ip1i p1 When switches Q1 and Q4 are turned off, switches Q2 and Q3 enter reverse conduction via the body diode. Capacitors Co2 and Co3 begin to discharge, and their voltage drops from Vin to 0. Capacitors Co1 and Co4 charge, and their voltage rises from 0 to Vin. The circuit's conduction state is as follows: Figure 3b As shown.

[0050] The third time period, Mode III (t2-t3): Before time t2, all switches are off, and the capacitor charging and discharging process is complete. At time t2, switches Q2 and Q3 are in reverse freewheeling conduction mode, preparing for zero-voltage conduction. The voltage at the midpoint of the bridge arm changes from Vin to -Vin, and the circuit conduction state is as follows: Figure 3c As shown.

[0051] The fourth time period, mode IV (t3-t4): the discharge process of the resonant inductor Ls. Starting at time t3, Q2 and Q3 achieve zero-voltage turn-on, and the circuit conduction status is as follows. Figure 3d As shown. At this point, the inductor current iLs begins to decrease linearly, and its waveform expression is:

[0052]

[0053] In the fifth time period, Mode V (t4-t5): Before time t4, the inductor current iLs decreases linearly, and switches Q2 and Q3 are turned on, while switches Q1 and Q4 are turned off. At time t4, the inductor current iLs decreases to ip3, and switch Q2 is turned off. Since switch Q2 is in reverse conduction, Q2 achieves zero-current turn-off. Subsequently, capacitor Co4 begins to discharge, its voltage decreasing from Vin to 0, while capacitor Co2 begins to charge, its voltage increasing from 0 to Vin. At this time, the inductor current iLs continues to decrease to 0 and then reverses direction. Switch Q3 begins to conduct in the forward direction, and switch Q4 conducts in the reverse direction. The circuit's conduction state is as follows: Figure 3e As shown.

[0054] The sixth time period, Mode VI (t5-t6): Reverse charging process of resonant inductor Ls. Before time t5, switch Q3 is forward-biased, the other switches are off, and the capacitor charging and discharging process is complete. At time t5, Q4 begins reverse freewheeling conduction, preparing for its zero-voltage conduction. At this time, filter capacitor Cs begins to supply power to inductor Ls, and the inductor current iLs rises in the reverse direction. The circuit's conduction state is as follows: Figure 3f As shown.

[0055] The seventh time period, mode VII (t6-t7): Starting at time t6, the switching transistor Q4 is turned on with zero voltage, and the circuit's conduction state is as follows. Figure 3g As shown. At this time, the inductor current iLs is still rising in the reverse direction, and the expression for the inductor current becomes:

[0056]

[0057] In the eighth time period, Mode VIII (t7-t8): Before time t7, the inductor current iLs rises linearly in the reverse direction, switches Q3 and Q4 are turned on, and switches Q1 and Q2 are turned off. At time t7, the inductor current iLs rises in the reverse direction to ip2, switch Q3 is turned off, switches Q1 and Q4 conduct in the reverse direction, capacitor Co1 begins to discharge to 0, capacitor Co3 begins to charge to Vin, and the bridge arm midpoint voltage Vab changes from -Vin to Vin. The circuit conduction state is as follows: Figure 3h As shown.

[0058] In the ninth time period, mode IX (t8-t9): Before time t8, switch Q4 is turned on, the other switches are turned off, and switches Q1 and Q4 are in reverse conduction, ending the capacitor charging and discharging process. At time t8, switch Q1 begins reverse freewheeling conduction, preparing for its zero-voltage turn-on. The circuit's conduction state is as follows: Figure 3i As shown.

[0059] The tenth time period, mode X (t9-t10): the reverse discharge process of the resonant inductor Ls. Starting at time t9, the switch Q1 turns on with zero voltage. At this time, the inductor current iLs decreases in the reverse direction to 0, and the circuit's conduction state is as follows... Figure 3j As shown. Subsequently, the power supply starts to supply power, the inductor current iLs begins to rise linearly in the positive direction, and the switching transistors Q1 and Q4 begin to conduct in the forward direction.

[0060] At this point, a positive half-cycle of the switching cycle ends, and the state of the negative half-cycle is symmetrical to it, which will not be described in detail here. According to the multi-envelope critical current control mode of this disclosure embodiment, the multi-envelope achieves soft switching by utilizing the resonance of the filter inductor and the junction capacitance of the switching transistor without adding auxiliary components, thus reducing switching losses at high frequencies. The inverter inductor current waveform iLs, the switching transistor drive waveform vgs, the voltage waveform vds across the switching transistor, the current waveform iQ2 flowing through the switching transistor Q2, and the envelope distribution are as follows: Figure 4 As shown.

[0061] A switching cycle consists of the inductor current rise time ton and the fall time toff. Due to the different voltages across the inductor, the fall time toff is divided into two parts: toff1 and toff2. ton corresponds to modes I-III, toff1 to modes IV-VI, and toff2 to modes VII-VIII, as detailed below. Figure 4 As shown.

[0062] Based on the volt-second balance principle of inductor current, the expressions for the rise time ton and fall time toff of inductor current iLs in multi-envelope critical current mode can be obtained:

[0063]

[0064] Where Ls is the value of the filter inductance, ip1 is, ip2 is, ip3 is, Vin is the DC side voltage of the inverter, vo is the output voltage of the inverter, and vLo is the voltage of the filter inductance.

[0065] Since the filter inductor voltage vLo is relatively small compared to vo and Vin, it can be ignored. Therefore, the rise time t of the inductor current iLs in the multi-envelope control mode is... on descent time t off The expression becomes:

[0066]

[0067] Rise time t of unipolar SHCM on descent time t off The expression is:

[0068]

[0069] From equations (5), (6), and (7), it can be seen that the inductor current fall time t of the unipolar CBCM at the zero-crossing point is... off Approaching infinity, the descent time of a unipolar SHCM is... The descent time of the multi-envelope control mode is significantly reduced to Specific details are as follows: Figure 5 As shown, Figure 5 The diagram illustrates the fall time curves of the resonant inductor current under three critical current modes according to embodiments of this disclosure. It is evident that at the zero-crossing point, the fall time of the unipolar CBCM inductor current approaches infinity, resulting in an infinitely long switching period and thus significant zero-crossing distortion. Simultaneously, the fall time of the unipolar SHCM inductor current is a relatively long fixed value, thus the excessively long switching period still exists, and the zero-crossing problem remains unresolved. In contrast, the fall time of the inductor current in the multi-envelope critical current mode is significantly reduced, mitigating the zero-crossing distortion caused by the excessively long switching period and reducing output current harmonics.

[0070] According to an embodiment of this disclosure, a resonant soft-switching inverter is also provided, which is controlled by the method described in the embodiment of this disclosure.

[0071] See Figure 6 , Figure 6 A waveform diagram of the multi-envelope critical current mode according to an embodiment of the present disclosure is shown. The resonant soft-switching inverter can be 500W, with an input voltage of 380VDC, an effective output voltage of 220VAC, and a power of 500W, as shown in Table 1.

[0072] Table 1 Simulation parameters of 500W full-bridge inverter

[0073]

[0074] according to Figure 6 The waveforms of the inductor current iLs, output voltage vo, and filtered output current io clearly show that the multi-envelope critical current control mode does not have a zero-crossing problem, the waveform transition is smooth, and the output voltage THD is low at 1.57%, effectively reducing THD.

[0075] See Figure 7 , Figure 7 A waveform diagram of a multi-envelope critical current mode switching transistor according to an embodiment of the present disclosure is shown. All four switching transistors achieve zero-voltage turn-on. Taking switching transistor Q1 as an example... Figure 7 In this diagram, iLs represents the inductor current, vds represents the voltage across the switching transistor, and vgs represents the signal controlling the switching transistor's on / off state. Zero-voltage turn-on, where the switching transistor is turned on only after its output capacitor has fully discharged, reduces conduction losses. Figure 7 It can be clearly seen that after the voltage vds across the switching transistor is 0, Vgs controls the switching transistor Q1 to turn on, thus achieving zero-voltage switching (ZCS).

[0076] See Figure 8 , Figure 8 A waveform diagram of a multi-envelope critical current mode switch according to an embodiment of the present disclosure is shown. Taking switch Q2 as an example, Figure 8 In this circuit, the switching transistor Q2 achieves zero-current turn-off, where iLs represents the inductor current, iQ2 represents the current flowing through the switching transistor Q2, and vgs represents the signal controlling the switching transistor's on / off state. Zero-current turn-off means that the switching transistor turns off when the forward current flowing through it is zero, thus reducing turn-off losses. Figure 8 It can be clearly seen that the switching transistor Q2 is always in the reverse conduction or off state. At this time, VGS controls the switching transistor Q2 to turn off, which can realize zero voltage switching (ZCS).

[0077] As can be seen, compared with traditional CBCM and SHCM, the multi-envelope critical current mode according to the embodiments of this disclosure improves the zero-crossing distortion problem, smooths the transition between positive and negative half-cycles, realizes zero-voltage turn-on and zero-current turn-off of the switching transistor, reduces total harmonic distortion, and improves the performance of the inverter.

[0078] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of this disclosure (including the claims) is limited to these examples; within the framework of this disclosure, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of the embodiments of this disclosure as described above, which are not provided in detail for the sake of brevity.

[0079] Additionally, to simplify the description and discussion, and to avoid obscuring the embodiments of this disclosure, the provided drawings may or may not show well-known power / ground connections to integrated circuit (IC) chips and other components. Furthermore, the apparatus may be shown in block diagram form to avoid obscuring the embodiments of this disclosure, and this also takes into account the fact that the details of implementation of these block diagram apparatuses are highly dependent on the platform on which the embodiments of this disclosure will be implemented (i.e., these details should be fully understood by those skilled in the art). While specific details (e.g., circuitry) have been set forth to describe exemplary embodiments of this disclosure, it will be apparent to those skilled in the art that the embodiments of this disclosure may be implemented without these specific details or with variations thereof. Therefore, these descriptions should be considered illustrative rather than restrictive.

[0080] This disclosure is intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A multi-envelope critical current control method for a resonant soft-switching inverter, characterized in that, The resonant soft-switching inverter is connected between the DC power supply and the load, and includes: a full-bridge circuit comprising a first switch, a second switch, a third switch, and a fourth switch; the first and third switches are connected in series to form the first bridge arm, and the second and fourth switches are connected in series to form the second bridge arm; the first and second bridge arms are connected in parallel to the two ends of the DC power supply; the first and second switches are connected to the positive terminal of the DC power supply, and the third and fourth switches are connected to the negative terminal of the DC power supply; and a resonant inductor. Ls It is connected to the AC side of the full-bridge circuit to realize high-frequency resonance on the AC side of the resonant soft-switching inverter; the first switch has a first diode and a first capacitor connected in parallel across its two ends, the second switch has a second diode and a second capacitor connected in parallel across its two ends, the third switch has a third diode and a third capacitor connected in parallel across its two ends, and the fourth switch has a fourth diode and a fourth capacitor connected in parallel across its two ends. The method includes: During the first time period, the first and fourth switches of the full-bridge circuit are turned on. During the second and third time periods, the first, second, third, and fourth switches controlling the full-bridge circuit are all turned off; wherein, during the second time period, the second and third diodes are turned on, the second and third capacitors are discharged, and the first and fourth capacitors are charged; during the third time period, the second and third diodes are turned on, and the second and third capacitors are open-circuited. During the fourth time period, the second and third switches controlling the full-bridge circuit are turned on, while the first and fourth switches are turned off. During the fifth and sixth time periods, the third switch controlling the full-bridge circuit is turned on, while the first, second, and fourth switches are turned off. Specifically, during the fifth time period, the second switch is turned off with zero current, the fourth diode is turned on, the fourth capacitor is discharged, and the second capacitor is charged. During the sixth time period, the fourth diode is turned on, and the fourth and second capacitors are open-circuited. During the seventh time period, the third and fourth switches controlling the full-bridge circuit are turned on, while the first and second switches are turned off. During the eighth and ninth time periods, the fourth switch controlling the full-bridge circuit is turned on, while the first, second, and third switches are turned off. Specifically, during the eighth time period, the first diode is turned on, the first capacitor is discharged, and the third capacitor is charged. During the ninth time period, the first diode is turned on, and the first and third capacitors are open-circuited. During the tenth time period, the first and fourth switches controlling the full-bridge circuit are turned on, while the second and third switches are turned off.

2. The method according to claim 1, characterized in that, During the first time period, the second and third capacitors are charged, and the resonant current iLs of the resonant inductor Ls increases.

3. The method according to claim 2, characterized in that, During the second time period, the resonant current iLs of the resonant inductor Ls rises to the first current value ip1.

4. The method according to claim 2, characterized in that, In the third time period, the DC power supply, the second diode, the resonant inductor, the filter circuit, the load, and the third diode form a loop.

5. The method according to claim 2, characterized in that, During the fourth time period, the second and third switches are turned on with zero voltage, and the resonant current iLs of the resonant inductor Ls decreases.

6. The method according to claim 2, characterized in that, During the fifth time period, the resonant current iLs of the resonant inductor Ls drops to the third current value ip3.

7. The method according to claim 2, characterized in that, During the sixth time period, the resonant current iLs of the resonant inductor Ls rises in the reverse direction.

8. The method according to claim 7, characterized in that, During the seventh time period, the fourth switch is turned on with zero voltage, and the resonant current iLs of the resonant inductor Ls rises in the reverse direction.

9. The method according to claim 8, characterized in that, During the eighth time period, the resonant current iLs of the resonant inductor Ls rises in the reverse direction to the second current value ip2; during the tenth time period, the first switch turns on with zero voltage.

10. A resonant soft-switching inverter, characterized in that, Control is performed using the method described in any one of claims 1-9.

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