A method for manufacturing multilayer flexible printed circuit boards with high alignment accuracy between layers
By protecting the inner layer optical mark points in the manufacturing of multilayer flexible circuit boards, and utilizing the copper reduction process of the outer layer substrate and laser drilling technology, the damage problem of mark points during the copper reduction process is solved, achieving high alignment accuracy and high yield between layers.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SUIWA HIGH TECH ELECTRONICS INDS XIAMEN
- Filing Date
- 2023-01-29
- Publication Date
- 2026-07-17
Smart Images

Figure CN116193767B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of flexible circuit board manufacturing technology, and specifically relates to a method for manufacturing multilayer flexible circuit boards with high alignment accuracy between layers. Background Technology
[0002] In the flexible circuit board manufacturing process, for multilayer flexible boards where products need to undergo copper reduction after assembly and lamination, the traditional first approach is to pre-process the materials before assembly. During the inner layer circuitry fabrication, optical mark points are etched on the edge of the scrap board. Then, the adhesive layer and outer layer copper are repositioned to accommodate the inner layer optical mark points. This pre-processed material is then assembled and laminated. The laminated product then undergoes copper reduction, and the inner layer optical mark points are used for subsequent processes such as laser drilling. The traditional second approach differs in the adhesive layer processing during the pre-processing of the materials. Specifically, the adhesive layer is not repositioned at the inner layer optical mark points, while other material processing remains unchanged, and the process is carried out in the same manner as described above.
[0003] The traditional first method involves making way for the inner optical mark points in both the adhesive layer and the outer copper layer. In this case, before copper reduction after lamination, the inner optical mark points are already exposed. If copper reduction is performed at this point, the inner optical mark points are easily damaged by the copper reduction solution. If the inner layer itself is also thin copper with fine lines, the optical mark points are easily peeled off or lost due to excessive copper reduction. This will affect the production of other processes, so this method carries certain risks. The traditional second approach, which does not involve any compromise in the adhesive layer, places certain requirements on the material selection for the adhesive layer. It must ensure that the inner optical MARK points are transparent and clearly visible after lamination. If other lines, such as those with excessive copper content, are used, the adhesive layer may turn black due to chemical attacks from the lines, affecting the recognition of the inner optical MARK points. Even if none of the above issues arise, the additional adhesive layer covering the product's optical MARK points places certain demands on the machine's CCD recognition. Some CCDs cannot effectively display and recognize the optical MARK points in this area, thus this approach carries many uncertain risks. Summary of the Invention
[0004] The purpose of this invention is to provide a method for manufacturing multilayer flexible printed circuit boards with high alignment accuracy between layers to solve the aforementioned technical problems.
[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows: a method for manufacturing multilayer flexible printed circuit boards with high alignment accuracy between layers, comprising the following steps:
[0006] Step S1: Provide an inner layer substrate, an adhesive layer and an outer layer substrate; process the inner layer substrate to form inner layer circuits and optical MARK points; process the adhesive layer to form clearance holes for the optical MARK points; proceed to step S2.
[0007] Step S2: Stack and press the inner substrate, adhesive layer and outer substrate in sequence, and proceed to step S3;
[0008] Step S3: Perform copper reduction on the outer substrate and proceed to step S4;
[0009] Step S4: Open the outer substrate to expose the optical MARK dots.
[0010] Furthermore, in step S1, the optical MARK point includes a first optical MARK point and a second optical MARK point; step S4 includes:
[0011] Step S41: Open the outer substrate to expose the first optical MARK point, and proceed to step S42;
[0012] Step S42: Laser drilling is performed using the first optical MARK point for alignment. After laser drilling, copper plating is performed, and then proceed to step S43.
[0013] Step S43: Open the outer substrate to expose the second optical MARK point.
[0014] Furthermore, in step S1, the adhesive layer is processed by drilling or cutting to form clearance holes for the optical MARK point.
[0015] Further, in step S4, the outer substrate is opened by laser-controlled depth cutting to expose the optical MARK points.
[0016] Furthermore, in step S1, the inner substrate is a glue-free double-sided substrate, the outer substrate is a glue-free single-sided substrate, and there are two adhesive layers and two outer substrates. The two outer substrates are respectively bonded and fixed to the inner substrate on both sides by two adhesive layers.
[0017] Furthermore, the inner substrate includes a first PI substrate and a first copper foil layer disposed on both sides of the PI substrate, wherein the thickness of the first PI substrate is ≤50μm and the thickness of the first copper foil layer is ≤18μm.
[0018] Furthermore, the thickness of the first PI substrate is 50 μm, and the thickness of the first copper foil layer is 15 μm.
[0019] Furthermore, the outer substrate includes a second PI substrate and a second copper foil layer disposed on the second PI substrate, wherein the thickness of the second PI substrate is ≤25μm and the thickness of the second copper foil layer is ≤18μm.
[0020] Furthermore, the thickness of the second PI substrate is 12.5 μm, and the thickness of the second copper foil layer is 12 μm.
[0021] Furthermore, the thickness of the adhesive layer is ≤25μm.
[0022] Beneficial technical effects of the present invention:
[0023] In the copper reduction process, this invention protects the inner optical mark points by using the outer substrate, preventing damage to the inner optical mark points during the copper reduction process. This ensures the reliability and clarity of the optical mark points, guarantees reliable identification of the optical mark points to meet the alignment accuracy requirements between layers, improves the yield of subsequent processes, and has lower requirements for adhesive material selection, making it easy to implement. Attached Figure Description
[0024] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0025] Figure 1 This is a flowchart of the manufacturing method according to a specific embodiment of the present invention;
[0026] Figure 2 This is a schematic diagram of the product structure before pressing and fixing according to a specific embodiment of the present invention;
[0027] Figure 3 This is a schematic diagram of the product structure after pressing and fixing according to a specific embodiment of the present invention;
[0028] Figure 4 This is a schematic diagram of the product structure after opening the first optical MARK point according to a specific embodiment of the present invention;
[0029] Figure 5 This is a schematic diagram of the product structure after the second optical MARK point is opened, according to a specific embodiment of the present invention. Detailed Implementation
[0030] To further illustrate the various embodiments, the present invention provides accompanying drawings. These drawings are part of the disclosure of the present invention, primarily used to illustrate the embodiments and to explain the operating principles of the embodiments in conjunction with the relevant descriptions in the specification. With reference to these drawings, those skilled in the art should be able to understand other possible implementations and the advantages of the present invention. Components in the drawings are not drawn to scale, and similar component symbols are generally used to represent similar components.
[0031] The present invention will now be further described in conjunction with the accompanying drawings and specific embodiments.
[0032] like Figure 1 As shown, a method for manufacturing multilayer flexible printed circuit boards with high alignment accuracy between layers includes the following steps:
[0033] Step S1: Provide an inner substrate 1, an adhesive layer 2, and an outer substrate 3. Process the inner substrate 1 to form inner layer circuitry and optical marker dots 100. Process the adhesive layer 2 to form clearance holes 21 for the optical marker dots 100. Figure 2 As shown, proceed to step S2.
[0034] In this specific embodiment, the inner substrate 1 is a glue-free double-sided substrate, which reduces the number of material layers in the multilayer flexible board and makes the overall thickness thinner. However, it is not limited to this. In some embodiments, the inner substrate 1 can also be implemented using other existing double-sided substrates, single-sided substrates, etc.
[0035] Specifically, the inner substrate 1 includes a first PI (polyimide) substrate 11 and substrates disposed on both sides of the PI substrate (in this specific embodiment, the upper and lower surfaces, respectively). Figure 2 The first copper foil layer 12 on the inner substrate (for the orientation reference) is made of PI substrate, which has good performance, but is not limited thereto. In some embodiments, the substrate of the inner substrate 1 can also be made of PET (polyethylene) or the like.
[0036] Preferably, the thickness of the first PI substrate 11 is ≤50μm, and the thickness of the first copper foil layer 12 is ≤18μm. A thinner first copper foil layer 12 is more conducive to the fabrication of high-density fine lines, while a slightly thicker first PI substrate 11 facilitates the fabrication of through-wires and laser blind vias. In this specific embodiment, the thickness of the first PI substrate 11 is preferably 50μm, and the thickness of the first copper foil layer 12 is preferably 15μm, but this is not a limitation.
[0037] In this specific embodiment, both the upper and lower first copper foil layers 12 of the inner substrate 1 are processed to form upper and lower inner layer circuits and optical MARK dots 100. The processing technology includes dry film lamination, exposure, development, etching, etc. For details, refer to the existing circuit layer processing technology, which is a very mature technology and will not be described in detail here. The optical MARK dots 100 are etched on the board edge while the inner layer circuit is being etched.
[0038] In this specific embodiment, the optical MARK point 100 includes a first optical MARK point 101 and a second optical MARK point 102. The first optical MARK point 101 is used for subsequent drilling alignment, and the second optical MARK point 102 is used for subsequent fabrication of the outer circuit layer.
[0039] Specifically, in this embodiment, the adhesive layer 2 is processed by drilling or cutting to form a clearance hole 21 for the optical MARK point 100. The cutting method can be blade cutting. The adhesive layer 2 is made of existing adhesives used for multilayer flexible boards, such as epoxy resin adhesive.
[0040] Preferably, the thickness of the adhesive layer 2 is ≤25μm. Since the first copper foil layer 12 is relatively thin, if the thickness of the adhesive layer 2 is thicker, there will be more residual adhesive in the drilled hole, which is not conducive to copper plating inside the hole. Specifically, in this embodiment, the thickness of the adhesive layer 2 is 25μm, but it is not limited to this.
[0041] Preferably, in this embodiment, the outer substrate 3 is a glue-free single-sided substrate, which reduces the number of material layers in the multilayer flexible board and results in a thinner overall thickness. However, this is not a limitation; in some embodiments, the outer substrate 3 can also be implemented using other existing single-sided substrates. In this step, the outer substrate 3 does not open the cover of the optical MARK point 100.
[0042] Specifically, the outer substrate 3 includes a second PI substrate 31 and a second copper foil layer 32 disposed on the second PI substrate 31. The PI substrate has good performance, but it is not limited to this. In some embodiments, the substrate of the outer substrate 3 can also be PET (polyethylene) or the like.
[0043] Preferably, the thickness of the second PI substrate 31 is ≤25μm, and the thickness of the second copper foil layer 32 is ≤18μm. The thinner the second copper foil layer 32, the more conducive it is to fabricating high-density fine lines. If the second PI substrate 31 is too thick, it is not conducive to the fabrication of blind vias. In this specific embodiment, the thickness of the second PI substrate 31 is 12.5μm, and the thickness of the second copper foil layer 32 is 12μm, but it is not limited to these.
[0044] In this specific embodiment, there are two adhesive layers 2 and two outer substrates 3. The two outer substrates 3 are respectively used to bond and fix the inner substrate 1 to the top and bottom surfaces through the two adhesive layers 2 to form a symmetrical 4-layer flexible board. However, it is not limited to this. In some embodiments, the multilayer flexible board can also be a 3-layer flexible board, a 5-layer flexible board, etc.
[0045] Step S2: Stack and press the inner substrate 1, adhesive layer 2 and outer substrate 3 together in sequence, and proceed to step S3.
[0046] Specifically, two outer substrates 3 are respectively laminated onto the upper and lower surfaces of the inner substrate 1 using two adhesive layers 2 and then pressed and fixed. The second copper foil layer 32 is located on the outer side of the second PI substrate 31 opposite to the inner substrate 1, as shown below. Figure 3 As shown.
[0047] Step S3: Perform copper reduction processing on the outer substrate 3, and proceed to step S4.
[0048] Specifically, a copper reduction process is used to reduce the copper content of the second copper foil layer 32 of the two outer substrates 3 to a preset copper thickness to increase wiring density. The copper reduction process is a well-established and mature technology and will not be elaborated further. At this point, the optical mark point 100 is protected by the copper reduction solution from the outer substrate 3, preventing damage and ensuring its reliability and clarity.
[0049] Step S4: Open the outer substrate 3 to expose the optical MARK point 100.
[0050] Specifically, in this embodiment, step S4 includes: step S41, opening the outer substrate 3 to expose the first optical MARK point 101, such as... Figure 4 As shown, proceed to step S42.
[0051] In this specific embodiment, laser-controlled depth cutting is used to open the outer substrate 3 to expose the first optical MARK point 101. The cutting precision is high and will not damage the first optical MARK point 101. The process is also relatively simple. However, it is not limited to this. In some embodiments, drilling and milling can also be used to open the outer substrate 3 to expose the first optical MARK point 101.
[0052] Step S42: Laser drilling is performed using the first optical MARK point 101 for alignment. After laser drilling, copper plating is performed, and then proceed to step S43.
[0053] Specifically, a laser drilling machine is used for laser drilling. The laser drilling machine uses the first optical MARK point 101 for identification and alignment, and laser-cuts the required through holes and / or blind holes. Positioning through the first optical MARK point 101 ensures drilling accuracy. After laser drilling, the product undergoes pretreatment followed by copper plating to achieve hole metallization and overall copper plating of the second copper foil layer 32. At this point, the second optical MARK point 102 is not covered by the copper plating due to the protection of the outer substrate 3. The laser drilling, pretreatment, and copper plating processes can refer to existing technologies and will not be elaborated further here.
[0054] Step S43: Open the outer substrate 3 to expose the second optical mark point 102, as shown. Figure 5 As shown.
[0055] In this specific embodiment, laser-controlled depth cutting is used to open the outer substrate 3 to expose the second optical MARK point 102. The cutting accuracy is high and will not damage the second optical MARK point 102. The process is also relatively simple. However, it is not limited to this. In some embodiments, drilling and milling can also be used to open the outer substrate 3 to expose the second optical MARK point 102.
[0056] Subsequently, the outer layer circuitry of the second copper foil layer 32 is fabricated by aligning with the second optical MARK point 102. This ensures the alignment accuracy of the outer layer circuitry and greatly improves the alignment accuracy between the inner and outer layers of the multilayer board. The specific steps are as follows: the product processed in step S43 undergoes pretreatment; after pretreatment, a dry film is applied; an LDI exposure machine is used to identify the second optical MARK point 102 for alignment; the required pattern is exposed; and then the product is sent to the next process for development, etching, etc., to fabricate the outer layer circuitry. Specific processes can be found in existing technologies and will not be detailed here.
[0057] Although the invention has been specifically shown and described in conjunction with preferred embodiments, those skilled in the art should understand that various changes in form and detail may be made to the invention without departing from the spirit and scope of the invention as defined in the appended claims, all of which shall be within the scope of protection of the invention.
Claims
1. A method for manufacturing multilayer flexible printed circuit boards with high alignment accuracy between layers, characterized in that, Includes the following steps: Step S1: Provide an inner layer substrate, an adhesive layer and an outer layer substrate; process the inner layer substrate to form inner layer circuits and optical MARK points; process the adhesive layer to form clearance holes for the optical MARK points; proceed to step S2. Step S2: Stack and press the inner substrate, adhesive layer and outer substrate in sequence, and proceed to step S3; Step S3: Perform copper reduction on the outer substrate and proceed to step S4; Step S4: Open the outer substrate to expose the optical MARK dots; in: In step S1, the optical MARK point includes a first optical MARK point and a second optical MARK point; Step S4 includes: Step S41: Open the outer substrate to expose the first optical MARK point, and proceed to step S42; Step S42: Laser drilling is performed using the first optical MARK point for alignment. After laser drilling, copper plating is performed, and then proceed to step S43. Step S43: Open the outer substrate to expose the second optical MARK point.
2. The method for manufacturing multilayer flexible printed circuit boards with high alignment accuracy between layers according to claim 1, characterized in that, In step S1, the adhesive layer is processed by drilling or cutting to form clearance holes for the optical MARK point.
3. The method for manufacturing multilayer flexible printed circuit boards with high alignment accuracy between layers according to claim 1, characterized in that, Step S4: The outer substrate is opened by laser-controlled depth cutting to expose the optical MARK points.
4. The method for manufacturing multilayer flexible printed circuit boards with high alignment accuracy between layers according to claim 1, characterized in that, In step S1, the inner substrate is a glue-free double-sided substrate, and the outer substrate is a glue-free single-sided substrate. There are two adhesive layers and two outer substrates. The two outer substrates are respectively bonded and fixed to the inner substrate on both sides by two adhesive layers.
5. The method for manufacturing multilayer flexible printed circuit boards with high alignment accuracy between layers according to claim 4, characterized in that, The inner substrate includes a first PI substrate and a first copper foil layer disposed on both sides of the PI substrate. The thickness of the first PI substrate is ≤50μm and the thickness of the first copper foil layer is ≤18μm.
6. The method for manufacturing multilayer flexible printed circuit boards with high alignment accuracy between layers according to claim 5, characterized in that, The thickness of the first PI substrate is 50 μm, and the thickness of the first copper foil layer is 15 μm.
7. The method for manufacturing multilayer flexible printed circuit boards with high alignment accuracy between layers according to claim 4, characterized in that, The outer substrate includes a second PI substrate and a second copper foil layer disposed on the second PI substrate. The thickness of the second PI substrate is ≤25μm and the thickness of the second copper foil layer is ≤18μm.
8. The method for manufacturing multilayer flexible printed circuit boards with high alignment accuracy between layers according to claim 7, characterized in that, The thickness of the second PI substrate is 12.5 μm, and the thickness of the second copper foil layer is 12 μm.
9. The method for manufacturing multilayer flexible printed circuit boards with high alignment accuracy between layers according to claim 1, characterized in that, The thickness of the adhesive layer is ≤25μm.