Probe card alignment chip, probe card, and probe card repair method

Abstract

The present invention aims to provide an alignment chip for forming an alignment mark on a wiring substrate of a probe card. It is provided with: a substrate (51) having a sticking surface which is stuck to a probe setting surface (17) of a wiring substrate (14) constituting a probe card (10) via an adhesive (54); and an alignment mark (501) including a metal film (52) formed on a mark surface on the opposite side of the sticking surface of the substrate (51), the mark surface being provided with a mark peripheral area (502) surrounding the alignment mark (501), the mark peripheral area (502) having a lower reflectivity than the alignment mark (501).

Description

Technical Field

[0001] The present invention relates to an alignment chip for a probe card, a probe card, and a method for repairing a probe card. More specifically, it relates to an alignment chip that is attached to a wiring substrate of a probe card and used to display alignment symbols on the wiring substrate, a probe card having the alignment chip, and a method for repairing a probe card using the alignment chip. Background Technology

[0002] A probe card is an inspection device used to inspect the electrical characteristics of semiconductor devices formed on a semiconductor wafer. Multiple probes are disposed on a wiring substrate, each contacting an electrode pad on the semiconductor wafer. Furthermore, alignment marks for positioning are formed on the probe placement surface of the wiring substrate.

[0003] Semiconductor device inspection is performed as follows: the semiconductor wafer is brought close to the probe card, and the tip of the probe contacts the electrode pads on the semiconductor wafer. The test device is then connected to the semiconductor device via the probe and the wiring substrate. Furthermore, alignment marks are captured using a camera before inspection, thereby aligning the probe card with the semiconductor wafer to ensure contact between the probe tip and the electrode pads.

[0004] Figure 8 This diagram shows an example of a wiring substrate 14 constituting a conventional probe card, and shows a top view of the probe mounting surface 17 where the probes are mounted. A plurality of probe electrode pads 15 and four alignment symbols 30 are formed on the probe mounting surface 17, and probes 16 are mounted on each probe electrode pad 15. The probes 16 are positioned at positions corresponding to the electrode pads of the semiconductor wafer being inspected. The alignment symbols 30 are formed to be approximately equidistant from the outer periphery of the wiring substrate 14.

[0005] The probe electrode pads 15 and alignment symbols 30 are formed on the probe mounting surface 17 by photolithography using electroplating and etching methods. The alignment symbols 30 contain a highly reflective metallic material and are thin films with a planar shape having a predetermined geometric pattern, such as an annular Au film.

[0006] The surrounding region 31 is the area that surrounds the alignment symbol 30 and has a lower reflectivity than the alignment symbol 30. By making the reflectivity of the alignment symbol 30 and the surrounding region 31 different, the alignment symbol 30 can be easily identified from a photographic image obtained by the camera.

[0007] Figure 9Figures (a) through (d) illustrate various states that can occur in the alignment symbol 30 and its surrounding area 31. Figure (a) shows the normal state of the alignment symbol 30. Figure (b) is an example of a case where a foreign object 32 is attached to the surrounding area 31. If the foreign object 32 has high reflectivity, the alignment symbol 30 may not be correctly identified. Figure (c) is an example of a case where a spot 33 is generated in the surrounding area 31, resulting in a deviation in reflectivity within the surrounding area 31. In this case, the alignment symbol 30 may also not be correctly identified. Figure (d) is an example of a case where damage 34 has occurred to the alignment symbol 30. The shape of the alignment symbol changes, and the alignment symbol 30 may not be correctly identified.

[0008] If defects such as damage or contamination are found in the alignment symbol 30 or its surrounding area 31, the entire wiring substrate 14 needs to be remanufactured. Since the alignment symbol 30 is formed on the wiring substrate 14 through photolithography, it is impossible to repair a defective alignment symbol 30. Therefore, if defects exist in the alignment symbol 30, even if the probe electrode pads 15 are fine, it must be discarded as a defective product, potentially reducing the yield of the wiring substrate 14.

[0009] As a conventional method for forming alignment symbols, a method using a sheet-like component has been proposed (for example, Patent Document 1). Patent Document 1 describes a method in which, after covering the light-reflecting surface of a wiring substrate with a sheet-like component having a light-non-reflective surface or a light-diffusing surface, an opening is formed in the sheet-like component by laser processing to partially expose the light-reflecting surface, thereby forming an alignment symbol on the wiring substrate.

[0010] If alignment symbols are formed using this method, it requires steps such as attaching the sheet-like component and creating an opening using laser irradiation. As a result, the manufacturing process is considered more complex and difficult to automate, leading to reduced production efficiency and lower yield.

[0011] Furthermore, this method is not considered a repair method for defects in the alignment symbol or its surrounding area. However, by attaching a sheet-like component, it can also be applied to repair defects in the area surrounding the symbol. However, the fact that a laser-based opening process is still required remains unchanged, making it difficult to control repair costs. Moreover, since the opening of the sheet-like component defines the outer edge of the alignment symbol, if the outer edge of the original alignment symbol does not perfectly align with the opening of the sheet-like component when repairing with the alignment symbol, the shape of the alignment symbol is considered to be deformed.

[0012] Prior art literature

[0013] Patent documents

[0014] Patent Document 1: Japanese Patent Application Publication No. 2001-330626 Summary of the Invention

[0015] -The problem the invention aims to solve-

[0016] The present invention was made in view of the above circumstances, and its object is to provide an alignment chip for forming alignment symbols on a wiring substrate of a probe card. In particular, its object is to provide an alignment chip for repairing defects generated in the alignment symbols or their surrounding areas.

[0017] Furthermore, the objective is to provide a probe card that uses an alignment chip to form alignment symbols on a wiring substrate.

[0018] Furthermore, the aim is to provide a probe card repair method that uses an alignment chip to repair probe cards that have defects in the alignment symbol or its surrounding area.

[0019] -Methods for solving problems-

[0020] A probe card alignment chip according to a first embodiment of the present invention includes: a substrate having an adhesive surface that is adhered to a probe setting surface of a wiring substrate constituting a probe card via an adhesive; and an alignment symbol comprising a metal film formed on a symbol surface on the opposite side of the adhesive surface of the substrate, the symbol surface having a symbol periphery region surrounding the alignment symbol, the symbol periphery region having a lower reflectivity than the alignment symbol.

[0021] By employing this structure, alignment marks can be easily formed on the wiring substrate by attaching alignment chips at given locations on the wiring substrate. Furthermore, wiring substrates with defects in or around the alignment marks can be easily repaired by attaching alignment chips.

[0022] In a second embodiment of the present invention, the alignment chip for the probe card is configured such that, based on the above structure, a resin film is formed in the region surrounding the symbol.

[0023] In the third embodiment of the present invention, the alignment chip for a probe card, based on the above structure, includes a metal film comprising an exposed first metal layer and a second metal layer formed between the first metal layer and the substrate. The second metal layer comprises a material with a higher Young's modulus than the first metal layer and is formed to be thicker than the first metal layer. By employing such a structure, the strength of the alignment chip can be ensured.

[0024] The fourth embodiment of the present invention uses an alignment chip for a probe card, wherein, based on the above structure, the thickness of the substrate is 450 μm or less.

[0025] The fifth embodiment of the present invention uses an alignment chip for a probe card, which, based on the above structure, is attached to cover the alignment symbol pre-formed on the probe setting surface.

[0026] The probe card according to the sixth embodiment of the present invention includes:

[0027] A wiring substrate has a probe mounting surface for forming probe electrode pads; a probe is mounted on the probe electrode pads; and an alignment chip is attached to the probe mounting surface. The alignment chip includes: a substrate having an adhesive surface attached to the probe mounting surface via an adhesive; and an alignment symbol comprising a metal film formed on a symbol surface on the opposite side of the adhesive surface of the substrate, the symbol surface having a symbol periphery region surrounding the alignment symbol, the symbol periphery region having a lower reflectivity than the alignment symbol.

[0028] The seventh embodiment of the present invention is a probe card repair method for repairing a probe card having a wiring substrate having a probe setting surface. The probe setting surface has probe electrode pads for mounting probes and a first alignment symbol for alignment before inspection. An alignment chip is attached to the probe setting surface using an adhesive. The alignment chip covers the first alignment symbol, and a second alignment symbol formed on the symbol surface on the opposite side of the wiring substrate of the alignment chip is overlapped with the first alignment symbol.

[0029] -Invention Effects-

[0030] According to the present invention, an alignment chip for forming alignment symbols on a wiring substrate of a probe card can be provided. In particular, an alignment chip for repairing defects generated in or around the alignment symbols can be provided.

[0031] In addition, a probe card that uses an alignment chip to form alignment symbols on a wiring substrate can be provided.

[0032] Furthermore, a probe card repair method is provided that uses an alignment chip to repair probe cards that have defects in alignment symbols or their surrounding areas. Attached Figure Description

[0033] Figure 1 This is a diagram illustrating an example of the schematic structure of a probe card 10 to which the alignment chip of Embodiment 1 of the present invention is applied.

[0034] Figure 2 This is a diagram showing a structural example of the alignment chip 5A.

[0035] Figure 3 This is a diagram illustrating an outline of the probe card repair method.

[0036] Figure 4 This is a diagram illustrating an example of a probe card repair method using alignment chip 5A.

[0037] Figure 5 This diagram shows an example of the manufacturing process of aligning chip 5A.

[0038] Figure 6 This is a diagram illustrating a structural example of the alignment chip 5B according to Embodiment 2 of the present invention.

[0039] Figure 7 This diagram shows an example of the manufacturing process of aligning chip 5B.

[0040] Figure 8 This is a diagram showing an example of a wiring substrate that constitutes a conventional probe card.

[0041] Figure 9 It is a diagram showing the various states that may occur in the alignment symbol 30 and the surrounding area 31. Detailed Implementation

[0042] Implementation method 1.

[0043] (1) Probe card 10

[0044] Figure 1 This is a diagram showing an example of the general structure of a probe card 10 for aligning a chip according to Embodiment 1 of the present invention. The probe card 10 is mounted on a wafer probe with the probe setting surface 17 facing down, and is positioned opposite the electrode pads 21 of a semiconductor wafer 20 placed on a stage 26. By moving the stage 26 up and down, the probe 16 can be brought into contact with the electrode pads 21.

[0045] The probe card 10 consists of a main substrate 11, a reinforcing plate 12, an interpolator 13, an ST (Space transformer) substrate 14, and two or more probes 16.

[0046] The main substrate 11 is a wiring substrate that can be detachably mounted to the wafer probe, for example, a circular glass epoxy board. The outer periphery of the lower surface of the main substrate 11 is supported by the wafer probe retainer 25 and is arranged approximately horizontally. A reinforcing plate 12 for suppressing deformation of the main substrate 11 is mounted at the center of the upper surface of the main substrate 11, and two or more external terminals 11t connected to the signal terminals of the test device (not shown) are provided at the outer periphery of the upper surface.

[0047] The interposer 13 is disposed between the main substrate 11 and the ST substrate 14. It is a connection unit between the substrates that enables the wiring of the main substrate 11 and the wiring of the ST substrate 14 to be connected. For example, it has multiple spring pins.

[0048] ST substrate 14 is a multilayer wiring substrate with varying electrode spacing, such as two or more ceramic plates bonded together. ST substrate 14 is disposed on the lower surface of main substrate 11 via interposer 13. Probe mounting surface 17 is the lower surface of ST substrate 14, forming a plurality of probe electrode pads 15 and four alignment symbols 30. The probe electrode pads 15 and alignment symbols 30 are formed on the probe mounting surface 17 by photolithography using electroplating or etching methods. The probe electrode pads 15 are electrodes that connect to probes and are formed to correspond to the electrode pads 21 on semiconductor wafer 20.

[0049] The worktable 26 is a platform for the semiconductor wafer 20, capable of horizontal movement and rotation, as well as vertical movement. The camera 27 is an imaging unit that captures images of the alignment symbol 30. By moving the worktable 26 while capturing images, the position of the alignment symbol 30 is sensed, and the semiconductor wafer 20 is aligned with the probe card 10.

[0050] If a defect exists in the alignment symbol 30 or its surrounding area, making it impossible to extract the alignment symbol 30 from the photographic image, repair is performed using the alignment chip described later. The repair is performed on one or more of the four alignment symbols 30 that have defects, but not on the other alignment symbols 30 that have not defects.

[0051] (2) Align chip 5A

[0052] Figure 2 This is a diagram showing a structural example of aligned chip 5A. In the diagram, (a) is a top view of the symbol plane, and (b) is a cross-sectional view showing the situation when cut using the AA cutting line (AA cross-sectional view).

[0053] The alignment chip 5A is a repair component for repairing the probe card 10. It has a symbol surface forming an alignment symbol 501 and an adhesive surface that is attached to the ST substrate 14 on the opposite side of the symbol surface. The symbol surface is divided into an alignment symbol 501, which is a high-reflectivity area, and a symbol periphery area 502, which is a low-reflectivity area.

[0054] Alignment symbol 501 comprises a metallic material with high reflectivity and is a thin film with a planar shape having a predetermined geometric pattern, such as an Au film in the shape of a ring. The planar shape of alignment symbol 501 is preferably the same as that of the original alignment symbol 30 formed on ST substrate 14, and furthermore, the metallic material and surface condition are preferably the same.

[0055] Alignment symbol 501 comprises a metallic material with high reflectivity and is a thin film with a planar shape having a predetermined geometric pattern, such as an Au film in the shape of a ring. The planar shape of alignment symbol 501 is preferably the same as that of the original alignment symbol 30 formed on ST substrate 14, and the metallic material and surface condition are also the same.

[0056] The symbol periphery region 502 comprises a resin material with low reflectivity and is a thin film, such as a polyimide film, formed in the area outside the alignment symbol 501. The symbol periphery region 502 is the area that at least surrounds the alignment symbol 501, and is also formed in the hollow region if the alignment symbol 501 has a hollow region, such as when the alignment symbol 501 is annular.

[0057] like Figure 2 As shown in (b), the alignment chip 5A includes a ceramic or silicon substrate 51, a metal film 52 corresponding to an alignment symbol 501 formed on the substrate 51, and a resin film 53 corresponding to a symbol periphery region 502 formed on the substrate 51. The metal film 52 may contain one or more metal layers, and the resin film 53 may also contain one or more resin layers.

[0058] The alignment chip 5A needs to be of a thickness that does not contact the semiconductor wafer during inspection. During inspection, the semiconductor wafer 20 is brought close to the probe 16. After the tip of the probe 16 reaches the position where it begins to contact the electrode pad 21 of the semiconductor wafer 20, it is brought closer by a certain distance to overdrive the probe 16 to elastically deform. Therefore, the alignment chip 5A attached to the probe setting surface needs to be no higher than the height of the probe 16 that elastically deforms due to overdrive. For example, it is preferable that the thickness of the alignment chip is 500 μm or less, the thickness of the substrate 51 is preferably 450 μm or less, and the thickness of the metal film 52 and the resin film 53 is 50 μm or less.

[0059] (3) Probe Repair Method

[0060] Figure 3 as well as Figure 4 This is a diagram illustrating an example of a probe card repair method using alignment chip 5A.

[0061] Figure 3 This diagram illustrates a probe card repair method. The illustrated ST substrate 14 has a defect in the symbol periphery area 31 caused by a highly reflective foreign object 32. Therefore, the ST substrate 14 is repaired by attaching and aligning the chip 5A. The ST substrate 14 to be repaired is preferably the substrate before the probe 16 is mounted, but it can also be the substrate after the probe 16 is mounted.

[0062] Figure 4The images show cross-sectional views taken perpendicular to the alignment chip 5A. (A) shows the cross-sectional view before repair, and (b) shows the cross-sectional view after repair. The alignment chip 5A is attached to the probe setting surface of the ST substrate 14 via adhesive 54, covering the alignment symbol 30 with the defect and the surrounding area 31 of the symbol.

[0063] After applying adhesive 54 to the bonding surface of the alignment chip 5A, the alignment chip 5A is bonded to a given position on the ST substrate 14 while being correctly aligned relative to the ST substrate 14.

[0064] The alignment chip 5A is pasted with alignment mark 501 aligned with the original alignment mark 30 on the ST substrate 14. During pasting, the original alignment mark 30 is hidden by the alignment chip 5A to be pasted. Therefore, the microscope's target mark is aligned with the pasting position of the alignment chip 5A on the ST substrate 14, and the pasting operation of the alignment chip 5A is performed while observing the microscope's eyepiece.

[0065] Alignment of chip 5A is performed, for example, using a stage with a micrometer mounted in the XY direction and a Hisomet (a non-contact step-by-step microscope with an optical focus position detection method). The ST substrate 14, mounted on the stage, is observed using the Hisomet, aligning the target mark with the tip of probe 16. Then, the micrometer is operated to move the stage only a given distance in the XY direction from the tip of probe 16, thus aligning the chip 5A to the desired placement position indicated by the target mark. In this state, the chip 5A is placed while observing through the Hisomet's eyepiece.

[0066] This paper describes a method for applying adhesive 54 to the bonding surface of the alignment chip 5A, but it can also be applied to the bonding position of the alignment chip 5A on the ST substrate 14. Furthermore, it can be applied to both.

[0067] (4) Manufacturing method of alignment chip 5A

[0068] Figure 5 Figures (a) through (f) are examples of the manufacturing processes for aligning chip 5A.

[0069] Figure 5 (a) indicates a state in which photoresist 60 is selectively formed on substrate 51. After the photoresist 60 is formed on the entire surface of substrate 51, it is selectively exposed and developed, leaving only the area corresponding to the alignment symbol 501. An opening 601 is formed in the area corresponding to the symbol periphery area 502, exposing substrate 51.

[0070] Figure 5(b) indicates a state in which a resin layer 61 is selectively formed on the substrate 51. The resin layer 61 is formed on the substrate 51 on which a photoresist 60 is selectively formed. The photoresist 60 is removed, so that the resin layer 61 is left only in the area corresponding to the symbol periphery region 502. In the area corresponding to the alignment symbol 501, an opening 602 is formed to expose the substrate 51.

[0071] Figure 5 (c) indicates a state in which a seed layer 62 is formed on the entire surface of the substrate 51. The seed layer 62 is a thin metal layer formed by sputtering.

[0072] Figure 5 (d) indicates the state in which the first metal layer 630 is formed on the entire surface of the substrate 51 by electroplating. The first metal layer 630 uses a metal material with a relatively large Young's modulus, such as copper (Cu) or nickel-cobalt alloy (NiCo).

[0073] exist Figure 5 In (e), it indicates that the entire surface of the substrate 51 on which the first metal layer 630 is formed has been polished. The polishing process flattens the surface of the substrate 51. This polishing process is performed before the resin layer 61 is exposed, and the first metal layer 630 is removed from the area corresponding to the symbol periphery region 502, while on the other hand, it is exposed in the area corresponding to the alignment symbol 501.

[0074] exist Figure 5 In (f), it indicates that a second metal layer 631 and a third metal layer 632 are sequentially formed in the region corresponding to the alignment symbol 501. The second metal layer 631 and the third metal layer 632 are formed by electroplating. The exposed third metal layer 632 uses a metal material with high reflectivity, such as gold (Au).

[0075] The seed layer 62 and the first to third metal layers 630-632 constitute the metal film 52. The first metal layer 630 contains a metallic material having a larger Young's modulus than the third metal layer 632 and is formed as a layer thicker than the third metal layer 632. Therefore, compared to the case where the metal film 52 is composed only of the metallic material of the third metal layer 632, the mechanical strength of the aligned chip 5A can be ensured.

[0076] Alignment chips 5A can be formed by photolithography on substrate 51. Therefore, they can be easily manufactured using existing manufacturing techniques. Furthermore, after multiple alignment chips 5A are formed simultaneously on the same substrate 51, they can be separated into individual alignment chips 5A by cutting. Therefore, alignment chips 5A can be manufactured inexpensively. In addition, after being attached to ST substrate 14, laser processing as in the prior art is not required, and wiring substrates can be repaired easily and inexpensively.

[0077] Implementation method 2.

[0078] In this embodiment, as another example of alignment chip 5A, an example of alignment chip 5B with a different shape of alignment symbol 501 and a different manufacturing method will be described. Furthermore, in this embodiment, the differences from alignment chip 5A will be mainly described, and repeated descriptions will be omitted.

[0079] (5) Align chip 5B

[0080] Figure 6 This is a diagram showing a structural example of the alignment chip 5B in Embodiment 2. In the diagram, (a) is a top view of the symbol plane, and (b) is a cross-sectional view showing the situation when cut using the BB cutting line (BB cross-sectional view).

[0081] like Figure 6 As shown in (a), the alignment symbol 501 has a planar shape in the shape of a cross formed by two mutually orthogonal rectangles.

[0082] like Figure 6 As shown in (a), the alignment chip 5A includes a ceramic or silicon substrate 51, a base metal film 55 formed on the substrate 51, a metal film 52 formed on the base metal film 55, and a resin film 53. The base metal film 55 may be composed of one or more metal layers.

[0083] (4) Manufacturing method of alignment chip 5B

[0084] Figure 7 Figures (a) through (d) are examples of the manufacturing process of the aligned chip 5B.

[0085] exist Figure 7 In (a), it indicates the state in which a base metal film 55 is formed on the entire surface of the substrate 51. The base metal film 55 is made of a metal material with a relatively large Young's modulus, such as copper (Cu).

[0086] exist Figure 7 In (b), it is indicated that the photoresist 60 is selectively formed on the substrate metal film 55. After the photoresist 60 is formed on the entire surface of the substrate 51, it is selectively exposed and developed, leaving only the area corresponding to the alignment symbol 501, and forming an opening 601 in the area corresponding to the symbol periphery area 502 to expose the substrate metal film 55.

[0087] exist Figure 7In (c), it indicates the state in which a resin layer 61 is selectively formed on the substrate metal film 55. The resin layer 61 is formed on the substrate 51 on which a photoresist 60 is selectively formed, and the photoresist 60 is removed, so that the resin layer 61 is left only in the area corresponding to the symbol periphery region 502, and an opening 602 is formed in the area corresponding to the alignment symbol 501 to expose the substrate metal film 55.

[0088] exist Figure 7 In (d), it is shown that a second metal layer 631 and a third metal layer 632 are sequentially formed in the region corresponding to the alignment symbol 501. The second metal layer 631 and the third metal layer 632 are formed by electroplating. The exposed third metal layer 632 uses a metal material with high reflectivity, such as gold (Au).

[0089] The second and third metal layers 631 and 632 constitute the metal film 52. The base metal film 55 is made of a metallic material having a larger Young's modulus than the third metal layer 632, and is formed as a layer thicker than the third metal layer 632. The alignment symbol 501 is composed of the metal film 52 and a portion of the base metal film 55 that repeats the metal film 52. The metal film constituting the alignment symbol 501, for example, ensures the mechanical strength of the alignment chip 5B compared to the case where it is composed only of the metallic material of the third metal layer 632.

[0090] In the above embodiments, examples of alignment symbol 501 being in the shape of a ring or a cross have been described, but the present invention is not limited to such cases. Any shape can be used as a successor to alignment symbol 501.

[0091] Furthermore, in the above embodiments, an example was described where, in the case of defects in the alignment symbol 30 or the surrounding area 31 formed on the ST substrate 14, alignment chips 5A or 5B were pasted on to repair the defects. However, the present invention is not limited to such cases. For example, alignment chips 5A or 5B can be pasted on the ST substrate 14 where alignment symbols 30 are not formed, and alignment symbols 501 can be additionally formed after the ST substrate 14 is fabricated. Furthermore, alignment chips 5A or 5B with different shapes of alignment symbols 501 can be pasted on the ST substrate 14 where alignment symbols 30 are formed, and the shape of the alignment symbols can be changed after the ST substrate 14 is fabricated.

[0092] Alignment chips 5A and 5B are preferably attached to the ST substrate 14 before the probe 16 is installed, but they can also be attached to the ST substrate 14 after the probe 16 is installed. In addition, alignment chips 5A and 5B preferably completely cover the original alignment mark 30, but they may not completely cover the area 31 surrounding the original mark.

[0093] -Explanation of Figure Markers-

[0094] 10 probe cards

[0095] 11 Main base board

[0096] 13 Intercalators

[0097] 14 ST substrate (wiring substrate)

[0098] 15. Probe electrode pads

[0099] 16 probes

[0100] 17. Probe Setting Surface

[0101] 20 Semiconductor wafers

[0102] 21 Electrode pads

[0103] 30 Alignment Symbol

[0104] 31. Surrounding area of ​​the symbol

[0105] 5A and 5B alignment chips

[0106] 501 Alignment Symbol

[0107] The area surrounding the 502 symbol

[0108] 51 substrate

[0109] 52 metal film

[0110] 53 Resin film

[0111] 54 Adhesive

[0112] 55 Substrate Metal Film

[0113] 60 Photoresist

[0114] 601, 602 openings

[0115] 61 Resin layer

[0116] 62 seed layers.

Claims

1. An alignment chip for a probe card, comprising: A substrate having an adhesive surface, which is bonded to a probe mounting surface of a wiring substrate constituting a probe card via an adhesive; and A metal component, a portion of the symbol surface directly formed on the opposite side of the bonding surface of the substrate; and The resin component, the remaining portion formed directly within the same layer as the metal component on the surface of the symbol. The metal component has a planar shape corresponding to an alignment symbol used for aligning the probe card. The resin component has a lower reflectivity than the metal component.

2. The alignment chip for the probe card according to claim 1, wherein, The metal component has an exposed first metal layer and a second metal layer formed between the first metal layer and the substrate. The second metal layer contains a material with a higher Young's modulus than the first metal layer and is formed to be thicker than the first metal layer.

3. The alignment chip for the probe card according to claim 1, wherein, The thickness of the substrate is less than 450 μm.

4. The alignment chip for the probe card according to any one of claims 1 to 3, wherein, The alignment chip is pasted to cover the alignment symbol pre-formed on the probe setting surface.

5. A probe card, comprising: The wiring substrate has a probe mounting surface on which electrode pads for probes are formed; The probe is mounted on the probe electrode pad; and Align the chip and attach it to the probe mounting surface. The alignment chip has: The substrate has an adhesive surface that is bonded to the probe mounting surface via an adhesive; and A metal component, a portion of the symbol surface directly formed on the opposite side of the bonding surface of the substrate; and The resin component, the remaining portion formed directly within the same layer as the metal component on the surface of the symbol. The metal component has a planar shape corresponding to an alignment symbol used for aligning the probe card. The resin component has a lower reflectivity than the metal component.

6. A probe card repair method for repairing a probe card having a wiring substrate with a probe setting surface, wherein probe electrode pads for mounting probes and a first alignment symbol for alignment before inspection are formed on the probe setting surface. The alignment chip for the probe card according to claim 1 is attached to the probe setting surface using an adhesive, the alignment chip for the probe card covering the first alignment symbol, and a second alignment symbol formed on the symbol surface on the opposite side of the wiring substrate of the alignment chip for the probe card overlapping the first alignment symbol.

Images