Hybrid integration of micro-led interconnects with ics

Abstract

For optical communication between semiconductor ICs, an optical transceiver assembly subsystem can be integrated with a processor. The optical transceiver assembly subsystem can be monolithically integrated with a processor IC, or it can be provided in a separate optical transceiver IC that is coupled to or attached to the processor IC.

Description

Technical Field

[0001] This invention generally relates to optical interconnects using microLEDs, and more specifically to the integration of optical transceivers using microLEDs with other ICs. Background Technology

[0002] The demand for high-performance computing and networking is ubiquitous and constantly growing. Prominent applications include data center servers, high-performance computing clusters, artificial neural networks, and network switches.

[0003] For decades, the remarkable improvements in integrated circuit (IC) performance and cost have been driven by the shrinking of transistor size and the increasing of die size, as encapsulated by the famous Moore's Law. Billions of transistors have allowed functionality previously distributed across multiple ICs to be consolidated onto a single system-on-a-chip (SoC).

[0004] However, the benefits of further scaling up transistor size are diminishing dramatically as marginal performance advantages decrease, yield rates decline, and cost per transistor increases. Independent of these limitations, a single IC can only contain so many functionalities. Furthermore, different functions (e.g., logic, DRAM, I / O) require different process sequences, and therefore not all desired functions can be combined on a single integrated circuit. In fact, there are significant advantages to “de-integrating” a SoC into smaller “chiplets,” including: the process for each chiplet can be optimized for its function, such as logic, DRAM, high-speed I / O, etc.; chiplets are well-suited for reuse across multiple designs; chiplets have lower design costs; and chiplets have higher yields due to their smaller size and fewer components.

[0005] However, the main disadvantage of chiplets compared to SoCs is that chiplets require a much higher density of chip-to-chip interconnects. Chip-to-chip interconnects are typically much less dense and require much more power (normalized to power per bit) compared to on-chip interconnects between functional blocks in an SoC.

[0006] State-of-the-art chip-to-chip interconnects utilize interposers and bridging, where chips are flip-chip bonded to a substrate containing chip-to-chip electrical traces. While such interconnects offer significantly higher density and much lower power consumption than interconnects via printed circuit boards (PCBs) packaged chips, they still fall far short of the desired level of density and power consumption for chip-to-chip interconnects that approach those of in-chip interconnects.

[0007] The power and maximum range of electrical interconnects are primarily limited by capacitance and conductor resistance. Interconnect density is limited by conductor width and layer count. The capacitance C of a short electrical interconnect is proportional to the interconnect length and roughly independent of the conductor width w (assuming the dielectric thickness scales approximately proportionally). The resistance R of an electrical connection, and therefore its maximum length (limited by RC), is inversely proportional to the conductor cross-sectional area, in a ratio of w. 2 The density of electrical connections is inversely proportional to w. Therefore, there are trade-offs in interconnect density, length, and power, and these trade-offs are fundamental, based on the dielectric constant and the resistance of the conductor (e.g., copper).

[0008] Therefore, electrical interconnects constrain system performance and limit what can be achieved with so-called "beyond Moore" 2.5D and 3D advanced packaging. Summary of the Invention

[0009] Optical interconnects, and more specifically 3D optical interconnects, are not subject to these limitations.

[0010] Some embodiments provide an apparatus including an optical communication component, the component comprising: a processor IC; an optical transceiver subsystem having elements in or attached to the optical transceiver IC, the optical transceiver IC being electrically coupled to the processor IC, the optical transceiver subsystem including a plurality of transmitter examples and receiver examples; wherein each of the transmitter examples includes a transmitter circuitry in the optical transceiver IC and a microLED bonded to or attached to the top surface of the optical transceiver IC and electrically connected to the transmitter circuitry; wherein each of the receiver examples includes a receiver circuitry in the optical transceiver IC and a photodetector in or bonded to the top surface of the optical transceiver IC and electrically connected to the receiver circuitry; and the optical transceiver IC may include pathways for coupling the transmitter circuitry and the receiver circuitry to pads on the bottom surface of the optical transceiver IC, the optical transceiver IC being at least partially coupled to the processor IC through the pads.

[0011] In some embodiments, the pad is coupled to the interconnect layer of the processor IC. In some embodiments, the pad is coupled to the interconnect layer of an interposer to which both the processor IC and the optical transceiver IC are mounted. In some embodiments, both the processor IC and the optical transceiver IC are mounted to opposing surfaces of the interposer. In some embodiments, the optical transceiver IC is mounted over a via in the interposer. In some embodiments, the pad is coupled to a package substrate to which both the processor IC and the optical transceiver IC are mounted. In some embodiments, the photodetector is monolithically integrated into the receiver circuitry. In some embodiments, a coupling optics device is coupled to the optical transceiver IC. In some embodiments, the coupling optics device includes a steering mirror.

[0012] Some embodiments further include: another processor IC; another optical transceiver subsystem having elements in or attached to the other optical transceiver IC, the other optical transceiver IC being coupled to the other processor IC, the other optical transceiver subsystem including a plurality of other transmitter examples and other receiver examples; wherein each of said other transmitter examples includes another transmitter circuitry in said other optical transceiver IC, and another microLED coupled to the top surface of said other optical transceiver IC and electrically connected to said other transmitter circuitry; wherein said other receivers Each of the examples includes another receiver circuitry within the other optical transceiver IC, and another photodetector electrically connected to the other receiver circuitry in or attached to the top surface of the other optical transceiver IC; the other optical transceiver IC includes pathways connecting the other transmitter circuitry and the other receiver circuitry to pads on the bottom surface of the other optical transceiver IC, the other optical transceiver IC being at least partially coupled to the other processor IC through the pads; and an optical propagation medium coupling the optical transceiver IC and the other optical transceiver IC. In some such embodiments, the optical propagation medium comprises a multi-core optical fiber.

[0013] The driving power and density of optical interconnects are largely independent of the connection length. Regarding density, multilayer planar optical interconnects can achieve densities on the same order of magnitude as electrical interconnects. However, "3D" optical interconnects perpendicular to the chip surface may achieve ultra-high densities far exceeding those possible with planar interconnects; at 4Gbps data rates, per mm... 2 A density of over 2500 interconnects can be easily achieved, thus providing over 1 Pbps / cm². 2 The processing density.

[0014] Some embodiments provide optical interconnects. Some embodiments provide 3D optical interconnects. In some embodiments, the optical interconnects are between integrated circuit chips. In some embodiments, the integrated circuit chips are located on a common substrate or interposer. In some embodiments, the integrated circuit chips are in the same package. In some embodiments, the integrated circuit chips are in the same multi-chip module.

[0015] These and other aspects of the invention will be more fully understood once this disclosure is consulted. Attached Figure Description

[0016] Figure 1 A side cross-sectional view of an optical transceiver array subsystem including multiple transmitter and receiver examples according to aspects of the present invention is shown.

[0017] Figure 2 An example of an optical transceiver IC on top of a processor IC according to an aspect of the present invention is shown.

[0018] Figure 3 An optical transceiver IC, according to aspects of the present invention, is also shown mounted onto a processor IC.

[0019] Figure 4 A side cross-sectional view of an optical transceiver array subsystem monolithically integrated with a processor IC according to an aspect of the present invention is shown.

[0020] Figure 5 A pair of processor ICs according to an aspect of the invention are shown, wherein each processor IC has a pair of optical transceiver ICs on top of the processor IC.

[0021] Figure 6 The invention demonstrates how, when coupling light from OTRAS in different digital ICs, a steering mirror is used to redirect the light by 90°.

[0022] Figure 7a illustrates a cross-section of a multi-core optical fiber having multiple waveguides 711 surrounded by a cladding 713 along its length.

[0023] Figure 7b shows an optical propagation medium comprising a layer of planar optical waveguides.

[0024] Figure 7c shows a free-space optical propagation medium with lenses and mirrors.

[0025] Figure 8 A side cross-sectional view of a portion comprising a multi-chip module according to an aspect of the invention is shown, the multi-chip module having an optical transceiver IC attached to a processor IC using microbumps.

[0026] Figure 9Examples of a processor IC 911 and an optical transceiver IC mounted on the top surface of an interposer layer according to aspects of the present invention are shown.

[0027] Figure 10 A processor IC and an optical transceiver IC, according to an aspect of the present invention, are mounted on the top side of an interposer layer, wherein coupling optics and multi-core optical fibers extend away from the side of the optical transceiver IC opposite to the interposer layer.

[0028] Figure 11 A processor IC mounted on one side of an interposer layer and an optical transceiver IC mounted on the opposite side of the interposer layer, according to an aspect of the present invention, are shown. Detailed Implementation

[0029] Figure 1 This demonstrates an Optical Transceiver Array Subsystem (OTRAS) comprising multiple transmitter (Tx) and receiver (Rx) examples. The Tx and Rx examples can be arranged in a two-dimensional pattern. In some embodiments, the pattern is a square or rectangular grid. In some embodiments, the pattern is a close-packed hexagonal grid. Figure 1 As shown, Tx and Rx examples can be alternated, or they can be arranged as a block of many adjacent transmitters and a block of many adjacent receivers. Figure 1 Only two Tx examples and two Rx examples are shown in this paper. In various embodiments, the number of Tx examples and Rx examples can be greater.

[0030] Each Tx example includes a Tx circuitry 111 electrically connected to the optical transmitter 113. The Tx circuitry may include various amplifier / buffer stages, equalization circuitry for enhancing frequency response, and various monitoring and control circuitry. In some embodiments, each Tx example includes collecting optics designed to more effectively collect and transmit light from the transmitter. The collecting optics may include reflectors and / or refractive elements, such as lenses.

[0031] In some embodiments, the optical emitter is a microLED. In some embodiments, the microLED is fabricated in a GaN material system having an InGaN quantum well. In some embodiments, the emitter is bonded to the transmitter circuit using solder, thermoforming, or by means of van der Waals forces.

[0032] Each Rx exemplifies a photodetector 115 electrically connected to receiver circuitry 117. The Rx circuitry includes a transimpedance amplifier (TIA) and subsequent amplification stages, each of which may be a linear amplifier or a limiting amplifier. This Rx circuitry can be as simple as a resistor in series with the photodetector, or complex enough to also include equalization, clocking, and data recovery for enhancing frequency response, as well as various other monitoring and control circuitry. In some embodiments, each Rx includes collection optics designed to more effectively collect light onto the photodetector. The collection optics may include reflectors and / or refractive elements, such as lenses.

[0033] In some embodiments, the photodetector is monolithically integrated with the Rx circuitry system. In some embodiments, the photodetector is bonded to the Rx circuitry system using solder, thermoforming, or by means of van der Waals forces.

[0034] Figure 1 Optical emitters and photodetectors are also shown on or embedded in a top surface that can be considered a substrate 119 (e.g., a silicon substrate), wherein the optical emitters and photodetectors are defined by a reflector 120. The Tx circuit system and the Rx circuit system are each electrically coupled to pads 121a and b on the bottom surface of the substrate through one or more through-silicon paths 123a and b.

[0035] In some embodiments, the OTRAS is incorporated within an optical transceiver IC (OTRIC). In some embodiments, the OTRAS includes a Tx instance, an Rx instance, and a silicon substrate. In some embodiments, the OTRAS is as described regarding... Figure 1 The discussion and / or demonstrations are as follows. In some embodiments, the OTRIC is bonded to the top of a processor IC or some other IC containing logic and / or other circuitry, and an electrical connection is made from the OTRIC to the processor IC. In some embodiments, the electrical connection includes a metal line deposited and patterned such that it extends from an electrical pad on the OTRIC and along the side of the OTRIC to an electrical pad on the processor IC. In some embodiments, an additional layer of insulating material, such as polymer or phosphosilicate glass (PSG), is deposited and patterned to passivate the sidewalls to provide electrical insulation, and in some embodiments to reduce the steepness of the step from the top surface of the OTRIC to the top surface of the processor IC. Figure 2 An example of an optical transceiver IC 211 on top of a processor IC 213 is shown. Insulators 215a and 215b are shown surrounding opposite sides of the optical transceiver IC, extending from a substrate on the processor IC directly above the top surface of the optical transceiver IC. The substrate of the insulator extends away from the optical transceiver IC, wherein the thickness of the insulator steadily decreases with distance from the processor IC to form sloping sidewalls. Metal traces 217a and 217b extend from the top surface of the optical transceiver IC, along the sloping sidewalls formed by the insulators, and extend onto the processor IC.

[0036] In some embodiments, the OTRIC includes vias, which in some embodiments may be through-silicon vias (TSVs) that allow active circuitry from its top surface to a pad on its bottom surface. In some embodiments, the thickness of the OTRIC is in the range of 10 μm to 100 μm. Figure 3 Also shown is an OTRIC 311 mounted to the processor IC 313. A passage 314 connects the active circuitry on the top surface of the OTRIC to a pad 315 on the bottom of the OTRIC. In some embodiments, the pad on the bottom of the OTRIC engages with a pad 317 on the top of the processor IC. In some embodiments, and as... Figure 3 As shown, this bonding is via solder bumps 319. In some embodiments, this bonding is via microbumps consisting of copper pillars covered with a solder layer. In some embodiments, this bonding is via direct thermoforming of pads on the two ICs.

[0037] In some embodiments, one or more optical transceiver array subsystems (OTRAS) are monolithically integrated with a processor IC, for example, Figure 4 It is shown, rather than contained in a separate IC. Figure 4 The diagram illustrates the monolithic integration of OTRAS 411 with processor IC 413, where, for example, the OTRAS surrounds and forms a portion of the top surface of the processor IC. The photodetector of the OTRAS can be fabricated in the same process as other processor IC circuitry (e.g., CMOS), for example using a lateral pin diode structure, and the transimpedance amplifier and microLED driver can be implemented in the same semiconductor process. As discussed earlier, the microLED can be stripped, transferred, and bonded to the OTRAS. In subsequent embodiments discussed below, the OTRAS may be contained within a separate OTRIC or monolithically integrated into the processor IC.

[0038] In some embodiments, parallel optical links are formed by coupling OTRAS to each end of a propagation medium. The coupled OTRAS may be on a separate IC with logic or other circuitry, and the separate IC may be a processor. The propagation medium provides connectivity such that each Tx is connected to an Rx at the other end of the link. In some embodiments, each OTRAS is dockably coupled to the optical propagation medium to transmit an optical signal from one location to another. In some embodiments, the OTRAS is coupled to the optical propagation medium via coupling optics. Figure 5A pair of processor ICs 511 are shown, each processor IC having a pair of OTRICs 513 on top of the processor IC. Coupling optics 515 couple each OTRIC to an optical propagation medium 517, wherein a first optical propagation medium couples a first OTRIC of each processor IC, and a second optical propagation medium couples a second OTRIC of each processor IC.

[0039] In some embodiments, the coupling optics include a plurality of lenses and / or steering mirrors that relay light from the OTRAS to the optical propagation medium. In some embodiments, the coupling optics perform an imaging operation, wherein the top of the OTRAS is imaged onto the input of the optical propagation medium at a certain magnification, wherein the magnification may be approximately 1 or may be some other value. In some embodiments, more complex optics, including gratings and / or holograms, are used to scramble the positions of the optical channels to provide fan-in connectivity and / or fan-out connectivity. Figure 6 This demonstrates how, when coupling light from OTRAS sources in different digital ICs, a steering mirror is used to redirect the light by 90°. Figure 6 In this configuration, a pair of digital ICs 611a and b each contain monolithically integrated OTRAS 613a and b. Each OTRAS has coupling optics 615a and 615b, which are coupled via an optical propagation medium 617. In each coupling optic, a single deflector placed between two lenses deflects the light by 90°. Figure 6 As illustrated, the OTRAS is positioned below its associated coupling optics. The coupling optics include a first lens 619a, a steering mirror 621, and a second lens 619b. The first lens is positioned between the OTRAS and the steering mirror. The steering mirror is at a 45° angle relative to both the vertical and horizontal planes to redirect light from the vertical direction to the horizontal direction. The second lens is positioned between the steering mirror and the optical propagation medium 617. The optical propagation medium is shown on one side of the coupling optics.

[0040] In some embodiments, the optical propagation medium is a multi-core optical fiber, for example, in which each optoelectronic device (OED) is coupled to a unique fiber core. Figure 7a illustrates a cross-section of the multi-core optical fiber having a plurality of waveguides 711 surrounded along its length by a cladding 713. In some embodiments, each optoelectronic device is a portion exemplified by Tx or Rx, for example, as per [reference to...]. Figure 1 The discussion focuses on the optical propagation medium, which is a coherent fiber bundle (CFB) in some embodiments, wherein each OED is coupled to multiple fiber cores. In some embodiments, the CFB fiber core diameter is in the range of 3 μm to 10 μm. In some embodiments, the CFB may contain 1,000 to 10,000 fiber cores.

[0041] In some embodiments, the propagation medium contains an optical waveguide formed in a transparent bulk solid (e.g., quartz glass, borosilicate glass, or polymer). In this case, each OED is coupled to a unique optical waveguide.

[0042] In some embodiments, the optical propagation medium comprises one or more planar optical waveguides, as illustrated in FIG7b. In FIG7b, a plurality of planar waveguides 715 are each surrounded by a cladding 717 along its length, wherein each waveguide contains a right-angle bend. A steering mirror 719 in each waveguide rotates the light at a right angle at the right-angle bend, allowing the light to propagate along the waveguide.

[0043] In some embodiments, the optical propagation medium comprises free space or a bulk solid, such as silica-based glass. Free space optical elements, such as lenses, mirrors, and holographic optics, may be included in the propagation medium. These elements are intended to guide light between the optical input and optical output of the propagation medium. Figure 7c illustrates a free space optical propagation medium 711 with lenses and mirrors 713. The mirrors are at a 45° angle to both a vertical plane and a horizontal plane, wherein a first lens 715a is generally in a horizontal plane below the mirror, and a second lens 715b is generally in a plane perpendicular to the side of the mirror, such that light passing through either lens and directed toward the mirror is generally directed toward the other lens.

[0044] The various embodiments discussed above can be incorporated into packaged multi-chip modules (MCMs). These MCMs may include one or more processor ICs attached to an interposer via solder bumps. The interposer is attached to the package substrate via solder bumps. In some embodiments, the interposer is made of silicon and has an electrical RDL layer on its surface. In some embodiments, the interposer is made of an organic material. Connections between the surfaces of the interposer substrate can be made using through-substrate vias (TSVs). In some embodiments, there is no interposer, and the IC is directly attached to the package substrate.

[0045] In some embodiments of the MCM, one or more OTRICs are attached to the processor IC using microbumps, for example... Figure 8 As explained. In Figure 8In this configuration, solder bumps 815 are used to mount the processor IC 811 to an interposer 813. The interposer includes: an interconnect layer 817, which may be in the form of a redistribution layer, shown on the side of the interposer facing the processor IC; and a plurality of through-substrate vias (TSVs) 828. Solder bumps 819 electrically connect the interposer to the package wall 821 of the MCM. In some embodiments, the surface of the processor IC facing the interposer includes an interconnect layer 823. An optical transceiver IC (OTRIC) 825 is attached to the processor IC on the side facing the interposer via microbumps 827. TSVs 829 connect from the "back" side of the OTRIC facing the processor IC to the "top" side of the OTRIC away from the processor IC, the "top" side containing active circuitry, and an optical transmitter attached to the "top" side, wherein... Figure 8 Together, the circuitry and optoelectronic device 831 on the "top" side of the OTRIC are shown. In some embodiments, the emitter is a GaN microLED. In some embodiments, an optical assembly is attached to the "top" of each OTRIC, wherein the optical assembly includes an optical coupling base 833, an optical coupling assembly (containing coupling optics 835), and a multi-core optical fiber 837. Figure 8 In this embodiment, the OTRIC is shown mounted to the processor IC at a location within the interposer and / or encapsulation wall that allows the optical coupling base, coupling optics, and multi-core fiber to pass through or through the interposer and / or encapsulation wall. In some embodiments, the optical coupling base is attached to each OTRIC before the OTRIC is attached to the processor IC, and then the optical coupling assembly and multi-core fiber are attached after the OTRIC is attached to the processor IC. In some embodiments, the optical coupling assembly and optical coupling base form a connector that can be mated and de-matted multiple times. In some embodiments, the optical coupling assembly and optical coupling base form a connector that can be mated only once and then permanently fixed in place.

[0046] In some embodiments of the MCM, the active sides of one or more OTRICs and one or more processor ICs are mounted to the top surface of the interposer. Figure 9 Examples of processor ICs 911 and OTRIC 913 mounted on the top surface of interposer layer 915 are shown. Figure 8 Similar to the implementation examples, in Figure 9In the diagram, solder bumps 917 are shown connecting the processor IC to an interposer, where the interposer's TSV 919 is coupled to solder bumps 921, thereby electrically coupling the interposer to a package wall 923. The interposer is also shown having an interconnect layer 925 from the solder bumps of the processor IC to the OTRICs. Electrical connections from each OTRIC to the interposer can be made using solder bumps, microbumps, or direct thermoforming. The active side of each OTRIC includes a PD and a microLED emitter. Apertures 927 in the interposer allow these PDs and microLEDs to be coupled to a multi-core optical fiber 929 via coupling optics 931 attached to each OTRIC. The optical fiber exits through apertures 933 in the package.

[0047] In some embodiments of the MCM, the “bottom” (non-active) side of one or more OTRICs is mounted to the top surface of the interposer, and one or more processor ICs are also mounted to the top surface. Figure 10 The illustration shows a processor IC 1011 and an OTRIC 1013 mounted on the top side of an interposer 1015, with coupling optics 1017 and a multi-core fiber 1019 extending away from the interposer on the side of the OTRIC away from the interposer. Electrical connections from the OTRIC to the interposer are made using solder bumps, microbumps, or direct thermoforming. The two interposer surfaces are connected via through-substrate paths. The bottom side of each OTRIC is electrically connected to an active top side via a path. The active side of each OTRIC includes a PD and a micro-LED emitter. The PD and emitter are coupled to the multi-core fiber via an optical coupling assembly attached to each OTRIC. In some embodiments of the MCM, there is no interposer, and the "bottom" side of one or more OTRICs is mounted to the top surface of a package substrate, with one or more processor ICs also mounted to said top surface.

[0048] In some embodiments of the MCM, the “bottom” (non-active) side of one or more OTRICs is mounted to the bottom surface of the interposer; the top surface of the interposer has one or more processor ICs mounted thereto. Figure 11 The processor IC 1111 is mounted on one side of the interposer 1113, and the OTRIC 1115 is mounted on the opposite side of the interposer. Electrical connections from the OTRIC to the interposer are made using solder bumps, microbumps, or direct thermoforming. The two interposer surfaces are connected via a through-substrate path 1117. The bottom side of each OTRIC is electrically connected to the active top side via a path. The active side of each OTRIC includes a PD and a microLED emitter. The PD and emitter are coupled to a multi-core optical fiber 1119 via an optical coupling assembly 1121 attached to each OTRIC. The optical fiber exits through a hole 1123 in a package 1125.

[0049] Although the invention has been discussed with respect to various embodiments, it should be recognized that the invention includes novel and non-obvious claims supported by this disclosure.

Claims

1. An apparatus comprising optical communication components, comprising: Processor IC; An optical transceiver subsystem having elements in or attached to an optical transceiver IC electrically coupled to a processor IC, the optical transceiver subsystem comprising a plurality of transmitter examples and receiver examples. Each of the transmitter examples includes a transmitter circuit system in the optical transceiver IC, and a micro-LED coupled to the top surface of the optical transceiver IC, defined by a reflector and electrically connected to the transmitter circuit system; Each of the receiver examples includes a receiver circuit system in the optical transceiver IC and a photodetector coupled to the top surface of the optical transceiver IC, defined by a reflector and electrically connected to the receiver circuit system; and The optical transceiver IC includes pathways that couple the transmitter circuitry and the receiver circuitry to a pad on the bottom surface of the optical transceiver IC, the optical transceiver IC being at least partially coupled to the processor IC through the pad.

2. The apparatus of claim 1, wherein the pad is coupled to the interconnect layer of the processor IC.

3. The apparatus of claim 1, wherein the pad is coupled to the interconnect layer of the interposer to which both the processor IC and the optical transceiver IC are mounted.

4. The apparatus of claim 1, wherein the pad is coupled to the package substrate to which both the processor IC and the optical transceiver IC are mounted.

5. The apparatus of claim 1, wherein both the processor IC and the optical transceiver IC are mounted on opposite surfaces of the interposer layer.

6. The apparatus of claim 1, wherein the optical transceiver IC is mounted above a hole in the interposer layer.

7. The apparatus of claim 1, wherein the photodetector is monolithically integrated into the receiver circuit system.

8. The apparatus of claim 1, wherein the coupling optics are coupled to the optical transceiver IC.

9. The apparatus of claim 8, wherein the coupling optics comprises a steering mirror.

10. The apparatus of claim 1, further comprising: Another processor IC; Another optical transceiver subsystem has elements in or attached to another optical transceiver IC, the other optical transceiver IC being coupled to the other processor IC, the other optical transceiver subsystem including a plurality of other transmitter examples and other receiver examples; Each of the other transmitter examples includes another transmitter circuitry in the other optical transceiver IC, and another microLED coupled to the top surface of the other optical transceiver IC and electrically connected to the other transmitter circuitry. Each of the other receiver examples includes another receiver circuit system in the other optical transceiver IC, and another photodetector electrically connected to the other receiver circuit system in or attached to the top surface of the other optical transceiver IC. The other optical transceiver IC includes pathways connecting the other transmitter circuitry and the other receiver circuitry to pads on the bottom surface of the other optical transceiver IC, the other optical transceiver IC being at least partially coupled to the other processor IC through the pads; and An optical transmission medium that couples the optical transceiver IC and the other optical transceiver IC.

11. The apparatus of claim 10, wherein the optical propagation medium comprises a multi-core optical fiber.

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