Method for improving copper barrier morphology

Abstract

The application provides a method for improving the morphology of a copper barrier layer, comprising: providing a batch of wafers; using an endpoint control system to perform first chemical mechanical polishing on the wafers until the BD layer is exposed; performing second chemical mechanical polishing on the wafers, wherein when the i-th wafer is polished, the polishing time and the polishing pressure of the wafer are corrected according to i-1 time correction values and i-1 pressure correction values obtained by polishing i-1 wafers before; for the first wafer in the batch, the second chemical mechanical polishing is performed by setting an initial polishing time and an initial polishing pressure, and after the wafers in the batch are polished, the polishing time and the polishing pressure of the first wafer are corrected to perform third chemical mechanical polishing on the first wafer. The application solves the problem of poor wafer morphology uniformity after the copper barrier layer of the same batch of wafers is polished by the existing chemical mechanical polishing.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for improving the morphology of a copper barrier layer. Background Technology

[0002] As semiconductor processes advance to more advanced technology nodes, the challenges of copper chemical mechanical polishing (CMP) in back-end copper semiconductor interconnect manufacturing processes are increasing, and the wafer morphology after CMP directly affects the wafer's electrical properties. For advanced process barrier layers, CMP requires controlling the thicknesses of different films such as the copper barrier layer (Ta / TaN), capping layer (TiN), dielectric layer (SiOC), dielectric layer (BD), and the Cu filling in the trenches, while ensuring wafer morphology uniformity. Variations in the deposition of preceding thin films and changes in the removal rate caused by CMP consumables can disrupt the morphology uniformity of the copper barrier layer during CMP.

[0003] One existing method for controlling the morphology of copper wafers after chemical mechanical polishing (CMP) is to polish the wafers based on time (i.e., pilot-fix time). However, this approach involves adjusting the polishing pressure of different regions in subsequent batches based on the morphology of the wafers in that batch after polishing is completed. This method cannot adjust the morphology of different wafers within the same batch, and therefore cannot compensate for the effects of variations in the deposition of the preceding thin film and the chemical mechanical polishing removal rate. Summary of the Invention

[0004] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a method for improving the morphology of copper barrier layers, which solves the problem of poor morphology uniformity of wafers after chemical mechanical polishing of copper barrier layers in the same batch of wafers.

[0005] To achieve the above and other related objectives, the present invention provides a method for improving the morphology of a copper barrier layer, the method comprising:

[0006] Provide a batch of wafers, the wafers including plugs, a stop layer, a BD layer, a SiOC layer and a cap layer stacked from bottom to top on the surface of the plugs, a trench formed through the stop layer, the BD layer, the SiOC layer and the cap layer, a copper barrier layer formed on the bottom, sidewalls and surface of the cap layer of the trench and copper metal filled in the trench;

[0007] The batch of wafers is subjected to a first chemical mechanical polishing process using an endpoint control system until the BD layer is exposed.

[0008] The batch of wafers undergoes a second chemical mechanical polishing process, and a time correction value and a pressure correction value are obtained for each wafer polished. When polishing the i-th wafer, the polishing time is corrected based on the i-1 time correction values ​​obtained from the previously polished i-1 wafers to obtain the corrected polishing time for the i-th wafer, and the polishing pressure is corrected based on the i-1 pressure correction values ​​obtained from the previously polished i-1 wafers to obtain the corrected polishing pressure for the i-th wafer. The i-th wafer is then subjected to the second chemical mechanical polishing process using the corrected polishing time and the corrected polishing pressure of the i-th wafer, where i is a positive integer greater than or equal to 2.

[0009] The first wafer in the batch is subjected to a second chemical mechanical polishing by setting an initial polishing time and an initial polishing pressure. After the wafers in the batch have been polished, the polishing time and polishing pressure of the first wafer are adjusted to allow for a third chemical mechanical polishing.

[0010] Optionally, when the batch of wafers is subjected to the first chemical mechanical polishing until the BD layer is exposed using the endpoint control system, the polishing is performed based on the friction of the copper barrier layer, the capping layer, the SiOC layer and the metallic copper, and the determination of whether to polish to the BD layer is based on the characteristic value of the electrical signal generated during the polishing process.

[0011] Optionally, the method for obtaining a time correction value for each wafer being polished includes: after performing a second chemical mechanical polishing on a wafer, obtaining thickness measurement values ​​for different regions of the wafer, averaging the thickness measurement values ​​to obtain a thickness measurement mean, and subtracting the thickness measurement mean from the target thickness value and then dividing by the polishing rate.

[0012] Optionally, the method for obtaining a pressure correction value for each wafer polished includes: after performing a second chemical mechanical polishing on a wafer, obtaining thickness measurements of different regions of the wafer, subtracting each thickness measurement from the target thickness value and dividing by the polishing speed to obtain the region pressure correction value for each region, and then averaging the region pressure correction values ​​to obtain the pressure correction value.

[0013] Optionally, when grinding the i-th wafer, the pressure correction value f required for grinding the i-th wafer is obtained by weighting the obtained i-1 pressure correction values. i It is represented as:

[0014]

[0015] Where, x m A represents the pressure correction value obtained from the m-th wafer. mThis represents the weighting coefficient.

[0016] Optionally, when grinding the i-th wafer, the time correction value g required for grinding the i-th wafer is obtained by weighting the obtained i-1 time correction values. i It is represented as:

[0017]

[0018] Among them, y m B represents the time correction value obtained from the m-th wafer. m This represents the weighting coefficient.

[0019] Optionally, the method for obtaining the corrected grinding time of the i-th wafer includes: obtaining the corrected grinding time of the i-th wafer by adding the initial grinding time to the time correction value required for grinding the i-th wafer.

[0020] Optionally, the method for obtaining the corrected polishing pressure of the i-th wafer includes: obtaining the corrected polishing pressure of the i-th wafer by adding the initial polishing pressure to the pressure correction value required for polishing the i-th wafer.

[0021] Optionally, the plug may be made of tungsten.

[0022] Optionally, the material of the stop layer includes aluminum nitride.

[0023] Optionally, the capping layer may be made of titanium nitride.

[0024] Optionally, the copper barrier layer may be made of a combination of tantalum and tantalum nitride.

[0025] As described above, the method for improving the morphology of the copper barrier layer of the present invention modifies the polishing time and polishing pressure of each wafer during chemical mechanical polishing of the same batch of wafers, thereby improving the uniformity of the copper barrier layer morphology of the same batch of wafers; moreover, by using the same method to polish the next batch of wafers, the morphology of the copper barrier layer of different batches of wafers can have good uniformity, thereby effectively improving the inline CPK of copper chemical mechanical polishing, and ultimately improving the electrical properties of the wafer. Attached Figure Description

[0026] Figure 1 The flowchart shown is a method for improving the morphology of the copper barrier layer according to the present invention.

[0027] Figure 2 The diagram shown is a cross-sectional view of the wafer of this invention.

[0028] Figure 3The diagram shown is a cross-sectional view of the wafer of the present invention after the first chemical mechanical polishing.

[0029] Figure 4 The diagram shows the electrical signal curves generated when each layer is polished using the endpoint control system of the present invention.

[0030] Figure 5 The diagram shows the distribution of different regions of the wafer according to the present invention. Detailed Implementation

[0031] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0032] Please see Figures 1 to 5 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Although the illustrations only show components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation, the shape, quantity and proportion of each component in the actual implementation can be arbitrarily changed, and the layout of the components may also be more complex.

[0033] like Figure 1 As shown, this embodiment provides a method for improving the morphology of a copper barrier layer, the method comprising:

[0034] Provide a batch of wafers, the wafers including plugs, a stop layer, a BD layer, a SiOC layer and a cap layer stacked from bottom to top on the surface of the plugs, a trench formed through the stop layer, the BD layer, the SiOC layer and the cap layer, a copper barrier layer formed on the bottom, sidewalls and surface of the cap layer of the trench and copper metal filled in the trench;

[0035] The batch of wafers is subjected to a first chemical mechanical polishing process using an endpoint control system until the BD layer is exposed.

[0036] The batch of wafers undergoes a second chemical mechanical polishing process, and a time correction value and a pressure correction value are obtained for each wafer polished. When polishing the i-th wafer, the polishing time is corrected based on the i-1 time correction values ​​obtained from the previously polished i-1 wafers to obtain the corrected polishing time for the i-th wafer, and the polishing pressure is corrected based on the i-1 pressure correction values ​​obtained from the previously polished i-1 wafers to obtain the corrected polishing pressure for the i-th wafer. The i-th wafer is then subjected to the second chemical mechanical polishing process using the corrected polishing time and the corrected polishing pressure of the i-th wafer, where i is a positive integer greater than or equal to 2.

[0037] The first wafer in the batch is subjected to a second chemical mechanical polishing by setting an initial polishing time and an initial polishing pressure. After the wafers in the batch have been polished, the polishing time and polishing pressure of the first wafer are adjusted to allow for a third chemical mechanical polishing.

[0038] The method for improving the morphology of the copper barrier layer provided in this embodiment will be described in detail below.

[0039] like Figure 2 As shown, a batch of wafers is provided, the wafers including plugs, a stop layer, a BD layer, a SiOC layer and a cap layer stacked from bottom to top on the surface of the plugs, a copper barrier layer formed at the bottom, sidewalls and surface of the cap layer through a trench formed through the stop layer, the BD layer, the SiOC layer and the cap layer, and metallic copper filled in the trench.

[0040] In this embodiment, the BD layer is a dielectric material composed of elements such as C, H, O, and Si, with a K value of 2.5 to 3.3.

[0041] Specifically, the material of the plug includes tungsten.

[0042] Specifically, the material of the stop layer includes aluminum nitride.

[0043] Specifically, the material of the cap layer includes titanium nitride.

[0044] Specifically, the copper barrier layer is made of a combination of tantalum and tantalum nitride.

[0045] like Figure 3 As shown, the batch of wafers is subjected to a first chemical mechanical polishing using an endpoint control system until the BD layer is exposed.

[0046] In this embodiment, when the wafer is polished through the first chemical mechanical polishing until the BD layer is exposed, the capping layer, the SiOC layer, and the copper barrier layer formed on the surface of the capping layer are removed. Moreover, the copper barrier layer formed in the trench and the metallic copper are polished to the same height as the BD layer.

[0047] Specifically, when the batch of wafers is subjected to the first chemical mechanical polishing until the BD layer is exposed using the endpoint control system, the polishing is performed based on the friction of the copper barrier layer, the capping layer, the SiOC layer and the metallic copper, and the characteristic value of the electrical signal generated during the polishing process is used to determine whether the polishing reaches the BD layer.

[0048] Figure 4 The characteristic values ​​corresponding to the capping layer (TiN) and the SiOC layer are shown (circled in black in the figure). Because the frictional forces of the copper barrier layer, the capping layer, the SiOC layer, and the metallic copper are different, the electrical signals generated during the polishing process correspond to different characteristic values. Therefore, it is possible to determine whether each layer has been removed by polishing based on its corresponding characteristic value. It should be noted that the removed copper barrier layer includes the copper barrier layer formed on the surface of the capping layer and the copper barrier layer located above the BD layer and on the sidewall of the trench, while the removed metallic copper is located within the trench and above the BD layer.

[0049] The batch of wafers undergoes a second chemical mechanical polishing process to achieve the target thickness value. For each wafer polished, a time correction value and a pressure correction value are obtained. When polishing the i-th wafer, the polishing time is corrected based on the i-1 time correction values ​​obtained from the previously polished i-1 wafers to obtain the corrected polishing time for the i-th wafer. Similarly, the polishing pressure is corrected based on the i-1 pressure correction values ​​obtained from the previously polished i-1 wafers to obtain the corrected polishing pressure for the i-th wafer. The i-th wafer is then subjected to the second chemical mechanical polishing process using the corrected polishing time and the corrected polishing pressure of the i-th wafer, where i is a positive integer greater than or equal to 2.

[0050] Specifically, the method for obtaining a time correction value for each wafer being polished includes: after performing a second chemical mechanical polishing on a wafer, obtaining thickness measurement values ​​for different regions of the wafer, averaging the thickness measurement values ​​to obtain a thickness measurement mean, subtracting the thickness measurement mean from the target thickness value, and then dividing by the polishing rate.

[0051] like Figure 5As shown, in this embodiment, each wafer can be divided into 8 regions from the inside out, and the thickness of each of the 8 regions is measured. Of course, the number of regions and the method of division of the wafer can be selected as needed, which has no impact on this embodiment.

[0052] Specifically, when grinding the i-th wafer, the time correction value g required for grinding the i-th wafer is obtained by weighting the obtained i-1 time correction values. i It is represented as:

[0053]

[0054] Among them, y m B represents the time correction value obtained from the m-th wafer. m This represents the weighting coefficient.

[0055] Specifically, the method for obtaining the corrected grinding time of the i-th wafer includes: obtaining the corrected grinding time of the i-th wafer by adding the initial grinding time to the time correction value required for grinding the i-th wafer.

[0056] Specifically, the method for obtaining a pressure correction value for each wafer includes: after performing a second chemical mechanical polishing on a wafer, obtaining thickness measurements of different regions of the wafer, subtracting each thickness measurement from the target thickness value and dividing by the polishing speed to obtain the regional pressure correction value for each region, and then averaging the regional pressure correction values ​​to obtain the pressure correction value.

[0057] In this embodiment, each wafer can be divided into eight regions from the inside out, and the thickness of each of the eight regions is measured. Of course, the number of regions into which the wafer is divided can be selected as needed, which has no impact on this embodiment.

[0058] Specifically, when grinding the i-th wafer, the pressure correction value f required for grinding the i-th wafer is obtained by weighting the obtained i-1 pressure correction values. i It is represented as:

[0059]

[0060] Where, x m A represents the pressure correction value obtained from the m-th wafer. m This represents the weighting coefficient.

[0061] Specifically, the method for obtaining the corrected grinding pressure of the i-th wafer includes: obtaining the corrected grinding pressure of the i-th wafer by adding the initial grinding pressure to the pressure correction value required for grinding the i-th wafer.

[0062] The first wafer in the batch is subjected to a second chemical mechanical polishing by setting an initial polishing time and an initial polishing pressure. After the wafers in the batch have been polished, the polishing time and polishing pressure of the first wafer are adjusted to allow for a third chemical mechanical polishing.

[0063] In this embodiment, the initial polishing time and initial polishing pressure used when performing the second chemical mechanical polishing on the first wafer of the batch are set based on experience. Therefore, the first wafer may not form a good morphology after the second chemical mechanical polishing. In this case, the polishing time and polishing pressure of the first wafer can be modified to perform a third chemical mechanical polishing, thereby enabling the wafer to form a good morphology.

[0064] It should be noted that, in this embodiment, the corrected grinding pressure of the i-th wafer, the corrected grinding time of the i-th wafer, and the pressure correction value and time correction value obtained after grinding each wafer are all calculated in the Advanced Process Control (APC) system.

[0065] In summary, the method for improving the morphology of the copper barrier layer of the present invention modifies the polishing time and pressure of each wafer during chemical mechanical polishing (CMP) of the same batch of wafers, thereby improving the uniformity of the copper barrier layer morphology within the same batch of wafers. Furthermore, using the same method to polish the next batch of wafers ensures that the morphology of the copper barrier layer in different batches of wafers exhibits good uniformity, effectively improving the inline CPK of copper CMP and ultimately enhancing the electrical properties of the wafer. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and possesses high industrial applicability.

[0066] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for improving the morphology of a copper barrier layer, characterized in that, The method includes: A batch of wafers is provided, the wafers comprising a plug, a stop layer, a BD layer, a SiOC layer and a capping layer stacked from bottom to top on the surface of the plug, a copper barrier layer formed through a trench formed through the stop layer, the BD layer, the SiOC layer and the capping layer, a copper barrier layer formed on the bottom, sidewalls and surface of the capping layer of the trench, and metallic copper filled in the trench; the BD layer is a dielectric material comprising elements C, H, O and Si; The batch of wafers is subjected to a first chemical mechanical polishing process using an endpoint control system until the BD layer is exposed. The batch of wafers undergoes a second chemical mechanical polishing process, and a time correction value and a pressure correction value are obtained for each wafer polished. When polishing the i-th wafer, the polishing time is corrected based on the i-1 time correction values ​​obtained from the previously polished i-1 wafers to obtain the corrected polishing time for the i-th wafer, and the polishing pressure is corrected based on the i-1 pressure correction values ​​obtained from the previously polished i-1 wafers to obtain the corrected polishing pressure for the i-th wafer. The i-th wafer is then subjected to the second chemical mechanical polishing process using the corrected polishing time and the corrected polishing pressure of the i-th wafer, where i is a positive integer greater than or equal to 2. The first wafer in the batch is subjected to a second chemical mechanical polishing by setting an initial polishing time and an initial polishing pressure. After the wafers in the batch have been polished, the polishing time and polishing pressure of the first wafer are adjusted to allow for a third chemical mechanical polishing.

2. The method for improving the morphology of the copper barrier layer according to claim 1, characterized in that, When the batch of wafers is subjected to the first chemical mechanical polishing until the BD layer is exposed using the endpoint control system, the polishing is performed based on the friction of the copper barrier layer, the capping layer, the SiOC layer and the metallic copper, and the characteristic value of the electrical signal generated during the polishing process is used to determine whether the polishing reaches the BD layer.

3. The method for improving the morphology of the copper barrier layer according to claim 1, characterized in that, The method for obtaining a time correction value for each wafer grinding includes: after performing a second chemical mechanical polishing on a wafer, obtaining thickness measurement values ​​of different regions of the wafer, averaging the thickness measurement values ​​to obtain the average thickness measurement value, and subtracting the average thickness measurement value from the target thickness value and then dividing it by the polishing rate.

4. The method for improving the morphology of the copper barrier layer according to claim 1, characterized in that, The method for obtaining a pressure correction value for each wafer grinding includes: after performing a second chemical mechanical polishing on a wafer, obtaining thickness measurements of different regions of the wafer, subtracting each thickness measurement from the target thickness value and dividing by the polishing speed to obtain the regional pressure correction value for each region, and then averaging the regional pressure correction values ​​to obtain the pressure correction value.

5. The method for improving the morphology of a copper barrier layer according to any one of claims 1 to 4, characterized in that, When grinding the i-th wafer, the pressure correction value f required for grinding the i-th wafer is obtained by weighting the i-1 pressure correction values ​​obtained so far. i It is represented as: ； Where, x m A represents the pressure correction value obtained from the m-th wafer. m This represents the weighting coefficient.

6. The method for improving the morphology of a copper barrier layer according to any one of claims 1 to 4, characterized in that, When grinding the i-th wafer, the time correction value g required for grinding the i-th wafer is obtained by weighting the i-1 previously obtained time correction values. i It is represented as: ； Among them, y m B represents the time correction value obtained from the m-th wafer. m This represents the weighting coefficient.

7. The method for improving the morphology of the copper barrier layer according to claim 6, characterized in that, The method for obtaining the corrected grinding time of the i-th wafer includes: obtaining the corrected grinding time of the i-th wafer by adding the initial grinding time to the time correction value required for grinding the i-th wafer.

8. The method for improving the morphology of the copper barrier layer according to claim 5, characterized in that, The method for obtaining the corrected grinding pressure of the i-th wafer includes: obtaining the corrected grinding pressure of the i-th wafer by adding the initial grinding pressure to the pressure correction value required for grinding the i-th wafer.

9. The method for improving the morphology of the copper barrier layer according to claim 1, characterized in that, The plug is made of tungsten metal.

10. The method for improving the morphology of the copper barrier layer according to claim 1, characterized in that, The material of the stop layer includes aluminum nitride.

11. The method for improving the morphology of a copper barrier layer according to claim 1, characterized in that, The cap layer is made of titanium nitride.

12. The method for improving the morphology of the copper barrier layer according to claim 1, characterized in that, The copper barrier layer is made of a combination of tantalum and tantalum nitride.

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