A method for manufacturing a hetero-semiconductor device and applications thereof
By employing growth channel technology in heterogeneous semiconductor devices to construct active regions, the problems of complexity and performance limitations in heterogeneous semiconductor device fabrication have been solved, achieving high-quality heterogeneous integrated device fabrication and performance improvement.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ZHEJIANG UNIV
- Filing Date
- 2023-02-22
- Publication Date
- 2026-07-31
AI Technical Summary
Existing heterogeneous semiconductor device fabrication processes are complex, have high scrap rates, and the substrate is only used as a support, which limits device performance.
By employing growth channel technology, an epitaxial growth interface is formed on the surface of a semiconductor material to create an active region consisting of a first component and a second component. A growth channel is constructed using a dielectric material to limit dislocation propagation and reduce defects.
It significantly reduces defect density, improves the electrical and optical performance of the device, and enhances the signal-to-noise ratio and photoelectric conversion efficiency.
Smart Images
Figure CN116207183B_ABST
Abstract
Description
Technical Field
[0001] This invention pertains to chip manufacturing technology and relates to a method for fabricating and applying a heterogeneous semiconductor device. Background Technology
[0002] In recent years, as the performance requirements of various applications for semiconductor devices have continued to increase, bulk single-crystal materials have become insufficient to meet the growing needs. Epitaxial growth refers to the growth of a single-crystal layer with specific requirements and the same crystal orientation as the substrate on a carefully processed single-crystal substrate (substrate) through cutting, grinding, and polishing. It's as if the original crystal has been extended outwards. The new single crystal can be the same material as the substrate or a different material (homogeneous epitaxy or heteroepitaxial epitaxy). Because the newly grown single-crystal layer extends along the crystal phase of the substrate, it is called an epitaxial layer (typically a few micrometers thick), and the substrate with the epitaxial layer is called an epitaxial wafer (epitaxy wafer = epitaxial layer + substrate). Device fabrication on the epitaxial layer is called positive epitaxy; if the device is fabricated on the substrate, it is called anti-epitaxy, in which case the epitaxial layer only serves a supporting function. The main applications of epitaxial technology are:
[0003] 1. High (low) resistivity epitaxial layers can be epitaxially grown on low (high) resistivity substrates.
[0004] 2. N(P) type epitaxial layers can be epitaxially grown on P(N) type substrates to directly form PN junctions, eliminating the compensation problem that occurs when fabricating PN junctions on single-crystal substrates using diffusion methods.
[0005] 3. Combined with masking technology, selective epitaxial growth can be performed in designated areas, creating conditions for the fabrication of integrated circuits and devices with special structures.
[0006] 4. The type and concentration of dopant can be changed as needed during the epitaxial growth process. The concentration change can be abrupt or gradual.
[0007] 5. It can grow heterogeneous, multilayered, multi-component compounds in ultrathin layers with variable compositions.
[0008] 6. Epitaxial growth can be carried out at temperatures below the material's melting point, with a controllable growth rate, enabling epitaxial growth with atomic-level thickness.
[0009] 7. It can grow materials that cannot be pulled into single crystals, such as GaN, and single crystal layers of ternary and quaternary compounds.
[0010] Whether it's positive or negative epitaxy, only one of the substrate or the epitaxial layer serves as the active region, while the other part only plays a supporting or protective role. This is because in heterostructures, due to the lattice matching and thermal expansion coefficient mismatch between the two materials, strain occurs in the epitaxial film to release the resulting stress, leading to defects or dislocations. These defects and dislocations become carrier generation-recombination centers, severely affecting carrier lifetime and thus the electrical performance of the device. Therefore, in epitaxial structures (taking positive epitaxy as an example), high-quality epitaxial layers are typically obtained by using techniques such as adding gradient composition buffer layers and controlling the width-to-height ratio of the growth region. Devices are then fabricated in these epitaxial layers to obtain semiconductor devices with good electrical performance. In these techniques, the epitaxial substrate is never used as the active region, only serving a supporting role. This technical bias of using only one of the substrate or the epitaxial layer as the active region is a waste of the substrate. Summary of the Invention
[0011] This invention overcomes the technical bias of existing epitaxial growth techniques where the substrate is merely considered as the substrate itself. It creatively integrates the substrate as part of the device, enabling the fabrication of heterogeneous semiconductor devices and solving the technical challenges of complex processes and high scrap rates in existing heterogeneous semiconductor device fabrication. Compared to existing heterogeneous semiconductor device fabrication methods, this significantly improves the performance of heterogeneous devices, enabling their application in more fields.
[0012] Specifically, the present invention adopts the following scheme: a method for fabricating a heterogeneous semiconductor device, the method comprising: epitaxially growing a second component made of a second semiconductor material from the surface of a first component made of a first semiconductor material; constructing a growth channel on the surface of the first component, wherein the second semiconductor material is epitaxially grown from the surface of the first component in the growth channel to form a connecting portion; and then further epitaxially growing to form the second component; wherein the first component and the second component respectively constitute the first active region and the second active region of the semiconductor device.
[0013] The active region described in this invention refers to the portion that, as a functional component of a device, possesses electromagnetic, optical, or thermodynamic functions and can generate or transport charge carriers. Based on this, we can construct semiconductor devices such as optoelectronic devices and power devices. These include, but are not limited to, semiconductor diodes with two electrodes; or transistors. To obtain the various types of devices described above, those skilled in the art should be familiar with the selection of the first and second semiconductor materials based on existing technology, such as silicon, germanium, indium phosphide, arsenic phosphide, gallium arsenide, gallium nitride, etc.
[0014] Because this invention utilizes growth channels to construct the device, the connection portion formed within the growth channel has a smaller contact area with the first and second components, thus reducing the number of defects. This reduction in defects decreases the number of generation-recombination centers in the semiconductor, thereby reducing detector noise, improving the signal-to-noise ratio, and also reducing carrier recombination losses, ultimately improving the photoelectric conversion efficiency of the photovoltaic cell.
[0015] During semiconductor material growth, defects such as dislocations reduce the overall energy of the semiconductor material. These dislocations have a specific direction and, after their formation, propagate along a fixed path as the semiconductor material grows. When semiconductor material is selectively grown on a substrate with a special structure, if a dislocation encounters a blocking dielectric layer in its propagation direction, it stops propagating, thus significantly improving the quality of the semiconductor material. This invention employs a growth channel to prevent dislocation propagation, resulting in fewer defects. The second component, further epitaxially grown from this connection portion, continues the lattice of the connection portion, with dislocations terminating at the sidewalls of the growth channel. This results in low defect rates, high quality, and therefore better optical and electrical performance.
[0016] In some embodiments of the present invention, the growth channel is constructed using a dielectric material, meaning that the channel walls are made of a dielectric material. The dielectric material primarily serves to constrain the connections and support the upper second component. The dielectric materials include silicon dioxide (SiO2), polycrystalline silicon, fluorine-doped silicon oxide (SiOF), carbon-doped silicon oxide (SiOC), amorphous carbon, etc.
[0017] In this invention, the growth channel can be constructed in the following manner: first, a dielectric material layer is deposited on the surface of the first component, and then the growth channel is formed by means of etching or the like.
[0018] The dielectric material can also be a metal, such as aluminum or copper, which can serve as an electrode, or a metal can be embedded in the dielectric material through etching and filling. This electrode can be connected together with the positive and negative electrodes of the avalanche diode in the reading circuit, or connected to an external independent circuit to control the electric field in the avalanche region and the absorption region. By controlling the potential, absorbed electrons can migrate towards the avalanche region at a greater speed in the absorption region, and electrons that would otherwise be unable to migrate to the avalanche region in some weak electric field regions can be given initial velocity, thereby increasing the probability of electrons being avalanched. Similarly, the electric field strength in the avalanche region can be increased, thereby increasing the probability of electron avalanche.
[0019] In a preferred embodiment of the present invention, the growth channel is a constraint channel, which constrains the growth of the crystal along the horizontal direction. It should be noted that constraining the horizontal growth of the crystal through a constraint channel to reduce linear dislocations is common knowledge in the art. By limiting the lateral growth of the crystal, the constraint channel causes linear dislocations to terminate on the sidewalls of the constraint channel, thereby reducing defects in the subsequent crystal growth. For example, in some embodiments of the present invention, the constraint channel is a longitudinal channel (whose cross-section can be rectangular, square, parallelogram, or other irregular shapes), extending from the surface of the first component to the surface of the second component. The diameter of the channel is generally less than 10 μm. As the crystal grows in the channel, the constraint channel restricts linear dislocations caused by crystal mismatch, causing them to terminate on the sidewalls of the channel, thereby reducing defect density and improving crystal quality. For example, in some embodiments of the present invention, the constraint channel is a trench made of dielectric material, with the bottom of the trench being the first component and the top of the trench being the second component. The width of the trench is less than 10 μm, and linear dislocations terminate on the sidewalls of the trench, ultimately obtaining a low-defect crystal.
[0020] In a more preferred embodiment of the invention, the aforementioned constraint channel has sufficient depth to adequately constrain the lateral growth of the crystal and terminate linear dislocations. Taking a channel as an example, its preferred aspect ratio is between 0.1 and 10. The aspect ratio refers to the ratio of the length of the connecting portion along the constraint direction to the width of the cross-section parallel to the first and second components (when the cross-section is irregular, the diameter is calculated using the area method). Different aspect ratios can be set for different materials. For example, when the first component is silicon and the second component is germanium, both form dislocations at a 60° angle to surface 1 within the growth channel; therefore, the minimum aspect ratio is required. This allows dislocations to terminate completely on the sidewalls of the growth channel.
[0021] In some embodiments of the present invention, before growing the second semiconductor material, a buffer layer is epitaxially grown from the surface of the first component within the growth channel, and the second semiconductor material is epitaxially grown from the buffer layer to form the connection portion. The buffer layer can reduce defects in the connection portion caused by lattice mismatch between the first and second components, or avoid interactions between the first and second components, such as mutual corrosion or penetration. The buffer layer material can be the same material as the second component, a solid solution of the materials of the first and second components, or a third material different from both.
[0022] This invention also provides applications of the above-mentioned devices in photodetectors, photovoltaic cells, power devices, or MEMS. The photodetectors can be used for detection in multiple wavelength bands, including ultraviolet detectors (e.g., the 200-280 nm solar-blind band), visible light detectors (380-780 nm band), short-wave near-infrared detectors (1310 nm, 1550 nm), and mid-infrared detectors (2000 nm-3000 nm).
[0023] In some embodiments of the present invention, the present invention is used to construct an avalanche diode, wherein one of the first and second components is the avalanche region of the avalanche diode, and the other is the absorption region of the avalanche diode. Photons absorbed by the absorption region are transmitted to the avalanche region through the connection portion, and avalanche occurs in the avalanche region. Reducing defects in the connection portion helps to reduce the dark current of the avalanche diode and improve the detection efficiency.
[0024] For short-wave near-infrared detectors, the first semiconductor material is germanium or germanium-tin solid solution or group III-V materials or other materials that can absorb wavelengths above 1000 nanometers, and the second semiconductor material is silicon.
[0025] For mid-infrared detectors, the first semiconductor material is indium gallium arsenide, silicon cadmium telluride, or other materials that can absorb wavelengths above 2000 nanometers, and the second semiconductor material is silicon, indium phosphide, silicon carbide, or diamond.
[0026] For the ultraviolet detector, the first semiconductor material is gallium oxide or silicon nitride or other materials that can absorb wavelengths below 300 nanometers, and the second semiconductor material is silicon or indium phosphide or silicon carbide or diamond.
[0027] For visible light detectors, the first semiconductor material is gallium oxide or silicon nitride or other materials that can absorb wavelengths below 300 nanometers, and the second semiconductor material is silicon or indium phosphide or silicon carbide or diamond.
[0028] For photovoltaic cells, the first semiconductor material is indium gallium nitride or cadmium telluride, or other materials that can absorb wavelengths from 300 nanometers to 1000 nanometers, and the second semiconductor material is silicon, indium phosphide, silicon carbide, or diamond.
[0029] For power devices, the first semiconductor material is silicon carbide or gallium nitride or other materials with a large band gap, and the second semiconductor material is silicon or indium phosphide or silicon carbide or diamond.
[0030] For MEMS, the first semiconductor material is germanium, gallium arsenide, gallium nitride, or other materials with good mechanical, electrical, and thermal properties, and the second semiconductor material is silicon, indium phosphide, silicon carbide, or diamond.
[0031] The beneficial effects of this invention are as follows: This invention utilizes heterojunction structure technology to achieve rapid and efficient fabrication of semiconductor devices composed of at least two active regions. It not only achieves low defect density epitaxy but also effectively reduces the contact area, thus further reducing the number of defects. This reduces generation-recombination centers in the semiconductor, thereby reducing detector noise, improving the signal-to-noise ratio, or enhancing the photoelectric conversion efficiency of photovoltaic cells. Attached Figure Description
[0032] Figure 1 The avalanche diode shown in Example 1;
[0033] Figure 2 The avalanche diode shown in Example 2;
[0034] Figure 3 This is a schematic diagram of the growth channel in Example 7;
[0035] In the figure, there are first component 1, second component 2, connecting part 3, dielectric layer 4, and electrode 5. Detailed Implementation
[0036] To further illustrate the technical means and effects of the present invention in achieving its intended purpose, the following detailed description of the specific implementation methods, structures, features, and effects of the present invention, in conjunction with the accompanying drawings and preferred embodiments, is provided below.
[0037] Example 1
[0038] This embodiment is used to construct a photodetector device, which includes a first component at the bottom, a second component at the top, and a connecting part 3 connecting the first component 1 and the second component 2. In this embodiment, the first component is Si with a crystal plane (100); the connecting part is Ge; the second component is Ge. The first component and the second component respectively constitute the first active region and the second active region of the semiconductor device.
[0039] During device fabrication, Ge is epitaxially grown on the surface of a first component using epitaxial growth technology to form the interconnect portion of this invention (first, a 500 nm thick silicon dioxide dielectric layer is coated on the surface of the first component; then, a 200 nm diameter hole is etched into the dielectric layer using etching, with the bottom of the hole extending to the surface of the first component to form a growth channel; Ge is then confined to grow within the hole using epitaxial growth technology). The first component with the interconnect portion is placed in an MOCVD (or other epitaxial equipment, such as MEB, ALD, PECVD, etc.) apparatus, where Ge is selectively grown to fabricate a second component. By setting up the growth channel, dislocations caused by lattice mismatch between components 1 and 2 terminate at the sidewalls of the growth channel, reducing the defect density in the second component to at least 1 / 10 of that without the growth channel.
[0040] Furthermore, the diameter of the connecting part is 200nm, and the contact area with the first and second components is small. Therefore, the number of defects is further reduced, which can reduce the generation-recombination centers in the semiconductor, thereby reducing the noise of the detector and improving the signal-to-noise ratio; or improving the photoelectric conversion efficiency of the photovoltaic cell.
[0041] In this embodiment, the dielectric layer can also be selected from dielectric materials such as polycrystalline silicon, fluorine-doped silicon oxide (SiOF), carbon-doped silicon oxide (SiOC), and amorphous carbon. In this case, the dielectric layer 4 mainly serves to isolate the first component 1 and the second component 2, as well as provide support.
[0042] In use, the positive and negative electrodes are connected to the reading circuit to achieve detection.
[0043] Example 2
[0044] This embodiment, based on Embodiment 1, further involves etching the dielectric material and depositing metal as an electrode for further control. For example... Figure 2 The aluminum electrode 5 and the positive and negative electrodes of the device are connected to the readout circuit together. Then, the heterojunction structure is simulated by TCAD. By applying the aluminum electrode 5, the carrier collection efficiency is improved by 2 times compared with Example 1 (only positive and negative electrodes).
[0045] Example 3
[0046] This embodiment is used to construct a photodetector device, which includes a first component at the bottom, a second component at the top, and a connecting part 3 connecting the first component 1 and the second component 3. In this embodiment, the first component is Si with a (100) crystal plane, the connecting part is GaAs, and the second component is GaAs. The first component and the second component respectively constitute the first active region and the second active region of the semiconductor device, and the structure is the same as... Figure 1 .
[0047] The dislocation angle between GaAs and Si is 60°, therefore the aspect ratio of the via is greater than... Dislocations can be terminated immediately. Therefore, during device fabrication, a silicon dioxide dielectric layer with a thickness of 347 nm is first coated on the surface of the first component. Then, a small hole with a diameter of 200 nm is etched into the dielectric layer by etching, with the bottom surface of the small hole extending to the surface of the first component, forming the growth channel of the present invention. The first component with the growth channel is placed in an MOCVD apparatus, and the connector and the second component are fabricated by selective growth.
[0048] In this embodiment, the diameter of the aperture in the growth channel is 200 nm and the height is 347 nm. The dislocations caused by lattice mismatch between the first component 1 and the second component 2 terminate at the sidewall of the growth channel.
[0049] TCAD simulation of GaAs-Si heterojunctions showed that the dark current was reduced by an order of magnitude compared to directly coupled GaAs-Si detectors.
[0050] Example 4
[0051] This embodiment is used to construct a photodetector device, which includes a first component at the bottom, a second component at the top, and a connecting portion connecting the first component and the second component. In this embodiment, the first component is Si with a (100) crystal plane, the connecting portion is a mixture of Ge and Si, and the second component is Ge. The first component and the second component respectively constitute the first active region and the second active region of the semiconductor device, with the same structure. Figure 1 .
[0052] In constructing the device, a 600 nm thick silicon dioxide dielectric layer is first coated on the surface of the first component. Then, a 250 nm diameter hole is etched into the dielectric layer, with the bottom of the hole extending to the surface of the first component, forming the growth channel of the present invention. The first component with the growth channel is placed in an MOCVD apparatus, and a second component is fabricated using selective growth.
[0053] By setting the growth channel material as a buffer layer, the dislocations caused by the lattice mismatch between 1 and 2 terminate at the sidewall of the growth channel, and the lattice mismatch between Si in 1 and Ge in 2 is further reduced by the germanium-silicon solid solution in 3, the defect density in the second component is reduced to at least 1 / 50 of the original.
[0054] TCAD simulation of Ge-Si heterojunctions shows that the dark current of photodetectors is reduced by an order of magnitude compared to directly coupled Ge-Si detectors.
[0055] Example 5
[0056] This embodiment is used to construct a photodetector device, which includes a first component at the bottom, a second component at the top, and a connecting portion connecting the first component and the second component. In this embodiment, the first component is Si with a (100) crystal plane, the connecting portion is SiC, and the second component is GaN. The first component and the second component respectively constitute the first active region and the second active region of the semiconductor device, with the same structure as... Figure 1 .
[0057] In constructing the device, a 500 nm thick silicon dioxide dielectric layer is first coated on the surface of the first component. Then, a 200 nm diameter hole is etched into the dielectric layer, with the bottom of the hole extending to the surface of the first component, forming the growth channel of the present invention. The first component with the growth channel is placed in an MOCVD apparatus, and a second component is fabricated using selective growth.
[0058] By setting the growth channel material as a buffer layer, direct contact between silicon in layer 1 and GaN in layer 2 is prevented, thereby avoiding the melt-back etching phenomenon and enabling GaN-Si heterostructure devices to be realized.
[0059] Example 6
[0060] This embodiment is used to construct a single-photon avalanche diode, which includes a first component at the bottom, a second component at the top, and a connecting portion connecting the first component and the second component. In this embodiment, the first component is Si with a (100) crystal plane, the connecting portion is p-type doped Si used to control the electric field intensity, and the second component is InGaAs. The first component and the second component respectively constitute the first active region and the second active region of the semiconductor device, with the same structure. Figure 1 .
[0061] In constructing the device, a 500 nm thick silicon dioxide dielectric layer is first coated on the surface of the first component. Then, a 200 nm diameter hole is etched into the dielectric layer, with the bottom of the hole extending to the surface of the first component, forming the growth channel of the present invention. The first component with the growth channel is placed in an MOCVD apparatus, and a second component is fabricated using selective growth.
[0062] In this embodiment, photogenerated carriers migrate from the absorption region to the avalanche region via channel 3. TCAD simulations show that by setting growth channels, the defects in the epitaxially obtained InGaAs are significantly reduced, resulting in a two-order-of-magnitude decrease in the dark current of the avalanche diode.
[0063] Example 7
[0064] This embodiment is used to construct a single-photon avalanche diode, which includes a first component at the bottom, a second component at the top, and a connecting part connecting the first component and the second component. In this embodiment, the first component is Si with a crystal plane (100), the connecting part is p-type doped Si, which is used to control the electric field strength, and the second component is Ge. The first component and the second component respectively constitute the first active region and the second active region of the semiconductor device.
[0065] In device fabrication, a 500nm thick silicon dioxide dielectric layer is first coated onto the surface of the first component. Then, trenches with a width of 300nm are etched into the dielectric layer using etching techniques. Figure 3 As shown, the growth channel of the present invention is formed. The first component with the growth channel formed is placed in an MOCVD apparatus, and the second component is prepared by selective growth.
[0066] TCAD simulation showed that by setting this narrow and long growth channel, edge breakdown caused by square holes can be further reduced, and the probability of edge breakdown is reduced by 50%.
[0067] Example 8
[0068] This embodiment is used to construct a photovoltaic cell, which includes a first component at the bottom, a second component at the top, and a connecting portion connecting the first component and the second component. In this embodiment, the first component is Si with a (100) crystal plane, the connecting portion is p-type heavily doped Si used to connect the first component and the second component, and the second component is GaAs. The first component and the second component respectively constitute the first active region and the second active region of the semiconductor device, forming two photovoltaic cells connected in series. The structure is the same as... Figure 1 .
[0069] In device fabrication, a 500nm thick silicon dioxide dielectric layer is first coated on the surface of a first component. Then, 200nm diameter holes are etched into the dielectric layer, with the bottom of the holes extending to the surface of the first component, forming the growth channel of this invention. The first component with the growth channel is placed in an MOCVD apparatus, and a second component is fabricated using selective growth. The first and second components are then subjected to in-situ doping or ion implantation doping, respectively. The Si region is doped with B and P to form P-type and N-type doping, respectively, and the GaAs region is doped with Zn and Sn to form P-type and N-type doping, respectively.
[0070] In this embodiment, photogenerated charges flow from the upper photovoltaic cell to the lower photovoltaic cell via 3, thereby forming a stacked photovoltaic cell. The photoelectric conversion efficiency of the photovoltaic cell is significantly improved compared to a single-cell photovoltaic cell, and by setting up growth channels, the number of recombination centers is greatly reduced, further improving the photoelectric conversion efficiency.
[0071] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.
Claims
1. A method for producing a hetero semiconductor device, the method comprising: epitaxially growing a second member composed of a second semiconductor material from a surface of a first member composed of a first semiconductor material; characterized in that, A growth channel is constructed on the surface of a first component, and a second semiconductor material is epitaxially grown from the surface of the first component inside and outside the growth channel to form a connection; then, the second component is further epitaxially grown to form the second component; the first component and the second component respectively constitute the first active region and the second active region of the semiconductor device. The semiconductor device is a linear mode avalanche diode (APD) or a Geiger mode single-photon avalanche diode (SPAD), wherein one of the first component and the second component is the avalanche region of the avalanche diode, and the other is the absorption region of the avalanche diode. The first semiconductor material is germanium or germanium-tin solid solution or III-V group material or gallium oxide or silicon nitride, and the second semiconductor material is silicon or indium phosphide or silicon carbide or diamond.
2. The preparation method according to claim 1, characterized in that, The growth channel is made of dielectric material.
3. The preparation method according to claim 2, characterized in that, The dielectric materials mentioned are: silicon dioxide (SiO2), polycrystalline silicon, fluorine-doped silicon oxide (SiOF), carbon-doped silicon oxide (SiOC), and amorphous carbon.
4. The preparation method according to claim 2, characterized in that, The growth channel is a constraint channel that constrains the horizontal growth of the crystal.
5. The preparation method according to claim 1, characterized in that, Before growing the second semiconductor material, a buffer layer is first grown epitaxially from the surface of the first component within the growth channel, and the second semiconductor material is grown epitaxially from the buffer layer to form the connection portion.
6. The application of the device prepared by the method described in claim 1 in photodetectors, photovoltaic cells, power devices or MEMS.