Display device and display panel

By placing optical electronic devices below the display area of ​​the display panel and constructing a high-transmittance optical area, the problem of reduced transmittance caused by the installation of optical electronic devices is solved, thereby enabling the normal functional execution of optical electronic devices and improving design freedom.

CN116209319BActive Publication Date: 2026-06-19LG DISPLAY CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
LG DISPLAY CO LTD
Filing Date
2022-11-23
Publication Date
2026-06-19

AI Technical Summary

Technical Problem

When installing optical electronic devices such as cameras or sensors, existing display devices require the addition of bezels or the formation of notches in the display panel to receive incident light, which reduces transmittance and affects functional performance.

Method used

Optical electronic devices are placed below the display area of ​​the display panel, and by constructing an optical area with high transmittance, the optical electronic devices can receive or detect light transmitted through the display panel without reducing the area of ​​the display area.

Benefits of technology

It enables the normal functioning of optical electronic devices, while reducing the size of non-display areas and improving the transmittance and design freedom of display devices.

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Abstract

This application relates to a display device and a display panel. The display device includes: a display panel comprising a plurality of light-emitting areas; and a first optical electronic device located below the display panel. Furthermore, the first optical display area of ​​the display panel overlapping with the first optical electronic device includes, in addition to the light-emitting areas, a plurality of first light-transmitting areas. The non-overlapping display area of ​​the display panel, not overlapping with the first optical electronic device, includes light-emitting areas but not the first light-transmitting areas. A plurality of first horizontal lines for controlling the light-emitting areas extend horizontally through the non-overlapping display area and the first optical display area. Moreover, the light-emitting areas included in the non-overlapping display area and the first optical display area are arranged in the same row, and the same first horizontal lines control the light-emitting areas arranged in the same row in both the non-overlapping display area and the first optical display area.
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Description

Technical Field

[0001] This disclosure relates to electronic devices, and more specifically, to display devices and panels capable of increasing the transmittance of the area in which optics are disposed. Background Technology

[0002] With advancements in display technology, display devices can offer more functionalities, such as image capture, sensing, and image display. To provide these functions, display devices may need to include optoelectronic components, such as cameras and sensors for detecting images.

[0003] In order to receive light passing through the front surface of a display device, it may be desirable for the optical electronics to be located in an area of ​​the display device that can advantageously receive or detect incident light from the front surface. Therefore, in such a display device, the optical electronics can be located in the front portion of the display device to allow the optical electronics to be effectively exposed to incident light. To mount the optical electronics in such an implementation, an increased bezel can be designed for the display device, or a notch or hole can be formed in the display area of ​​the display panel of the display device.

[0004] Therefore, even when optical electronic devices (such as cameras, sensors, etc.) that receive or detect incident light and perform predefined functions are attached to a display device, it is desirable for the display device to have higher transmittance in order to perform the desired function. Summary of the Invention

[0005] The inventors have developed a technique for providing or placing one or more optical electronic devices in a display device without reducing the area of ​​the display area of ​​the display panel of the display device. Through this development, the inventors have invented a display panel and display device having a light-transmitting structure in which the optical electronic devices can normally and appropriately receive or detect light even when the optical electronic devices are located below the display area of ​​the display panel and are therefore not exposed in the front surface of the display device.

[0006] Furthermore, the inventors have invented a display panel and display device having a structure in which the area where the optical electronics are disposed is configured to have high transmittance and can be formed by a simple process.

[0007] One or more embodiments of this disclosure can provide a display panel and display device that, by placing optical electronic devices such as cameras and / or sensors below or in the lower part of the display area of ​​the display panel, can reduce the non-display area of ​​the display panel and enable the optical electronic devices not to be exposed in the front surface of the display panel.

[0008] One or more embodiments of this disclosure may provide a display panel and a display device having a light-transmitting structure, wherein the light-transmitting structure enables optical and electronic devices located below the display area of ​​the display panel or in the lower part of the display panel to normally receive or detect light transmitted through the display panel.

[0009] One or more embodiments of this disclosure can provide a display panel and a display device that are capable of performing display driving normally in an optical region included in the display area of ​​the display panel and overlapping with optical electronics.

[0010] According to various aspects of this disclosure, a display device is provided, comprising: a display panel including a display area and a non-display area, the display area including a first optical area and a normal area located outside the first optical area, and the display panel including a plurality of signal lines. The first optical area may include a plurality of light-emitting areas and a plurality of first transmissive areas, and the normal area may include a plurality of light-emitting areas. The plurality of signal lines may include a plurality of first horizontal lines extending from the normal area to the first optical area, and at least one of the plurality of first horizontal lines may include a first portion, a second portion, and a connecting portion disposed between the first portion and the second portion. The connecting portion may be a portion extending in a direction intersecting the horizontal direction and located in the first optical area (e.g., a portion of the first optical area adjacent to the normal area).

[0011] According to various aspects of this disclosure, a display panel is provided, comprising: a substrate including a display area and a non-display area, the display area including a first optical area at least partially overlapping with a first optical electronic device located below the substrate, and a normal area located outside the first optical area; and a plurality of signal lines including a plurality of first horizontal lines. The first optical area may include a plurality of light-emitting areas and a plurality of transmissive areas, and the normal area may include a plurality of light-emitting areas. One or more of the plurality of light-emitting areas in the normal area and one or more of the plurality of light-emitting areas in the first optical area may be arranged in the same row. One or more light-emitting areas in the normal area and one or more light-emitting areas in the first optical area arranged in the same row may share one or more of the plurality of first horizontal lines. Each of the one or more first horizontal lines shared by one or more light-emitting areas in the normal area and one or more light-emitting areas in the first optical area may include a first portion, a second portion, and a connecting portion disposed between the first portion and the second portion. The connecting portion may be a portion extending in a direction intersecting the horizontal direction, and the connecting portion is located in the first optical area (e.g., a portion of the first optical area adjacent to the normal area).

[0012] According to one or more embodiments of the present disclosure, a display panel and display device can be provided such that by disposing optical electronic devices, such as cameras and / or sensors, below or in the lower part of the display area of ​​the display panel, the non-display area of ​​the display panel can be reduced and the optical electronic devices can be made not exposed in the front surface of the display panel.

[0013] According to one or more embodiments of the present disclosure, a display panel and display device may be provided, which includes at least one first horizontal line, the at least one first horizontal line including a connecting portion disposed in an optical region, thereby enabling light emission in the light-emitting region and improving the transmittance in the optical region.

[0014] According to one or more embodiments of the present disclosure, a display panel and display device may be provided having a light-transmitting structure, wherein the light-transmitting structure is used to enable optical and electronic devices in the lower part of the display area of ​​the display panel to normally receive or detect light transmitted through the display panel.

[0015] According to one or more embodiments of the present disclosure, a display panel and a display device can be provided that are capable of performing display driving normally in an optical region included in the display area of ​​the display panel and overlapping with optical electronic devices.

[0016] Additional features and aspects will be set forth in part in the description which follows, and in part will become apparent from the description, or may be learned by practicing the inventive concept provided herein. Other features and aspects of the inventive concept may be realized and obtained by means of structures specifically pointed out or deduced in the written description, its claims and drawings.

[0017] Other systems, methods, features, and advantages will be or will become apparent to those skilled in the art upon review of the following drawings and detailed description. All such additional systems, methods, features, and advantages are intended to be included within this specification, within the scope of this disclosure, and protected by the appended claims. Nothing in this section should be construed as limiting those claims.

[0018] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory, and are intended to provide further explanation of the claimed inventive concept. Attached Figure Description

[0019] The accompanying drawings are included to provide a further understanding of this disclosure and are incorporated in and constitute a part of this disclosure. The drawings illustrate various aspects of this disclosure and, together with the description, serve to explain the principles of this disclosure. In the drawings:

[0020] Figure 1A , Figure 1B , Figure 1C and Figure 1D This is a plan view illustrating an example display device according to various aspects of this disclosure;

[0021] Figure 2 An example system configuration of a display device according to various aspects of this disclosure is illustrated;

[0022] Figure 3 Example equivalent circuits for subpixels in a display panel according to various aspects of this disclosure are illustrated;

[0023] Figure 4 An example arrangement of subpixels in three regions included in the display area of ​​a display panel according to various aspects of this disclosure is illustrated;

[0024] Figure 5A and Figure 5B An example arrangement of signal lines in each of the first optical region and the normal region of a display panel according to various aspects of the present disclosure is illustrated.

[0025] Figure 5C and Figure 5D An example arrangement of signal lines in each of the second optical region and the normal region of a display panel according to various aspects of this disclosure is illustrated.

[0026] Figure 6 and Figure 7 Examples are shown of display panels according to various aspects of the present disclosure, in which light-emitting areas, circuit areas, transmission areas, and multiple first horizontal lines are provided in optical and normal areas;

[0027] Figure 8 and Figure 9 This is an example cross-sectional view of each of the first optical region, the second optical region, and the normal region included in the display area of ​​a display panel according to various aspects of this disclosure;

[0028] Figure 10 This is an example cross-sectional view of the edge of a display panel according to various aspects of this disclosure;

[0029] Figures 11 to 15 The illustration schematically illustrates an example of a display panel according to aspects of the present disclosure, in which at least one first horizontal line is included in a connection portion of at least a portion of an optical region, one or more light-emitting regions included in the optical region are connected to one or more circuit regions of one or more other light-emitting regions and are driven to perform a predefined function; and

[0030] Figure 16 It is based on all aspects of this disclosure. Figure 12 The cross-sectional view taken from line EF. Detailed Implementation

[0031] Reference will now be made in detail to embodiments of this disclosure, examples of which are illustrated in the accompanying drawings. In the following description, unless otherwise specified, the structures, embodiments, implementations, methods, and operations described herein are not limited to one or more specific examples set forth herein, and may be varied as is known in the art. The names of the corresponding elements used in the following description are chosen solely for ease of writing and may therefore differ from those used in actual products.

[0032] The shapes, dimensions, ratios, angles, quantities, etc., illustrated in the accompanying drawings for the purpose of describing various exemplary embodiments of this disclosure are given by way of example only. Therefore, this disclosure is not limited to the examples in the drawings. Unless otherwise specified, similar reference numerals always refer to similar elements. The advantages and features of this disclosure and methods of implementation thereof will be elucidated by the following exemplary embodiments described with reference to the accompanying drawings. However, this disclosure may be implemented in different forms and should not be construed as limited to the exemplary embodiments set forth herein. Rather, these exemplary embodiments are provided so that this disclosure is thorough and complete enough to assist those skilled in the art in fully understanding the scope of this disclosure. Furthermore, the scope of protection of this disclosure is defined by the claims and their equivalents. In the following description, a detailed description of a known function or construction may be omitted where such a detailed description might unnecessarily obscure aspects of this disclosure. Where terms such as “comprising,” “having,” “including,” “containing,” “constituting,” “made of,” “formed from,” etc., are used, one or more other elements may be added unless a term such as “only” is used. Unless the context clearly indicates otherwise, elements described in the singular are intended to include multiple elements, and vice versa. Unless the context clearly indicates otherwise, the singular form used in this article is intended to include the plural form.

[0033] When interpreting a component, it should be interpreted as including a range of errors or tolerances, even if no explicit description of such a range of errors or tolerances is provided.

[0034] When describing positional relationships, such as when using terms like "above," "over," "below," "on top," "below," "beside," or "adjacent" to describe the positional relationship between two components, one or more other components may be located between these two components, unless more restrictive terms such as "immediately," "directly," or "immediately after" are used. For example, when an element or layer is placed "on" another element or layer, a third element or layer may be inserted between it. Furthermore, the terms "left," "right," "top," "bottom," "downward," "upward," "above," "below," etc., refer to any frame of reference. Temporal relative terms such as "after," "following," "next," or "before," used to describe temporal relationships between events or operations, are generally intended to include events, situations, circumstances, or operations that occur discontinuously, unless terms such as "directly" or "immediately after" are used.

[0035] When describing temporal relationships, when the temporal order is described as such as “after,” “following,” “next,” or “before,” discontinuous situations may be included unless more restrictive terms such as “exactly,” “immediately,” or “directly” are used.

[0036] When discussing signal flow, for example, signal transmission from node A to node B can include signal transmission from node A to node B via another node, unless “directly” or “directly” is used.

[0037] Although the terms “first,” “second,” A, B, (a), (b), etc., may be used herein to describe various elements, these elements should not be construed as being limited by these terms, as they are not used to define a particular order or priority. These terms are used only herein to distinguish one element from others. The expressions “first element,” “second element,” and “ / or” “third element” should be understood to mean one of the first, second, and third elements, or any or all combinations of the first, second, and third elements.

[0038] By way of example, A, B, and / or C can refer to: only A, only B, or only C; any or some combination of A, B, and C; or all of A, B, and C. Therefore, in the technical concept of this disclosure, the first element mentioned below can be a second element.

[0039] Furthermore, the term "may" fully encompasses all the meanings of the term "able to". The term "at least one" should be understood to include any or all combinations of one or more of the related listed items. For example, "at least one of the first element, the second element, and the third element" means combinations of all three listed elements, combinations of any two of the three elements, and each individual element, the first element, the second element, and the third element.

[0040] In the following, various embodiments of this disclosure will be described in detail with reference to the accompanying drawings.

[0041] Figure 1A , Figure 1B , Figure 1C and Figure 1D This is a plan view illustrating an example display device 100 according to various aspects of the present disclosure.

[0042] Reference Figure 1A , Figure 1B , Figure 1C and Figure 1D The display device 100 according to various aspects of this disclosure may include a display panel 110 for displaying images and one or more optical electronic devices (11 and / or 12).

[0043] The display panel 110 may include a display area DA for displaying images and a non-display area NDA for not displaying images.

[0044] Multiple subpixels can be arranged in the display area DA, and several types of signal lines for driving the multiple subpixels can be arranged therein.

[0045] The non-display area NDA can refer to the area outside the display area DA. Several types of signal lines can be arranged in the non-display area NDA, and several types of drive circuits can be connected to it. At least a portion of the non-display area NDA can be bent so that it is not visible from the front of the display panel, or it can be covered by the housing (not shown) of the display panel 110 or the display device 100. The non-display area NDA can also be referred to as a bezel or bezel area.

[0046] Reference Figure 1A , Figure 1B , Figure 1C and Figure 1D In the display device 100 according to various aspects of the present disclosure, one or more optical electronic devices (11 and / or 12) may be located below or in the lower part of the display panel 110 (on the opposite side of its viewing surface).

[0047] Light can enter the front surface (viewing surface) of the display panel 110, pass through the display panel 110, and reach one or more optical electronic devices (11 and / or 12) located below or in the lower part of the display panel 110 (opposite to the viewing surface).

[0048] One or more optical electronic devices (11 and / or 12) can receive or detect light transmitted through the display panel 110 and perform predefined functions based on the received light. For example, one or more optical electronic devices (11 and / or 12) may include one or more of the following: an image capturing device such as a camera (image sensor); or a sensor such as a proximity sensor, an illuminance sensor, etc.

[0049] Reference Figure 1A , Figure 1B , Figure 1C and Figure 1D In the display panel 110 according to various aspects of this disclosure, the display area DA may include one or more optical areas (OA1 and / or OA2) and a normal area NA. Here, the term "normal area" NA is an area present in the display area DA that does not overlap with one or more optoelectronic devices (11 and / or 12), and may also be referred to as a non-optical area.

[0050] Reference Figure 1A , Figure 1B , Figure 1C and Figure 1D One or more optical regions (OA1 and / or OA2) may be one or more regions that overlap with one or more optical electronics (11 and / or 12).

[0051] according to Figure 1A For example, the display area DA may include a first optical area OA1 and a normal area NA. In this example, at least a portion of the first optical area OA1 may overlap with the first optoelectronic device 11.

[0052] although Figure 1A An example is shown where the first optical region OA1 has a circular shape, but the shape of the first optical region OA1 according to embodiments of the present disclosure is not limited thereto.

[0053] For example, such as Figure 1B As shown, the first optical region OA1 can have an octagonal shape or various polygonal shapes.

[0054] according to Figure 1C For example, the display area DA may include a first optical area OA1, a second optical area OA2, and a normal area NA. Figure 1CIn this example, at least a portion of the normal region NA may exist between the first optical region OA1 and the second optical region OA2. In this example, at least a portion of the first optical region OA1 may overlap with the first optical electronic device 11, and at least a portion of the second optical region OA2 may overlap with the second optical electronic device 12.

[0055] according to Figure 1D For example, the display area DA may include a first optical area OA1, a second optical area OA2, and a normal area NA. Figure 1D For example, the normal region NA may not exist between the first optical region OA1 and the second optical region OA2. For example, the first optical region OA1 and the second optical region OA2 may be in contact with each other (e.g., in direct contact with each other). In this example, at least a portion of the first optical region OA1 may overlap with the first optoelectronic device 11, and at least a portion of the second optical region OA2 may overlap with the second optoelectronic device 12.

[0056] In some implementations, it is desirable to form an image display structure and a light-transmitting structure within one or more optical regions (OA1 and / or OA2). For example, since one or more optical regions (OA1 and / or OA2) are part of the display area DA, it is necessary to provide sub-pixels for displaying the image within one or more optical regions (OA1 and / or OA2). Furthermore, a light-transmitting structure is required in order for light to be transmitted through one or more optoelectronic devices (11 and / or 12), thus a light-transmitting structure is formed within one or more optical regions (OA1 and / or OA2).

[0057] Even if one or more optical electronics (11 and / or 12) are required to receive or detect light, one or more optical electronics (11 and / or 12) may be located on the back side of the display panel 110 (e.g., on the opposite side of the viewing surface). In this embodiment, one or more optical electronics (11 and / or 12) are located, for example, below or in the lower part of the display panel 110 and are configured to receive light that has passed through the display panel 110.

[0058] For example, one or more optoelectronic devices (11 and / or 12) are not exposed on the front surface (viewing surface) of the display panel 110. Therefore, when a user looks at the front of the display device 100, one or more optoelectronic devices (11 and / or 12) are positioned to be invisible to the user.

[0059] In one embodiment, the first optical electronic device 11 may be a camera, while the second optical electronic device 12 may be a sensor such as a proximity sensor, an illumination sensor, an infrared sensor, etc. For example, the camera may be a camera lens, an image sensor, or a unit that includes at least one of a camera lens and an image sensor. For example, the sensor may be an infrared sensor capable of detecting infrared light.

[0060] In another embodiment, the first optical electronic device 11 may be a sensor, while the second optical electronic device 12 may be a camera.

[0061] In the following discussion, for convenience only, reference will be made to an embodiment where the first optical electronic device 11 is a camera and the second optical electronic device 12 is a sensor. However, it should be understood that the scope of this disclosure includes embodiments where the first optical electronic device 11 is a sensor and the second optical electronic device 12 is a camera. For example, the camera may be a camera lens, an image sensor, or a unit that includes at least one of a camera lens and an image sensor.

[0062] In an example where the first optical electronic device 11 is a camera, the camera may be located on the back of the display panel 110 (e.g., below or in its lower portion) and may be a front-facing camera capable of capturing objects or images in a frontal direction of the display panel 110. Therefore, a user can capture images or objects while viewing the viewing surface of the display panel 110 using a camera that is not visible on the viewing surface.

[0063] Despite Figure 1A , Figure 1B , Figure 1C and Figure 1D Each of the display areas DA in the image includes a normal area NA and one or more optical areas (OA1 and / or OA2) that are areas where images can be displayed. However, the normal area NA is an area that does not require the formation of a light-transmitting structure, while the one or more optical areas (OA1 and / or OA2) are areas that require the formation of a light-transmitting structure. Therefore, in some embodiments, the normal area NA is an area that does not implement or include a light-transmitting structure, while the one or more optical areas (OA1 and / or OA2) are areas that implement or include a light-transmitting structure.

[0064] Therefore, one or more optical regions (OA1 and / or OA2) may have a transmittance greater than or equal to a predetermined level, i.e., relatively high transmittance, while the normal region NA may be non-transmissive or have a transmittance less than the predetermined level, i.e., relatively low transmittance.

[0065] For example, one or more optical regions (OA1 and / or OA2) may have different resolutions, subpixel arrangement structures, number of subpixels per unit area, electrode structures, line structures, electrode arrangement structures, and / or line arrangement structures from the normal region NA.

[0066] In one implementation, the number of subpixels per unit area in one or more optical regions (OA1 and / or OA2) may be less than the number of subpixels per unit area in the normal region NA. For example, the resolution of one or more optical regions (OA1 and / or OA2) may be lower than the resolution of the normal region NA. Here, the number of subpixels per unit area may be a unit used to measure resolution, for example, referred to as pixels per inch (or subpixels) (PPI), which represents the number of pixels per inch.

[0067] In one implementation, Figure 1A , Figure 1B , Figure 1C and Figure 1D In each of these regions, the number of sub-pixels per unit area in the first optical region OA1 may be less than the number of sub-pixels per unit area in the normal region NA. In one embodiment, in Figure 1A , Figure 1B , Figure 1C and Figure 1D In each of the first optical regions, the number of sub-pixels per unit area in the second optical region OA2 can be greater than or equal to the number of sub-pixels per unit area in the first optical region OA1.

[0068] exist Figure 1A , Figure 1B , Figure 1C and Figure 1D In each of these, the first optical region OA1 can have various shapes, such as circular, elliptical, quadrilateral, hexagonal, or octagonal. Figure 1C and Figure 1D In each of these regions, the second optical region OA2 can have various shapes, such as circular, elliptical, quadrilateral, hexagonal, or octagonal. The first optical region OA1 and the second optical region OA2 can have the same shape or different shapes.

[0069] Reference Figure 1C In the example where the first optical region OA1 and the second optical region OA2 are in contact with each other, the entire optical region including the first optical region OA1 and the second optical region OA2 can also have various shapes, such as circles, ellipses, quadrilaterals, hexagons, or octagons.

[0070] In the following discussion, for ease of description, embodiments in which each of the first optical region OA1 and the second optical region OA2 has a circular shape will be provided. However, it should be understood that the scope of this disclosure includes embodiments in which one or both of the first optical region OA1 and the second optical region OA2 have a shape other than a circular shape.

[0071] In this document, a display device 100 according to various aspects of the present disclosure, having a structure in which a first optical electronic device 11, positioned below or in the lower part of the display panel 100 and covered and not exposed to the outside, is a camera, may be referred to as a display (display device) applying under-display camera (UDC) technology.

[0072] The display device 100 constructed in this way has the advantage of preventing the size of the display area DA from shrinking because it does not require forming a notch or camera hole in the display panel 110 to expose the camera.

[0073] Since it is not necessary to form a notch or camera hole in the display panel 110 for camera exposure, the display device 100 is able to have further advantages: a reduced bezel area size and increased design freedom due to the removal of this design constraint.

[0074] Although in the display device 100 according to various aspects of this disclosure, one or more optical electronic devices (11 and / or 12) are positioned to be covered on the back (below or in the lower part) of the display panel 110, that is, hidden and not exposed to the outside, one or more optical electronic devices (11 and / or 12) need to be able to receive or detect light for the purpose of properly performing a predefined function.

[0075] Furthermore, in the display device 100 according to various aspects of this disclosure, although one or more optical electronic devices (11 and / or 12) are positioned to cover the back (below, or in the lower part) of the display panel 110 and are positioned to overlap with the display area DA, it is necessary to normally perform image display in one or more optical areas (OA1 and / or OA2) overlapping with one or more optical electronic devices (11 and / or 12) in the display area DA.

[0076] Figure 2 An example system configuration of a display device 100 according to various aspects of the present disclosure is illustrated.

[0077] Reference Figure 2 The display device 100 may include a display panel 110 and a display driving circuit as components for displaying images.

[0078] The display driver circuit is a circuit used to drive the display panel 110, and may include a data driver circuit 220, a gating driver circuit 230, a display controller 240, and other components.

[0079] The display panel 110 may include a display area DA for displaying images and a non-display area NDA for not displaying images. The non-display area NDA may be an area outside the display area DA, and may also be referred to as an edge area or border area. All or part of the non-display area NDA may be an area visible from the front surface of the display device 100, or an area not visible from the front surface of the display device 100 due to the curvature of the corresponding portion.

[0080] The display panel 110 may include a substrate SUB and a plurality of sub-pixels SP disposed on the substrate SUB. The display panel 110 may also include various types of signal lines to drive the plurality of sub-pixels SP.

[0081] In some embodiments, the display device 100 herein may be a liquid crystal display device or a self-emissive display device that emits light from the display panel 110 itself. In examples where the display device 100 according to various aspects of this disclosure is a self-emissive display device, each of the plurality of sub-pixels SP may include a light-emitting element.

[0082] In one embodiment, the display device 100 according to various aspects of the present disclosure may be an organic light-emitting display device in which an organic light-emitting diode (OLED) is used to realize the light-emitting element. In another embodiment, the display device 100 according to various aspects of the present disclosure may be an inorganic light-emitting display device in which an inorganic light-emitting diode based on an inorganic material is used to realize the light-emitting element. In yet another embodiment, the display device 100 according to various aspects of the present disclosure may be a quantum dot display device in which a quantum dot, as a self-emissive semiconductor crystal, is used to realize the light-emitting element.

[0083] The structure of each of the plurality of subpixels SP can vary depending on the type of display device 100. In an example where the display device 100 is a self-emissive display device including self-emissive subpixels SP, each subpixel SP may include a self-emissive light-emitting element, one or more transistors, and one or more capacitors.

[0084] The various types of signal lines arranged in the display device 100 may include, for example, multiple data lines DL for carrying data signals (which may be referred to as data voltage or image signals), multiple gating lines GL for carrying gating signals (which may be referred to as scan signals), etc.

[0085] Multiple data lines (DL) and multiple gating lines (GL) can intersect each other. Each of the multiple data lines (DL) can extend in a first direction. Each of the multiple gating lines (GL) can extend in a second direction.

[0086] For example, the first direction can be a column direction or a vertical direction, and the second direction can be a row direction or a horizontal direction. In another example, the first direction can be a row direction, and the second direction can be a column direction.

[0087] The data driver circuit 220 is used to drive multiple data lines DL and can provide data signals to the multiple data lines DL. The gating driver circuit 230 is used to drive multiple gating lines GL and can provide gating signals to the multiple gating lines GL.

[0088] The display controller 240 can be a device for controlling the data drive circuit 220 and the gating drive circuit 230, and can control the driving timing of multiple data lines DL and multiple gating lines GL.

[0089] The display controller 240 can provide the data drive control signal DCS to the data drive circuit 220 to control the data drive circuit 220, and provide the gating drive control signal GCS to the gating drive circuit 230 to control the gating drive circuit 230.

[0090] The display controller 240 can receive input image data from the host system 250 and provide image data Data to the data drive circuit 220 based on the input image data.

[0091] The data drive circuit 220 can provide data signals to multiple data lines DL according to the drive timing control of the display controller 240.

[0092] The data drive circuit 220 can receive digital image data Data from the display controller 240, convert the received image data Data into an analog data signal, and provide the obtained analog data signal to multiple data lines DL.

[0093] The gating drive circuit 230 can provide gating signals to multiple gating lines GL according to the timing control of the display controller 240. The gating drive circuit 230 can receive a first gating voltage corresponding to the on-level voltage and a second gating voltage corresponding to the off-level voltage together with various gating drive control signals GCS, generate gating signals, and provide the generated gating signals to the multiple gating lines GL.

[0094] In some implementations, the data drive circuit 220 may be connected to the display panel 110 in a tape auto-package (TAB) type, or to conductive pads such as bonding pads of the display panel 110 in a chip-on-glass (COG) type or chip-on-panel (COP) type, or to the display panel 110 in a chip-on-film (COF) type.

[0095] In some embodiments, the gate drive circuit 230 may be connected to the display panel 110 in a tape-on-bundle (TAB) type, or to conductive pads such as bonding pads on the display panel 110 in a chip-on-glass (COG) or chip-on-panel (COP) type, or to the display panel 110 in a chip-on-film (COF) type. In another embodiment, the gate drive circuit 230 may be disposed in the non-display area NDA of the display panel 110 in a gate-in-panel (GIP) type. The gate drive circuit 230 may be disposed on or above the substrate, or connected to the substrate. That is, in the case of the GIP type, the gate drive circuit 230 may be disposed in the non-display area NDA of the substrate. In the cases of chip-on-glass (COG), chip-on-film (COF), etc., the gate drive circuit 230 may be connected to the substrate.

[0096] In some embodiments, at least one of the data driving circuit 220 and the gating driving circuit 230 may be disposed in the display area DA of the display panel 110. For example, at least one of the data driving circuit 220 and the gating driving circuit 230 may be configured not to overlap with the sub-pixel SP, or configured to overlap with one or more or all of the sub-pixels SP.

[0097] The data driving circuit 220 may also be located on only one side or a portion (e.g., the top edge or the bottom edge) of the display panel 110. In some embodiments, depending on the driving scheme, panel design, etc., the data driving circuit 220 may be located on both sides or two portions (e.g., the top edge and the bottom edge) of the display panel 110, or at least two of the four sides or four portions (e.g., the top edge, the bottom edge, the left edge, and the right edge) of the display panel 110.

[0098] The gating drive circuit 230 may be located on only one side or a portion of the display panel 110 (e.g., the left edge or the right edge). In some embodiments, depending on the driving scheme, panel design, etc., the gating drive circuit 230 may be connected to both sides or two portions of the display panel 110 (e.g., the left edge and the right edge), or connected to at least two of the four sides or four portions of the display panel 110 (e.g., the top edge, the bottom edge, the left edge, and the right edge).

[0099] The display controller 240 can be implemented as a component separate from the data drive circuit 220, or integrated with the data drive circuit 220, thereby being implemented as an integrated circuit.

[0100] The display controller 240 may be a timing controller used in conventional display technology, or a controller or control device capable of performing other control functions in addition to those of a conventional timing controller. In some embodiments, the display controller 240 may be a controller or control device different from the timing controller, or may be a circuit or component included in a controller or control device. The display controller 240 may be implemented using various circuits or electronic components such as integrated circuits (ICs), field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), and / or processors.

[0101] The display controller 240 can be mounted on a printed circuit board, and / or flexible printed circuit, etc., and is electrically connected to the gating drive circuit 230 and the data drive circuit 220 via the printed circuit board, and / or flexible printed circuit board, etc.

[0102] The display controller 240 can send signals to and receive signals from the data driver circuit 220 via one or more predefined interfaces. In some embodiments, such interfaces may include a low-voltage differential signaling (LVDS) interface, an embedded point-to-point clock interface (EPI), a serial peripheral interface (SPI), etc.

[0103] In some embodiments, to further provide touch sensing and image display functions, the display device 100 may include at least one touch sensor and a touch sensing circuit capable of detecting whether a touch event occurs by a touch object such as a finger or pen, or detecting the corresponding touch position by sensing the touch sensor.

[0104] The touch sensing circuit may include a touch driver circuit 260 capable of generating and providing touch sensing data by driving and sensing a touch sensor, a touch controller 270 capable of using the touch sensing data to detect touch position or the occurrence of touch events, and one or more other components.

[0105] The touch sensor may include multiple touch electrodes. The touch sensor may also include multiple touch lines for electrically connecting the multiple touch electrodes to the touch driving circuitry 260.

[0106] The touch sensor can be implemented externally to the display panel 110, within the touch panel, or as a form of the touch panel, or internally. In the example where the touch sensor is implemented externally to the display panel 110, within the touch panel, or as a form of the touch panel, this type of touch sensor is referred to as add-on. In the example of using an add-on touch sensor, the touch panel and the display panel 110 can be manufactured separately and joined during the assembly process. The add-on touch panel may include a touch panel substrate and multiple touch electrodes on the touch panel substrate.

[0107] In an example where the touch sensor is implemented inside the display panel 110, the process of manufacturing the display panel 110 may include placing the touch sensor, along with signal lines and electrodes associated with driving the display device 100, above the substrate SUB.

[0108] The touch driving circuit 260 can provide a touch driving signal to at least one of the plurality of touch electrodes and sense at least one of the plurality of touch electrodes to generate touch sensing data.

[0109] Touch sensing circuits can use self-capacitance sensing technology or mutual capacitance sensing technology to perform touch sensing.

[0110] In an example where the touch sensing circuit performs touch sensing using self-capacitance sensing technology, the touch sensing circuit can perform touch sensing based on the capacitance between each touch electrode and the touch object (e.g., a finger, a pen, etc.).

[0111] According to the self-capacitance sensing method, each of the multiple touch electrodes can be used as both a driving touch electrode and a sensing touch electrode. The touch driving circuit 260 can drive all or one or more of the multiple touch electrodes and sense all or one or more of the multiple touch electrodes.

[0112] In an example where the touch sensing circuit performs touch sensing using mutual capacitance sensing technology, the touch sensing circuit can perform touch sensing based on the capacitance between the touch electrodes.

[0113] Based on the mutual capacitance sensing method, multiple touch electrodes are divided into driving touch electrodes and sensing touch electrodes. The touch driving circuit 260 can drive the driving touch electrodes and sense the sensing touch electrodes.

[0114] The touch driver circuit 260 and touch controller 270 included in the touch sensing circuit can be implemented in separate devices or in a single device. Furthermore, the touch driver circuit 260 and data driver circuit 220 can be implemented in separate devices or in a single device.

[0115] The display device 100 may also include a power supply circuit for providing various types of power to the display driving circuit and / or touch sensing circuit.

[0116] In some embodiments, the display device 100 may be a mobile terminal such as a smartphone, tablet computer, or a monitor, television (TV), etc. Such a device may have various types, sizes, and shapes. The display device 100 according to embodiments of this disclosure is not limited thereto, and includes displays of various types, sizes, and shapes for displaying information or images.

[0117] As described above, the display area DA of the display panel 110 may include a normal area NA and one or more optical areas (OA1 and / or OA2), for example, such as Figure 1A , Figure 1B , Figure 1C and Figure 1D As shown.

[0118] The normal region NA and one or more optical regions (OA1 and / or OA2) are areas where images can be displayed. However, the normal region NA is an area where a light-transmitting structure is not required, while one or more optical regions (OA1 and / or OA2) are areas where a light-transmitting structure is required.

[0119] As mentioned above Figure 1A , Figure 1B , Figure 1C and Figure 1D As discussed in the examples, although the display area DA of the display panel 110 may include one or more optical areas (OA1 and / or OA2) in addition to the normal area NA, for ease of description, in the following discussion, it is assumed that the display area DA includes a first optical area and a second optical area (OA1 and / or OA2) and the normal area NA, as in... Figure 1C and Figure 1D In the middle; and unless otherwise expressly stated, its normal region NA includes Figure 1A , Figure 1B , Figure 1C and Figure 1D The normal region NA in the image, and its first optical region and second optical region (OA1 and / or OA2) respectively include Figure 1A , Figure 1B , Figure 1C and Figure 1D The first optical region OA1 and Figure 1C and Figure 1D The second optical region OA2 in the middle.

[0120] Figure 3 An example equivalent circuit of a sub-pixel SP in a display panel 110 according to various aspects of the present disclosure is illustrated.

[0121] Each sub-pixel SP in the normal area NA, the first optical area OA1, and the second optical area OA2 included in the display area DA of the display panel 110 may include a light-emitting element ED, a driving transistor DRT for driving the light-emitting element ED, a scanning transistor SCT for sending the data voltage Vdata to the first node N1 of the driving transistor DRT, a storage capacitor Cst for maintaining the voltage at an approximately constant level during a frame, etc.

[0122] The driving transistor DRT may include a first node N1 to which a data voltage is applied, a second node N2 electrically connected to a light-emitting element ED, and a third node N3 to which a driving voltage ELVDD is applied via a driving voltage line DVL. In the driving transistor DRT, the first node N1 may be a gate node, the second node N2 may be a source node or a drain node, and the third node N3 may be a drain node or a source node.

[0123] The light-emitting element ED may include an anode electrode AE, a light-emitting layer EL, and a cathode electrode CE. The anode electrode AE ​​may be a pixel electrode disposed in each sub-pixel SP and may be electrically connected to the second node N2 of the driving transistor DRT of each sub-pixel SP. The cathode electrode CE may be a common electrode disposed in multiple sub-pixels SP, and a base voltage ELVSS, such as a low-level voltage, may be applied to the cathode electrode CE.

[0124] For example, the anode electrode AE ​​can be a pixel electrode, and the cathode electrode CE can be a common electrode. In another example, the anode electrode AE ​​can be a common electrode, and the cathode electrode CE can be a pixel electrode. For ease of description, in the following discussion, unless explicitly stated otherwise, it is assumed that the anode electrode AE ​​is a pixel electrode and the cathode electrode CE is a common electrode.

[0125] The light-emitting element (ED) can be, for example, an organic light-emitting diode (OLED), an inorganic light-emitting diode, a quantum dot light-emitting element, etc. In the example where an organic light-emitting diode is used as the light-emitting element ED, the light-emitting layer EL included in the light-emitting element ED can include an organic light-emitting layer containing organic materials.

[0126] The scanning transistor SCT can be turned on and off by the scanning signal SCAN, which is a gating signal applied through the gating line GL, and can be electrically connected between the first node N1 of the driving transistor DRT and the data line DL.

[0127] The storage capacitor Cst can be electrically connected between the first node N1 and the second node N2 of the driving transistor DRT.

[0128] Each sub-pixel SP can include two transistors (2T: DRT and SCT) and one capacitor (1C: Cst) (which can be referred to as a "2T1C structure"), such as Figure 3 As shown, and in some cases, it may also include one or more transistors, or one or more capacitors.

[0129] In some implementations, the storage capacitor Cst that may exist between the first node N1 and the second node N2 of the driving transistor DRT may be an external capacitor that is intentionally constructed or designed to be located outside the driving transistor DRT, in addition to internal capacitors such as parasitic capacitors (e.g., gate-source capacitance Cgs, gate-drain capacitance Cgd, etc.).

[0130] Each of the driving transistor DRT and the scanning transistor SCT can be an n-type transistor or a p-type transistor.

[0131] Since the circuit elements (e.g., in particular, the light-emitting element ED) in each sub-pixel SP are susceptible to external moisture or oxygen, an encapsulation layer ENCAP can be provided in the display panel 110 to prevent external moisture or oxygen from penetrating into the circuit elements (e.g., in particular, the light-emitting element ED). The encapsulation layer ENCAP can be configured to cover the light-emitting element ED.

[0132] Figure 4 An example arrangement of subpixels SP in three regions (NA, OA1, and OA2) included in the display area DA of a display panel 110 according to various aspects of the present disclosure is illustrated.

[0133] Reference Figure 4 In some implementations, multiple sub-pixels SP can be disposed in each of the normal area NA, the first optical area OA1, and the second optical area OA2 included in the display area DA.

[0134] Multiple sub-pixels SP may include, for example, a red sub-pixel that emits red light (red SP), a green sub-pixel that emits green light (green SP), and a blue sub-pixel that emits blue light (blue SP).

[0135] Therefore, each of the normal region NA, the first optical region OA1, and the second optical region OA2 may include one or more light-emitting regions EA of one or more red sub-pixels (red SPs), one or more light-emitting regions EA of one or more green sub-pixels (green SPs), and one or more light-emitting regions EA of one or more blue sub-pixels (blue SPs).

[0136] Reference Figure 4 In some implementations, the normal region NA may not include a light-transmitting structure, but may include a light-emitting region EA.

[0137] Conversely, in some embodiments, the first optical region OA1 and the second optical region OA2 need to include both the light-emitting region EA and the light-transmitting structure.

[0138] Therefore, the first optical region OA1 may include one or more light-emitting regions EA and one or more first transmission regions TA1, and the second optical region OA2 may include one or more light-emitting regions EA and one or more second transmission regions TA2.

[0139] The luminescent area EA and the transmissive area (TA1 and / or TA2) can be distinguished based on whether or not light transmission is permitted. For example, the luminescent area EA may be an area where light transmission is not permitted (e.g., light is not allowed to transmit to the back of the display panel), and the transmissive area (TA1 and / or TA2) may be an area where light transmission is permitted (e.g., light is allowed to transmit to the back of the display panel).

[0140] The luminescent region EA and the transmissive region (TA1 and / or TA2) can also be distinguished based on whether or not a specific metal layer is included. For example, as Figure 3 The cathode electrode CE shown can be disposed in the light-emitting region EA, and the cathode electrode CE may not be disposed in the transmission regions (TA1 and / or TA2). In some embodiments, a light-shielding layer may be disposed in the light-emitting region EA, while a light-shielding layer may not be disposed in the transmission regions (TA1 and / or TA2).

[0141] Since the first optical region OA1 includes the first transmission region TA1 and the second optical region OA2 includes the second transmission region TA2, both the first optical region OA1 and the second optical region OA2 are regions that can transmit light.

[0142] In one embodiment, the transmittance of the first optical region OA1 and the transmittance of the second optical region OA2 can be substantially equal.

[0143] For example, the first transmission region TA1 of the first optical region OA1 and the second transmission region TA2 of the second optical region OA2 can have substantially the same shape or size. In another example, even when the first transmission region TA1 of the first optical region OA1 and the second transmission region TA2 of the second optical region OA2 have different shapes or sizes, the ratio of the first transmission region TA1 to the first optical region OA1 and the ratio of the second transmission region TA2 to the second optical region OA2 can be substantially equal. In the example, each first transmission region TA1 has the same shape and size. In the example, each second transmission region TA2 has the same shape and size.

[0144] In another embodiment, the transmittance of the first optical region OA1 and the transmittance of the second optical region OA2 may be different.

[0145] For example, the first transmission region TA1 of the first optical region OA1 and the second transmission region TA2 of the second optical region OA2 can have different shapes or sizes. In another example, even when the first transmission region TA1 of the first optical region OA1 and the second transmission region TA2 of the second optical region OA2 have substantially the same shape or size, the ratio of the first transmission region TA1 to the first optical region OA1 and the ratio of the second transmission region TA2 to the second optical region OA2 can be different from each other.

[0146] For example, in the area overlapping with the first optical region OA1, such as Figure 1A , Figure 1B and Figure 1C The first optical electronic device 11 shown is a camera, and it overlaps with the second optical region OA2 as follows: Figure 1B and Figure 1C The second optical electronic device 12 shown is an example of a sensor used to detect images; the camera may require a greater amount of light than the sensor.

[0147] Therefore, the transmittance of the first optical region OA1 can be greater than that of the second optical region OA2.

[0148] For example, the first transmission region TA1 of the first optical region OA1 can have a larger size than the second transmission region TA2 of the second optical region OA2. In another example, even when the first transmission region TA1 of the first optical region OA1 and the second transmission region TA2 of the second optical region OA2 have substantially the same size, the ratio of the first transmission region TA1 to the first optical region OA1 can be greater than the ratio of the second transmission region TA2 to the second optical region OA2.

[0149] For ease of description, the following discussion is provided for an implementation in which the transmittance (transmittance) of the first optical region OA1 is greater than that of the second optical region OA2.

[0150] Furthermore, in this article, such as Figure 4 The transmissive regions shown (TA1 and / or TA2) can be referred to as transparent regions, and the term transmittance can be referred to as transparency.

[0151] Furthermore, in the following discussion, unless otherwise explicitly stated, it is assumed that the first optical region OA1 and the second optical region OA2 are located at the upper edge of the display area DA of the display panel 110 and are arranged adjacent to each other in the left-right direction, such as in the direction extending from the upper edge, as shown below. Figure 4 As shown.

[0152] Reference Figure 4 The horizontal display area with a first optical region OA1 and a second optical region OA2 is called the first horizontal display area HA1, and the other horizontal display area without the first optical region OA1 and the second optical region OA2 is called the second horizontal display area HA2.

[0153] Reference Figure 4 The first horizontal display area HA1 may include a portion of the normal area NA, a first optical area OA1, and a second optical area OA2. The second horizontal display area HA2 may include only another portion of the normal area NA.

[0154] Figure 5A and Figure 5B An example arrangement of signal lines in each of the first optical region (e.g., the first optical region OA1 in the figures discussed above) and the normal region (e.g., the normal region NA in the figures discussed above) of a display panel 110 according to various aspects of the present disclosure is illustrated. Figure 5C and Figure 5D An example arrangement of signal lines in each of the second optical region (e.g., the second optical region OA2 in the figures discussed above) and the normal region NA of a display panel 110 according to various aspects of this disclosure is illustrated.

[0155] Figure 5A , Figure 5B , Figure 5C and Figure 5D The first horizontal display area HA1 shown is the first horizontal display area of ​​the display panel 110 (e.g., Figure 4 The first horizontal display area HA1) is part of the second horizontal display area HA2, and the second horizontal display area HA2 is part of the second horizontal display area of ​​the display panel 110 (e.g., Figure 4 The second level of the display area (HA2) is part of it.

[0156] like Figure 5A and Figure 5B The first optical region OA1 shown is a part of the first optical region of the display panel 110 (e.g., the first optical region OA1 in the figure discussed above), and Figure 5C and Figure 5D The second optical region OA2 shown is a part of the second optical region of the display panel 110 (e.g., the second optical region OA2 in the figure discussed above).

[0157] Reference Figure 5A , Figure 5B , Figure 5C and Figure 5DThe first horizontal display area HA1 may include a portion of the normal area NA, a first optical area OA1, and a second optical area OA2. The second horizontal display area HA2 may include another portion of the normal area NA.

[0158] Various types of horizontal lines (HL1 and HL2) and various types of vertical lines (VLn, VL1, and VL2) can be set in the display panel 110.

[0159] In some implementations, the terms "horizontal" and "vertical" are used to refer to two directions intersecting the display panel; however, it should be noted that the horizontal and vertical directions can change depending on the viewing direction. The horizontal direction can refer to, for example, the direction in which a gate line GL extends, while the vertical direction can refer to, for example, the direction in which a data line DL extends. Thus, the terms horizontal and vertical are used to represent two directions.

[0160] Reference Figure 5A , Figure 5B , Figure 5C and Figure 5D The horizontal lines set in the display panel 110 may include a first horizontal line HL1 set in the first horizontal display area HA1 and a second horizontal line HL2 set in the second horizontal display area HA2.

[0161] The horizontal lines set in the display panel 110 can be gate lines GL (which can be called scan lines). That is, the first horizontal line HL1 and the second horizontal line HL2 can be gate lines GL. Depending on the structure of one or more sub-pixels SP, the gate lines GL can include various types of gate lines.

[0162] Reference Figure 5A , Figure 5B , Figure 5C and Figure 5D The vertical lines set in the display panel 110 may include a normal vertical line VLn set only in the normal area NA, a first vertical line VL1 that crosses both the first optical area OA1 and the normal area NA, and a second vertical line VL2 that crosses both the second optical area OA2 and the normal area NA.

[0163] The vertical lines provided in the display panel 110 may include data lines DL, driving voltage lines DVL, etc., and may also include reference voltage lines, initialization voltage lines, etc. That is to say, the normal vertical line VLn, the first vertical line VL1 and the second vertical line VL2 may include data lines DL, driving voltage lines DVL, etc., and may also include reference voltage lines, initialization voltage lines, etc.

[0164] In some implementations, it should be noted that the term "horizontal" in the second horizontal line HL2 may simply mean that the signal is carried from the left side to the right side (or from the right side to the left side) of the display panel, and may not mean that the second horizontal line HL2 extends in a straight line only in the exactly horizontal direction. For example, in Figure 5A , Figure 5B , Figure 5C and Figure 5D Although the second horizontal line HL2 is shown as a straight line, one or more of the second horizontal lines HL2 may include lines that are parallel to each other. Figure 5A , Figure 5B , Figure 5C and Figure 5D The diagram shows one or more curved or bent sections with different constructions. Similarly, one or more first horizontal lines HL1 may also include one or more curved or bent sections.

[0165] In some implementations, it should be noted that the term "vertical" in the context of a normal vertical line VLn may simply mean that the signal is carried from the top to the bottom (or from the bottom to the top) of the display panel, and may not mean that the normal vertical line VLn extends in a straight line only in the exactly vertical direction. For example, in Figure 5A , Figure 5B , Figure 5C and Figure 5D In the diagram, although the normal vertical line VLn is shown as a straight line, one or more normal vertical lines VLn may include lines that are parallel to each other. Figure 5A , Figure 5B , Figure 5C and Figure 5D The diagram illustrates one or more curved or bent sections, each with its own distinct structure. Similarly, one or more of the first vertical lines VL1 and one or more of the second vertical lines VL2 may also include one or more curved or bent sections.

[0166] Reference Figure 5A and Figure 5B The first optical region OA1, included in the first horizontal display region HA1, may include a light-emitting region EA and a first transmission region TA1. Within the first optical region OA1, the corresponding outer region of the first transmission region TA1 may be included within the light-emitting region EA.

[0167] Reference Figure 5A and Figure 5B In order to improve the transmittance of the first optical region OA1, the first horizontal line HL1 can pass through the first optical region OA1 while avoiding the first transmission region TA1 in the first optical region OA1.

[0168] Therefore, each first horizontal line HL1 traversing the first optical region OA1 may include one or more curved or bent portions extending around one or more corresponding outer edges of one or more first transmission regions TA1.

[0169] Therefore, the first horizontal line HL1 disposed in the first horizontal display area HA1 and the second horizontal line HL2 disposed in the second horizontal display area HA2 can have different shapes or lengths. For example, the first horizontal line HL1 that crosses the first optical area OA1 and the second horizontal line HL2 that does not cross the first optical area OA1 can have different shapes or lengths.

[0170] In addition, in order to improve the transmittance of the first optical region OA1, the first vertical line VL1 can pass through the first optical region OA1 while avoiding the first transmission region TA1 in the first optical region OA1.

[0171] Therefore, each first vertical line VL1 traversing the first optical region OA1 may include one or more curved or bent portions extending around one or more corresponding outer edges of one or more first transmission regions TA1.

[0172] Therefore, the first vertical line VL1 that crosses the first optical region OA1 and the normal vertical line VLn that is set in the normal region NA but does not cross the first optical region OA1 can have different shapes or lengths.

[0173] Reference Figure 5A and Figure 5B The first transmission region TA1, which is included in the first optical region OA1 in the first horizontal display region HA1, can be arranged in a diagonal direction.

[0174] Reference Figure 5A and Figure 5B In the first optical region OA1 within the first horizontal display region HA1, one or more light-emitting regions EA can be disposed between two first transmission regions TA1 that are adjacent to each other in the left-right direction (e.g., two horizontally adjacent first transmission regions TA1). In the first optical region OA1 within the first horizontal display region HA1, one or more light-emitting regions EA can be disposed between two transmission regions TA1 that are adjacent to each other in the up-down direction (e.g., two vertically adjacent first transmission regions TA1).

[0175] Reference Figure 5A and Figure 5BEach first horizontal line HL1 disposed in the first horizontal display area HA1 (e.g., each first horizontal line HL1 traversing the first optical area OA1) may include one or more curved portions or bends extending around the respective outer edges of one or more first transmission areas TA1.

[0176] Reference Figure 5C and Figure 5D The second optical region OA2, included in the first horizontal display region HA1, may include a light-emitting region EA and a second transmission region TA2. In the second optical region OA2, the corresponding outer region of the second transmission region TA2 may be included in the light-emitting region EA.

[0177] In one embodiment, the light-emitting region EA and the second transmission region TA2 in the second optical region OA2 can be connected with... Figure 5A and Figure 5B The luminescent region EA and the first transmissive region TA1 in the first optical region OA1 have essentially the same position and arrangement.

[0178] In another embodiment, such as Figure 5C and Figure 5D As shown, the light-emitting region EA and the second transmission region TA2 in the second optical region OA2 can be connected with... Figure 5A and Figure 5B The luminescent region EA and the first transmissive region TA1 in the first optical region OA1 have different positions and arrangements.

[0179] For example, refer to Figure 5C and Figure 5D The second transmission regions TA2 in the second optical region OA2 can be arranged in the left-right direction (e.g., horizontal direction). In this example, the light-emitting region EA may not be located between two adjacent second transmission regions TA2 in the left-right direction (e.g., horizontal direction). Furthermore, one or more light-emitting regions EA in the second optical region OA2 can be located between adjacent second transmission regions TA2 in the up-down direction (e.g., vertical direction). For example, one or more light-emitting regions EA can be located between two rows of second transmission regions.

[0180] When the first horizontal line HL1 crosses the second optical region OA2 and the normal region NA adjacent to the second optical region OA2 within the first horizontal display region HA1, in one embodiment, the first horizontal line HL1 may be connected with... Figure 5A The first horizontal line HL1 has a basically the same arrangement.

[0181] In another embodiment, such as Figure 5C and Figure 5DAs shown, when the first horizontal line HL1 crosses the second optical region OA2 and the normal region NA adjacent to the second optical region OA2 in the first horizontal display region HA1, the first horizontal line HL1 can be... Figure 5A and Figure 5B The first horizontal line HL1 has a different arrangement.

[0182] This is because Figure 5C and Figure 5D The position and arrangement of the luminescent region EA and the second transmission region TA2 in the second optical region OA2 are related to Figure 5A and Figure 5B The positions and arrangements of the luminescent region EA and the first transmissive region TA1 in the first optical region OA1 are different from each other.

[0183] Reference Figure 5C and Figure 5D When the first horizontal line HL1 crosses the second optical region OA2 and the normal region NA adjacent to the second optical region OA2 in the first horizontal display region HA1, the first horizontal line HL1 can extend in a straight line between adjacent second transmission regions TA2 (e.g., vertically adjacent second transmission regions TA2) without any curved or bent portions.

[0184] For example, a first horizontal line HL1 may have one or more curved or bent portions in a first optical region OA1, but may not have any curved or bent portions in a second optical region OA2.

[0185] In order to improve the transmittance of the second optical region OA2, the second vertical line VL2 can pass through the second optical region OA2 while avoiding the second transmission region TA2 in the second optical region OA2.

[0186] Therefore, each second vertical line VL2 traversing the second optical region OA2 may include one or more curved or bent portions extending around one or more corresponding outer edges of one or more second transmission regions TA2.

[0187] Therefore, the second vertical line VL2 that crosses the second optical region OA2 and the normal vertical line VLn that is set in the normal region NA but does not cross the second optical region OA2 can have different shapes or lengths.

[0188] As mentioned above, refer to Figure 5A , Figure 5B , Figure 5C and Figure 5DThe first horizontal line HL1 set in the first horizontal display area HA1 may include at least a portion extending in a direction other than the horizontal direction in at least one boundary region between the normal area NA and the first optical area OA1.

[0189] For example, such as Figure 5A , Figure 5B , Figure 5C and Figure 5D As shown, one or more first horizontal lines HL1 may include a first portion 511, a second portion 512, and a connecting portion 513.

[0190] In the implementation, the first part 511, the second part 512 and the connecting part 513 can be integrally formed.

[0191] The connecting portion 513 may be located between the first portion 511 and the second portion 512.

[0192] The first part 511 and the second part 512 may extend in the same direction, and the first part 511 and the second part 512 may extend, for example, in the horizontal direction.

[0193] The connecting portion 513 may be a portion that extends in a direction intersecting the horizontal direction.

[0194] For example, such as Figure 5A and Figure 5C As shown, the connecting portion 513 may be a portion that extends in a direction that is inclined relative to the horizontal direction within an angle range of greater than or equal to -90° and less than 0°.

[0195] The structure of the connection portion 513 according to the embodiments of this disclosure is not limited thereto. For example, such as Figure 5B and Figure 5D As shown, the connecting portion 513 may be a portion that extends in a direction that is inclined relative to the horizontal direction within an angle range of greater than 0° and less than or equal to 90°.

[0196] like Figure 5A , Figure 5B , Figure 5C and Figure 5D As shown, each or one or more of the first horizontal lines HL1 that traverse the first optical region OA1 may have one or more curved or bent portions extending around one or more corresponding outer edges of one or more first transmission regions TA1.

[0197] Therefore, the length of the first horizontal line HL1 that crosses the first optical region OA1 and the second optical region OA2 can be slightly longer than the length of the second horizontal line HL2 that is only set in the normal region NA and does not cross the first optical region OA1 and the second optical region OA2.

[0198] Therefore, the resistance of the first horizontal line HL1 that crosses the first optical region OA1 and the second optical region OA2 (referred to as the first resistance) can be slightly greater than the resistance of the second horizontal line HL2 that is only set in the normal region NA and does not cross the first optical region OA1 and the second optical region OA2 (referred to as the second resistance).

[0199] Reference Figure 5A , Figure 5B , Figure 5C and Figure 5D According to the light transmission structure, since the first optical region OA1, which at least partially overlaps with the first optical electronic device (e.g., the first optical electronic device 11 in the above-discussed embodiments), includes a plurality of first transmission regions TA1, and the second optical region OA2, which at least partially overlaps with the second optical electronic device (e.g., the second optical electronic device 12 in the above-discussed embodiments), includes a plurality of second transmission regions TA2, the first optical region OA1 and the second optical region OA2 can have fewer sub-pixels per unit area than the normal region NA.

[0200] Therefore, the number of sub-pixels connected to each or one or more of the first horizontal lines HL1 that cross the first optical region OA1 and the second optical region OA2 can be different from the number of sub-pixels connected to each or one or more of the second horizontal lines HL2 that are only set in the normal region NA and do not cross the first optical region OA1 and the second optical region OA2.

[0201] The number of sub-pixels connected to each or one or more of the first horizontal lines HL1 that cross the first optical region OA1 and the second optical region OA2 (referred to as the first number) may be less than the number of sub-pixels connected to each or one or more of the second horizontal lines HL2 that are only set in the normal region NA and do not cross the first optical region OA1 and the second optical region OA2 (referred to as the second number).

[0202] The difference between the first quantity and the second quantity can vary depending on the difference between the resolution of each of the first optical region OA1 and the second optical region OA2 and the resolution of the normal region NA. For example, as the difference between the resolution of each of the first optical region OA1 and the second optical region OA2 and the resolution of the normal region NA increases, the difference between the first quantity and the second quantity can increase.

[0203] As described above, since the number of sub-pixels connected to each or one or more of the first horizontal lines HL1 that cross the first optical region OA1 and the second optical region OA2 (the first number) is less than the number of sub-pixels connected to each or one or more of the second horizontal lines HL2 that are only set in the normal region NA and do not cross the first optical region OA1 and the second optical region OA2 (the second number), the area where the first horizontal line HL1 overlaps with one or more other electrodes or lines adjacent to the first horizontal line HL1 can be smaller than the area where the second horizontal line HL2 overlaps with one or more other electrodes or lines adjacent to the second horizontal line HL2.

[0204] Therefore, the parasitic capacitance formed between the first horizontal line HL1 and one or more other electrodes or lines adjacent to the first horizontal line HL1 (referred to as the first capacitance) can be much smaller than the parasitic capacitance formed between the second horizontal line HL2 and one or more other electrodes or lines adjacent to the second horizontal line HL2 (referred to as the second capacitance).

[0205] Considering the relationship between the first and second resistors (first resistor ≥ second resistor) and the relationship between the first and second capacitors (first capacitor << second capacitor), the resistance-capacitance (RC) value of the first horizontal line HL1 crossing the first optical region OA1 and the second optical region OA2 (referred to as the first RC value) can be much smaller than the RC value of the second horizontal line HL2, which is only set in the normal region NA and does not cross the first and second optical regions OA1 and OA2 (referred to as the second RC value). Therefore, in this example, the first RC value is much smaller than the second RC value (i.e., the first RC value << the second RC value).

[0206] Due to this difference between the first RC value of the first horizontal line HL1 and the second RC value of the second horizontal line HL2 (which is called the RC load difference), the signal transmission characteristics through the first horizontal line HL1 can be different from those through the second horizontal line HL2.

[0207] The structure and location of the signal lines set in the normal area NA and the first optical area or the second optical area (OA1 or OA2) will be described in detail below.

[0208] Figure 6 and Figure 7 Examples are illustrated of display panels according to various aspects of the present disclosure, in which light-emitting areas, circuit areas, transmission areas, and multiple first horizontal lines are provided in the optical and normal areas.

[0209] Reference Figure 6 and Figure 7The display panel 110 according to various aspects of this disclosure may include a normal area (e.g., the normal area NA in the figures discussed above), and includes a first optical area (the first optical area OA1 in the figures discussed above) and / or a second optical area (e.g., the second optical area OA2 in the figures discussed above).

[0210] For ease of description, although the following discussion will be based on, Figure 6 and Figure 7 The example shown is of an optical region OA2 adjacent to the normal region NA, which is the second optical region. However, it should be noted that such a discussion can be applied to an example where the optical region adjacent to the normal region NA is the first optical region OA1.

[0211] Therefore, it should be understood that the scope of this disclosure includes embodiments in which the optical region adjacent to the normal region NA is the first optical region OA1.

[0212] Reference Figure 6 and Figure 7 The normal area NA of the display panel 110 may include multiple light-emitting areas (EA1, EA2 and EA3) and one or more circuit areas CA.

[0213] The second optical region OA2 may include multiple second transmission regions TA2, multiple light-emitting regions (EA1, EA2 and EA3), and one or more circuit regions CA.

[0214] The circuit region CA in the normal region NA and the second optical region OA2 can overlap with multiple light-emitting regions (EA1, EA2 and EA3).

[0215] Multiple signal lines, multiple transistors, and multiple storage capacitors used to drive multiple light-emitting areas (EA1, EA2, and EA3) can be set in the circuit area CA.

[0216] Multiple light-emitting regions (EA1, EA2, and EA3) may include one or more first light-emitting regions EA1, one or more second light-emitting regions EA2, and one or more third light-emitting regions EA3.

[0217] Each of the first to third luminous regions (EA1, EA2, and EA3) can emit light of a different color from the others.

[0218] For example, each first emitting region EA1 can be a region for emitting red (R) light, each second emitting region EA2 can be a region for emitting green (G) light, and each third emitting region EA3 can be a region for emitting blue (B) light. However, the embodiments described in this specification are not limited to this.

[0219] Each luminescent region (EA1, EA2, and EA3) can be set to be spaced apart from each other.

[0220] Multiple light-emitting areas (EA1, EA2, and EA3) can be set in multiple rows and columns.

[0221] For example, multiple first luminous regions EA1 and multiple third luminous regions EA3 can be alternately set in rows N (where N is an odd positive integer or an even positive integer), N+2, N+4, N+6, ... etc., spaced apart from each other.

[0222] In addition, multiple second light-emitting areas EA2 can be set to be spaced apart from each other in rows N+1, N+3, N+5, N+7, etc.

[0223] Multiple second light-emitting regions EA2 can be set alternately in column M (where M is an odd positive integer or an even positive integer), column M+2, column M+4, ... etc.

[0224] Multiple first light-emitting areas EA1 and multiple third light-emitting areas EA3 can be alternately set in columns M+1, M+3, M+5, ... etc.

[0225] Considering the lifetime and light emission characteristics of organic light-emitting elements (e.g., organic light-emitting diodes OLEDs), the corresponding shapes of the first to third light-emitting regions (EA1, EA2, and EA3) can be changed.

[0226] Therefore, the corresponding shapes of the first to third light-emitting regions (EA1, EA2 and EA3) can be different from each other.

[0227] The first to third luminous regions (EA1, EA2 and EA3) can have various shapes in the planar diagram, such as polygons, circles or ellipses.

[0228] The second optical region OA2 can be the region surrounded by the normal region NA.

[0229] Each of the multiple second transmission regions TA2 of the second optical region OA2 may be surrounded by multiple light-emitting regions (EA1, EA2 and EA3) and one or more circuit regions CA that overlap with the multiple light-emitting regions (EA1, EA2 and EA3).

[0230] For example, multiple second transmission regions TA2 can be surrounded by one or more circuit regions CA and multiple light-emitting regions (EA1, EA2 and EA3) of the normal region NA, and one or more circuit regions CA and multiple light-emitting regions (EA1, EA2 and EA3) of the second optical region OA2.

[0231] The arrangement of multiple light-emitting regions (EA1, EA2, and EA3) in the second optical region OA2 can correspond to the arrangement of multiple light-emitting regions (EA1, EA2, and EA3) in the normal region NA.

[0232] For example, such as Figure 6 and Figure 7 As shown, the multiple light-emitting regions (EA1, EA2 and EA3) set in the second optical region OA2 can be set in multiple rows and multiple columns.

[0233] For example, multiple first luminous regions EA1 and multiple third luminous regions EA3 can be alternately set in rows N (where N is an odd positive integer or an even positive integer), N+4, N+8, N+12, ... etc., spaced apart from each other.

[0234] In addition, multiple second light-emitting regions EA2 can be set to be spaced apart from each other in rows N+1, N+5, N+9, ...

[0235] As mentioned above, in the normal region NA, multiple first luminous regions EA1 and multiple third luminous regions EA3 can be spaced apart in rows N (where N is an odd positive integer or an even positive integer), N+2, N+4, N+6, ... etc., so that luminous regions of different colors (EA1 and EA3) can be set alternately.

[0236] Conversely, in the second optical region OA2, multiple first light-emitting regions EA1 and multiple third light-emitting regions EA3 may not be set in one or more rows where multiple first light-emitting regions EA1 and multiple third light-emitting regions EA3 are set in the normal region NA.

[0237] For example, such as Figure 6 and Figure 7 As shown, in the second optical region OA2, multiple first light-emitting regions EA1 and multiple third light-emitting regions EA3 may not be set in rows N+2, N+6, N+10, ... etc.

[0238] The regions in the second optical region OA2 corresponding to rows N+2, N+6, N+10, ... can be second transmission regions TA. These second transmission regions TA2 can be positioned to correspond to multiple columns.

[0239] For example, a second transmission region TA2 can be set in rows N+2 and N+3 and columns M+9 to M+17.

[0240] It should be noted that, as an example, the above description has been provided based on the rows and columns in which the multiple light-emitting regions (EA1, EA2 and EA3) are located in the normal region NA and the second optical region OA2, and the positions in which the multiple second transmission regions TA2 are located in the second optical region OA2. However, the corresponding positions or arrangements of the multiple light-emitting regions (EA1, EA2 and EA3) and the multiple second transmission regions TA2 may be changed according to design requirements.

[0241] Reference Figure 6 and Figure 7 The corresponding light-emitting element can receive signals provided by multiple signal lines that are set in one or more circuit regions CA and overlap with multiple light-emitting regions (EA1, EA2 and EA3), so that multiple light-emitting regions (EA1, EA2 and EA3) emit light.

[0242] Multiple first horizontal lines HL1 can be included in multiple signal lines.

[0243] In an implementation, one or more of the multiple first horizontal lines HL1 can be set in a single row.

[0244] For example, refer to Figure 6 and Figure 7 One or more of the multiple first horizontal lines HL1 can be used to drive multiple first light-emitting areas EA1 and multiple third light-emitting areas EA3 set in row N.

[0245] In the normal region NA, multiple first light-emitting regions EA1 and multiple third light-emitting regions EA3 set in row N can share one or more of the multiple first horizontal lines HL1 with the multiple first light-emitting regions EA1 and multiple third light-emitting regions EA3 set in row N in the second optical region OA2.

[0246] For example, among the multiple light-emitting regions (EA1, EA2 and EA3) set in the normal region NA and the second optical region OA2, light-emitting regions set in the same row can receive signals through one or more identical first horizontal lines HL1.

[0247] In some embodiments, the plurality of first horizontal lines HL1 may include any one of metals such as aluminum (Al), gold (Au), silver (Ag), copper (Cu), tungsten (W), molybdenum (Mo), chromium (Cr), tantalum (Ta), titanium (Ti), or alloys of two or more of these metals; however, embodiments of this disclosure are not limited thereto.

[0248] Multiple first horizontal lines HL1 may include at least one portion of a curve in at least one boundary region between the normal region NA and the second optical region OA2.

[0249] For example, such as Figure 6 and Figure 7 As shown, one or more of the multiple first horizontal lines HL1 may include at least one curved portion of at least one portion of the second optical region OA2 adjacent to the normal region NA.

[0250] In an implementation, each of the plurality of first horizontal lines HL1, or one or more of them, may include a first portion 511, a second portion 512, and a connecting portion 513.

[0251] like Figure 6 and Figure 7 As shown, the first part 511 of the first horizontal line HL1 can be set in the normal area NA.

[0252] The second part 512 of the first horizontal line HL1 can be set in the second optical region OA2.

[0253] The connecting portion 513 of the first horizontal line HL1 can be disposed in the second optical region OA2, for example, between the first portion 511 and the second portion 512.

[0254] like Figure 6 and Figure 7 As shown, the first portion 511 of the first horizontal line HL1 can extend to a portion of the second optical region OA2.

[0255] The first portion 511 and the second portion 512 of the first horizontal line HL1 may extend in the same direction (e.g., horizontal direction). For example, the first portion 511 and the second portion 512 may be arranged in parallel.

[0256] In an embodiment, the connecting portion 513 may extend in a direction different from the extending directions of the first portion 511 and the second portion 512.

[0257] like Figure 6 and Figure 7 As shown, the connecting portion 513 can extend in the inclined direction.

[0258] For example, at least one first horizontal line HL1 may include a first portion 511, a second portion 512 that provide the same signal through them, and a connecting portion 513 between the first portion 511 and the second portion 512.

[0259] like Figure 6 and Figure 7 As shown, in at least one first horizontal line HL1, although each of the first part 511 and the second part 512 extends in the same direction, the position of the second part 512 can be offset relative to the first part 511 due to the shape of the connecting part 513.

[0260] For example, such as Figure 6 As shown, in an example where the connecting portion 513 of at least one first horizontal line HL1 extends in a direction inclined relative to the horizontal direction within an angle range of greater than or equal to -90° and less than 0°, in a plan view, its second portion 512 may be placed in a lower position than its first portion 511.

[0261] In another example, such as Figure 7 As shown, in an example where the connecting portion 513 of at least one first horizontal line HL1 extends in a direction inclined relative to the horizontal direction within an angle range of greater than 0° and less than or equal to 90°, in a plan view, its second portion 512 may be placed in a higher position than its first portion 511.

[0262] although Figure 6 and Figure 7 An example is illustrated where a first portion 511 or a second portion 512 of each first horizontal line HL1 extends into a portion of a second optical region OA2, but embodiments of this disclosure are not limited thereto.

[0263] For example, multiple first horizontal lines HL1 can be set only in the normal region NA.

[0264] Reference Figure 6 and Figure 7 Multiple first horizontal lines HL1 can overlap with multiple light-emitting areas (EA1, EA2 and EA3) set in the normal area NA, and also overlap with multiple light-emitting areas (EA1, EA2 and EA3) set in the second optical area OA2.

[0265] For example, refer to Figure 6 In the normal region NA, multiple first horizontal lines HL1 can overlap with multiple second light-emitting regions EA2 set in rows N+3 and N+5, and overlap with multiple first light-emitting regions EA1 and third light-emitting regions EA3 set in row N+4.

[0266] Furthermore, in the second optical region OA2, multiple first horizontal lines HL1 can overlap with multiple second light-emitting regions EA2 arranged in row N+5, and also overlap with multiple first light-emitting regions EA1 and third light-emitting regions EA3 arranged in row N+4.

[0267] like Figure 6 As shown, in the normal region NA, multiple second light-emitting regions EA2 can be set in row N+3; conversely, in the second optical region OA2, the region corresponding to row N+3 in the normal region NA can be the second transmission region TA2.

[0268] In other words, in the second optical region OA2, multiple second light-emitting regions EA2 may not be set in row N+3. Multiple second light-emitting regions EA2 set in row N+3 may be set only in the normal region NA.

[0269] When the first horizontal line HL1, which overlaps with the second luminous region EA2 located in row N+3 in the normal region NA, extends to the second optical region OA2, the transmittance of the second transmission region TA2 can be reduced because the first horizontal line HL1 is also located in a part of the second transmission region TA2.

[0270] Therefore, as Figure 6 As shown, the first horizontal line HL1, which overlaps with the multiple second light-emitting regions EA2 set in row N+3 in the normal region NA, can overlap with the first light-emitting region EA1 and the third light-emitting region EA3 set in row N+4 in the second optical region OA2 through the corresponding connecting portion 513 set in the second optical region OA2 and extending in the inclined direction.

[0271] like Figure 6 As shown, multiple first horizontal lines HL1 that overlap with the first light-emitting area EA1 and the third light-emitting area EA3 set in row N+4 in the normal area NA can overlap with the first light-emitting area EA1 and the third light-emitting area EA3 set in row N+4 in the optical area OA2.

[0272] In addition, such as Figure 6 As shown, one or more of the multiple first horizontal lines HL1 can overlap with the upper edge of the multiple second luminous areas EA2 in row N+5 of the normal area NA.

[0273] Furthermore, one or more first horizontal lines HL1 that overlap with the upper edges of the plurality of second light-emitting regions EA2 in row N+5 of the normal region NA can be closer to the central portion of the plurality of second light-emitting regions EA2 in row N+5 by the corresponding connecting portion 513 extending in the oblique direction (i.e., overlapping with the central portion of the plurality of second light-emitting regions EA2 compared to overlapping with the upper edges of the plurality of second light-emitting regions EA2 in the normal region NA).

[0274] exist Figure 6 The discussion has been based on the following structure: in the second optical region OA2, one or more second transmission regions TA2 are arranged in a higher row in the plan view than the row in which the multiple first light-emitting regions EA1 and the third light-emitting region EA3 are arranged, and the multiple second light-emitting regions EA2 are arranged in a lower row in the plan view; however, the embodiments of this disclosure are not limited thereto.

[0275] For example, such as Figure 7 As shown, in the second optical region OA2, multiple second light-emitting regions EA2 can be arranged in a higher row than the row in which multiple first light-emitting regions EA1 and third light-emitting regions EA3 are arranged, and one or more second transmission regions TA2 can be arranged in a lower row than the row in the plan view.

[0276] In this example, such as Figure 7 As shown, the first horizontal line HL1, which overlaps with the multiple second light-emitting regions EA2 in row N+3 in the normal region NA, can be extended to the second optical region OA2 through the corresponding connecting portion 513 in the second optical region OA2, and is positioned closer to the central portion of the multiple second light-emitting regions EA2 in row N+3 in the second optical region OA2.

[0277] Therefore, it is possible to prevent multiple first horizontal lines HL1 from reducing the transmittance of the second optical region OA2, because the first horizontal lines HL1 in the second optical region OA2 are offset or bent to a lower or higher position (or a row / column before or after) compared to the position of the horizontal lines HL1 in the normal region NA.

[0278] Figure 8 and Figure 9 This is an example cross-sectional view of each of the first optical region, the second optical region, and the normal region included in the display area of ​​a display panel according to various aspects of this disclosure.

[0279] Figure 8 A cross-sectional view of the display panel 110 is shown in an example where the touch sensor exists on the exterior of the display panel 110 in the form of a touch panel. Figure 9 A cross-sectional view of the display panel 110 is shown in an example where the touch sensor TS is located inside the display panel 110.

[0280] Figure 8 and Figure 9 Each of the figures shows an example cross-sectional view of the normal region NA, the first optical region OA1, and the second optical region OA2 included in the display area DA.

[0281] First, refer to Figure 8 and Figure 9 Describe the stacked structure of the normal region NA. The corresponding light-emitting regions EA of the first optical region OA1 and the second optical region OA2 can have the same stacked structure as the light-emitting region EA of the normal region NA.

[0282] Reference Figure 8 and Figure 9The substrate SUB may include a first substrate SUB1, an interlayer insulating layer IPD, and a second substrate SUB2. The interlayer insulating layer IPD may be inserted between the first substrate SUB1 and the second substrate SUB2. Because the substrate SUB includes the first substrate SUB1, the interlayer insulating layer IPD, and the second substrate SUB2, the substrate SUB can prevent or reduce the penetration of moisture. The first substrate SUB1 and the second substrate SUB2 may be, for example, polyimide (PI) substrates. The first substrate SUB1 may be referred to as the main PI substrate, and the second substrate SUB2 may be referred to as the auxiliary PI substrate.

[0283] Reference Figure 8 and Figure 9 Various types of patterns (ACT, SD1, GATE) for setting one or more transistors such as driving transistors DRT, various types of insulating layers (MBUF, ABUF1, ABUF2, GI, ILD1, ILD2, PAS0), and various types of metal patterns (TM, GM, ML1, ML2) can be set on or above the substrate SUB.

[0284] Reference Figure 8 and Figure 9 The multi-buffer layer MBUF can be disposed on the second substrate SUB2, and the first active buffer layer ABUF1 can be disposed on the multi-buffer layer MBUF.

[0285] The first metal layer ML1 and the second metal layer ML2 can be disposed on the first active buffer layer ABUF1. The first metal layer ML1 and the second metal layer ML2 can be, for example, a light-shielding layer LS for blocking light.

[0286] The second active buffer layer ABUF2 can be disposed on the first metal layer ML1 and the second metal layer ML2. The active layer ACT that drives the transistor DRT can be disposed on the second active buffer layer ABUF2.

[0287] The gate insulating layer GI can be configured to cover the active layer ACT.

[0288] The gate electrode (GATE) of the driving transistor (DRT) can be disposed on the gate insulating layer (GI). Furthermore, at a location different from where the driving transistor (DRT) is disposed, the gate material layer (GM) can be disposed together with the gate electrode (GATE) of the driving transistor (DRT) on the gate insulating layer (GI).

[0289] The first interlayer insulating layer ILD1 can be configured to cover the gate electrode GATE and the gate material layer GM. A metal pattern TM can be disposed on the first interlayer insulating layer ILD1. The metal pattern TM can be located at a different position than where the driving transistor DRT is formed. The second interlayer insulating layer ILD2 can be configured to cover the metal pattern TM on the first interlayer insulating layer ILD1.

[0290] Two first source-drain electrode patterns SD1 can be disposed on the second interlayer insulating layer ILD2. One of the two first source-drain electrode patterns SD1 can be the source node of the driving transistor DRT, and the other can be the drain node of the driving transistor DRT.

[0291] The two first source-drain electrode patterns SD1 can be electrically connected to the first and second sides of the active layer ACT through contact holes formed in the second interlayer insulating layer ILD2, the first interlayer insulating layer ILD1 and the gate insulating layer GI, respectively.

[0292] The portion of the active layer ACT that overlaps with the gate electrode GATE can be used as a channel region. One of the two first source-drain electrode patterns SD1 can be connected to a first side of the channel region of the active layer ACT, and the other of the two first source-drain electrode patterns SD1 can be connected to a second side of the channel region of the active layer ACT.

[0293] The passivation layer PAS0 can be configured to cover two first source-drain electrode patterns SD1. A planarization layer PLN can be disposed on the passivation layer PAS0. The planarization layer PLN may include a first planarization layer PLN1 and a second planarization layer PLN2.

[0294] The first planarization layer PLN1 can be set on the passivation layer PAS0.

[0295] The second source-drain electrode pattern SD2 can be disposed on the first planarization layer PLN1. The second source-drain electrode pattern SD2 can be connected to one of the two first source-drain electrode patterns SD1 (corresponding to) through contact holes formed in the first planarization layer PLN1. Figure 3 The second node N2 of the driving transistor DRT in the sub-pixel SP.

[0296] The second planarization layer PLN2 can be configured to cover the second source-drain electrode pattern SD2. The light-emitting element ED can be disposed on the second planarization layer PLN2.

[0297] According to the example stacked structure of the light-emitting element ED, the anode electrode AE ​​can be disposed on the second planarization layer PLN2. The anode electrode AE ​​can be electrically connected to the second source-drain electrode pattern SD2 through contact holes formed in the second planarization layer PLN2.

[0298] The dam can be configured to cover a portion of the anode electrode AE. The portion of the dam corresponding to the light-emitting area EA of the sub-pixel SP can be turned on.

[0299] A portion of the anode electrode AE ​​can be exposed through the opening (open portion) of the dam bank. The light-emitting layer EL can be disposed on the side surface of the dam bank and in the opening (open portion) of the dam bank. All or at least a portion of the light-emitting layer EL can be located between adjacent dams.

[0300] At the opening of the bank, the light-emitting layer EL can contact the anode electrode AE. The cathode electrode CE can be disposed on the light-emitting layer EL.

[0301] As described above, a light-emitting element ED can be formed by including an anode electrode AE, a light-emitting layer EL, and a cathode electrode CE. The light-emitting layer EL may include a layer of organic material.

[0302] The encapsulation layer ENCAP can be placed on the stack of light-emitting elements (EDs).

[0303] The ENCAP encapsulation layer can have a single-layer structure or a multi-layer structure. For example, such as Figure 8 and Figure 9 As shown, the encapsulation layer ENCAP may include a first encapsulation layer PAS1, a second encapsulation layer PCL, and a third encapsulation layer PAS2.

[0304] The first encapsulation layer PAS1 and the third encapsulation layer PAS2 can be inorganic material layers, for example, and the second encapsulation layer PCL can be an organic material layer, for example. Among the first encapsulation layer PAS1, the second encapsulation layer PCL, and the third encapsulation layer PAS2, the second encapsulation layer PCL can be the thickest and is used as a planarization layer.

[0305] The first encapsulation layer PAS1 can be disposed on the cathode electrode CE and can be positioned closest to the light-emitting element ED. The first encapsulation layer PAS1 can include an inorganic insulating material that can be deposited using low-temperature deposition. For example, the first encapsulation layer PAS1 can include, but is not limited to, silicon nitride (SiN). x ), silicon dioxide (SiO) x Materials include silicon oxynitride (SiON), aluminum oxide (Al2O3), etc. Since the first encapsulation layer PAS1 can be deposited in a low-temperature atmosphere, it can prevent damage to the light-emitting layer EL, which includes organic materials susceptible to high-temperature atmospheres, during the deposition process.

[0306] The second encapsulation layer PCL can have a smaller area or size than the first encapsulation layer PAS1. For example, the second encapsulation layer PCL can be configured to expose the ends or edges of the first encapsulation layer PAS1. The second encapsulation layer PCL can serve as a buffer layer to alleviate stress between corresponding layers when the display device 100 is curved or bent, and can also be used to enhance planarization performance. For example, the second encapsulation layer PCL can include organic insulating materials such as acrylic resin, epoxy resin, polyimide, polyethylene, silicon-oxygen carbon (SiOC), etc. For example, an inkjet printing method can be used to configure the second encapsulation layer PCL.

[0307] The third encapsulation layer PAS2 can be disposed above the substrate SUB on which the second encapsulation layer PCL is disposed, such that the third encapsulation layer PAS2 covers the corresponding top and side surfaces of the second encapsulation layer PCL and the first encapsulation layer PAS1. The third encapsulation layer PAS2 can minimize or reduce or prevent the penetration of external moisture or oxygen into the first encapsulation layer PAS1 and the second encapsulation layer PCL. For example, the third encapsulation layer PAS2 may include an inorganic insulating material, such as silicon nitride (SiN). x ), silicon dioxide (SiO) x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), etc.

[0308] Reference Figure 9 In the example where the touch sensor TS is embedded in the display panel 110, the touch sensor TS can be disposed on the encapsulation layer ENCAP. The structure of the touch sensor will be described in detail below.

[0309] The touch buffer layer (T-BUF) can be placed on the encapsulation layer (ENCAP). The touch sensor (TS) can be placed on the touch buffer layer (T-BUF).

[0310] The touch sensor TS may include a touch sensor metal TSM located in different layers and at least one bridging metal BRG.

[0311] The interlayer insulating layer (T-ILD) can be placed between the touch sensor metal (TSM) and the bridging metal (BRG).

[0312] For example, the touch sensor metal TSM may include a first touch sensor metal TSM, a second touch sensor metal TSM, and a third touch sensor metal TSM disposed adjacent to each other. In an embodiment where the third touch sensor metal TSM is disposed between the first and second touch sensor metal TSMs, and the first and second touch sensor metal TSMs need to be electrically connected to each other, the first and second touch sensor metal TSMs can be electrically connected to each other through a bridging metal BRG located in different layers. The bridging metal BRG can be electrically insulated from the third touch sensor metal TSM through a touch interlayer insulating layer (T-ILD).

[0313] When the touch sensor TS is disposed on the display panel 110, chemical solutions (e.g., developers or etchants) used in the corresponding processes or moisture from the outside may be generated or introduced. In some embodiments, by disposing the touch sensor TS on the touch buffer layer T-BUF, it is possible to prevent chemical solutions or moisture from penetrating into the light-emitting layer EL, which includes organic materials, during the manufacturing process of the touch sensor TS. Therefore, the touch buffer layer T-BUF can prevent damage to the light-emitting layer EL, which is susceptible to chemical solutions or moisture.

[0314] To prevent damage to the light-emitting layer (EL), which contains organic materials susceptible to high temperatures, the touch buffer layer (T-BUF) can be formed at a low temperature (e.g., 100 degrees Celsius) or lower than a predetermined temperature. It is formed using an organic insulating material with a low dielectric constant of 1 to 3. For example, the touch buffer layer T-BUF may include acrylic-based, epoxy-based, or siloxane-based materials. When the display device 100 is bent, the encapsulation layer (ENCAP) may be damaged, and the touch sensor metal located on the touch buffer layer T-BUF may crack or break. Even when the display device 100 is bent, the touch buffer layer T-BUF, as an organic insulating material with planarization properties, can prevent damage to the encapsulation layer (ENCAP) and / or cracking or breakage of the metal (TSM, BRG) included in the touch sensor (TS).

[0315] The protective layer PAC can be configured to cover the touch sensor TS. The protective layer PAC can be, for example, an organic insulating layer.

[0316] Next, we will refer to Figure 8 and Figure 9 Describe the stacked structure of the first optical region OA1.

[0317] Reference Figure 8 and Figure 9The emitting region EA of the first optical region OA1 can have the same stacked structure as the stacked structure in the normal region NA. Therefore, in the following discussion, instead of repeating the description of the emitting region EA of the first optical region OA1, the stacked structure of the first transmission region TA1 of the first optical region OA1 will be described in detail below.

[0318] In some embodiments, the cathode electrode CE may be disposed in the light-emitting region EA included in the normal region NA and the first optical region OA1, but may not be disposed in the first transmission region TA1 of the first optical region OA1. For example, the first transmission region TA1 of the first optical region OA1 may correspond to the opening of the cathode electrode CE.

[0319] Furthermore, in some embodiments, a light-shielding layer LS, comprising at least one of a first metal layer ML1 and a second metal layer ML2, may be disposed in the light-emitting region EA included in the normal region NA and the first optical region OA1, but may not be disposed in the first transmission region TA1 of the first optical region OA1. For example, the first transmission region TA1 of the first optical region OA1 may correspond to the opening of the light-shielding layer LS.

[0320] The substrate SUB and various types of insulating layers (MBUF, ABUF1, ABUF2, GI, ILD1, ILD2, PAS0, PLN (PLN1, PLN2), BANK, ENCAP (PAS1, PCL, PAS2), T-BUF, T-ILD, PAC) disposed in the light-emitting region EA included in the normal region NA and the first optical region OA1 can be disposed in the first transmission region TA1 in the first optical region OA1 equally, substantially equally, or similarly.

[0321] However, in some embodiments, in addition to the insulating material or layer disposed in the light-emitting region EA included in the normal region NA and the first optical region OA1, all or one or more of the one or more material layers with electrical properties (e.g., one or more metal material layers and / or one or more semiconductor layers) may not be disposed in the first transmission region TA1 in the first optical region OA1.

[0322] For example, refer to Figure 8 and Figure 9 All or one or more of the metal material layers (ML1, ML2, GATE, GM, TM, SD1, SD2) associated with at least one transistor and semiconductor layer ACT may not be disposed in the first transmission region TA1.

[0323] Reference Figure 8 and Figure 9In some embodiments, the anode electrode AE ​​and cathode electrode CE included in the light-emitting element ED may not be disposed in the first transmission region TA1. In some embodiments, the light-emitting layer EL of the light-emitting element ED may or may not be disposed in the first transmission region TA1, depending on design requirements.

[0324] In some implementations, refer to Figure 9 The touch sensor metal TSM and bridging metal BRG included in the touch sensor TS may not be set in the first transmission area TA1 of the first optical area OA1.

[0325] Therefore, since the material layer with electrical properties (e.g., one or more metal material layers and / or one or more semiconductor layers) is not disposed in the first transmission region TA1 of the first optical region OA1, the light transmittance in the first transmission region TA1 of the first optical region OA1 can be provided or improved. As a result, the first optoelectronic device 11 can perform a predefined function (e.g., image sensing) by receiving light transmitted through the first transmission region TA1.

[0326] In some embodiments, since all or one or more of the first transmission regions TA1 in the first optical region OA1 overlap with the first optical electronic device 11, enabling the first optical electronic device 11 to operate normally, it is desirable to further increase the transmittance of the first transmission regions TA1 in the first optical region OA1.

[0327] To achieve the above objectives, in the display panel 110 of the display device 100 according to various aspects of the present disclosure, a transmittance enhancement structure TIS can be provided to the first transmission region TA1 of the first optical region OA1.

[0328] Reference Figure 8 and Figure 9 The multiple insulating layers included in the display panel 110 may include at least one buffer layer (MBUF, ABUF1 and / or ABUF2) between at least one substrate (SUB1 and / or SUB2) and at least one transistor (DRT and / or SCT), at least one planarization layer (PLN1 and / or PLN2) between the transistor DRT and the light-emitting element ED, at least one encapsulation layer ENCAP on the light-emitting element ED, etc.

[0329] Reference Figure 9 The multiple insulating layers included in the display panel 110 may also include a touch buffer layer T-BUF and a touch interlayer insulating layer T-ILD located on the encapsulation layer ENCAP.

[0330] Reference Figure 8 and Figure 9The first transmission region TA1 of the first optical region OA1 may have the following structure: the first planarization layer PLN1 and the passivation layer PAS0 have recessed portions extending downward from their respective surfaces as a transmittance enhancement structure TIS.

[0331] Reference Figure 8 and Figure 9 Among the multiple insulating layers, the first planarization layer PLN1 may include at least one recess (e.g., groove, trench, recessed portion, protrusion, etc.). The first planarization layer PLN1 may be, for example, an organic insulating layer.

[0332] In an example where the first planarization layer PLN1 has a recessed portion extending downward from its surface, the second planarization layer PLN2 can be substantially used to provide planarization. In one embodiment, the second planarization layer PLN2 may also have a recessed portion extending downward from its surface. In this embodiment, the second encapsulation layer PCL can be substantially used to provide planarization.

[0333] Reference Figure 8 and Figure 9 The recessed portions of the first planarization layer PLN1 and the passivation layer PAS0 can pass through the insulating layer used to form the transistor DRT (such as the first interlayer insulating layer ILD, the second interlayer insulating layer ILD2, the gate insulating layer GI, etc.) and the buffer layer located below the insulating layer and extending to the upper part of the second substrate SUB2, such as the first active buffer layer ABUF1, the second active buffer layer ABUF2, the multi-buffer layer MBUF, etc.

[0334] Reference Figure 8 and Figure 9 The substrate SUB may include at least one recessed or sunken portion as a transmittance enhancement structure (TIS). For example, in the first transmission region TA1, the upper part of the second substrate SUB2 may be recessed or sunken downwards, or the second substrate SUB2 may be perforated.

[0335] Reference Figure 8 and Figure 9 The first encapsulation layer PAS1 and the second encapsulation layer PCL included in the ENCAP encapsulation layer can also have the following transmittance enhancement structure TIS, wherein the first encapsulation layer PAS1 and the second encapsulation layer PCL have recessed portions extending downward from their respective surfaces. The second encapsulation layer PCL can be, for example, an organic insulating layer.

[0336] Reference Figure 9 To protect the touch sensor TS, the protective layer PAC can be configured to cover the touch sensor TS on the encapsulation layer ENCAP.

[0337] Reference Figure 9The protective layer PAC may have at least one recess (e.g., groove, trench, recessed portion, protrusion, etc.) in the portion overlapping with the first transmission region TA1 as a transmittance-enhancing structure TIS. The protective layer PAC may be, for example, an organic insulating layer.

[0338] Reference Figure 9 The touch sensor TS may include one or more touch sensor metal TSMs having a mesh type. In the example where the touch sensor metal TSM is formed as a mesh type, multiple openings may be formed in the touch sensor metal TSM. Each of the multiple openings may be positioned to correspond to the light-emitting area EA of the sub-pixel SP.

[0339] In order to make the first optical region OA1 have a higher transmittance than the normal region NA, the area or size of the touch sensor metal TSM per unit area in the first optical region OA1 can be smaller than the area or size of the touch sensor metal TSM per unit area in the normal region NA.

[0340] Reference Figure 9 The touch sensor TS can be set in the light-emitting area EA of the first optical area OA1, but it can be set out of the first transmission area TA1 of the first optical area OA1.

[0341] Next, we will refer to Figure 8 and Figure 9 Describe the stacked structure of the second optical region OA2.

[0342] Reference Figure 8 and Figure 9 The emitting region EA of the second optical region OA2 can have the same stacked structure as the normal region NA. Therefore, in the following discussion, instead of repeating the description of the emitting region EA in the second optical region OA2, the stacked structure of the second transmission region TA2 in the second optical region OA2 will be described in detail below.

[0343] In some embodiments, the cathode electrode CE may be disposed in the light-emitting region EA included in the normal region NA and the second optical region OA2, but may not be disposed in the second transmission region TA2 of the second optical region OA2. For example, the second transmission region TA2 in the second optical region OA2 may correspond to the opening of the cathode electrode CE.

[0344] In some embodiments, a light-shielding layer LS, comprising at least one of a first metal layer ML1 and a second metal layer ML2, may be disposed in the light-emitting region EA included in the normal region NA and the second optical region OA2, but may not be disposed in the second transmission region TA2 of the second optical region OA2. For example, the second transmission region TA2 of the second optical region OA2 may correspond to the opening of the light-shielding layer LS.

[0345] In an example where the transmittance of the second optical region OA2 is the same as that of the first optical region OA1, the stacked structure of the second transmission region TA2 in the second optical region OA2 can be the same as the stacked structure of the first transmission region TA1 in the first optical region OA1.

[0346] In another example where the transmittance of the second optical region OA2 is different from that of the first optical region OA1, the stacked structure of the second transmission region TA2 in the second optical region OA2 may be at least partially different from the stacked structure of the first transmission region TA1 in the first optical region OA1.

[0347] For example, such as Figure 8 and Figure 9 As shown, in some embodiments, when the transmittance of the second optical region OA2 is lower than that of the first optical region OA1, the second transmission region TA2 in the second optical region OA2 may not have a transmittance enhancement structure (TIS). As a result, the first planarization layer PLN1 and the passivation layer PAS0 may not be recessed or sunken. In some embodiments, the width of the second transmission region TA2 in the second optical region OA2 may be smaller than the width of the first transmission region TA1 in the first optical region OA1.

[0348] The substrate SUB and various types of insulating layers (MBUF, ABUF1, ABUF2, GI, ILD1, ILD2, PAS0, PLN (PLN1, PLN2), BANK, ENCAP (PAS1, PCL, PAS2), T-BUF, T-ILD, PAC) disposed in the light-emitting region EA included in the normal region NA and the second optical region OA2 can be disposed in the second transmission region TA2 of the second optical region OA2 equally, substantially equally or similarly.

[0349] However, in some embodiments, in addition to the insulating material or layer disposed in the light-emitting region EA included in the normal region NA and the second optical region OA2, all or one or more of the one or more layers with electrical properties (e.g., one or more metal material layers and / or optical region semiconductor layers) may not be disposed in the second transmission region TA2 in the second optical region OA2.

[0350] For example, refer to Figure 8 and Figure 9 All or one or more of the metal material layers (ML1, ML2, GATE, GM, TM, SD1, SD2) associated with at least one transistor and semiconductor layer ACT may not be provided in the second transmission region TA2 of the second optical region OA2.

[0351] In addition, refer to Figure 8 and Figure 9 In some embodiments, the anode electrode AE ​​and cathode electrode CE included in the light-emitting element ED may not be disposed in the second transmission region TA2 of the second optical region OA2. In some embodiments, the light-emitting layer EL of the light-emitting element ED may or may not be disposed on the second transmission region TA2 of the second optical region OA2.

[0352] In some implementations, refer to Figure 9 The touch sensor metal TSM and bridging metal BRG included in the touch sensor TS may not be set in the second transmission region TA2 of the second optical region OA2.

[0353] Therefore, since the material layer with electrical properties (e.g., one or more metal material layers, and / or one or more semiconductor layers) is not disposed in the second transmission region TA2 of the second optical region OA2, the transmittance of the second transmission region TA2 in the second optical region OA2 can be provided or improved. As a result, the second optoelectronic device 12 can perform a predefined function (e.g., detecting an object or human body, or detecting external illuminance) by receiving light transmitted through the second transmission region TA2.

[0354] Figure 10 This is an example cross-sectional view of the edge of the display panel 110 according to various aspects of this disclosure.

[0355] For the sake of brevity, Figure 10 The diagram illustrates a single substrate SUB comprising a first substrate SUB1 and a second substrate SUB2, and a layer or portion located below the embankment BANK is illustrated in a simplified manner. Similarly, Figure 10 An example is shown of a single planarization layer PLN comprising a first planarization layer PLN1 and a second planarization layer PLN2, and a single interlayer insulating layer INS comprising a second interlayer insulating layer ILD2 and a first interlayer insulating layer ILD1 located below the planarization layer PLN.

[0356] Reference Figure 10The first encapsulation layer PAS1 can be disposed on the cathode electrode CE and positioned closest to the light-emitting element ED. The second encapsulation layer PCL can have a smaller area or size than the first encapsulation layer PAS1. For example, the second encapsulation layer PCL can be configured to expose both ends or edges of the first encapsulation layer PAS1.

[0357] The third encapsulation layer PAS2 can be disposed above the substrate SUB on which the second encapsulation layer PCL is disposed, so that the third encapsulation layer PAS2 covers the corresponding top and side surfaces of the second encapsulation layer PCL and the first encapsulation layer PAS1.

[0358] The third encapsulation layer PAS2 can minimize or reduce or prevent external moisture or oxygen from penetrating into the first encapsulation layer PAS1 and the second encapsulation layer PCL.

[0359] Reference Figure 10 To prevent the encapsulation layer ENCAP from collapsing, the display panel 110 may include one or more dams (DAM1 and / or DAM2) at or near the end or edge of the inclined surface SLP of the encapsulation layer ENCAP. One or more dams (DAM1 and / or DAM2) may be present at or near the boundary point between the display area DA and the non-display area NDA.

[0360] One or more dams (DAM1 and / or DAM2) may include DFP made of the same material as the dam BANK.

[0361] Reference Figure 10 In one embodiment, the second encapsulation layer PCL, comprising organic material, may be located only on the inner side of the first dam DAM1, which is positioned closest to the inclined surface SLP of the encapsulation layer ENCAP. For example, the second encapsulation layer PCL may not be located on all dams (DAM1 and DAM2). In another embodiment, the second encapsulation layer PCL, comprising organic material, may be located at least on the first dam DAM1 of the first dam DAM1 and the second dam DAM2.

[0362] For example, the second encapsulation layer PCL may extend only to all or at least a portion of the upper portion of the first dam DAM1. In yet another embodiment, the second encapsulation layer PCL may extend beyond the upper portion of the first dam DAM1 and extend to all or at least a portion of the upper portion of the second dam DAM2.

[0363] Reference Figure 10 ,like Figure 2 The touch drive circuit 260 shown is electrically connected to a touch pad TP which can be disposed on a portion of the outer side of one or more dams (DAM1, DAM2) in the substrate SUB.

[0364] The touch line TL can electrically connect the touch sensing metal TSM or bridging metal BRG contained in or used as touch electrodes in the display area DA to the touch pad TP.

[0365] One end or edge of the touch line TL can be electrically connected to the touch sensing metal TSM or the bridging metal BRG, and the other end or edge of the touch line TL can be electrically connected to the touch pad TP.

[0366] The touch line TL can extend downward along the inclined surface SLP of the ENCAP package layer, extend along the corresponding upper part of one or more dams (DAM1 and / or DAM2), and extend to the touch pad TP located outside one or more dams (DAM1 and / or DAM2).

[0367] Reference Figure 10 In one embodiment, the touch line TL can be a bridging metal BRG. In another embodiment, the touch line TL can be a touch sensor metal TSM.

[0368] Figures 11 to 15 The illustration schematically illustrates an example of a display panel according to aspects of the present disclosure, in which at least one first horizontal line is included in at least a portion of an optical region, and one or more circuit regions are included in one or more light-emitting regions in the optical region, connected to one or more other light-emitting regions and driven to perform a predefined function.

[0369] In the following description, for ease of description, some structures, effects, etc. of the implementation methods or examples discussed above may not be repeated.

[0370] However, it should be understood that the scope of this disclosure includes the omitted constructions discussed above. Furthermore, in the following description, similar reference numerals will be used for constructions or elements that are the same, substantially or nearly identical to, those in the above embodiments or examples.

[0371] Reference Figure 11 The display panel according to various aspects of this disclosure may include a normal area (e.g., the normal area NA in the figure discussed above) and a second optical area (e.g., the second optical area OA2 in the figure discussed above).

[0372] A portion of the normal region NA can be placed on at least one side surface of the second optical region OA2.

[0373] The normal region NA may include multiple light-emitting regions EA and one or more circuit regions CA that overlap with the light-emitting regions EA.

[0374] The second optical region OA2 may include multiple light-emitting regions EA, one or more circuit regions CA overlapping with the light-emitting regions EA, and one or more second transmission regions TA2.

[0375] In an implementation, multiple organic light-emitting elements (EDs) (e.g., organic light-emitting diodes (OLEDs)) can be provided to emit light in a direction toward the encapsulation layer disposed above the substrate.

[0376] In the figures, although a structure is shown where multiple light-emitting regions EA and one or more circuit regions CA driving the light-emitting regions EA overlap, the embodiments of this disclosure are not limited thereto. For example, the light-emitting regions EA and the circuit regions CA may not overlap each other. In this example, the organic light-emitting element ED of the light-emitting region EA can be configured to emit light in a direction toward the substrate on which the organic light-emitting element ED is disposed above.

[0377] The transistors used to drive the light-emitting areas may not be placed in the second optical area OA2 adjacent to the normal area NA, but in a portion of one or more light-emitting areas EA.

[0378] Reference Figure 11 At least one light-emitting region EA located in the second optical region OA2 adjacent to the normal region NA can be electrically connected to a transistor in another circuit region CA located in the second optical region OA2 via an extension portion 920.

[0379] For example, the extension 920 may be connected to the anode node of a switching transistor disposed in another circuit region CA of the second optical region OA2, but the embodiments of this disclosure are not limited thereto.

[0380] The light-emitting region EA of the transistor electrically connected to the second optical region OA2 is a light-emitting region EA that overlaps with at least one first horizontal line HL1 including the connection portion 513.

[0381] As described above, compared to the position of the first horizontal line HL1 in the normal region NA, the position of the first horizontal line HL1 can be offset or bent by the connecting portion 513 in the edge of the second optical region OA2. Therefore, the first horizontal line HL1 can overlap with the light-emitting region EA of the second optical region OA2 without overlapping with the second transmission region TA2.

[0382] Furthermore, the transistor used to drive the light-emitting region EA may not be located in the region and the vicinity of the connection portion 531 of the multiple first horizontal lines HL1.

[0383] The presence of multiple opaque electrodes in each of the multiple transistors can lead to a decrease in the transmittance of the second optical region OA2; however, according to embodiments of the present disclosure, the transmittance of the second optical region OA2 can be improved by removing such transistors from one or more regions of the second optical region OA2.

[0384] Reference Figure 11 When the display panel 110 is viewed from the front, in the corresponding upper part of the left and right edges of the second optical region OA2, one or more anode electrodes AE of one or more light-emitting regions EA can be electrically connected to one or more circuit regions CA of one or more other adjacent light-emitting regions EA through one or more extensions 920.

[0385] In this case, one or more organic light-emitting elements ED located at the edge of one or more light-emitting regions EA where the transistors have been removed can be electrically connected to one or more circuit regions CA located on, above or near one or more other light-emitting regions EA.

[0386] When the display panel 110 is viewed from the front, in the lower part of the left and right edges of the second optical region OA2, one or more anode electrodes AE of one or more light-emitting regions EA can be electrically connected to one or more circuit regions CA of one or more other adjacent light-emitting regions EA through one or more extensions 920.

[0387] In this case, one or more organic light-emitting elements ED located at the edge of one or more light-emitting regions EA where the transistors have been removed can be electrically connected to one or more circuit regions CA located below, beneath, or near one or more other light-emitting regions EA.

[0388] Here, the upper and lower parts can be divided based on the direction (e.g., horizontal direction) in which the second transmissive region TA2 extends from the center of the display panel 110.

[0389] like Figure 12 and Figure 13 As shown, in the upper part of the display panel 110, at least one EA2 of the light-emitting regions (EA1, EA2 and EA3) disposed in the second optical region OA2 can be electrically connected to a transistor disposed in the circuit region CA disposed in another adjacent light-emitting region.

[0390] For example, refer to Figures 12 to 15The multiple first horizontal lines HL1 required to drive multiple light-emitting areas (EA1, EA2 and EA3) can be placed in the normal area NA and the second optical area OA2.

[0391] For example, multiple first horizontal lines (HL1, HL11, HL12, HL13, HL14, HL15 and HL16) can be used to drive multiple first light-emitting regions to third light-emitting regions (EA1, EA2 and EA3).

[0392] Each of the first horizontal lines (HL11, HL12, HL13, HL14, HL15 and HL16) may have at least one curved portion, such as at least one connecting portion, in the second optical region OA2 adjacent to the normal region NA.

[0393] By applying this structure, even when the first horizontal lines (HL11, HL12, HL13, HL14, HL15 and HL16) set in the normal region NA extend to the second optical region OA2, they can only overlap with the circuit region and light-emitting region (EA1, EA2 and EA3) of the second optical region OA2, and can not overlap with the second transmission region TA2.

[0394] like Figures 12 to 15 As shown, in addition to the multiple first horizontal lines (HL11, HL12, HL13, HL14, HL15 and HL16), the metal pattern 1010 disposed in the edge of the second optical region OA2 may also be included in the curved portion of the second optical region OA2 adjacent to the normal region NA.

[0395] Metal pattern 1010 can be used as electrode pattern 1011 overlapping with the electrodes of metal pattern 1010 and storage capacitor Cst.

[0396] In an embodiment, the anode electrode AE ​​of the organic light-emitting element ED of the second light-emitting region EA2, which overlaps with at least one of the first horizontal lines (HL11, HL12, HL13, HL14, HL15 and HL16) (HL14 and / or HL15), can be electrically connected to a transistor in an adjacent circuit region disposed in the normal region NA.

[0397] For example, such as Figure 12 and Figure 13 As shown, the anode electrode AE ​​of the organic light-emitting element ED of the second light-emitting region EA2 of the second optical region OA2 adjacent to the normal region NA can be connected to a circuit region that overlaps with another second light-emitting region EA2 disposed above the second light-emitting region EA2 of the second optical region OA2.

[0398] For example, a second light-emitting region EA2 disposed in the region in which the transistor has been removed may include an organic light-emitting element ED, and the anode electrode AE ​​of the organic light-emitting element ED may include an extension portion 920.

[0399] The extension portion 920 can be electrically connected to the transistor via a contact hole CNT in the circuit region CA of another second light-emitting region EA2 located above the second light-emitting region EA2 in the plan view.

[0400] The transistor electrically connected to the extension 920 may be one of the transistors used to drive another second light-emitting region EA2. For example, the extension 920 may be connected to a switching transistor included in a circuit region CA that overlaps with the other second light-emitting region EA2, but embodiments of this disclosure are not limited thereto.

[0401] In the implementation method, such as Figure 13 As shown, the anode electrode AE ​​of the organic light-emitting element ED disposed in the second light-emitting region EA2 can be electrically connected to the storage capacitor Cst located in the circuit region CA via the contact hole CNT through the extension portion 920. The circuit region CA overlaps with another second light-emitting region EA2 located above the second light-emitting region EA2.

[0402] The storage capacitor Cst electrically connected to the extension 920 can be electrically connected to a transistor in the second light-emitting region EA2 that is adjacent to the second light-emitting region EA2 where the organic light-emitting element ED of the extension 920 is disposed (i.e., another second light-emitting region EA2) for driving the second optical region OA2.

[0403] like Figure 12 As shown, a portion of the extension 920 may overlap with a portion of the second transmission region TA2 of the second optical region OA2.

[0404] It should be noted that the structure of the display panel 110 according to the embodiments of this disclosure is not limited thereto, and as... Figure 13 As shown, the extension 920 may not overlap with the second transmission region TA2 of the second optical region OA2.

[0405] In the implementation method, such as Figure 14 and Figure 15 As shown, the anode electrode AE ​​of the organic light-emitting element ED of the second light-emitting region EA2 of the second optical region OA2 adjacent to the normal region NA can be connected to the circuit region of another second light-emitting region EA2 located below or near the second optical region OA2.

[0406] In this embodiment, the anode electrode AE ​​of the organic light-emitting element ED disposed in the second light-emitting region EA2 in which the transistor has been removed may include an extension portion 920.

[0407] The extension portion 920 can be electrically connected to a transistor via a contact hole CNT in the circuit region CA of another second light-emitting region EA2, which is located below or near the second light-emitting region EA2 in the plan view. The transistor electrically connected to the extension portion 920 can be one of the transistors used to drive the other second light-emitting region EA2.

[0408] Reference Figures 12 to 15 In the organic light-emitting element ED located in the light-emitting region EA in the second optical region OA2, the length of the extension portion 920 connected to the adjacent circuit region CA (excluding the circuit region CA) located below or near the organic light-emitting element ED can vary for each location.

[0409] Reference Figures 11 to 15 When the display panel 110 is viewed from the front, each of the first horizontal lines (HL11, HL12, HL13, HL14, HL15 and HL16) has at least one curved portion on the left and / or right edge of the second optical region OA2 relative to the extending direction of the first horizontal lines (HL11, HL12, HL13, HL14, HL15 and HL16), so that the second transmission region TA2 of the second optical region OA2 and the first horizontal lines (HL11, HL12, HL13, HL14, HL15 and HL16) do not overlap, which makes it possible to improve the transmittance of the second transmission region TA2.

[0410] Furthermore, since the transistors for driving one or more light-emitting regions EA are removed from the left and / or right edges of the second optical region OA2, and one or more circuit elements of another adjacent light-emitting region EA are shared, the transmittance reduction caused by the transistors can be reduced or eliminated, and thus the transmittance of the second optical region OA2 can be improved.

[0411] Figure 16 It is based on all aspects of this disclosure. Figure 12 The cross-sectional view taken from line EF.

[0412] Figure 16 An example cross-sectional structure of the light-emitting region and the circuit region in the optical region provided in the display panel 110 according to various aspects of the present disclosure is illustrated.

[0413] For ease of description, the following discussion is based on Figure 16 The cross-sectional structure is the second optical region OA2 in the figure discussed above, and Figure 12 The embodiments of the present disclosure are provided as an example of the cross-sectional structure of the second optical region OA2, but are not limited thereto. For example, the first optical region OA1 in the figures discussed above may have Figure 16 The structure.

[0414] In the following description, for ease of description, some structures, effects, etc. of the implementation methods or examples discussed above may not be repeated.

[0415] However, it should be understood that the scope of this disclosure includes the omitted constructions discussed above. Furthermore, in the following description, similar reference numerals will be used for constructions or elements that are the same, substantially or nearly identical to, those in the above embodiments or examples.

[0416] Reference Figure 16 According to various aspects of this disclosure, the second optical region OA2 of the display panel 110 may include a light-emitting region EA (e.g., the second light-emitting region EA2 discussed above) and a circuit region CA overlapping the light-emitting region EA.

[0417] like Figure 14 As shown, the second luminescent region EA2 may overlap with at least one first horizontal line (HL14, HL15 and HL16).

[0418] For example, a multi-buffer layer MBUF can be disposed on a substrate SUB, and a first active buffer layer ABUF1 can be disposed on the multi-buffer layer MBUF.

[0419] The second active buffer layer ABUF2 and the gate insulating layer GI can be sequentially disposed on the first active buffer layer ABUF1.

[0420] Multiple first horizontal lines (HL11, HL12, HL13 and HL15) can be configured to be spaced apart from each other on the gate insulating layer GI.

[0421] The first interlayer insulating layer ILD1 can be disposed on the gate insulating layer GI, which has multiple first horizontal lines (HL11, HL12, HL13 and HL15).

[0422] Metallic pattern 1010 and at least one first horizontal line HL14 may be disposed on the first interlayer insulating layer ILD1. Metallic pattern 1010 and first horizontal line HL14 disposed in the same layer may be disposed spaced apart from each other.

[0423] The second interlayer insulation layer ILD2 can be disposed on the first interlayer insulation layer ILD1, which has a metal pattern 1010 and at least one first horizontal line HL14.

[0424] At least one first horizontal line HL16 may be provided on the second interlayer insulation layer ILD2.

[0425] The passivation layer PAS0, the first planarization layer PLN1, and the second planarization layer PLN2 can be sequentially disposed on the second interlayer insulating layer ILD2, which has at least one first horizontal line HL16 disposed thereon.

[0426] The anode electrode AE ​​of an organic light-emitting element ED, such as an organic light-emitting diode (OLED), can be disposed on the second planarization layer PNL2.

[0427] A bank for covering a portion of the anode electrode AE ​​of the organic light-emitting element ED can be disposed on the second planarization layer PNL2.

[0428] The region corresponding to the second light-emitting region EA2 can be the region where the dam BANK and the anode electrode AE ​​of the organic light-emitting element ED do not overlap.

[0429] A portion of the anode electrode AE ​​can be exposed through an opening (open portion) in the dam bank. The light-emitting layer EL can be disposed on the side surface of the dam bank and in the opening (open portion) of the dam bank. All or at least a portion of the light-emitting layer EL can be located between adjacent dams.

[0430] In the opening of the dam BANK, the light-emitting layer EL can contact the anode electrode AE. The cathode electrode CE can be disposed on the light-emitting layer EL.

[0431] As described above, a light-emitting element ED can be formed by including an anode electrode AE, a light-emitting layer EL, and a cathode electrode CE. The light-emitting layer EL may include a layer of organic material.

[0432] like Figure 16 As shown, the second light-emitting region EA2 disposed in the second optical region OA2 may overlap with the first horizontal line, but may not overlap with one or more transistors used to drive the second light-emitting region EA2.

[0433] As described above, in order to improve the transmittance of the second optical region OA2, although one or more transistors used to drive the second light-emitting region EA2 are removed, in order to drive such... Figure 14 The diagram shows one or more organic light-emitting elements ED, and the second light-emitting region EA2 needs to be electrically connected to another circuit region.

[0434] To achieve the above objectives, refer to Figure 14The anode electrode AE ​​disposed in the second light-emitting region EA2 can extend along the second planarization layer PLN2 and be connected to the second source-drain electrode pattern SD2 of another adjacent circuit region CA in the second optical region OA2 through the contact hole CNT.

[0435] although Figure 14 Not shown, but the second source-drain electrode pattern SD2 can be electrically connected to the anode electrode AE ​​disposed in the two light-emitting regions EA2.

[0436] The encapsulation layer ENCAP can be placed on the stack of light-emitting elements (EDs).

[0437] Figures 11 to 16 The following structure has been illustrated: wherein the anode electrode AE ​​of the organic light-emitting element ED disposed in each of one or more second light-emitting regions EA2 included in the second optical region OA2 includes an extension 920 electrically connected to a circuit region of another second light-emitting region EA2 adjacent to one or more second optical regions OA2, but embodiments of the present disclosure are not limited thereto.

[0438] For example, the anode electrode AE ​​of the organic light-emitting element ED disposed in each of one or more of the first light-emitting region EA1 and the third light-emitting region EA3 included in the second optical region OA2 may include an extension portion 920.

[0439] The display device 100 according to various aspects of this disclosure may include: a display panel including a display area DA and a non-display area NDA, the display area DA including a second optical area OA2 and a normal area NA located outside the second optical area OA2, and the display panel including a plurality of signal lines. The second optical area OA2 may include a plurality of light-emitting areas EA and a plurality of second transmissive areas TA2, and the normal area NA may include a plurality of light-emitting areas EA. The plurality of signal lines include a plurality of first horizontal lines HL1 extending from the normal area NA to the second optical area OA2, and at least one of the plurality of first horizontal lines HL1 may include a first portion 511, a second portion 512, and a connecting portion 513 disposed between the first portion 511 and the second portion 512. The connecting portion 513 may be a portion extending in a direction intersecting the horizontal direction and located in the second optical area OA2 (e.g., a portion of the second optical area OA2 adjacent to the normal area NA).

[0440] The display device may include a second optical electronic device 12 located below or in the lower part of the display panel 110 and overlapping at least a portion of the second optical region OA2 included in the display region DA.

[0441] One or more of the multiple first horizontal lines HL1 may not overlap with the second transmission region TA2.

[0442] The connecting portion 513 can extend in a direction that is inclined relative to the horizontal direction within an angle range of greater than or equal to -90° and less than 0°.

[0443] In this embodiment, the first portion 511 of the first horizontal line HL1 can be set in the normal region NA, and the second portion 512 of the first horizontal line HL1 can be set in the second optical region OA2. In the plan view, the second portion 512 can be placed at a lower position than the first portion 511.

[0444] The connecting portion 513 can extend in a direction that is inclined relative to the horizontal direction within an angle range of greater than 0° and less than or equal to 90°.

[0445] In this embodiment, the first portion 511 of the first horizontal line HL1 can be set in the normal region NA, and the second portion 512 of the first horizontal line HL1 can be set in the second optical region OA2. In the plan view, the second portion 512 can be placed at a higher position than the first portion 511.

[0446] The second optical region OA2 may include at least one light-emitting region EA that overlaps with the connecting portion 513 of at least one first horizontal line HL1.

[0447] The light-emitting area EA that overlaps with the connecting portion 513 may not overlap with the circuit area CA used to drive the light-emitting area EA, and the light-emitting area EA that does not overlap with the connecting portion 513 may overlap with the circuit area CA used to drive the light-emitting area EA.

[0448] The anode electrode AE ​​of the organic light-emitting diode ED that overlaps with the light-emitting region EA of the connection portion 513 may include an extension portion 920.

[0449] The extension 920 can be electrically connected to the circuit region CA for driving another light-emitting region EA in the second optical region OA2.

[0450] The display area DA may also include a first optical area OA1, which is different from the second optical area OA2 and the normal area NA. The display device may also include a first optoelectronic device 11, which is located below or in the lower part of the display panel and overlaps with at least a portion of the first optical area OA1. The normal area NA may or may not be located between the first optical area OA1 and the second optical area OA2.

[0451] The first optical region OA1 may include multiple light-emitting regions and multiple first transmission regions TA1, and the connecting portion 513 of the first horizontal line HL1 may be disposed in the first optical region OA1 (e.g., a portion of the first optical region OA1 adjacent to the normal region NA).

[0452] In one embodiment, the first optical electronic device 11 may be a camera, while the second optical electronic device 12 may be a sensor, such as a proximity sensor or an illuminance sensor. In another embodiment, the second optical electronic device 12 may be a camera, while the first optical electronic device 11 may be a sensor, such as a proximity sensor or an illuminance sensor.

[0453] The transmittance of the first optical region OA1 can be greater than or equal to the transmittance of the second optical region OA2.

[0454] The display panel may also include a cathode electrode CE, which is disposed in the multiple light-emitting regions EA included in the normal region NA and the first optical region OA1, but not in the multiple transmission regions TA1 in the first optical region OA1.

[0455] The multiple signal lines also include at least one second horizontal line HL2 disposed in the normal region NA. The first horizontal line HL1 and the second horizontal line HL2 are signal lines used to transmit the same type of signal. The length of the first horizontal line HL1 may be longer than the length of the second horizontal line HL2, and the resistance-capacitance (RC) value of the second horizontal line HL2 may be the same as the RC value of the first horizontal line HL1.

[0456] The display panel according to various aspects of this disclosure may include a substrate SUB, the substrate SUB including a display area DA and a non-display area NDA, the display area DA including a second optical area OA2 that at least partially overlaps with a second optical electronic device 12 located below the substrate SUB and a normal area NA located outside the second optical area OA2, and the display panel including a plurality of signal lines disposed on the substrate SUB.

[0457] The second optical region OA2 may include multiple light-emitting regions EA and multiple second transmission regions TA2, and the normal region NA may include multiple light-emitting regions EA. Multiple signal lines may include multiple first horizontal lines HL1. One or more of the multiple light-emitting regions EA of the normal region NA and one or more of the multiple light-emitting regions EA of the second optical region OA2 may be arranged in the same row. One or more light-emitting regions EA of the normal region NA and one or more light-emitting regions EA of the second optical region OA2 arranged in the same row may share one or more of the multiple first horizontal lines. Each of the one or more first horizontal lines HL1 shared by one or more light-emitting regions EA of the normal region NA and one or more light-emitting regions EA of the second optical region OA2 may include a first portion 511, a second portion 512, and a connecting portion 513 disposed between the first portion and the second portion. The connecting portion 513 may be a portion extending in a direction intersecting the horizontal direction and located in the second optical region OA2 (e.g., a portion of the second optical region OA2 adjacent to the normal region NA).

[0458] The above description is presented to enable any person skilled in the art to make and use the invention, and is provided in the context of a particular application and its requirements. Various modifications, additions, and substitutions to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of the invention. Although exemplary embodiments have been described for illustrative purposes, those skilled in the art will understand that various modifications and applications can be made without departing from the essential characteristics of this disclosure. For example, various modifications can be made to specific components of the exemplary embodiments. The above description and drawings provide examples of the technical concepts of the invention for illustrative purposes only. That is, the disclosed embodiments are intended to illustrate the scope of the technical ideas of this disclosure. Therefore, the scope of this disclosure is not limited to the embodiments shown, but is to be accorded the widest scope consistent with the claims. The scope of protection of this disclosure should be interpreted according to the claims, and all technical concepts within the scope of the claims should be interpreted as being included within the scope of the invention.

[0459] Cross-references to related applications

[0460] This application claims priority to Korean Patent Application No. 10-2021-0169839, filed with the Korean Intellectual Property Office on December 1, 2021, which is incorporated herein by reference in its entirety.

Claims

1. A display device, the display device comprising: The display panel includes multiple light-emitting areas; as well as A first optical electronic device is located below the display panel. In addition to the light-emitting area, the first optical display area of ​​the display panel that overlaps with the first optical electronic device also includes multiple first light-transmitting areas in the first optical display area. The non-overlapping display area of ​​the display panel that does not overlap with the first optical electronic device includes the light-emitting area but excludes the first light-transmitting area. Among them, multiple first horizontal lines used to control the light-emitting area extend horizontally through the non-overlapping display area and the first optical display area. The non-overlapping display area and the light-emitting area included in the first optical display area are arranged in the same row. The same first horizontal line controls the light-emitting areas arranged in the same row in both the non-overlapping display area and the first optical display area. The identical first horizontal line includes a first portion extending horizontally through the non-overlapping display area, a second portion extending horizontally through the first optical display area, and a connecting portion located in the first optical display area and connecting the first portion and the second portion. The connecting portion is at an angle relative to the first portion and the second portion, such that the second portion is offset upward or downward from the first portion.

2. The display device according to claim 1, wherein The connecting portion is located in the part of the first optical display area adjacent to the non-overlapping display area.

3. The display device according to claim 1, wherein The display panel includes a substrate, a planarization layer, and an encapsulation layer, and The first light-transmitting region includes a recess that is recessed downward toward the rear surface of the display device in at least one of the substrate, the planarization layer, and the encapsulation layer.

4. The display device according to claim 1, wherein The first horizontal line bypasses the outer surface of the first light-transmitting area when it passes through the first optical display area.

5. The display device according to claim 1, wherein The connecting portion is tilted relative to the first portion and the second portion within an angle range greater than or equal to -90° and less than 0°, such that the second portion is offset downward from the first portion.

6. The display device according to claim 1, wherein The connecting portion is tilted relative to the first portion and the second portion in an angle range greater than 0° and less than or equal to -90°, such that the second portion is offset upward from the first portion.

7. The display device according to claim 1, wherein The first part and the second part extend parallel to each other.

8. The display device according to claim 1, wherein The edge-emitting region at the edge of the first optical display area overlaps with the connecting portion of the first horizontal line.

9. The display device of claim 8, wherein, The edge light-emitting area does not overlap with the circuit area used to drive other light-emitting areas in another row, and The other light-emitting areas overlap with the circuit area.

10. The display device of claim 9, wherein, At least one edge-emitting region at the edge of the first optical display area is an organic light-emitting diode with an anode electrode, the anode electrode comprising an extension at the edge of the first optical display area extending to another light-emitting region emitting a second color.

11. The display device of claim 10, wherein, The extension is electrically connected to the circuit region used to drive the other luminescent region emitting the second color.

12. The display device according to claim 10, further comprising: A second optical electronic device is located below the display panel. The second optical display area of ​​the display panel that overlaps with the second optical electronic device includes, in addition to the light-emitting area, multiple second light-transmitting areas. The non-overlapping display area is disposed between the first optical display area and the second optical display area.

13. The display device of claim 12, wherein, The first optical electronic device is a camera, and the second optical electronic device is a sensor. The transmittance of the first optical display area is greater than that of the second optical display area.

14. The display device of claim 12, wherein, The connecting portion is located in the part of the second optical display area adjacent to the non-overlapping display area.

15. The display device of claim 12, wherein, The display panel further includes a cathode electrode disposed in the light-emitting area of ​​the non-overlapping display area and the second optical display area, but not disposed in the second light-transmitting area of ​​the second optical display area.

16. The display device of claim 1, wherein, The signal lines also include multiple second horizontal lines disposed in the non-overlapping display area. The first horizontal line and the second horizontal line send the same type of control signal, and The length of the first horizontal line is longer than the length of the second horizontal line, and the RC value of the second horizontal line is the same as the RC value of the first horizontal line.

17. A display panel, the display panel comprising: A substrate, the substrate being divided into a first optical display region, which is arranged to overlap with a first optical electronic device disposed below the substrate and includes a plurality of light-emitting elements and a first light-transmitting region, and further divided into a non-overlapping display region that does not overlap with the first optical electronic device, wherein the non-overlapping display region includes a plurality of light-emitting elements but does not include the first light-transmitting region; and Multiple first horizontal lines extend horizontally across the non-overlapping display area and the first optical display area on the substrate to control the multiple light-emitting elements. In this configuration, the light-emitting elements in the non-overlapping display area are arranged in the same row as the light-emitting elements in the first optical display area. In this context, the same first horizontal line controls the light-emitting elements arranged in the same row in both the non-overlapping display area and the first optical display area. The identical first horizontal line includes a first portion extending horizontally through the non-overlapping display area, a second portion extending horizontally through the first optical display area, and a connecting portion located in the first optical display area and connecting the first portion and the second portion. The connecting portion is at an angle relative to the first portion and the second portion, such that the second portion is offset upward or downward from the first portion.

18. The display panel of claim 17, wherein, The first horizontal line bypasses the outer surface of the first light-transmitting area when it horizontally crosses the first optical display area.

19. The display panel of claim 17, wherein, The substrate is further divided into a second optical display area that overlaps with a second optical electronic device disposed below the substrate. The second optical display area, in addition to the light-emitting element, also includes multiple second light-transmitting areas, and The non-overlapping display area is disposed between the first optical display area and the second optical display area.

20. The display panel of claim 19, wherein, The first optical electronic device is a camera, and the second optical electronic device is a sensor. The transmittance of the first optical display area is greater than that of the second optical display area.