Semiconductor device and method of manufacturing the same

Abstract

A method of manufacturing a semiconductor device according to the present application includes: (A) a step of arranging a first chip on a substrate; (B) a step of arranging a plurality of raised pieces on the substrate and around the first chip or around a region where the first chip is to be arranged; (C) a step of preparing a chip with an adhesive sheet, the chip with an adhesive sheet having a second chip and an adhesive sheet provided on one face of the second chip; and (D) a step of applying a pressing force to the chip with an adhesive sheet in a direction of the substrate so that at least a part of the first chip and the raised pieces are embedded in the adhesive sheet.

Description

Technical Field

[0001] This invention relates to a semiconductor device and a method for manufacturing the same. Background Technology

[0002] With the increasing multifunctionality of electronic devices, stacked MCPs (Multi-Chip Packages) that achieve high capacity through multi-segment stacked semiconductor elements have become widespread. Examples of stacked MCPs include wire-embedded and chip-embedded semiconductor packages. The adhesive film used to manufacture wire-embedded semiconductor packages is called FOW (Film Over Wire). The adhesive film used to manufacture chip-embedded semiconductor packages is called FOD (Film Over Die). As an example of a chip-embedded semiconductor package, a method is known in which a controller chip is positioned at the bottom segment and embedded in a film-like adhesive (see Patent Document 1).

[0003] Previous technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2014-175459 Summary of the Invention

[0006] The technical problem to be solved by the invention

[0007] However, with the further miniaturization and thinning, as well as the increasing multifunctionality and speed of embedded semiconductor devices, there is a tendency for the area of ​​the controller chip to increase while the area of ​​the chips stacked on top of it decreases. That is, there is a tendency for the area occupied by the controller chip relative to the stacked chips to increase. Furthermore, there is a tendency to require further thinning of the stacked chips. With these trends, the following problems become more apparent.

[0008] • After crimping, a gap remains around the controller chip (creating a void).

[0009] • The adhesive used to embed the controller chip is exudated onto the substrate (resulting in exudation).

[0010] • Due to insufficient removal of resin from the controller chip, the chip mounted on it warped along its convex surface (causing bowing). Additionally, cry warpage refers to the chip warping upwards (see reference). Figure 12 (d)).

[0011] A certain degree of voids can be eliminated through the pressure curing process after lamination, but if the voids are too large, they may be impossible to eliminate. Voids may cause delamination between the chip and the substrate or cracking of the package during reflow. Exudation can contaminate surrounding wire bonding pads or chips, potentially causing reduced bonding linearity. Bending makes multi-segment chip stacking difficult, or residual stress may cause semiconductor component delamination.

[0012] To address these issues, various improvements have been made to the composition of the adhesive film to control its flowability. However, if the film is made highly fluid to reduce voids and bends after pressing, there is a tendency for increased exudation. On the other hand, if the film is made less fluid to reduce exudation, it leads to increased voids and bends. Thus, there is a trade-off between voids / bends and exudation, and improvements in materials alone are insufficient to resolve these problems. Furthermore, changes in process conditions such as pressing temperature or pressing load, for example, tend to reduce voids while increasing exudation during high-temperature, high-load pressing, make it difficult to simultaneously improve the aforementioned issues.

[0013] The present invention was made in view of the above-mentioned circumstances, and provides a method for manufacturing a semiconductor device that uses a chip embedding adhesive film (FOD) and can sufficiently suppress the generation of voids, leakage, and bending. Furthermore, the present invention provides a semiconductor device with excellent reliability that sufficiently suppresses the generation of voids, leakage, and bending during the manufacturing process.

[0014] means for solving technical problems

[0015] A method for manufacturing a semiconductor device according to one aspect of the present invention includes the following steps.

[0016] (A) The process of mounting the first chip on a substrate.

[0017] (B) A process of arranging a plurality of height-adjustable sheets on a substrate and around the first chip or around the area where the first chip is to be arranged.

[0018] (C) A process of preparing a chip with an adhesive sheet, wherein the chip with an adhesive sheet comprises a second chip and an adhesive sheet disposed on one side of the second chip.

[0019] (D) A process of applying pressure to a chip with an adhesive sheet along the direction of a substrate so that at least a portion of the first chip and the heightening sheet are embedded in the adhesive sheet.

[0020] In addition, (A), (B) and (C) can be performed in any combination or order.

[0021] The inventors, through their research on methods for suppressing voids, leakage, and bending during the manufacturing process of semiconductor devices, discovered that voids and leakage are caused by bending during the process of pressing a first chip onto a second chip. Figure 12 (a)~ Figure 12 (f) is a schematic cross-sectional view showing the conventional process of pressing the controller chip into the chip. Figure 12 (a) shows a state in which a substrate 10 is disposed on a heating plate H and a controller chip Tc (first chip) is fixed to the substrate 10 by an adhesive sheet Ac. Furthermore, a chip 31 with an adhesive sheet (a laminate of adhesive sheet A1 and chip T1 (second chip)) is disposed above the controller chip Tc and is ready for pressing. Figure 12 (b) shows the state in which the upper surface of the controller chip Tc is in contact with the lower surface of the adhesive sheet A1. Figure 12 (c) shows the state where the adhesive sheet A1 begins to melt on the upper surface of the controller chip Tc. Figure 12 (d) shows that chip T1 has bent. Figure 12 (e) shows the state in which the edge portion of the adhesive sheet A1 is in contact with the surface of the substrate 10. Figure 12 (f) shows the state where the thermal bonding of chip T1 has ended. For example... Figure 12 As shown in (f), while chip T1 undergoes bending (convex surface warping), voids V and seepage B are generated in adhesive sheet A1. In contrast, as... Figure 13 (a)~ Figure 13 As shown in (c), the inventors have made the following new discovery: if chip T1 does not bend, it is also possible to suppress voids and leakage.

[0022] (B) In the process, the lift sheet disposed on the substrate is used to suppress the bending of the second chip. (D) In ​​the process, the bending of the second chip can be suppressed by applying pressure to the chip with the adhesive sheet along the direction of the substrate, so that at least a portion of the first chip and the lift sheet are embedded in the adhesive sheet (see reference). Figure 9 This also helps to suppress the formation of voids and seepage.

[0023] From the viewpoint of effectively implementing step (B), a transfer film comprising a substrate film and a plurality of raised sheets disposed on the surface of the substrate film can be used. That is, step (B) may include the process of transferring the plurality of raised sheets disposed on the surface of the substrate film to the surface of the substrate.

[0024] As described above, a certain degree of voids can be eliminated through a pressure curing process following pressing. That is, when the adhesive sheet is formed from a thermosetting resin composition, a process of curing the adhesive sheet by heating under a pressurized atmosphere can be performed after step (D). By performing this process, voids can be further reduced.

[0025] According to the research of the inventors, when the shape of the second chip is rectangular in top view and the ratio of the length B of the long side to the length A of the short side is B / A or more, in conventional pressing methods, the bending of the second chip easily leads to open gaps and leakage. Since open gaps cannot be eliminated even after the pressure curing process described above, they should be avoided. In contrast, according to the manufacturing method of the present invention, even if the shape of the second chip is rectangular in top view and the ratio of the length B of the long side to the length A of the short side is B / A or more, since the heightening sheet in step (D) suppresses the downward bending of the short side of the second chip, the bending of the second chip is also suppressed, thereby suppressing open gaps and leakage.

[0026] One aspect of the present invention relates to a semiconductor device comprising a substrate, a first chip disposed on the substrate, a plurality of raised sheets disposed on the substrate and surrounding the first chip, an adhesive sheet having at least a portion of the first chip and the raised sheets embedded therein, and a second chip disposed such that it covers the first chip while being adhered to the adhesive sheet.

[0027] For example, the semiconductor device described above is manufactured using the manufacturing method described above. During the manufacturing process, the semiconductor device effectively suppresses the generation of voids, leakage, and bending, thus exhibiting excellent reliability.

[0028] In the aforementioned semiconductor device, the second chip can be separated from multiple height-adjusting sheets, and an adhesive (the aforementioned adhesive sheet) is filled between the second chip and the multiple height-adjusting sheets. Furthermore, the second chip can also be separated from the first chip, and an adhesive (the aforementioned adhesive sheet) is filled between the second chip and the first chip.

[0029] For example, the heightening sheet has a multilayer structure including a dummy chip and an adhesive sheet. The heightening sheet may have a multilayer structure including a pair of surface layers formed from a cured thermosetting resin composition and an intermediate layer disposed between the pair of surface layers. The heightening sheet may be a two-layer structure having a first layer and a second layer. For example, the second layer is an adhesive sheet, which may be composed of a cured thermosetting resin composition. Alternatively, the first layer can be equivalent to the aforementioned intermediate layer.

[0030] The first chip can be connected to the substrate wires or via flip-chip bonding.

[0031] Invention Effects

[0032] According to the present invention, a method for manufacturing a semiconductor device using a chip embedding adhesive film (FOD) is provided, which can sufficiently suppress the generation of voids, leakage, and bending. Furthermore, according to the present invention, a semiconductor device with excellent reliability is provided, which sufficiently suppresses the generation of voids, leakage, and bending during the manufacturing process. Attached Figure Description

[0033] Figure 1 This is a schematic cross-sectional view illustrating one embodiment of the semiconductor device involved in the present invention.

[0034] Figure 2 (a) and Figure 2 (b) is a plan view illustrating an example of the positional relationship between the chip and multiple height-adjustable plates.

[0035] Figure 3 (a) is a plan view schematically illustrating an example of a laminated film used to fabricate a heightening sheet. Figure 3 (b) is along Figure 3 (a) is a sectional view cut by the bb line.

[0036] Figure 4 This schematically illustrates the bonding of the pressure-sensitive adhesive layer and... Figure 3 (b) is a cross-sectional view of the process of the laminated film shown.

[0037] Figure 5 (a)~ Figure 5 (d) is a cross-sectional view schematically showing the manufacturing process of the heightening plate.

[0038] Figure 6 (a) and Figure 6 (b) is a cross-sectional view schematically showing examples of chips with adhesive sheets.

[0039] Figure 7 It is a schematic representation of manufacturing. Figure 1 A cross-sectional view of the process of the semiconductor device shown.

[0040] Figure 8 It is a schematic representation of manufacturing. Figure 1 A cross-sectional view of the process of the semiconductor device shown.

[0041] Figure 9 It is a schematic representation of manufacturing. Figure 1 A cross-sectional view of the process of the semiconductor device shown.

[0042] Figure 10 It is a schematic representation of manufacturing. Figure 1 A cross-sectional view of the process of the semiconductor device shown.

[0043] Figure 11 This is a cross-sectional view schematically illustrating an example of a transfer film used when a heightening sheet is disposed on the surface of a substrate.

[0044] Figure 12 (a)~ Figure 12 (f) is a schematic cross-sectional view showing the conventional hot pressing process.

[0045] Figure 13 (a)~ Figure 13 (c) is a schematic cross-sectional view showing that gaps and leakage are suppressed when no bending occurs on the crimped chip. Detailed Implementation

[0046] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments. In the following embodiments, the constituent elements (including steps, etc.) are not essential unless specifically stated otherwise. In the following description, the same or corresponding parts are labeled with the same symbols, and repeated descriptions are omitted. Furthermore, unless otherwise specified, the positional relationships such as up, down, left, and right follow the positional relationships shown in the drawings. The sizes of the constituent elements in each drawing are conceptual, and the scale of the drawings is not limited to the illustrated scale.

[0047] The numerical values ​​and their ranges in this specification do not limit the invention. In this specification, the numerical range represented by "~" indicates the range included by the numerical values ​​before and after "~" as the minimum and maximum values, respectively. In the numerical ranges described in stages in this specification, the upper or lower limit value described in one numerical range can be replaced by the upper or lower limit value of other numerical ranges described in stages.

[0048] <First Implementation>

[0049] [Semiconductor Devices]

[0050] Figure 1 This is a schematic cross-sectional view of a semiconductor device according to this embodiment. For example, the semiconductor device 100 shown in this figure is a three-dimensional NAND type memory. The semiconductor device 100 includes a substrate 10; a controller chip Tc (first chip) disposed on the surface of the substrate 10; a plurality of raised sheets R disposed around the controller chip Tc on the substrate 10; an adhesive sheet A1 embedded with the entire controller chip Tc and at least a portion of the raised sheets R; a chip T1 (second chip) disposed such that it covers the controller chip Tc while being adhered to the adhesive sheet A1; five chips T2, T3, T4, T5, and T6 stacked on the surface of chip T1; wires Wa and Wb electrically connecting electrodes 10a and 10b on the surface of the substrate 10 to the chips; and a sealing layer 50 enclosing these. An adhesive sheet A2 is disposed between chip T1 and chip T2. An adhesive sheet A3 is disposed between chip T2 and chip T3. An adhesive sheet A4 is disposed between chip T3 and chip T4. An adhesive sheet A5 is disposed between chip T4 and chip T5. An adhesive sheet A6 is disposed between chip T5 and chip T6.

[0051] The substrate 10 can be an organic substrate or a metal substrate such as a lead frame. From the viewpoint of suppressing warping of the semiconductor device 100, the thickness of the substrate 10 can be, for example, 90 to 300 μm, or 90 to 210 μm.

[0052] The controller chip Tc is bonded to the substrate 10 via an adhesive sheet Ac and electrically connected to the electrode 10a via a wire Wa. When viewed from above, the controller chip Tc has a rectangular (square or rectangular) shape, for example. The length of one side of the controller chip Tc is, for example, less than 5 mm, but can also be 2–5 mm or 1–5 mm. The thickness of the controller chip Tc is, for example, 20–150 μm, but can also be 30–100 μm. The thickness of the adhesive sheet Ac is, for example, 5–40 μm, but can also be 10–25 μm. The combined thickness of the controller chip Tc and the adhesive sheet Ac (the distance from the upper surface of the substrate 10 to the upper surface of the controller chip Tc) is, for example, 25–190 μm, but can also be 40–125 μm.

[0053] The heightening plate R is disposed around the controller chip Tc on the substrate 10. The heightening plate R plays a role in suppressing the bending of the chip T1 when it is pressed together (see reference). Figure 9 The heightening plate R in this embodiment has a three-layer structure including a pair of surface layers R1, R2 and an intermediate layer R2 disposed between them. The length of one side of the heightening plate R when viewed from above is, for example, less than 12 mm, or it can be 2 to 10 mm or 3 to 8 mm.

[0054] The overall thickness of the lifting plate R should be equal to the sum of the thickness of the controller chip Tc and the adhesive sheet Ac, for example, 25–190 μm, or 40–125 μm or 40–115 μm. The ratio of the overall thickness of the lifting plate R to the sum of the thickness of the controller chip Tc and the adhesive sheet Ac is, for example, 0.8–1.2, or 0.9–1.1, or 0.5–1.2, or 0.8–1.1. Within these ratio ranges, a sufficiently uniform pressing force can be applied to chip T1 during the pressing process (see reference). Figure 9 Therefore, bending of chip T1 can be suppressed, which in turn suppresses voids and leakage. This ratio can be less than 1.0, or below 0.95 or 0.90. By making the wafer R relatively thin, leakage of adhesive sheet A1 onto the surface of the wafer R can be suppressed. Adhesive sheet A1 that leaks onto the surface of the wafer R may contaminate the wire bonding pads (not shown) of chip T1 in subsequent processes, potentially reducing the reliability of wire bonding.

[0055] The thickness of surface layer R1 is, for example, 5–40 μm or 5–50 μm, or 5–25 μm or 5–20 μm. The thicknesses of the two surface layers R1 can be the same or different. Surface layer R1 is formed from a thermosetting resin composition. The thermosetting resin composition can pass through a semi-cured state (stage B) and then undergo a subsequent curing process to become a fully cured product (stage C). The thermosetting resin composition includes epoxy resin, a curing agent, and an elastomer (e.g., acrylic resin), and may further include inorganic fillers and curing accelerators as needed. The compositions of the two surface layers R1 can be the same or different.

[0056] The thickness of the intermediate layer R2 is, for example, 5–75 μm or 5–90 μm, or 10–75 μm or 10–50 μm. The intermediate layer R2 is preferably formed of a material with sufficiently high mechanical strength. Specific examples of materials include resins such as polyimide and polyethylene terephthalate (PET), and metals such as copper and aluminum. The tensile modulus of elasticity of the material constituting the intermediate layer R2 is, for example, 8.0 MPa or more, or 9.0 MPa or more, or 10.0 MPa or more. Furthermore, when the intermediate layer R2 is formed of a resin material, it is composed of a material different from the resin material constituting the surface layer R1. By having multiple layers formed of different materials, the raised sheet can share functions, achieving higher functionality compared to multiple layers formed of the same material.

[0057] like Figure 2 As shown in (a), two heightening plates R (rectangular in shape) can be positioned corresponding to the short side of chip T1 when viewed from above, as follows: Figure 2 As shown in (b), a raised piece R (shape: square, a total of 4) can also be arranged at positions corresponding to the corners of the chip T1 when viewed from above. From the viewpoint of suppressing exudation, it is preferable that the multiple raised pieces R are not completely covered by the chip T1, that is, it is preferable that each raised piece R is arranged in such a way that a portion of each raised piece R protrudes outward from the chip T1 when viewed from above. Preferably, the four corners of the chip T1 cover at least a portion of each raised piece R in a balanced manner. With this structure, both bending and exudation can be further and sufficiently suppressed.

[0058] (Method for making height-enhancing films)

[0059] An example of the manufacturing method for the height-enhancing film R is explained. Additionally, Figure 1 The surface layer R1 shown is the cured thermosetting resin composition constituting the surface layer. On the other hand, surface layer S1 and surface layer P1 obtained by monolithizing them are substances in their state before the thermosetting resin composition contained therein is fully cured (see reference). Figure 3 (b) and Figure 5 (b)).

[0060] First, prepare Figure 3 (a) and Figure 3 (b) shows the laminated film 20. The laminated film 20 includes a substrate film 1, a pressure-sensitive adhesive layer 2, and a three-layer film 15F. The substrate film 1 is, for example, a polyethylene terephthalate film (PET film). The pressure-sensitive adhesive layer 2 is formed into a circular shape by perforation or the like (see reference). Figure 3 (a)). The pressure-sensitive adhesive layer 2 is formed, for example, by a UV-curable pressure-sensitive adhesive. This pressure-sensitive adhesive layer 2 has the property that its adhesiveness decreases when exposed to ultraviolet light. The three-layer film 15F is formed into a circle by perforation or the like, and has a smaller diameter than the pressure-sensitive adhesive layer 2 (see reference). Figure 3 (a)).

[0061] The three-layer film 15F consists of a pair of surface layers S1, S2 (formed from thermosetting resin layers) and an intermediate layer M sandwiched between them. The thickness of the surface layer S1 is substantially the same as that of the aforementioned surface layer R1, for example, 5 to 40 μm, or 5 to 25 μm or 5 to 20 μm. The thickness of the intermediate layer M is the same as that of the aforementioned intermediate layer R2, for example, 5 to 75 μm, or 10 to 75 μm or 10 to 50 μm. The tensile modulus of the intermediate layer M is, for example, 8.0 MPa or more, or 9.0 MPa or more or 10.0 MPa or more. Because the tensile modulus of the intermediate layer M is 8.0 MPa or more, in the process of picking up the heightening sheet R (see reference...). Figure 5 (d) The intermediate layer R2 acts like a spring plate, enabling excellent pick-up performance. Furthermore, considering the availability of materials, the upper limit of the tensile modulus of the intermediate layer M is approximately 15 MPa. Examples of materials constituting the intermediate layer M include polyimide and polyethylene terephthalate (PET). To ensure the tensile modulus is within the aforementioned range, the intermediate layer M can be a layer formed from a thermosetting resin composition or a photocurable resin composition that has undergone curing treatment.

[0062] For example, the laminated film 20 can be manufactured by laminating a first laminated film having a substrate film 1 and a pressure-sensitive adhesive layer 2 on its surface with a second laminated film having a cover film 3 and a three-layer film 15F on its surface (see reference). Figure 4The first laminate can be obtained through the following steps: forming a pressure-sensitive adhesive layer by coating it onto the surface of the substrate film 1, and processing the pressure-sensitive adhesive layer into a predetermined shape (e.g., circular) by perforation or the like. The second laminate can be obtained through the following steps: forming a surface layer S1 by coating it onto the surface of the cover film 3 (e.g., PET film or polyethylene film), forming an intermediate layer M on the surface of the surface layer S1, forming the surface layer S1 by coating it onto the surface of the intermediate layer M, and processing the laminate formed through these steps into a predetermined shape (e.g., circular) by perforation or the like. When using the laminate 20, the cover film 3 is peeled off at an appropriate time.

[0063] like Figure 5 As shown in (a), a cutting ring DR is attached to the laminated film 20. That is, the laminated film 20 is configured such that a cutting ring DR is attached to the pressure-sensitive adhesive layer 2, and a three-layer film 15F is disposed inside the cutting ring DR. The three-layer film 15F is monolithically processed by cutting (see reference). Figure 5 (b)). Thus, multiple raised sheets R can be obtained from the three-layer film 15F. Then, for example, by irradiating the pressure-sensitive adhesive layer 2 with ultraviolet light, the adhesive force between the pressure-sensitive adhesive layer 2 and the raised sheets R is reduced. After ultraviolet irradiation, as... Figure 5 As shown in (c), tension is applied to the substrate film 1 by pushing the inner region of the cutting ring DR on the substrate film 1 with the ring Ra, thereby separating the heightening sheets R from each other.

[0064] Next, as Figure 5 As shown in (d), the lifting piece R is peeled off from the pressure-sensitive adhesive layer 2 by pushing it up with the upward-pushing jig 42, and then picked up by the adsorption chuck 44. Alternatively, the curing reaction of the thermosetting resin can be pre-initiated by heating the three-layer film 15F before cutting or the lifting piece R before picking up. By moderately curing the lifting piece R, excellent pick-up performance can be achieved. Preferably, the cut for single-piece cutting extends to the outer edge of the lifting piece R. For example, the diameter of the three-layer film 15F can be 300–310 mm or 300–305 mm. The shape of the three-layer film 15F when viewed from above is not limited to... Figure 3 The circle shown in (a) can also be a rectangle (square or elongated rectangle).

[0065] Furthermore, a three-layer structure of the raised sheet R is illustrated here, but the raised sheet can be a two-layer structure without either of the two surface layers R1. For example, the raised sheet can be a two-layer structure having a first layer in contact with the surface of the substrate 10 and a second layer disposed on the surface of the first layer. The first layer corresponds to the aforementioned surface layer R1, and its material and properties can be set to be the same as the surface layer R1. The second layer corresponds to the aforementioned intermediate layer R2, and its material and properties can be set to be the same as the intermediate layer R2. The thickness of the two-layer structure raised sheet is, for example, 25 to 190 μm, or 40 to 125 μm or 40 to 115 μm. Moreover, the raised sheet R can be a laminate having a dummy chip (first layer) and an adhesive sheet (second layer) disposed on one surface of the dummy chip. These raised sheets can be manufactured through a cutting process and a pick-and-place process.

[0066] Chip T1 is, for example, a memory chip. When viewed from above, chip T1 has a larger area than controller chip Tc. Chip T1 is disposed on substrate 10 via adhesive sheet A1, covering the entire controller chip Tc. The shape of chip T1 when viewed from above is, for example, rectangular (square or elongated). The length of one side of chip T1 is, for example, less than 12 mm, but can also be 6–10 mm or 2–4 mm. When these chips are rectangular, the ratio B / A of the length of the long side B to the length of the short side A is, for example, 1.5–4, but can also be 1.8–3.5 or 2.1–3.2. The thickness of chip T1 is, for example, 10–170 μm, but can also be 10–30 μm. These chips have complex circuit layers ( Figure 1 The upper surface side) and a relatively thin semiconductor layer ( Figure 1 (The lower surface side of the chip). As the proportion of the semiconductor layer thickness in the overall chip thickness decreases, the chip becomes more prone to smile warpage. For example, when this proportion is below 80%, smile warpage is likely to occur. Smile warpage refers to the chip warping downwards.

[0067] The dimensions of chip T1 and adhesive sheet A1 are substantially the same when viewed from above (see reference). Figure 6 (a)). Figure 6 The chip 31 with adhesive sheet shown in (a) is a laminate having adhesive sheet A1 (before curing) and chip T1. The chip 31 with adhesive sheet can be obtained by monolithizing the laminate of chip embedding adhesive film (FOD) and semiconductor wafer.

[0068] like Figure 1As shown, chip T1 and multiple height-adjustable sheets R are separated along the thickness direction of semiconductor device 100. Furthermore, chip T1 and controller chip Tc are also separated along the thickness direction of semiconductor device 100. This structure suppresses bending of chip T1 and ensures sufficient distance from the upper surface of controller chip Tc to the lower surface of chip T1. Additionally, an adhesive sheet A1 is filled between chip T1 and the multiple height-adjustable sheets R. An adhesive sheet A1 is also filled between chip T1 and controller chip Tc.

[0069] For example, chips T2, T3, T4, T5, and T6 are also memory chips, just like chip T1. Chips T2, T3, T4, T5, and T6 only need to have the same shape, size, and thickness as chip T1 when viewed from above. Chip T2 and adhesive sheet A2 have substantially the same dimensions when viewed from above (see reference). Figure 6 (b)). Figure 6 (b) The chip 32 with adhesive sheet shown is a laminate containing adhesive sheet A2 (before curing) and chip T2. The chip 32 with adhesive sheet can be obtained by monolithizing the laminate of the die bonding film and the semiconductor wafer. The die bonding film can be thinner than the chip embedding adhesive film (FOD) described above. In addition to the chip 32 with adhesive sheet, chips 33, 34, 35, and 36 containing chips T3, T4, T5, and T6 respectively can also be obtained by cutting.

[0070] [Semiconductor device manufacturing method]

[0071] The semiconductor device 100 is manufactured through the following processes.

[0072] (A) The process of mounting the controller chip Tc on the substrate 10 (refer to) Figure 7 ).

[0073] (B) The process of arranging multiple height-adjustable wafers R around the controller chip Tc on the substrate 10 (see reference) Figure 8 ).

[0074] Alternatively, step (A) can be performed before step (B), or step (B) can be performed before step (A). When step (B) is performed before step (A), in step (B), multiple height-adjustable pieces R can be arranged around the area on substrate 10 where the controller chip Tc should be placed.

[0075] (C) Process for preparing chip 31 with adhesive pad (refer to) Figure 6 (a) ). (C) can be performed at any time as long as it precedes (D).

[0076] (D) A pressing pressure is applied to the chip 31 with adhesive sheet along the direction of substrate 10 to embed the entire controller chip Tc and a portion of each heightening sheet R into the adhesive sheet A1 (refer to the process). Figure 9 ).

[0077] (D) The process can be performed, for example, on a heated plate. The temperature conditions for hot pressing are, for example, 80–150°C, or 90–130°C. The pressing pressure is, for example, 0.05–0.5 MPa, or 0.1–0.3 MPa.

[0078] (E) The process of sequentially stacking multiple chips 32-36 with adhesive sheets on the surface of chip T1 (refer to) Figure 10 ).

[0079] (F) A process of sealing the chip and wires on the surface of the substrate 10 with a sealing material.

[0080] In process (D), when pressing the chip 31 with adhesive sheet along the direction of substrate 10, the presence of multiple raised pieces R around the controller chip maintains the flat shape of chip T1, thus suppressing bending. That is, the chip T1 is pressed by embedding the adhesive sheet A1 into the controller chip T1 as a whole and a portion of each raised piece R positioned corresponding to the periphery of chip T1, thereby applying a sufficiently uniform pressing force to chip T1 (see reference). Figure 9 Therefore, it can suppress the bending of chip T1, and as a result, it can also suppress the formation of voids and leakage.

[0081] The embodiments of the present invention have been described in detail above, but the present invention is not limited to the above embodiments. For example, in the above embodiments, the controller chip Tc is illustrated as being connected to the substrate 10 via a wire Wa, but the controller chip Tc may also be flip-chip connected to the substrate 10. Furthermore, in the above embodiments, a three-dimensional NAND type memory in which the controller chip is embedded is illustrated, but height-enhanced wafers may also be applied to other semiconductor devices in which other chips are embedded.

[0082] In the above embodiment, the case in which the heightening sheet R is manufactured through a cutting process and a picking process is illustrated, but the heightening sheet can also be disposed on the substrate 10 using a transfer film. Figure 11 This is a schematic cross-sectional view showing an example of a transfer film. Figure 11 The transfer film 60 shown includes a substrate film 61 and a plurality of heightening sheets R disposed on the surface of the substrate film 61. T Increased R-coating T For example, it is formed from a thermosetting resin composition. By pre-preparing such a transfer film 60, for example, multiple raised sheets R can be deposited on the surface of the substrate 10 at once by a single press. T.

[0083] Industrial availability

[0084] According to the present invention, a method for manufacturing a semiconductor device using a chip embedding adhesive film (FOD) is provided, which can sufficiently suppress the generation of voids, leakage, and bending. Furthermore, according to the present invention, a semiconductor device with excellent reliability is provided, which sufficiently suppresses the generation of voids, leakage, and bending during the manufacturing process.

[0085] Symbol Explanation

[0086] 1-Substrate film, 2-Pressure-sensitive adhesive layer, 3-Cover film, 10-Substrate, 10a-Electrode, 10b-Electrode, 15F-Triple film, 20-Laminated film, 31, 32, 33, 34, 35, 36-Chip with adhesive sheet, 50-Sealing layer, 60-Transfer film, 61-Substrate film, 100-Semiconductor device, A1, A2, A3, A4, A5, A6, Ac-Adhesive sheet, DR-Cut ring, P1, R1, S1-Surface layer, R, R T - Heightening chip, M, R2 - Intermediate layer, T1 - Chip (second chip), T2, T3, T4, T5, T6 - Chips, Tc - Controller chip (first chip), Wa, Wb - Wires.

Claims

1. A method for manufacturing a semiconductor device, comprising: (A) The process of placing a first chip on a substrate using a first adhesive sheet; (B) A process of arranging a plurality of height-adjustable sheets on the substrate and around the first chip or around the area where the first chip is to be arranged; (C) A process of preparing a chip with a second adhesive sheet, the chip having the second adhesive sheet comprising a second chip and a second adhesive sheet disposed on one side of the second chip; and (D) The step of applying pressure to the chip with the second adhesive sheet along the direction of the substrate to embed at least a portion of the first chip and the raised sheet into the second adhesive sheet. Wherein, the ratio of the overall thickness of the heightening sheet to the total thickness of the first chip and the first adhesive sheet is greater than 0.5 and less than 1.

0.

2. The method for manufacturing a semiconductor device according to claim 1, wherein, (B) The process includes: transferring the plurality of heightening sheets disposed on the surface of the substrate film to the surface of the substrate.

3. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein, The second adhesive sheet is formed from a thermosetting resin composition. The manufacturing method further includes: after step (D), a step of curing the second adhesive sheet by heating under a pressurized atmosphere.

4. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein, When viewed from above, the second chip is rectangular in shape. The ratio of the length of the longer side B to the length of the shorter side A, B / A, is greater than 2.

5. A semiconductor device comprising: substrate; A first chip disposed on the substrate by a first adhesive sheet; Multiple raised sheets disposed on the substrate and surrounding the first chip; A second adhesive sheet in which at least a portion of the first chip and the heightening sheet are embedded; and A second chip configured to cover the first chip while being adhered to the second adhesive sheet. in, The ratio of the overall thickness of the heightening sheet to the sum of the thickness of the first chip and the thickness of the first adhesive sheet is greater than 0.5 and less than 1.

0.

6. The semiconductor device according to claim 5, wherein, The second chip is separated from the plurality of height-enhancing wafers. The second adhesive sheet is filled between the second chip and the plurality of heightening sheets.

7. The semiconductor device according to claim 5 or 6, wherein, The second chip is separated from the first chip. The second adhesive sheet is filled between the second chip and the first chip.

8. The semiconductor device according to claim 5 or 6, wherein, The heightening sheet has a multi-layer structure including a dummy chip and a second adhesive sheet.

9. The semiconductor device according to claim 5 or 6, wherein, The heightening sheet has a multilayer structure comprising a pair of surface layers formed from a cured thermosetting resin composition and an intermediate layer disposed between the pair of surface layers.

10. The semiconductor device according to claim 5 or 6, wherein, The first chip is flip-chip connected to the substrate.

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