A frequency adaptive partial capacity harmonic governing method and system

Abstract

The application discloses a frequency self-adaptive partial capacity harmonic treatment method and system, and the method comprises the following steps: constructing a partial capacity harmonic treatment device; designing a direct-current voltage controller to obtain a transient frequency value through reverse droop control; extracting a harmonic signal in a load current of the partial capacity harmonic treatment device through an ASOGI algorithm to perform harmonic voltage outer loop control, and the output of the harmonic voltage outer loop control is used as a target reference current of a current inner loop controller; designing the current inner loop controller to perform current closed loop control according to an active bridge output current and the target reference current; calculating a feedforward signal of an output voltage according to an output instantaneous phase, and the feedforward signal is added to the output of the current inner loop controller, and the result is given to a PWM modulator, and a PWM signal output by the PWM modulator is used for controlling the active bridge; and the application has the advantage that the island mode can normally work in a large grid frequency fluctuation range.

Description

Technical Field

[0001] This invention relates to the field of power electronic equipment technology, and more specifically to a frequency-adaptive partial capacity harmonic mitigation method and system. Background Technology

[0002] Traditional harmonic compensation solutions require relatively small energy storage capacity. The widespread application of nonlinear loads in low- and medium-voltage microgrids and distribution networks, along with the continuous increase in renewable energy capacity, has led to a significant increase in harmonic current capacity in weak grids, which can even affect voltage quality in severe cases. Therefore, there is a growing demand for large-capacity harmonic compensation devices in industrial applications, such as the grid voltage and harmonic compensation device disclosed in Chinese Patent Publication No. CN106374473A. Individual large-capacity harmonic mitigation equipment would significantly increase the cost of microgrids, while small-capacity equipment cannot adapt to the large power flow fluctuations in microgrids. Therefore, partial-capacity harmonic compensation devices have broad application prospects. In islanded microgrids, due to the lack of large grid support, the system voltage and frequency fluctuation range is much larger than in grid-connected modes. Generation units with frequency deviations inject harmonic currents into the microgrid, causing not only even-order and low-frequency harmonics but also potential system oscillations. Traditional low-voltage hybrid harmonic mitigation devices are suitable for low-cost harmonic mitigation in distributed generation and microgrids. However, the series capacitor filters in traditional low-voltage hybrid harmonic mitigation devices are prone to resonance with inductive filters in other distributed generation (DG) units.

[0003] Partial-capacity harmonic compensation devices can provide not only reactive power compensation but also harmonic compensation. However, research on the control of these devices in islanded microgrids with significant frequency variations is scarce, limiting the widespread application of this low-cost harmonic mitigation equipment. Clearly, partial-capacity harmonic compensation devices require frequency adaptive control to operate normally in islanded microgrids with large grid frequency fluctuations. Therefore, it is necessary to propose a new scheme to meet practical needs. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a frequency adaptive partial capacity harmonic mitigation method and system that can operate normally in islanded mode with a large range of power grid frequency fluctuations.

[0005] This invention solves the above-mentioned technical problems through the following technical means: a frequency-adaptive partial capacity harmonic mitigation method, the method comprising:

[0006] Step 1: Construct a partial capacity harmonic mitigation device based on the active bridge of the power grid;

[0007] Step 2: Design a DC voltage controller based on the DC side voltage and control reference value of the active bridge. The output of the DC voltage controller is used as the target value of the fundamental AC power. The instantaneous exchange power is calculated by the output current of the partial capacity harmonic mitigation device and the voltage of the parallel capacitor. The transient frequency value is obtained by performing anti-droop control based on the target value of the fundamental AC power and the instantaneous exchange power. The instantaneous phase of the device output is obtained by integrating the transient frequency value.

[0008] Step 3: Use the ASOGI algorithm to extract the harmonic signal from the load current of the partial capacity harmonic mitigation device, multiply the harmonic signal by the harmonic virtual damping as the target reference for the harmonic voltage, and collect the parallel capacitor voltage of the partial capacity harmonic mitigation device for harmonic voltage outer loop control. The output of the harmonic voltage outer loop control is used as the target reference current of the current inner loop controller.

[0009] Step 4: Design the current inner loop controller and perform current closed-loop control based on the output current of the active bridge and the target reference current.

[0010] Step 5: Calculate the sine value corresponding to the instantaneous phase of the output, multiply the sine value by the estimated output reference value to obtain the feedforward signal of the output voltage, add the feedforward signal to the output of the current inner loop controller, and assign the result to the PWM modulator. The PWM signal output by the PWM modulator controls the active bridge.

[0011] Beneficial effects: This invention designs a DC voltage controller based on the DC side voltage and control reference value of an active bridge, performs anti-droop control on its output to obtain the transient frequency value, and calculates the feedforward signal of the output voltage. Harmonic control is achieved through the output current closed loop of the ASOGI algorithm. The feedforward signal is superimposed on the harmonic control result for harmonic compensation, which will not generate a large resonant current and ensures normal operation when the fundamental frequency of the microgrid fluctuates over a wide range. Thus, it can work normally in islanded mode with a large range of grid frequency fluctuations.

[0012] Further, the active bridge includes MOSFETs Q1 to Q4. The source of MOSFET Q1 is connected to the drain of MOSFET Q3, the source of MOSFET Q2 is connected to the drain of MOSFET Q4, the drains of MOSFETs Q1 and Q2 are both connected to the positive terminal of the power supply, and the sources of MOSFETs Q3 and Q4 are both connected to the negative terminal of the power supply. The voltage of the power supply is the DC side voltage V of the active bridge. DC .

[0013] Furthermore, the partial capacity harmonic mitigation device includes inductor L1, inductor C1, and capacitor C. s Feeder inductance L f One end of inductor L1 is connected to the source of MOSFET Q1, and the current on the connection line is the active bridge output current I.L1 The other end of inductor L1, the positive terminal of capacitor C1, and capacitor C s The positive terminal is connected and the capacitor C s The positive side current is the output current I of the device. line The voltage across capacitor C1 is the same as the voltage across the parallel capacitor V. F Capacitor C s The negative terminal is connected to the feeder inductor L f Connected to the microgrid PCC node, the negative terminal of capacitor C1 is connected to the source of MOSFET Q2 and the microgrid PCC node. The microgrid PCC node is also connected to a load with a load current of I. load .

[0014] Further, step 2 includes:

[0015] Design a DC voltage controller G DC (s), its output is as follows

[0016]

[0017] Where s is a variable, k p,DC and k i,DC These are the proportional and integral control parameters in a PI controller. To control the reference value, The output of the DC voltage controller, i.e., the target value of the fundamental AC power, is determined by the output current I. line and the output voltage V of the parallel filter F The instantaneous exchange power P was calculated. F The transient frequency value ω is obtained through anti-droop control. r :

[0018]

[0019] Among them, K P,F ω is the droop coefficient of a partial capacity harmonic mitigation device. * The rated operating frequency of the microgrid, and the transient frequency value ω. r The instantaneous phase θ of the partial capacity harmonic mitigation device output is obtained through integration. F :

[0020] θ F =ω r / s (1-3).

[0021] Furthermore, step 3 includes:

[0022] The module ASOGI that executes the ASOGI algorithm n The transfer function of (s) is:

[0023]

[0024] Where y(t) and y ～ ω(t) represents the signals in phase and conjugate with the input signal u(t), respectively. b Where is the bandwidth, and n represents the total number of harmonics;

[0025] Using ASOGI n (s) The method for extracting the single harmonics of the load current and the output current is as follows:

[0026]

[0027] Among them, I load(αβ) I is the load current. load,k(αβ) ～ The kth harmonic of the load current I load,k(αβ) The conjugate signal of the load current, the total harmonic signal obtained by summing the real-time harmonic signals of each harmonic, and its conjugate signal:

[0028]

[0029] Among them, I load,h ～ The conjugate signal I of the load multiple harmonics load,k ～ sum.

[0030] Furthermore, step 3 also includes:

[0031] Virtual harmonic damping and virtual harmonic capacitance The target reference for the harmonic voltage, which consists of two parts, is:

[0032]

[0033] Among them, virtual harmonic damping and virtual harmonic capacitance The calculation method is as follows:

[0034]

[0035]

[0036] Among them, R v,k For the virtual damping of the kth harmonic, I line,h For the output current of a partial capacity harmonic mitigation device, I line,k For I line,h The k-th component, corresponding to for The k-th component, for The k-th component, the harmonic voltage controller is G V (s), the output of the harmonic voltage controller, which is also the target reference current of the inner current loop controller, is:

[0037]

[0038] Where, k vp k is the proportional coefficient of the harmonic voltage controller. v,n This represents the resonant coefficient of the harmonic voltage controller.

[0039] Furthermore, step 4 includes:

[0040] Design a current inner loop controller

[0041] Where, k cp ξ is the proportionality coefficient of the current loop, and ξ is the damping coefficient. Let I be the target reference current and I be the active bridge output current.

[0042] L1

[0043] Output current.

[0044] Furthermore, step 5 includes:

[0045] The fundamental reference value of the output voltage of the parallel capacitor of the partial capacity harmonic mitigation device is obtained using formula (1-11). That is, the feedforward signal for the output voltage:

[0046]

[0047] Where E0 is the estimated output reference value;

[0048] The feedforward signal is added to the output of the current inner loop controller, resulting in:

[0049]

[0050] in, This is the output signal of the inner current loop controller and also the input reference signal of the PWM modulator. The PWM signal output by the PWM modulator controls the active bridge.

[0051] The present invention also provides a frequency-adaptive partial-capacity harmonic mitigation system, the system comprising:

[0052] Hardware building module for constructing a partial capacity harmonic mitigation device based on an active bridge in the power grid;

[0053] The anti-droop control module is used to design a DC voltage controller based on the DC side voltage and control reference value of the active bridge. The output of the DC voltage controller is used as the target value of the fundamental AC power. The instantaneous exchange power is calculated by the output current of the partial capacity harmonic mitigation device and the voltage of the parallel capacitor. The transient frequency value is obtained by performing anti-droop control based on the target value of the fundamental AC power and the instantaneous exchange power. The instantaneous phase of the device output is obtained by integrating the transient frequency value.

[0054] The voltage outer loop control module is used to extract the harmonic signal from the load current of the partial capacity harmonic mitigation device using the ASOGI algorithm, multiply the harmonic signal by the harmonic virtual damping as the target reference for the harmonic voltage, and collect the parallel capacitor voltage of the partial capacity harmonic mitigation device for harmonic voltage outer loop control. The output of the harmonic voltage outer loop control is used as the target reference current of the current inner loop controller.

[0055] The current closed-loop control module is used to design the current inner loop controller and perform current closed-loop control based on the output current of the active bridge and the target reference current.

[0056] The PWM modulation module is used to calculate the sine value corresponding to the instantaneous phase of the output. The sine value is multiplied by the estimated output reference value to obtain the feedforward signal of the output voltage. The feedforward signal is added to the output of the current inner loop controller, and the result is assigned to the PWM modulator. The PWM signal output by the PWM modulator controls the active bridge.

[0057] Further, the active bridge includes MOSFETs Q1 to Q4. The source of MOSFET Q1 is connected to the drain of MOSFET Q3, the source of MOSFET Q2 is connected to the drain of MOSFET Q4, the drains of MOSFETs Q1 and Q2 are both connected to the positive terminal of the power supply, and the sources of MOSFETs Q3 and Q4 are both connected to the negative terminal of the power supply. The voltage of the power supply is the DC side voltage V of the active bridge. DC .

[0058] Furthermore, the partial capacity harmonic mitigation device includes inductor L1, inductor C1, and capacitor C. s Feeder inductance L f One end of inductor L1 is connected to the source of MOSFET Q1, and the current on the connection line is the active bridge output current I. L1 The other end of inductor L1, the positive terminal of capacitor C1, and capacitor C s The positive terminal is connected and the capacitor C s The positive side current is the output current I of the device. line The voltage across capacitor C1 is the same as the voltage across the parallel capacitor V. F Capacitor C s The negative terminal is connected to the feeder inductor L fConnected to the microgrid PCC node, the negative terminal of capacitor C1 is connected to the source of MOSFET Q2 and the microgrid PCC node. The microgrid PCC node is also connected to a load with a load current of I. load .

[0059] Furthermore, the anti-droop control module is also used for:

[0060] Design a DC voltage controller G DC (s), its output is as follows

[0061]

[0062] Where s is a variable, k p,DC and k i,DC These are the proportional and integral control parameters in a PI controller. To control the reference value, The output of the DC voltage controller, i.e., the target value of the fundamental AC power, is determined by the output current I. line and the output voltage V of the parallel filter F The instantaneous exchange power P was calculated. F The transient frequency value ω is obtained through anti-droop control. r :

[0063]

[0064] Among them, K P,F ω is the droop coefficient of a partial capacity harmonic mitigation device. * The rated operating frequency of the microgrid, and the transient frequency value ω. r The instantaneous phase θ of the partial capacity harmonic mitigation device output is obtained through integration. F :

[0065] θ F =ω r / s (1-3).

[0066] Furthermore, the voltage outer loop control module is also used for:

[0067] The module ASOGI that executes the ASOGI algorithm n The transfer function of (s) is:

[0068]

[0069] Where y(t) and y ～ ω(t) represents the signals in phase and conjugate with the input signal u(t), respectively. b Where is the bandwidth, and n represents the total number of harmonics;

[0070] Using ASOGI n(s) The method for extracting the single harmonics of the load current and the output current is as follows:

[0071]

[0072] Among them, I load(αβ) I is the load current. load,k(αβ) ～ The kth harmonic of the load current I load,k(αβ) The conjugate signal of the load current, the total harmonic signal obtained by summing the real-time harmonic signals of each harmonic, and its conjugate signal:

[0073]

[0074] Among them, I load,h ～ The conjugate signal I of the load multiple harmonics load,k ～ sum.

[0075] Furthermore, the voltage outer loop control module is also used for:

[0076] Virtual harmonic damping and virtual harmonic capacitance The target reference for the harmonic voltage, which consists of two parts, is:

[0077]

[0078] Among them, virtual harmonic damping and virtual harmonic capacitance The calculation method is as follows:

[0079]

[0080]

[0081] Among them, R v,k For the virtual damping of the kth harmonic, I line,h For the output current of a partial capacity harmonic mitigation device, I line,k For I line,h The k-th component, corresponding to for The k-th component, for The k-th component, the harmonic voltage controller is G V (s), the output of the harmonic voltage controller, which is also the target reference current of the inner current loop controller, is:

[0082]

[0083] Where, k vp k is the proportional coefficient of the harmonic voltage controller.v,n This represents the resonant coefficient of the harmonic voltage controller.

[0084] Furthermore, the current closed-loop control module is also used for:

[0085] Design a current inner loop controller

[0086] Where, k cp ξ is the proportionality coefficient of the current loop, and ξ is the damping coefficient. Let I be the target reference current and I be the active bridge output current.

[0087] L1

[0088] Output current.

[0089] Furthermore, the PWM modulation module is also used for:

[0090] The fundamental reference value of the output voltage of the parallel capacitor of the partial capacity harmonic mitigation device is obtained using formula (1-11). That is, the feedforward signal for the output voltage:

[0091]

[0092] Where E0 is the estimated output reference value;

[0093] The feedforward signal is added to the output of the current inner loop controller, resulting in:

[0094]

[0095] in, This is the output signal of the inner current loop controller and also the input reference signal of the PWM modulator. The PWM signal output by the PWM modulator controls the active bridge.

[0096] The advantages of this invention are as follows: This invention designs a DC voltage controller based on the DC side voltage and control reference value of an active bridge, performs anti-droop control on its output to obtain the transient frequency value, and calculates the feedforward signal of the output voltage. Harmonic control is achieved through the output current closed loop of the ASOGI algorithm. The feedforward signal is superimposed on the harmonic control result for harmonic compensation, which will not generate a large resonant current and ensures normal operation when the fundamental frequency of the microgrid fluctuates over a wide range. Thus, it can work normally in islanded mode with a large range of grid frequency fluctuations. Attached Figure Description

[0097] Figure 1 This is a typical application scenario of the partial capacity harmonic mitigation device provided in Embodiment 1 of the present invention in a microgrid;

[0098] Figure 2The topology and control block diagram of the frequency adaptive partial capacity harmonic mitigation device provided in Embodiment 1 of the present invention are shown below.

[0099] Figure 3 This is a physical diagram of the microgrid system provided in Embodiment 1 of the present invention;

[0100] Figure 4 This is an analysis diagram of the LCCL structure provided in Embodiment 1 of the present invention;

[0101] Figure 5 This is the frequency-adaptive SOGI control diagram provided in Embodiment 1 of the present invention;

[0102] Figure 6 This is an equivalent schematic diagram of the frequency division control of the active part of the harmonic mitigation device provided in Embodiment 1 of the present invention;

[0103] Figure 7 This is a model of the equivalent control relationship of the active part of the harmonic mitigation device provided in Embodiment 1 of the present invention and other parts of the microgrid;

[0104] Figure 8 This is an equivalent schematic diagram of the harmonic mitigation device provided in Embodiment 1 of the present invention in a microgrid;

[0105] Figure 9 This is a diagram showing the output voltage and current of each unit in the microgrid system without harmonic compensation in Embodiment 1 of the present invention;

[0106] Figure 10 The output voltage and current (49.9Hz) of each unit in the microgrid under light load conditions are managed using a traditional non-frequency adaptive method in Embodiment 1 of the present invention.

[0107] Figure 11 The output voltage and current (49.1Hz) of each unit in Embodiment 1 of the present invention are managed under heavy load conditions of a microgrid using a traditional non-frequency adaptive method.

[0108] Figure 12 The output voltage and current (49.9Hz) of each unit in the microgrid under light load conditions are managed using the frequency adaptive method in Embodiment 1 of the present invention.

[0109] Figure 13 The output voltage and current (49.1Hz) of each unit in Embodiment 1 of the present invention are managed under heavy load conditions of a microgrid using a frequency adaptive method.

[0110] Figure 14 The THD diagrams of the load and the current waveforms of the two DGs under different operating conditions are shown for the frequency-adaptive method without frequency and the frequency-adaptive method in Embodiment 1 of the present invention.

[0111] Figure 15The waveforms of the DC voltage and frequency of the harmonic mitigation device and the frequencies of the two DG units during the system power switching process in Embodiment 1 of the present invention are shown. Detailed Implementation

[0112] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0113] Example 1

[0114] This invention provides a frequency-adaptive partial-capacity harmonic mitigation method. It utilizes a fourth-order LCCL filter to suppress high-frequency switching ripple and reduce the fundamental frequency voltage, and employs an anti-droop control method to achieve frequency-adaptive control and stable operation. A frequency-adaptive controller enables robust closed-loop tracking of the system, and harmonic compensation is achieved by designing a suitable virtual impedance. The algorithm of the frequency-adaptive partial-capacity harmonic mitigation device is verified in a practical microgrid using the system and control parameters in Table 1. The entire method is described in detail below.

[0115] Table 1. Key parameters of the experimental platform

[0116]

[0117]

[0118] Step 1: Construct a partial capacity harmonic mitigation device based on the active bridge of the power grid. This device employs a fourth-order LCCL filter, which can be equivalent to an LCL filter plus a large-capacity series capacitor. The partial capacity harmonic mitigation device is connected to the active bridge of the power grid. The specific steps are as follows:

[0119] Figure 1 This is a typical application diagram of a partial capacity harmonic mitigation device in an islanded microgrid, where the microgrid contains distributed generation (DG) and nonlinear loads. Figure 2 This is a block diagram of the topology and control structure of the frequency adaptive partial capacity harmonic mitigation device proposed in this invention. Figure 3 This is a diagram of the experimental prototype and microgrid platform. Partial capacity harmonic mitigation devices are implemented via series capacitor C. s The active component is connected to the microgrid PCC node, and the feeder output current is I. line . Figure 4This is a schematic diagram of the structure and impedance distribution at the fundamental frequency of a fourth-order LCCL. The first-stage output filter of the partial capacity harmonic mitigation device is an LC filter with a resonant frequency of 1.7kHz. Its function is to reduce the system switching frequency ripple. The inductor is L1, and its current is I. L1 The parallel filter capacitor is C1, and its voltage is V. F V F,h This refers to its harmonic component. The output feeder of the partial capacity harmonic mitigation device is inductive, which significantly affects the high-frequency impedance of the series capacitor; the measured value is L. f Wherein, to make the current I line(abc) To avoid large reactive power injection, this invention designs the LCL filter parameters as L1 = 1mH, L... s =10uH, C1=8uF. In series capacitor C s In this case, the filter needs to adjust the output voltage V. out(αβ) The switching ripple exhibits good attenuation at 10kHz. This attenuation is due to the reduced effect of the switching ripple on the series inductance L. s and capacitor C s The fourth-order output filter can be divided into two subsystems: the first LCL filter reduces switching ripple, and the second series capacitor withstands the grid fundamental voltage. These two subsystems are completely decoupled. When the reactive power line current is 1 / 6 of the rated current, the output voltage V of the converter bridge... out(αβ) The voltage is much lower than the PCC voltage. Therefore, this filter structure can reduce the DC bus voltage.

[0120] Step 2: Design a DC voltage controller based on the DC-side voltage and control reference value of the active bridge. The output of the DC voltage controller serves as the target value of the fundamental AC power. The instantaneous exchange power is calculated using the output current of the partial capacity harmonic mitigation device and the voltage of the parallel capacitor. Based on the target value of the fundamental AC power and the instantaneous exchange power, anti-droop control is performed to obtain the transient frequency value. Integrating the transient frequency value yields the instantaneous output phase of the device. The specific steps are as follows:

[0121] Figure 2 The lower half of the control block diagram is divided into three parts: DC control and fundamental frequency control, dual closed-loop harmonic frequency tracking control, and virtual impedance adaptive harmonic compensation control. Because the fundamental output impedance of the frequency adaptive harmonic mitigation device system is relatively large, the fundamental exchange active power is very small. When the system's DC capacitor C... DC When it is large, the DC side voltage V DC The steady-state fluctuation is very small. DC voltage V DC The control reference value is DC voltage controller G DC (s) is:

[0122]

[0123] Where k p,DC and k I,DC These are the proportional and integral control parameters in the PI controller. The output of the DC voltage controller is the target value of the fundamental AC power. Through the output current I line and the output voltage V of the parallel filter F The instantaneous exchange power P was calculated. F The transient frequency value ω is obtained through anti-droop control. r :

[0124]

[0125] Where K P,F ω is the droop coefficient of the frequency adaptive partial capacity harmonic mitigation device. * Given a microgrid rated operating frequency of 100π rad / s, the droop control output frequency is ω. r The output frequency can be obtained by integration to obtain the instantaneous phase θ of the target frequency adaptive partial capacity harmonic mitigation device output. F :

[0126] θ F =ω r / s (1-3)

[0127] Step 3: Use the ASOGI algorithm to extract harmonic signals from the load current of the partial capacity harmonic mitigation device. Multiply the harmonic signal by the virtual harmonic damping as the target reference for the harmonic voltage. Also, acquire the parallel capacitor voltage of the partial capacity harmonic mitigation device from Step 1 for harmonic voltage outer loop control. The output of the harmonic voltage outer loop control is used as the target reference current for the current inner loop controller. The specific steps are as follows:

[0128] Frequency-adaptive partial-capacity harmonic mitigation devices use series capacitors with large impedance as output filters, causing their frequency response to decay rapidly with increasing frequency. This results in significant differences in the control characteristics between the system's fundamental frequency and high-frequency harmonic frequencies. Therefore, frequency division control is an ideal control design method. The most commonly used algorithm in frequency division control is the second-order generalized integrator algorithm. This invention proposes adaptive frequency tracking of harmonics to reduce the additional harmonic injection introduced by frequency tracking errors. k and These are the signals in phase and conjugate with the input signal u(t), respectively. ASOGI n The structure of (s) is as follows Figure 5 As shown. ω b For bandwidth, ASOGI n The transfer function of (s) is:

[0129]

[0130] Using ASOGI n (s) can simultaneously acquire the single harmonic and its conjugate signal. The method for extracting the single harmonic of the load current and output current is as follows:

[0131]

[0132] in The kth harmonic of the load current I load,k The conjugate signal of the load current is the sum of the real-time harmonic signals of each harmonic, which is the total harmonic signal.

[0133]

[0134] Among them and For load multiple harmonic frequency components Sum. The target reference for the parallel output harmonic voltage can be further obtained by constructing a virtual impedance:

[0135]

[0136] Target harmonic voltage formed by harmonic impedance Divided into virtual harmonic damping Two parts: virtual harmonic capacitance and reactance

[0137]

[0138]

[0139] The harmonic virtual damping designed by the algorithm is R. V,h Specifically, the frequency of the kth harmonic is R. v,k Corresponding for The k-th component, for The k-th component. The harmonic voltage controller is G. V (s):

[0140]

[0141] Step 4: Design the inner-loop current controller to perform closed-loop current control based on the output current of the active bridge and the target reference current. The specific steps are as follows:

[0142] To reduce the impact of passive impedance and enhance the system robustness of the frequency-adaptive partial-capacity harmonic mitigation device, closed-loop control and impedance reshaping are required. Firstly, feedback control of the system output impedance is implemented through the inner current loop, improving its robustness to inductor and parallel capacitor parameters. The higher control rate of the fundamental frequency power control further enhances the response rate of the inner current loop, thereby improving DC voltage stability.

[0143] Step 5: Integrate the estimated system frequency, i.e., the transient frequency value, to obtain the phase information (i.e., instantaneous phase) of the fundamental output voltage. Calculate the corresponding sine value based on the instantaneous phase, multiply this sine value by a predetermined fixed value to obtain the feedforward signal of the output voltage, add this feedforward signal to the output of the current inner loop controller, and assign the superimposed result to the PWM modulator. The system function is realized by controlling the active bridge. The specific steps are as follows:

[0144] Since the reactive power change of the frequency-adaptive partial-capacity harmonic mitigation device is relatively small due to PCC voltage fluctuations, the output reference value of the frequency-adaptive partial-capacity harmonic mitigation device is kept constant at E0 to simplify control. The simplified design sets the output reference value of the harmonic mitigation device to a constant E0. The fundamental reference value of the output voltage of the parallel capacitor of the frequency-adaptive partial-capacity harmonic mitigation device can be obtained using formula (1-11).

[0145]

[0146] by k is the output of the harmonic voltage controller and the target reference signal for the fundamental current. vp and k v,n These are the proportional and resonant coefficients of the harmonic voltage controller, respectively, where n is the order of the desired controlled harmonic. Current inner loop controller G I (s) is the controller for the proportional-plus-fundamental-wave notch filter:

[0147]

[0148] Where k cp ξ is the proportionality coefficient of the current loop, and ξ is the damping coefficient. It is the output signal of the inner current loop controller and also the input reference signal of the PWM module.

[0149] The following shows the mitigation effects of the harmonic mitigation scheme.

[0150] To simplify system analysis, multiple DG units are integrated into a single DG model, with the current of the DG group being I. DG The load current is I loadSimplifying and rearranging the small-signal model of the harmonic mitigation equipment yields the equivalent closed-loop transfer function of the frequency-adaptive partial-capacity harmonic mitigation device:

[0151]

[0152] in and H tf,vh (s)·V C1,dis H represents the response voltage components of the fundamental and harmonic reference signals, respectively. tf,vf (s) and H tf,vh (s) is the corresponding voltage closed-loop transfer function, Z out (s) represents the equivalent Thevenin output impedance of the closed-loop system:

[0153]

[0154]

[0155]

[0156] Equation (1-13) shows that the proposed closed-loop frequency adaptive partial capacity harmonic mitigation device system can be divided into the following categories: Figure 6 The diagram shows two parts: the fundamental controlled source and the harmonic controlled source. Although Z out (s) are non-zero terms across all frequency bands, but due to the use of closed-loop voltage control for harmonics, its harmonic output impedance Z out (s)≈0 will be a relatively small value; while the fundamental reference voltage is directly output by the PWM stage. Considering that the fundamental impedance of the inverter inductor is small, H can be approximated when the system delay is small. tf,vf (s)≈1, therefore Z out (s)≈0. Therefore Figure 6 (b) Approximately on the fundamental frequency: Figure 6 (c) is approximately equal to the harmonics. Figure 6 (d). To ensure the stable operation of the harmonic mitigation device in the microgrid system, it is necessary to simultaneously ensure the stable operation of the microgrid at the fundamental frequency and harmonic frequency. Therefore, this invention will analyze the control stability of the fundamental frequency and harmonic frequency after the frequency adaptive partial capacity harmonic mitigation device is connected to the microgrid based on the above model.

[0157] like Figure 7 As shown, where I line,k I load,k and I DGs,k Z represents the kth harmonic component of the output current, load current, and DG group current. DGeq (jkω r ) represents the equivalent output impedance of the DG group. V DG,kThis refers to the background harmonic voltage generated by the DG or introduced by harmonic current through the feeder. The voltage in the virtual impedance section simulates the characteristics of the series large harmonic output impedance, where the virtual impedance R is... V,k Together with the original series LC output impedance, this forms the new output impedance of the harmonic mitigation device, thus altering the final Norton equivalent circuit of the frequency-adaptive partial-capacity harmonic mitigation device. After transforming the equivalent system using the Norton equivalent circuit, as shown... Figure 8 As shown, the transformation process is represented by the following formula:

[0158]

[0159] according to Figure 8 The analysis results indicate that, in principle, the Norton equivalent current source of the frequency-adaptive partial-capacity harmonic mitigation device needs to cancel out the load current in order to eliminate the harmonic current flowing to the DG group, i.e., I. eq,k =I load,k Substituting this into formula (1-17), we get:

[0160] I line,k =I load,k -V PCC,k / (R v,k +jkω r L f -j / (kω r C s (1-18)

[0161] Combining equations (1-17), we can obtain:

[0162]

[0163] Figure 8 The circuit after the equivalent current source of the partial capacity harmonic mitigation device eliminates the load harmonic current is as follows: Figure 8 As shown on the right, the entire circuit consists of only harmonic voltages and one loop. When the closed-loop tracking error is negligible, the harmonic current flowing to the DG group simplifies to:

[0164] I DGs,k =-V DG,k / (R V,k +jkω r L f -j / (kω r C s )+Z DGeq (jkω r (1-20)

[0165] Since a closed-loop control system is adopted, Rv,k is small and can be ignored. The current flowing to DG is mainly determined by the grid impedance and capacitor impedance. The total system impedance increases. After harmonic compensation is achieved, the additional harmonic current caused by background harmonic voltage can be reduced to a certain extent.

[0166] Figure 9 The figure shows the system waveform when harmonic compensation is disabled in a partial capacity harmonic mitigation device system, where I is shown in the figure. load I DG1 I DG2 , and I line These represent the output currents of the load, DG1, DG2, and a portion of the harmonic mitigation device, respectively, V. F V DG1 V DG2 and V PCC These represent the output voltages of the partial capacity harmonic mitigation device, DG1 and DG2, and the PCC node voltage, respectively. Figure 9 The results show the harmonic mitigation results when a partial capacity harmonic mitigation device uses a traditional frequency-independent adaptive method. When the device operates in a 49.9Hz microgrid system, it maintains good stability compensation. However, when the system deviates significantly from 50Hz (to 49.1Hz), the compensation results from the partial capacity harmonic mitigation device—specifically, the output waveforms of the two distributed generators—become distorted, and the device can no longer fully compensate for harmonic currents. Figure 10 and Figure 12 The current and voltage waveforms of the microgrid system after harmonic compensation at 49.1Hz and 49.9Hz are shown in the figure, respectively, using a frequency adaptive method for the partial capacity harmonic mitigation device. The DC voltage of the partial capacity harmonic mitigation device is set to 250V. Figure 11 and 13 The figures show the harmonic distortion rates of the current waveforms at 49.1 Hz for systems using harmonic-free and harmonic-adaptive frequency control methods, respectively. Clearly, the harmonic-free method cannot handle harmonic mitigation after large-scale frequency fluctuations because it injects harmonics of a fixed frequency, resulting in a large number of interharmonics into the system. However, the harmonic-adaptive frequency control method effectively limits waveform distortion after large-scale frequency changes. Post-processing of the acquired data yields the system waveform spectra under various operating conditions and control methods, as shown below. Figure 14 As shown, because DG2 has a lower output impedance, the harmonic voltage caused by harmonic current has a greater impact on it, and the harmonic content is also higher than that of DG1. However, after treatment, both are within 5%, demonstrating good harmonic compensation performance.

[0167] Figure 15The data represents the DC voltage and real-time frequency of the partial capacity harmonic mitigation device, as well as the real-time frequencies of DG1 and DG2. After switching, DG and the partial capacity harmonic mitigation device reach the same frequency. The frequency tracking characteristic of the partial capacity harmonic mitigation device before and after power change is slightly slower than that of DG, but it still reaches near-steady-state within 1.5 cycles. These results demonstrate that the partial capacity harmonic mitigation device can stably compensate for harmonics under large-range system frequency fluctuations, proving the effectiveness of the proposed frequency adaptive control improvement method.

[0168] Example 2

[0169] Based on Embodiment 1, Embodiment 2 of the present invention also provides a frequency-adaptive partial capacity harmonic mitigation system, the system comprising:

[0170] Hardware building module for constructing a partial capacity harmonic mitigation device based on an active bridge in the power grid;

[0171] The anti-droop control module is used to design a DC voltage controller based on the DC side voltage and control reference value of the active bridge. The output of the DC voltage controller is used as the target value of the fundamental AC power. The instantaneous exchange power is calculated by the output current of the partial capacity harmonic mitigation device and the voltage of the parallel capacitor. The transient frequency value is obtained by performing anti-droop control based on the target value of the fundamental AC power and the instantaneous exchange power. The instantaneous phase of the device output is obtained by integrating the transient frequency value.

[0172] The voltage outer loop control module is used to extract the harmonic signal from the load current of the partial capacity harmonic mitigation device using the ASOGI algorithm, multiply the harmonic signal by the harmonic virtual damping as the target reference for the harmonic voltage, and collect the parallel capacitor voltage of the partial capacity harmonic mitigation device for harmonic voltage outer loop control. The output of the harmonic voltage outer loop control is used as the target reference current of the current inner loop controller.

[0173] The current closed-loop control module is used to design the current inner loop controller and perform current closed-loop control based on the output current of the active bridge and the target reference current.

[0174] The PWM modulation module is used to calculate the sine value corresponding to the instantaneous phase of the output. The sine value is multiplied by the estimated output reference value to obtain the feedforward signal of the output voltage. The feedforward signal is added to the output of the current inner loop controller, and the result is assigned to the PWM modulator. The PWM signal output by the PWM modulator controls the active bridge.

[0175] Specifically, the active bridge includes MOSFETs Q1 to Q4. The source of MOSFET Q1 is connected to the drain of MOSFET Q3, the source of MOSFET Q2 is connected to the drain of MOSFET Q4, the drains of MOSFETs Q1 and Q2 are both connected to the positive terminal of the power supply, and the sources of MOSFETs Q3 and Q4 are both connected to the negative terminal of the power supply. The voltage of the power supply is the DC side voltage V of the active bridge. DC .

[0176] More specifically, the partial capacity harmonic mitigation device includes inductor L1, inductor C1, and capacitor C. s Feeder inductance L f One end of inductor L1 is connected to the source of MOSFET Q1, and the current on the connection line is the active bridge output current I. L1 The other end of inductor L1, the positive terminal of capacitor C1, and capacitor C s The positive terminal is connected and the capacitor C s The positive side current is the output current I of the device. line The voltage across capacitor C1 is the same as the voltage across the parallel capacitor V. F Capacitor C s The negative terminal is connected to the feeder inductor L f Connected to the microgrid PCC node, the negative terminal of capacitor C1 is connected to the source of MOSFET Q2 and the microgrid PCC node. The microgrid PCC node is also connected to a load with a load current of I. load .

[0177] Specifically, the anti-droop control module is also used for:

[0178] Design a DC voltage controller G DC (s), its output is as follows

[0179]

[0180] Where s is a variable, k p,DC and k i,DC These are the proportional and integral control parameters in a PI controller. To control the reference value, The output of the DC voltage controller, i.e., the target value of the fundamental AC power, is determined by the output current I. line and the output voltage V of the parallel filter F The instantaneous exchange power P was calculated. F The transient frequency value ω is obtained through anti-droop control. r :

[0181]

[0182] Among them, K P,Fω is the droop coefficient of a partial capacity harmonic mitigation device. * The rated operating frequency of the microgrid, and the transient frequency value ω. r The instantaneous phase θ of the partial capacity harmonic mitigation device output is obtained through integration. F :

[0183] θ F =ω r / s (1-3).

[0184] More specifically, the voltage outer loop control module is also used for:

[0185] The module ASOGI that executes the ASOGI algorithm n The transfer function of (s) is:

[0186]

[0187] Where y(t) and y ～ ω(t) represents the signals in phase and conjugate with the input signal u(t), respectively. b Where is the bandwidth, and n represents the total number of harmonics;

[0188] Using ASOGI n (s) The method for extracting the single harmonics of the load current and the output current is as follows:

[0189]

[0190] Among them, I load(αβ) I is the load current. load,k(αβ) ～ The kth harmonic of the load current I load,k(αβ) The conjugate signal of the load current, the total harmonic signal obtained by summing the real-time harmonic signals of each harmonic, and its conjugate signal:

[0191]

[0192] Among them, I load,h ～ The conjugate signal I of the load multiple harmonics load,k ～ sum.

[0193] More specifically, the voltage outer loop control module is also used for:

[0194] Virtual harmonic damping and virtual harmonic capacitance The target reference for the harmonic voltage, which consists of two parts, is:

[0195]

[0196] Among them, virtual harmonic damping and virtual harmonic capacitance The calculation method is as follows:

[0197]

[0198]

[0199] Among them, R v,k For the virtual damping of the kth harmonic, I line,h For the output current of a partial capacity harmonic mitigation device, I line,k For I line,h The k-th component, corresponding to for The k-th component, for The k-th component, the harmonic voltage controller is G V (s), the output of the harmonic voltage controller, which is also the target reference current of the inner current loop controller, is:

[0200]

[0201] Where, k vp k is the proportional coefficient of the harmonic voltage controller. v,n This represents the resonant coefficient of the harmonic voltage controller.

[0202] More specifically, the current closed-loop control module is also used for:

[0203] Design a current inner loop controller

[0204] Where, k cp ξ is the proportionality coefficient of the current loop, and ξ is the damping coefficient. For the target reference current, I L1 This is the output current of the active bridge.

[0205] More specifically, the PWM modulation module is also used for:

[0206] The fundamental reference value of the output voltage of the parallel capacitor of the partial capacity harmonic mitigation device is obtained using formula (1-11). That is, the feedforward signal for the output voltage:

[0207]

[0208] Where E0 is the estimated output reference value;

[0209] The feedforward signal is added to the output of the current inner loop controller, resulting in:

[0210]

[0211] in, This is the output signal of the inner current loop controller and also the input reference signal of the PWM modulator. The PWM signal output by the PWM modulator controls the active bridge.

[0212] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A frequency-adaptive partial-capacity harmonic mitigation method, characterized in that, The method includes: Step 1: Construct a partial capacity harmonic mitigation device based on the active bridge of the power grid; Step 2: Design a DC voltage controller based on the DC side voltage and control reference value of the active bridge. The output of the DC voltage controller is used as the target value of the fundamental AC power. The instantaneous exchange power is calculated by the output current of the partial capacity harmonic mitigation device and the voltage of the parallel capacitor. The transient frequency value is obtained by performing anti-droop control based on the target value of the fundamental AC power and the instantaneous exchange power. The instantaneous phase of the device output is obtained by integrating the transient frequency value. Step 3: Use the ASOGI algorithm to extract the harmonic signal from the load current of the partial capacity harmonic mitigation device, multiply the harmonic signal by the harmonic virtual damping as the target reference for the harmonic voltage, and collect the parallel capacitor voltage of the partial capacity harmonic mitigation device for harmonic voltage outer loop control. The output of the harmonic voltage outer loop control is used as the target reference current of the current inner loop controller. Step 4: Design the current inner loop controller and perform current closed-loop control based on the output current of the active bridge and the target reference current. Step 5: Calculate the sine value corresponding to the instantaneous phase of the output, multiply the sine value by the estimated output reference value to obtain the feedforward signal of the output voltage, add the feedforward signal to the output of the current inner loop controller, and assign the result to the PWM modulator. The PWM signal output by the PWM modulator controls the active bridge.

2. The frequency-adaptive partial-capacity harmonic mitigation method according to claim 1, characterized in that, The active bridge includes MOSFETs Q1 to Q4. The source of MOSFET Q1 is connected to the drain of MOSFET Q3, and the source of MOSFET Q2 is connected to the drain of MOSFET Q4. The drains of MOSFETs Q1 and Q2 are both connected to the positive terminal of the power supply, and the sources of MOSFETs Q3 and Q4 are both connected to the negative terminal of the power supply. The voltage of the power supply is the DC side voltage of the active bridge. V DC .

3. The frequency-adaptive partial capacity harmonic mitigation method according to claim 2, characterized in that, The partial capacity harmonic mitigation device includes an inductor. L 1. Inductor C 1. Capacitor C s Feeder inductance L f ,inductance L One end of 1 is connected to the source of MOSFET Q1, and the current on the connection line is the output current of the active bridge. I L1 ,inductance L The other end of 1, capacitor C 1's positive terminal and capacitor C s The positive terminal is connected and the capacitor C s The positive side current is the output current of the device. I line ,capacitance C The voltage across 1 is the voltage of the parallel capacitor. V F ,capacitance C s The negative terminal is connected to the feeder inductor. L f Connected to the PCC node of the microgrid, capacitor C The negative terminal of transistor Q1 is connected to the source of MOSFET Q2 and the PCC node of the microgrid. The PCC node of the microgrid is also connected to a load with a load current of [value missing]. I load .

4. The frequency-adaptive partial capacity harmonic mitigation method according to claim 1, characterized in that, Step 2 includes: Design a DC voltage controller Its output is as follows (1-1) in, As variables, and These are the proportional and integral control parameters in a PI controller. This is the DC-side voltage of the active bridge. To control the reference value, The output of the DC voltage controller, i.e., the target value of the fundamental AC power, is determined by the output current. and parallel filter output voltage Instantaneous exchange power was calculated The transient frequency value is obtained through anti-droop control. : (1-2) in, This refers to the droop factor of a partial capacity harmonic mitigation device. The rated operating frequency and transient frequency value of the microgrid. The instantaneous phase of the output of the partial capacity harmonic mitigation device is obtained through integration. : (1-3)。 5. The frequency-adaptive partial capacity harmonic mitigation method according to claim 4, characterized in that, Step 3 includes: Module that executes the ASOGI algorithm The transfer function is: (1-4) in, and These are respectively the input signals In-phase and conjugate signals, For bandwidth, Indicates the total number of harmonics; use The method for extracting the single harmonic of the load current and output current is as follows: (1-5) in, For load current, For the load current k Subharmonic The conjugate signal of the load current, the total harmonic signal obtained by summing the real-time harmonic signals of each harmonic, and its conjugate signal: (1-6) in, The conjugate signal of the load multiple harmonics sum.

6. The frequency-adaptive partial capacity harmonic mitigation method according to claim 5, characterized in that, Step 3 also includes: Virtual harmonic damping and virtual harmonic capacitance The target reference for the harmonic voltage, which consists of two parts, is: (1-7) Among them, virtual harmonic damping and virtual harmonic capacitance The calculation method is as follows: (1-8) (1-9) in, For the capacitors of the partial capacity harmonic mitigation device, For the series inductance of a partial capacity harmonic mitigation device, For the k-th harmonic virtual damping, This refers to the output current of a partial capacity harmonic mitigation device. for The k-th component, corresponding to for Quantity, for The harmonic voltage controller is The output of the harmonic voltage controller, which is also the target reference current of the inner current loop controller, is: (1-10) in, This is the proportional coefficient of the harmonic voltage controller. This represents the resonant coefficient of the harmonic voltage controller.

7. The frequency-adaptive partial capacity harmonic mitigation method according to claim 6, characterized in that, Step 4 includes: Design a current inner loop controller in, This is the proportionality coefficient of the current loop. The damping coefficient is... For the target reference current, This is the output current of the active bridge.

8. The frequency-adaptive partial capacity harmonic mitigation method according to claim 7, characterized in that, Step 5 includes: The fundamental reference value of the output voltage of the parallel capacitor of the partial capacity harmonic mitigation device is obtained using formula (1-11). That is, the feedforward signal for the output voltage: (1-11) in, This is a reference value for the estimated output; The feedforward signal is added to the output of the current inner loop controller, resulting in: (1-12) in, This is the output signal of the inner current loop controller and also the input reference signal of the PWM modulator. The PWM signal output by the PWM modulator controls the active bridge.

9. A frequency-adaptive partial-capacity harmonic mitigation system, characterized in that, The system includes: Hardware building module for constructing a partial capacity harmonic mitigation device based on an active bridge in the power grid; The anti-droop control module is used to design a DC voltage controller based on the DC side voltage and control reference value of the active bridge. The output of the DC voltage controller is used as the target value of the fundamental AC power. The instantaneous exchange power is calculated by the output current of the partial capacity harmonic mitigation device and the voltage of the parallel capacitor. The transient frequency value is obtained by performing anti-droop control based on the target value of the fundamental AC power and the instantaneous exchange power. The instantaneous phase of the device output is obtained by integrating the transient frequency value. The voltage outer loop control module is used to extract the harmonic signal from the load current of the partial capacity harmonic mitigation device using the ASOGI algorithm, multiply the harmonic signal by the harmonic virtual damping as the target reference for the harmonic voltage, and collect the parallel capacitor voltage of the partial capacity harmonic mitigation device for harmonic voltage outer loop control. The output of the harmonic voltage outer loop control is used as the target reference current of the current inner loop controller. The current closed-loop control module is used to design the current inner loop controller and perform current closed-loop control based on the output current of the active bridge and the target reference current. The PWM modulation module is used to calculate the sine value corresponding to the instantaneous phase of the output. The sine value is multiplied by the estimated output reference value to obtain the feedforward signal of the output voltage. The feedforward signal is added to the output of the current inner loop controller, and the result is assigned to the PWM modulator. The PWM signal output by the PWM modulator controls the active bridge.

10. A frequency-adaptive partial-capacity harmonic mitigation system according to claim 9, characterized in that, The active bridge includes MOSFETs Q1 to Q4. The source of MOSFET Q1 is connected to the drain of MOSFET Q3, and the source of MOSFET Q2 is connected to the drain of MOSFET Q4. The drains of MOSFETs Q1 and Q2 are both connected to the positive terminal of the power supply, and the sources of MOSFETs Q3 and Q4 are both connected to the negative terminal of the power supply. The voltage of the power supply is the DC side voltage of the active bridge. V DC .

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