Voltage equalization circuit and power supply

Abstract

This invention provides a voltage balancing circuit and power supply. The circuit includes a first switching transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, and a resonant unit. The first terminal of the first switching transistor is connected to the first terminal of a first capacitor, and its second terminal is connected to both the first terminal of the second switching transistor and the first terminal of the resonant unit. The second terminal of the second switching transistor is connected to the second terminal of the first capacitor, the first terminal of the second capacitor, and the first terminal of the third switching transistor. The second terminal of the third switching transistor is connected to both the first terminal of the fourth switching transistor and the second terminal of the resonant unit. The second terminal of the fourth switching transistor is connected to the second terminal of the second capacitor. This invention uses a resonant circuit to transfer energy from a higher-voltage capacitor to a lower-voltage capacitor, thereby balancing the positive and negative voltages of the power components.

Description

Technical Field

[0001] This invention relates to the field of power supply technology, and in particular to a voltage equalization circuit and a power supply. Background Technology

[0002] With the continuous development of new energy sources, people have higher requirements for energy utilization. In situations where electricity is inconvenient, such as in the wild, people hope to use photovoltaic power generation or their own energy storage. Due to different external environments and usage times, the SOC (State of Charge) of energy storage units will vary. When the remaining capacity of the energy storage unit is uneven or under load, it will cause the problem of bus voltage imbalance. Summary of the Invention

[0003] In view of this, the present invention provides a voltage balancing circuit and power supply that can solve the problem of bus voltage imbalance.

[0004] In a first aspect, embodiments of the present invention provide a voltage equalization circuit applied to a power component; a first capacitor and a second capacitor are connected in series between the positive and negative output terminals of the power component; the voltage equalization circuit includes: a first switch, a second switch, a third switch, a fourth switch, and a resonant unit;

[0005] The first terminal of the first switch is connected to the first terminal of the first capacitor. The second terminal of the first switch is connected to the first terminal of the second switch and the first terminal of the resonant unit. The second terminal of the second switch is connected to the second terminal of the first capacitor, the first terminal of the second capacitor, and the first terminal of the third switch. The second terminal of the third switch is connected to the first terminal of the fourth switch and the second terminal of the resonant unit. The second terminal of the fourth switch is connected to the second terminal of the second capacitor.

[0006] In one possible implementation, the voltage equalization circuit further includes a control module;

[0007] The control module adjusts the switching frequencies of the first switch, the second switch, the third switch, and the fourth switch based on the resonant frequency of the resonant unit.

[0008] In one possible implementation, the control module is further configured to: control the duty cycle of the first switch and the third switch to be 50%, and the duty cycle of the second switch and the fourth switch to be 50%.

[0009] In one possible implementation, the resonant unit includes a resonant inductor and a resonant capacitor;

[0010] The first end of the resonant inductor is connected to the first end of the resonant unit, the second end of the resonant inductor is connected to the first end of the resonant capacitor, and the second end of the resonant capacitor is connected to the second end of the resonant unit.

[0011] In one possible implementation, the resonant unit includes a resonant inductor and a resonant capacitor; the control module is further configured to:

[0012] The resonant frequency of the resonant unit is calculated based on its resonant inductance and resonant capacitance.

[0013] The switching frequencies of the first, second, third, and fourth switching transistors are adjusted to equal the resonant frequency.

[0014] In one possible implementation, the control module is further configured to:

[0015] The resonant current sampled at the trigger moment of the switching signal of the target switch is obtained and used as the first current; the target switch is any one of the first switch, the second switch, the third switch, and the fourth switch.

[0016] The resonant current collected at the target delay time is used as the second current. The target delay time is the time when the trigger time of the switching signal of the target switch is delayed by a preset time period.

[0017] Based on the magnitude relationship between the first current and the second current, calculate the switching frequency compensation value;

[0018] The switching frequency compensation value is added to the resonant frequency of the resonant unit to obtain the switching frequency of the target switching transistor.

[0019] In one possible implementation, the control module is further configured to:

[0020] Subtract the first current from the second current to obtain the current difference, and then obtain the sign of the current difference.

[0021] Multiply the sign of the current difference by the first current to obtain the target current;

[0022] The target current is input into the PI controller to obtain the switching frequency compensation value.

[0023] In one possible implementation, the voltage equalization circuit further includes a current transformer connected between the second terminal of the first capacitor and the second terminal of the second switching transistor for collecting the resonant current.

[0024] In one possible implementation,

[0025] Wherein, ΔT represents the preset time period, and fsw represents the switching frequency.

[0026] Secondly, embodiments of the present invention provide a power supply including the voltage equalization circuit described in the first aspect above.

[0027] The beneficial effects of the embodiments of the present invention compared with the prior art are as follows:

[0028] The voltage equalization circuit provided in this embodiment of the invention, through the cooperation of various switching transistors, enables the switching transistors, resonant unit, first capacitor and second capacitor to form different resonant circuits, thereby transferring energy from the higher voltage capacitor to the lower voltage capacitor and balancing the voltage of the first capacitor and the second capacitor. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a circuit diagram of a voltage equalization circuit provided in an embodiment of the present invention;

[0031] Figure 2 This is a waveform diagram of the switching signals of each switching transistor in the voltage equalization circuit provided in the embodiment of the present invention;

[0032] Figure 3 This is a schematic diagram of the resonant circuit when S1 and S3 are on and S2 and S4 are off, provided in an embodiment of the present invention.

[0033] Figure 4 This is a schematic diagram of the resonant circuit when S1 and S3 are off and S2 and S4 are on, provided in an embodiment of the present invention.

[0034] Figure 5 The waveforms of the first capacitor voltage and the second capacitor voltage provided in the embodiment of the present invention are shown (S1, S2, S3 and S4 are all 50%, and fsw = fr);

[0035] Figure 6 The waveforms of the first capacitor voltage and the second capacitor voltage provided in the embodiment of the present invention are shown (S1 and S3 are 20% duty cycle, S2 and S4 are 80% duty cycle, and fsw = fr).

[0036] Figure 7The waveforms of the first capacitor voltage and the second capacitor voltage provided in the embodiment of the present invention are shown (S1, S2, S3 and S4 are all 50%, and fsw = 0.8fr).

[0037] Figure 8 The waveforms of the first capacitor voltage and the second capacitor voltage provided in the embodiment of the present invention are shown (S1, S2, S3 and S4 are all 50%, and fsw = 1.25fr).

[0038] Figure 9 This is a waveform diagram of the resonant current and the switching signal when the switching frequency is equal to the resonant frequency, provided in an embodiment of the present invention.

[0039] Figure 10 This is a waveform diagram of the resonant current and the switching signal when the switching frequency is less than the resonant frequency, provided in an embodiment of the present invention.

[0040] Figure 11 This is a waveform diagram of the resonant current and the switching signal when the switching frequency is greater than the resonant frequency, provided in an embodiment of the present invention.

[0041] Figure 12 The waveforms of the first and second capacitor voltages of the closed-loop bus voltage equalization control method provided in this embodiment of the invention are shown (S1, S2, S3 and S4 are all 50%, and fsw = 0.8fr).

[0042] Figure 13 The waveforms of the first and second capacitor voltages of the closed-loop bus voltage equalization control method provided in this embodiment of the invention are shown (S1, S2, S3 and S4 are all 50%, and fsw = 1.25fr). Detailed Implementation

[0043] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of the invention. However, those skilled in the art will understand that the invention can be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods are omitted so as not to obscure the description of the invention with unnecessary detail.

[0044] To make the objectives, technical solutions, and advantages of the present invention clearer, specific embodiments will be described below in conjunction with the accompanying drawings.

[0045] Figure 1 This is a schematic diagram of a voltage equalization circuit provided in an embodiment of the present invention. The voltage equalization circuit is applied to a power component. A first capacitor C1 and a second capacitor C2 are connected in series between the positive and negative output terminals of the power component.

[0046] The voltage equalization circuit includes: a first switch S1, a second switch S2, a third switch S3, a fourth switch S4, a resonant unit, and a control module;

[0047] The first terminal of the first switch S1 is connected to the first terminal of the first capacitor C1. The second terminal of the first switch S1 is connected to the first terminal of the second switch S2 and the first terminal of the resonant unit. The second terminal of the second switch S2 is connected to the second terminal of the first capacitor C1, the first terminal of the second capacitor C2 and the first terminal of the third switch S3. The second terminal of the third switch S3 is connected to the first terminal of the fourth switch S4 and the second terminal of the resonant unit. The second terminal of the fourth switch S4 is connected to the second terminal of the second capacitor C2.

[0048] In this embodiment, the power components can be a photovoltaic array, a DC-DC converter circuit, etc., and the connection point of the first capacitor and the second capacitor is connected to the neutral line.

[0049] In one possible implementation, the voltage equalization circuit further includes a control module;

[0050] The control module adjusts the switching frequencies of the first switch, the second switch, the third switch, and the fourth switch based on the resonant frequency of the resonant unit.

[0051] In this embodiment, the switching signals of the first and third switches are the same, the switching signals of the second and fourth switches are the same, and the first and second switches are complementary in conduction.

[0052] In one possible implementation, the control module is further configured to: control the duty cycle of the first switch and the third switch to be 50%, and the duty cycle of the second switch and the fourth switch to be 50%.

[0053] In one possible implementation, such as Figure 1 As shown, the resonant unit includes a resonant inductor Lr and a resonant capacitor Cr;

[0054] The first end of the resonant inductor Lr is connected to the first end of the resonant unit, the second end of the resonant inductor Lr is connected to the first end of the resonant capacitor Cr, and the second end of the resonant capacitor Cr is connected to the second end of the resonant unit.

[0055] like Figure 1 As shown, an inductor and capacitor are connected in series to form a resonant unit. By utilizing the fact that the current drops to zero when the switching transistor is turned on and off during the quasi-resonance process, zero-current switching is achieved, thereby solving the problem of high switching losses in the voltage equalization circuit and improving the system's equalization efficiency to a certain extent.

[0056] Specifically, when the voltage equalization circuit is working, only two sets of complementary PWM signals are needed to achieve control, such as... Figure 2 As shown, the PWM signals of the first switch S1 and the third switch S3 are the same, and the PWM signals of the second switch S2 and the fourth switch S4 are the same. The switching frequency depends on the resonant frequency of the resonant unit.

[0057] Assuming the voltage of the first capacitor Vc1 is greater than the voltage of the second capacitor Vc2, during half a switching cycle when the first switch S1 and the third switch S3 are turned on, the resonant unit is connected to the first capacitor C1 through the first switch S1 and the third switch S3, and the resonant network is in a charging state. Figure 3 As shown, the first capacitor C1, the resonant inductor Lr, and the resonant capacitor Cr form a resonant circuit. The first capacitor C1 charges the resonant capacitor Cr, and the voltage across the resonant capacitor Cr increases until it reaches its highest point. The resonant current undergoes a sinusoidal change during the positive half-cycle.

[0058] Its equation of state is:

[0059]

[0060] We can obtain:

[0061]

[0062] In equations (1) and (2), r is the equivalent internal resistance of the circuit, and V c L represents the voltage across the resonant capacitor, C represents the inductance of the resonant inductor, and C represents the capacitance of the resonant capacitor.

[0063] Let the characteristic equation be:

[0064]

[0065] The characteristic equation then has two conjugate imaginary roots:

[0066]

[0067] According to the general solution formula for second-order nonhomogeneous linear differential equations, the general solution of the above equation is:

[0068] V C =c1e αt cosωt+c2e αt sinωt+V C1 (5)

[0069] In equation (5), c1 and c2 are constants. When t = 0, V C =V C_min If i = 0, combining equations (1) and (5) yields:

[0070]

[0071] Therefore, during the half-switching cycle when the first switch S1 and the third switch S3 are turned on, the expressions for the resonant capacitor voltage and the resonant inductor current are as follows:

[0072]

[0073]

[0074] Where Vc represents the resonant capacitor voltage, i L This represents the resonant inductor current.

[0075] During the half-cycle of the second switch S2 and the fourth switch S4 being turned on, the resonant network is connected to the second capacitor C2 through the second switch S2 and the fourth switch S4, and the resonant network is in a discharging state, such as Figure 4 As shown. The second capacitor C2, the resonant inductor Lr, and the resonant capacitor Cr form a resonant circuit. The resonant capacitor Cr charges the second capacitor C2, and the voltage on the resonant capacitor Cr decreases and gradually falls back to the lowest point. The resonant current changes sinusoidally during the negative half-cycle.

[0076] Similar to the above working principle, when t = 0, Vc = Vc_max, i = 0, the expressions for the resonant capacitor voltage and resonant inductor current during half a switching cycle when the second switch S2 and the fourth switch S4 are turned on are as follows:

[0077]

[0078]

[0079] Because the gating switch is controlled by a pair of complementary drive signals with a frequency equal to the resonant frequency and a duty cycle of approximately 50%, the resonant network continuously alternates between charging and discharging states, transferring energy from the higher-voltage capacitor to the lower-voltage capacitor. For example... Figure 3 and Figure 4 As shown, the resonant current is 0 at the beginning and end of the switching cycle, realizing the switching transistor to turn on and off in a zero-current state, thus reducing switching losses.

[0080] In embodiments of the present invention, the structure of the resonant unit can be as follows: Figure 1 As shown, it can also be other resonant structures such as LLC resonant circuit or LCC resonant circuit.

[0081] In one possible implementation, the resonant unit includes a resonant inductor and a resonant capacitor; the control module is further configured to:

[0082] Calculate the resonant frequency of the resonant element based on its resonant inductance and resonant capacitance.

[0083] The switching frequencies of the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 are adjusted to equal the resonant frequency.

[0084] This embodiment demonstrates a MATLAB simulation of the voltage equalization circuit, and the simulation results are consistent with the target. The simulation in MATLAB was performed with a power output of 100kW, and the results are as follows: Figures 5 to 8 As shown, where, Figure 5 The voltage waveforms of the first capacitor Vc1 and the second capacitor Vc2 are shown when fsw = fr and the duty cycles of the first switch S1, the second switch S2, the third switch S3 and the fourth switch S4 are all 50%. Figure 6 The diagram shows the voltage waveforms of the first capacitor voltage Vc1 and the second capacitor voltage Vc2 when fsw = fr, the duty cycles of the first switch S1 and the third switch S3 are 20%, and the duty cycles of the second switch S2 and the fourth switch S4 are 80%. Figure 7 The voltage waveforms of the first capacitor voltage Vc1 and the second capacitor voltage Vc2 are shown when fsw = 0.8fr and the duty cycles of the first switch S1, the second switch S2, the third switch S3 and the fourth switch S4 are all 50%. Figure 8 The diagram shows the voltage waveforms of the first capacitor Vc1 and the second capacitor Vc2 when fsw = 1.25fr and the duty cycles of the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 are all 50%; where fsw represents the switching frequency and fr represents the resonant frequency. Figures 5 to 8 As shown, when the switching transistors are switched on and off at the resonant frequency and each maintains a 50% duty cycle, the bus capacitor can reach balance more quickly. At the same time, the switching transistors can achieve zero-current switching, resulting in lower losses.

[0085] Therefore, we can conclude that when the switching frequency and the resonant frequency are inconsistent, the bus capacitor equalization time is longer, and there is a larger steady-state error. When fsw = 1 / Nfr (N = 1, 2, 3...), the switching transistors can still achieve zero-current switching. However, when N > 1, taking half a cycle of the first switching transistor S1 and the second switching transistor S3 being turned on as an example, the resonant current exhibits a decaying oscillating waveform, i.e., large current charging, small current discharging, and even smaller current charging... This causes the bus capacitor equalization time to increase. Therefore, in this embodiment, the switching frequency is selected to be equal to the resonant frequency.

[0086] In one possible implementation, the control module is also used for:

[0087] The resonant current sampled at the trigger moment of the switching signal of the target switch is obtained and used as the first current; the target switch is any one of the first switch, the second switch, the third switch, and the fourth switch.

[0088] The resonant current collected at the target delay time is used as the second current. The target delay time is the time when the trigger time of the switching signal of the target switch is delayed by a preset time period.

[0089] Based on the magnitude relationship between the first current and the second current, calculate the switching frequency compensation value;

[0090] The switching frequency compensation value is added to the resonant frequency of the resonant unit to obtain the switching frequency of the target switching transistor.

[0091] In one possible implementation, the control module is also used for:

[0092] Subtract the first current from the second current to obtain the current difference, and then obtain the sign of the current difference.

[0093] Multiply the sign of the current difference by the first current to obtain the target current;

[0094] The target current is input into the PI controller to obtain the switching frequency compensation value.

[0095] In this embodiment, in reality, as temperature changes, the inductance of the resonant inductor and the capacitance of the resonant capacitor will deviate from their design values. This results in the actual switching frequency differing from the resonant frequency, making it impossible to achieve zero-current switching of the switching transistor under all operating conditions, affecting working efficiency, and also causing temperature rise issues. Figure 7 and Figure 8 As shown in the simulation, when the switching frequency is not equal to the resonant frequency, the voltages of the first capacitor Vc1 and the second capacitor Vc2 can still be adjusted to a balanced state, but soft switching cannot be achieved. Furthermore, as the difference between the switching frequency and the resonant frequency increases, the imbalance between the first capacitor and the second capacitor will also increase after stabilization.

[0096] Figure 9 This illustrates the case where the switching frequency equals the resonant frequency. Figure 9 The upper curve represents the current curve after the resonant current undergoes an absolute value change, and the lower curve represents the drive signal of the first switching transistor S1. For example... Figure 9As shown, when the first switch S1 and the third switch S3 are closed (S2 and S4 are open), the resonant current is 0 and begins to change sinusoidally. When the first switch S1 and the third switch S3 are open (S2 and S4 are closed), the resonant current returns to zero and begins to change sinusoidally again until the first switch S1 and the third switch S3 are closed again (S2 and S4 are open again), at which point the resonant current is zero. Figure 9 As shown, when the switching frequency is equal to the resonant frequency, the current of CT1 is exactly 0 at the switching moment.

[0097] When the switching frequency is less than the resonant frequency, the current in the inductor is not zero at the moment the switching transistors operate. During the first cycle, when the first switch S1 and the third switch S3 are closed (S2 and S4 are open), the resonant inductor current is zero and begins to change sinusoidally. Since the switching period is longer than the resonant period, when the first switch S1 and the third switch S3 are open (S2 and S4 are closed), the resonant inductor current has become negative and continues to resonate from this value. The current waveform after the absolute value change is as follows: Figure 10 As shown, Figure 10 The upper waveform is the resonant current waveform after absolute value change, and the lower waveform is the switching signal waveform.

[0098] When the switching frequency is greater than the resonant frequency, in the first cycle, when the first switch S1 and the third switch S3 are closed (S2 and S4 are open), the current in the resonant inductor is 0 and begins to change sinusoidally. Since the switching period is less than the resonant period, when the first switch S1 and the third switch S3 are open (S2 and S4 are closed), the current in the resonant inductor is still positive, and it continues to resonate negatively from this value. The waveform after the absolute value change is as follows: Figure 11 As shown, Figure 11 The upper side shows the resonant current waveform after absolute value change, and the lower side shows the switching signal waveform.

[0099] To address the above situation, this embodiment provides a switching frequency adjustment process. The resonant current is sampled at two sampling times: one is the trigger time of the switching signal's transition edge, and the other is the time after a preset time interval, i.e., the target delay time. (Reference) Figures 5 to 7As the above analysis shows, when the switching frequency is less than the resonant frequency, the absolute value of the current sampled at the target delay time is greater than the absolute value of the current sampled at the transition edge trigger time; conversely, the absolute value of the current sampled at the target delay time is less than the absolute value of the current sampled at the transition edge trigger time. Therefore, the relationship between the switching frequency and the actual resonant frequency can be determined by comparing the magnitudes of the resonant current at the target delay time and the resonant current at the transition edge trigger time, thus determining the direction of PI adjustment. The resonant frequency calculated using the resonant inductor and resonant current is added to the PI loop as a feedforward. The calculated resonant frequency is adjusted using the switching frequency compensation value output by the PI loop to obtain the switching frequency of the switching transistors. This switching frequency is then used to control each switching transistor, adjusting the resonant current at the transition edge trigger time of the switching signal to zero, thereby achieving the goal of tracking the actual resonant frequency with the switching frequency.

[0100] In one possible implementation,

[0101] Wherein, ΔT represents the preset time period, and fsw represents the switching frequency.

[0102] In this embodiment, the transition edge triggering time includes both the rising edge triggering time and the falling edge triggering time. When the switching period is 2ms, the preset time period can be 400ns.

[0103] The control method was verified by MATLAB simulation, and the results are as follows: Figure 7 , Figure 8 , Figure 12 and Figure 13 As shown. According to Figure 7 and Figure 12 The results show that when the switching frequency is lower than the resonant frequency, after closed-loop control, the voltage difference between the first and second capacitors decreases from 581mV to 188mV, and the time required to adjust the voltage difference to 580mV is reduced from 2ms to 235us. Furthermore, after reaching steady state, the switching transistor can achieve soft switching, reducing switching losses.

[0104] according to Figure 8 and Figure 13 It can be seen that when the switching frequency is greater than the resonant frequency, the voltage difference between the first capacitor and the second capacitor is reduced from 572mV to 175mV after closed-loop control, and the time required to adjust the voltage difference to 570mV is reduced from 1.7ms to 236us. Furthermore, after reaching steady state, the switching transistor can achieve soft switching, reducing switching losses.

[0105] Simulation results demonstrate that the switching frequency adjustment process provided in this embodiment effectively avoids poor voltage balance adjustment caused by changes in inductor and capacitor parameters. It effectively reduces the voltage difference between the first and second capacitors, shortens the circuit adjustment time, and ultimately achieves soft switching of the switching transistor, reducing circuit losses.

[0106] In one possible implementation, the voltage equalization circuit further includes a current transformer CT1, which is connected between the second terminal of the first capacitor and the second terminal of the second switching transistor for collecting the resonant current.

[0107] In one possible implementation, the target switch includes an insulated gate bipolar transistor.

[0108] Secondly, embodiments of the present invention provide a power supply, including the voltage equalization circuit described above.

[0109] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A voltage equalization circuit, characterized in that, It is applied to power components; a first capacitor and a second capacitor are connected in series between the positive and negative output terminals of the power components; the voltage equalization circuit includes: a first switch, a second switch, a third switch, a fourth switch, and a resonant unit; The first terminal of the first switch is connected to the first terminal of the first capacitor. The second terminal of the first switch is connected to the first terminal of the second switch and the first terminal of the resonant unit. The second terminal of the second switch is connected to the second terminal of the first capacitor, the first terminal of the second capacitor, and the first terminal of the third switch. The second terminal of the third switch is connected to the first terminal of the fourth switch and the second terminal of the resonant unit. The second terminal of the fourth switch is connected to the second terminal of the second capacitor. The voltage equalization circuit also includes a control module; The control module adjusts the switching frequencies of the first switch, the second switch, the third switch, and the fourth switch based on the resonant frequency of the resonant unit. The control module is also used for: The resonant current sampled at the trigger moment of the switching signal of the target switch is obtained and used as the first current; the target switch is any one of the first switch, the second switch, the third switch, and the fourth switch. The resonant current collected at the target delay time is used as the second current. The target delay time is the time when the trigger time of the switching signal of the target switch is delayed by a preset time period. Based on the magnitude relationship between the first current and the second current, calculate the switching frequency compensation value; The switching frequency compensation value is added to the resonant frequency of the resonant unit to obtain the switching frequency of the target switching transistor.

2. The voltage equalization circuit according to claim 1, characterized in that, The control module is further configured to: control the duty cycle of the first switch and the third switch to be 50%, and the duty cycle of the second switch and the fourth switch to be 50%.

3. The voltage equalization circuit according to claim 1, characterized in that, The resonant unit includes a resonant inductor and a resonant capacitor; The first end of the resonant inductor is connected to the first end of the resonant unit, the second end of the resonant inductor is connected to the first end of the resonant capacitor, and the second end of the resonant capacitor is connected to the second end of the resonant unit.

4. The voltage equalization circuit according to claim 1, characterized in that, The resonant unit includes a resonant inductor and a resonant capacitor; the control module is also used for: The resonant frequency of the resonant unit is calculated based on its resonant inductance and resonant capacitance. The switching frequencies of the first, second, third, and fourth switching transistors are adjusted to equal the resonant frequency.

5. The voltage equalization circuit according to claim 1, characterized in that, The control module is also used for: Subtract the first current from the second current to obtain the current difference, and then obtain the sign of the current difference. Multiply the sign of the current difference by the first current to obtain the target current; The target current is input into the PI controller to obtain the switching frequency compensation value.

6. The voltage equalization circuit according to claim 1, characterized in that, The voltage equalization circuit also includes a current transformer, which is connected between the second terminal of the first capacitor and the second terminal of the second switching transistor, for collecting the resonant current.

7. The voltage equalization circuit according to claim 1, characterized in that, ； in, The preset time period is represented by fsw, which represents the switching frequency.

8. A power supply, characterized in that, Includes the voltage equalization circuit as described in any one of claims 1 to 7.

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