Inverter and control method thereof

Abstract

The application provides an inverter and a control method thereof. The inverter is suitable for a power supply system, and comprises an inverter circuit, an acquisition circuit, a balancing circuit and an inductor. The acquisition circuit is used for detecting a DC bus voltage to obtain an end voltage value of a first capacitor and a second capacitor. The balancing circuit is used for controlling the conduction or the turn-off of a plurality of switch tubes when the end voltage value of a target capacitor is less than or equal to a first voltage threshold, so as to adjust the current for charging the target capacitor through the inductor, and to reduce the end voltage difference between the target capacitor and a non-target capacitor in the two groups of capacitors. By using the application, when the end voltage difference between the two groups of capacitors in the inverter circuit is large, the output current of the inductor is adjusted by the balancing circuit to charge the target capacitor, the end voltage difference between the two groups of capacitors in the inverter circuit is reduced, the stability and the power supply efficiency of the inverter are improved, the structure is simple, the method is simple and convenient, and the applicability is strong.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and in particular to an inverter and its control method. Background Technology

[0002] In the field of power electronics, the inverter circuit in an inverter converts DC power from a power source into AC power to supply the load. Among these, some three-level inverter circuits (e.g., Neutral Point Clamped (NPC) inverter circuits) are widely used due to their advantages such as high safety, high efficiency, low loss, and low harmonics. Typically, a three-level inverter circuit (i.e., an inverter circuit) includes two sets of capacitors connected in series and multiple switching arms. The series connection point of the two sets of capacitors is the midpoint of the inverter circuit, and each switching arm includes multiple switching transistors. Ideally, during one power supply cycle of the inverter circuit, the amount of charge flowing into and out of the midpoint of the inverter circuit is the same; that is, the voltage across the two sets of capacitors connected in series in the inverter circuit is equal. However, in practical applications, the operating states of the switching transistors in the switching arms of the inverter circuit are usually asymmetrical (for example, different switching transistor models, different losses, asymmetrical loads, or affected by factors such as switching dead zones). This results in the amount of charge flowing into and out of the midpoint of the inverter circuit not being the same within a power supply cycle. In other words, the charging (or discharging) of the two sets of series-connected capacitors in the inverter circuit is not equal, leading to unequal voltages on the two sets of series-connected capacitors (i.e., unbalanced midpoint voltage of the inverter circuit, or unbalanced voltages on the positive and negative DC buses). This can cause distortion in the output voltage (or output current) of the inverter circuit, and may even damage the power components in the system.

[0003] During their research and practice, the inventors of this application discovered that in the prior art, the method of injecting common-mode components into the switching arms of an inverter circuit to balance the midpoint voltage has poor adaptability, poor regulation capability, and poor control effect because the common-mode component balancing capability is limited and it reduces the output power of the switching arms. Summary of the Invention

[0004] This application provides an inverter and its control method, which can charge the target capacitor by adjusting the output current of the inductor through a balancing circuit when the voltage difference between the two sets of capacitors in the inverter circuit is large, thereby reducing the voltage difference between the two sets of capacitors in the inverter circuit, improving the stability and power supply efficiency of the inverter, and having a simple structure, convenient method and strong applicability.

[0005] In a first aspect, this application provides an inverter, which may include an inverter circuit, a data acquisition circuit, a balancing circuit, and an inductor. The inverter circuit may include at least one switching bridge arm and a first capacitor and a second capacitor connected in series. The balancing circuit may include multiple switching transistors. Here, one end of the inverter circuit can be used to connect to a power source through a positive DC bus and a negative DC bus, and the other end of the inverter circuit can be used to connect to a load. The first capacitor and the second capacitor are connected in series and then connected in parallel with at least one switching bridge arm between the positive DC bus and the negative DC bus. The data acquisition circuit is connected to the positive DC bus, the negative DC bus, the series connection point of the first capacitor and the second capacitor, and the balancing circuit. The balancing circuit is connected to the series connection point of the first capacitor and the second capacitor through an inductor. The data acquisition circuit can detect the DC bus voltage to obtain the terminal voltage values ​​of the first capacitor and the second capacitor. The balancing circuit can be used to control the on or off of multiple switching transistors when the terminal voltage value of the target capacitor is less than or equal to a first voltage threshold, so as to adjust the current charging the target capacitor through the inductor, thereby reducing the terminal voltage difference between the target capacitor and the non-target capacitor in the two sets of capacitors, wherein the target capacitor is the capacitor with the smaller terminal voltage value between the first capacitor and the second capacitor.

[0006] In this application, the power supply can be connected to the inverter circuit via a positive DC bus and a negative DC bus. The inverter circuit can convert the DC power provided by the power supply into AC power to supply the load. During power supply, the inverter circuit can charge and discharge the capacitors (e.g., the first capacitor and the second capacitor) in the inverter circuit by turning on and off different switching transistors, converting the DC power provided by the power supply into AC power to be transmitted to the load. It is understood that when the output voltage (or output current) of the inverter is asymmetrical (e.g., due to different switching transistor models, different losses, asymmetrical load, or the influence of factors such as switching dead time), it will cause an imbalance between the positive DC bus voltage and the negative DC bus voltage of the inverter circuit. In other words, there will be a large difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor in the inverter circuit. This will cause distortion of the output voltage (or output current) of the inverter circuit, and may even damage the power components in the system.

[0007] In this application, the acquisition circuit can obtain the DC bus voltage of the inverter circuit (e.g., the positive DC bus voltage and / or the negative DC bus voltage, and the voltage at the series connection point of the first and second capacitors (or the midpoint of the inverter circuit)) to obtain the terminal voltage of the target capacitor. Here, the target capacitor can be the capacitor with the smaller terminal voltage value between the first and second capacitors. When the terminal voltage value of the target capacitor is less than or equal to a certain voltage threshold (e.g., a first voltage threshold), it can be considered that the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is large, or that the positive and negative DC bus voltages of the inverter circuit are unbalanced. At this time, the balancing circuit needs to charge the capacitor (e.g., the target capacitor). Here, the first voltage threshold can be determined based on the rated terminal voltage of the capacitor (first capacitor or second capacitor) in the inverter circuit, or it can be determined based on a voltage threshold obtained by the inverter through acquisition, collection, reception, detection, or storage (for example, the first voltage threshold can be a voltage value less than 1 / 2 of the bus voltage, where the bus voltage is the voltage difference between the positive DC bus voltage and the negative DC bus voltage). The specific value can be set according to the application scenario. It can be understood that the first voltage threshold here can be a single voltage value, multiple voltage values, or a voltage range composed of multiple voltage values.

[0008] It is understood that the balancing circuit can determine whether the target capacitor needs to be charged in various ways, and comparing the terminal voltage of the target capacitor with a first voltage threshold is only one of them. The balancing circuit can also determine whether the inverter circuit capacitor needs to be charged in other ways, such as when the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is greater than or equal to a certain threshold, or when the voltage difference between the terminal voltage of the first capacitor (or the second capacitor) and the 1 / 2 bus voltage is greater than or equal to a certain threshold, the balancing circuit can determine that the inverter circuit capacitor needs to be charged. This application only describes the balancing circuit comparing the terminal voltage of the target capacitor with the first voltage threshold to determine whether the inverter circuit capacitor needs to be charged as an example. Other comparison methods can be set based on specific application scenarios and are also within the scope of this invention. Here, after the balancing circuit (e.g., by comparing the terminal voltage of the target capacitor with the first voltage threshold) determines that the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is large, or in other words, determines that the positive and negative DC bus voltages of the inverter circuit are unbalanced, the balancing circuit can charge the target capacitor through an inductor to increase the terminal voltage value of the target capacitor. Here, the balancing circuit includes multiple switching transistors. The balancing circuit can control the conduction or cutoff of each switching transistor to adjust the current charging the target capacitor through the inductor (for example, increasing the current charging the target capacitor), thereby reducing the voltage difference between the target capacitor and the non-target capacitor in the two sets of capacitors (that is, reducing the voltage difference between the first capacitor and the second capacitor). In other words, it balances the positive DC bus voltage and the negative DC bus voltage of the inverter circuit.

[0009] By using this application, when the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is large, the inverter can adjust the output current of the inductor through the balancing circuit to charge the target capacitor, thereby reducing the voltage difference between the two sets of capacitors in the inverter circuit, balancing the positive and negative bus voltages, improving the stability and power supply efficiency of the inverter, and having a simple structure, convenient method, and strong applicability.

[0010] In conjunction with the first aspect, in a first possible implementation, the balancing circuit can also be used to control multiple switching transistors to remain off when the terminal voltage of the target capacitor is greater than or equal to a second voltage threshold, thereby stopping the charging of the target capacitor. Here, when the terminal voltage of the target capacitor is greater than or equal to a certain voltage threshold (e.g., the second voltage threshold), it can be considered that the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is small, or that the positive and negative DC bus voltages of the inverter circuit are in a balanced state. At this time, the balancing circuit does not need to charge the capacitor (e.g., the target capacitor). Here, the second voltage threshold can be determined based on the rated terminal voltage of the capacitor (first capacitor or second capacitor) in the inverter circuit, or based on a voltage threshold obtained by the inverter through acquisition, collection, reception, detection, or storage (e.g., the second voltage threshold can be a voltage value less than 1 / 2 the bus voltage and greater than or equal to the first voltage threshold), and can be specifically set according to the application scenario. It can be understood that the second voltage threshold here can be a single voltage value, multiple voltage values, or a voltage range composed of multiple voltage values. Here, the second voltage threshold can be greater than or equal to the first voltage threshold. When the second voltage threshold is greater than the first voltage threshold, the inverter can avoid repeatedly starting and stopping charging the target capacitor through the balancing circuit before the target capacitor's terminal voltage is stably greater than the first voltage threshold. In other words, when the second voltage threshold is greater than the first voltage threshold, the inverter can, after the target capacitor's terminal voltage stabilizes (e.g., stably exceeds the first voltage threshold), determine that the difference between the terminal voltages of the first and second capacitors is small, or in other words, determine that the positive and negative DC bus voltages of the inverter circuit are in a balanced state, before stopping charging the target capacitor through the balancing circuit.

[0011] It is understood that the balancing circuit can determine whether to stop charging the target capacitor in various ways, and comparing the terminal voltage of the target capacitor with a second voltage threshold is only one of them. The balancing circuit can also determine whether to stop charging the inverter circuit's capacitor in other ways, such as when the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is less than or equal to a certain threshold, or when the voltage difference between the terminal voltage of the first capacitor (or the second capacitor) and the 1 / 2 bus voltage is less than or equal to a certain threshold, the balancing circuit can determine that charging the inverter circuit's capacitor is not necessary. This application only describes the balancing circuit comparing the terminal voltage of the target capacitor with the second voltage threshold to determine whether to stop charging the inverter circuit's capacitor as an example. Other comparison methods can be set based on specific application scenarios and are also within the scope of this invention. Here, after the balancing circuit (e.g., by comparing the terminal voltage of the target capacitor with the second voltage threshold) determines that the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is small, or in other words, determines that the positive and negative DC bus voltages of the inverter circuit are in a balanced state, the balancing circuit can stop charging the target capacitor to increase the terminal voltage value of the target capacitor. Here, the balancing circuit can control each switch in the balancing circuit to remain off, so as to stop charging the target capacitor, save energy, and reduce costs.

[0012] By using this application, the inverter can stop charging the target capacitor through the balancing circuit when the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is small. This reduces the power consumption of the balancing circuit, lowers the cost, and improves the stability and power supply efficiency of the inverter. The structure is simple, the method is convenient, and the applicability is strong.

[0013] In conjunction with the first aspect or the first possible implementation of the first aspect, in the second possible implementation, the balancing circuit may include a control circuit and at least one balancing bridge arm. One balancing bridge arm may include two switches connected in series. The control circuit is connected to an inductor through at least one balancing bridge arm, and a data acquisition circuit is connected to the control circuit. The data acquisition circuit may also obtain the half-bus voltage value based on the DC bus voltage. The control circuit may generate a balancing modulation signal based on the terminal voltage value of the target capacitor and the half-bus voltage value, and control the on / off state of the switches in at least one balancing bridge arm through the balancing modulation signal to adjust the output current of the inductor.

[0014] In this application, the balancing circuit includes at least one balancing bridge arm. For example, the balancing circuit may include a half-bridge circuit with two series-connected switches as one balancing bridge arm, or a full-bridge circuit with four switches as two balancing bridge arms. Here, the acquisition circuit can acquire the positive DC bus voltage and negative DC bus voltage of the inverter circuit, and obtain the half-bus voltage value (i.e., 1 / 2 bus voltage value) based on the positive DC bus voltage and negative DC bus voltage. Here, the control circuit (e.g., a voltage regulation loop (e.g., a proportional-integral regulation circuit) and a drive control circuit, or other circuits with voltage regulation and drive control functions) can generate a balancing modulation signal based on the terminal voltage value of the target capacitor and the half-bus voltage value, controlling the switching transistors in the balancing circuit to turn on or off. For example, the control circuit can generate a pulse width modulation (PWM) wave as the balancing modulation signal, or generate a drive pulse signal based on the PWM wave as the balancing modulation signal. Here, the balanced modulation signal can control the output current of the balanced circuit. The output current of the balanced circuit can charge the inductor, and the output current of the inductor during discharge can charge the target capacitor, thereby reducing the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor, and balancing the positive and negative DC bus voltages. It is understood that the control circuit provided in this application can use a discontinuous pulse width modulation (DPWM) wave as the balanced modulation signal, or other PWM waves (e.g., sinusoidal pulse width modulation (SPWM), third harmonic injection pulse width modulation (THIPWM), carrier-based space vector pulse width modulation (CBPWM), etc.) as the balanced modulation signal. It can also use drive pulse signals generated based on these PWM waves as the balanced modulation signal, making it widely applicable and providing good control performance.

[0015] In conjunction with the second possible implementation of the first aspect, in the third possible implementation, the acquisition circuit can also be used to acquire the output current value of the series connection point of the first capacitor and the second capacitor, and the input current value of the series connection point of the first capacitor and the second capacitor. The control circuit here can also generate a voltage regulation command based on the terminal voltage value of the target capacitor and the half-bus voltage value, generate a balanced modulation signal based on the voltage regulation command, the output current value of the series connection point of the first capacitor and the second capacitor, and the input current value of the series connection point of the first capacitor and the second capacitor, and control the on / off state of the switching transistor in at least one balanced bridge arm through the balanced modulation signal to regulate the output current of the inductor.

[0016] Using this application, the acquisition circuit can obtain the output current value and the input current value of the series connection point of the first and second capacitors (or the midpoint of the inverter circuit). Here, the output current value of the series connection point of the first and second capacitors can be determined by adding the current values ​​output from the series connection point of the first and second capacitors to each switching arm of the inverter circuit, or it can be determined in other ways. Here, the input current value of the series connection point of the first and second capacitors can be determined by the output current of the inductor connected to the series connection point of the first and second capacitors, or it can be determined in other ways. Here, the reference directions of the output current and input current of the series connection point of the first and second capacitors (or the midpoint of the inverter circuit) can be determined based on the target capacitor. For example, the direction of the output current from the target capacitor to the series connection point of the first and second capacitors is positive, and the direction of the input current from the series connection point of the first and second capacitors to the target capacitor is positive. Here, the control circuit (e.g., a voltage regulation loop or other circuit with voltage regulation function) can generate a voltage regulation command based on the terminal voltage value of the target capacitor and the half-bus voltage value. Furthermore, the control circuit (e.g., a current regulation loop and drive control circuit, or other circuits with current regulation and drive control functions) can generate a balanced modulation signal (e.g., a balanced modulation signal such as a PWM wave) based on the voltage regulation command, the output current value at the series connection point of the first and second capacitors, and the input current value at the series connection point of the first and second capacitors. This balanced modulation signal controls the on / off state of the switching transistor in at least one balanced bridge arm to regulate the output current of the inductor. Here, the balanced modulation signal can control the output current of the balancing circuit, which can charge the inductor. The output current of the inductor during discharge can charge the target capacitor, thereby reducing the difference between the terminal voltages of the first and second capacitors and balancing the positive and negative DC bus voltages. It is understood that the control circuit provided in this application can use DPWM wave as the balanced modulation signal, or it can use other PWM waves (e.g., SPWM wave, THIPWM wave, CBPWM wave, etc.) as the balanced modulation signal, which has a wide range of applications and good control effect.

[0017] In a fourth possible implementation, in conjunction with the first aspect or any possible embodiment of the first aspect, the balancing circuit may further include a control circuit and at least one balancing bridge arm. One balancing bridge arm may include two series-connected switching transistors. The control circuit is connected to an inductor through at least one balancing bridge arm, and a data acquisition circuit is connected to the control circuit. The data acquisition circuit may also obtain a half-bus voltage value based on the DC bus voltage, and acquire the output current value and input current value of the series connection point of the first and second capacitors. The control circuit may also generate a balancing modulation signal based on the terminal voltage value of the target capacitor, the half-bus voltage value, the output current value of the series connection point of the first and second capacitors, and the input current value of the series connection point of the first and second capacitors, and control the on / off state of the switching transistors in at least one balancing bridge arm through the balancing modulation signal to adjust the output current of the inductor. Here, the control circuit (e.g., a predictive control circuit and a drive control circuit, or other circuits with predictive control and drive control functions) may generate the balancing modulation signal based on the terminal voltage value of the target capacitor, the half-bus voltage value, the output current value of the series connection point of the first and second capacitors, and the input current value of the series connection point of the first and second capacitors. Furthermore, the control circuit (e.g., a current regulation loop and drive control circuit, or other circuits with current regulation and drive control functions) can generate a balanced modulation signal based on the half-bus voltage value, the output current value at the series connection point of the first and second capacitors, and the input current value at the series connection point of the first and second capacitors, to control the switching transistors in the balancing circuit to turn on or off. For example, the control circuit can generate a PWM wave or other signal as the balanced modulation signal, or generate a drive pulse signal based on the PWM wave as the balanced modulation signal. Here, the balanced modulation signal can control the output current of the balancing circuit. The output current of the balancing circuit can charge the inductor, and the output current of the inductor during discharge can charge the target capacitor, thereby reducing the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor, balancing the positive and negative DC bus voltages. It is understood that the control circuit provided in this application can use a DPWM wave as the balanced modulation signal, or it can use other PWM waves (e.g., SPWM wave, THIPWM wave, CBPWM wave, etc.) as the balanced modulation signal, or it can use a drive pulse signal generated based on these PWM waves as the balanced modulation signal. It has a wide range of applications and good control effect.

[0018] In conjunction with the fourth possible implementation of the first aspect, in the fifth possible implementation, the inverter may further include a filter circuit connected to the switching bridge arm and the load in the inverter circuit. Here, the filter circuit may be an LC filter circuit or an LCL filter circuit composed of inductors and capacitors, or other circuits with filtering functions. This filter circuit can filter out noise components (e.g., high-frequency components) contained in the output current (or output voltage) of the inverter circuit, improving power supply stability.

[0019] Secondly, this application provides a power supply system, which may include a power source and an inverter. The inverter may include an inverter circuit, a data acquisition circuit, a balancing circuit, and an inductor. The inverter circuit may include at least one switching arm and a first capacitor and a second capacitor connected in series. The balancing circuit may include multiple switching transistors. One end of the inverter circuit can be used to connect to the power source through a positive DC bus and a negative DC bus, and the other end of the inverter circuit can be used to connect to a load. The two sets of capacitors in the inverter circuit are connected in series and then connected in parallel with at least one switching arm between the positive DC bus and the negative DC bus. The data acquisition circuit is connected to the positive DC bus, the negative DC bus, the series connection point of the first capacitor and the second capacitor of the inverter circuit, and the balancing circuit. The balancing circuit is connected to the series connection point of the first capacitor and the second capacitor through an inductor.

[0020] By using this application, when the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is large, the inverter can adjust the output current of the inductor through the balancing circuit to charge the target capacitor, thereby reducing the voltage difference between the two sets of capacitors in the inverter circuit, balancing the positive and negative bus voltages, improving the stability and power supply efficiency of the inverter, and having a simple structure, convenient method, and strong applicability.

[0021] In conjunction with the second aspect, in the first possible implementation, the power supply system may further include a combiner box through which the power supply is connected to the inverter.

[0022] In conjunction with the first possible implementation of the second aspect, in the second possible implementation, the power supply system may further include a DC bus, the power supply being connected to the DC bus via a combiner box, and the DC bus being connected to an inverter.

[0023] In conjunction with the second possible implementation of the second aspect, in the third possible implementation, the load is the power grid, and the power supply system may also include a grid connection device, through which the inverter is connected to the power grid.

[0024] In this application, the functional modules of the power supply system are composed in a variety of flexible ways, which can adapt to different power supply environments, improve the diversity of application scenarios of the power supply system, and enhance the adaptability of the power supply system.

[0025] Thirdly, this application provides a control method for an inverter. This control method is applicable to an inverter, which may include an inverter circuit, a data acquisition circuit, a balancing circuit, and an inductor. The inverter circuit may include at least one switching bridge arm and a first capacitor and a second capacitor connected in series. The balancing circuit may include multiple switching transistors. Here, one end of the inverter circuit can be used to connect to a power source through a positive DC bus and a negative DC bus, and the other end of the inverter circuit can be used to connect to a load. The first capacitor and the second capacitor are connected in series and then connected in parallel with at least one switching bridge arm between the positive DC bus and the negative DC bus. The data acquisition circuit is connected to the positive DC bus, the negative DC bus, the series connection point of the first capacitor and the second capacitor, and the balancing circuit. The balancing circuit is connected to the series connection point of the first capacitor and the second capacitor through an inductor. The method may include:

[0026] The DC bus voltage is detected to obtain the terminal voltage values ​​of the first and second capacitors. When the terminal voltage value of the target capacitor is less than or equal to a first voltage threshold, multiple switching transistors are controlled to turn on or off to adjust the current of the inductor charging the target capacitor, thereby reducing the terminal voltage difference between the target capacitor and the non-target capacitor in the two sets of capacitors. The target capacitor is the capacitor with the smaller terminal voltage value between the first and second capacitors.

[0027] In this application, the acquisition circuit can obtain the DC bus voltage of the inverter circuit (e.g., the positive DC bus voltage and / or the negative DC bus voltage, and the voltage at the series connection point of the first and second capacitors (or the midpoint of the inverter circuit)) to obtain the terminal voltage of the target capacitor. Here, the target capacitor can be the capacitor with the smaller terminal voltage value between the first and second capacitors. When the terminal voltage value of the target capacitor is less than or equal to a certain voltage threshold (e.g., a first voltage threshold), it can be considered that the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is large, or that the positive and negative DC bus voltages of the inverter circuit are in an unbalanced state. At this time, the balancing circuit needs to charge the capacitor (e.g., the target capacitor). Here, the first voltage threshold can be determined based on the rated terminal voltage of the capacitor (first capacitor or second capacitor) in the inverter circuit, or it can be determined based on a voltage threshold obtained by the inverter through acquisition, collection, reception, detection, or storage (for example, the first voltage threshold can be a voltage value less than 1 / 2 of the bus voltage, where the bus voltage is the voltage difference between the positive DC bus voltage and the negative DC bus voltage). The specific value can be set according to the application scenario. It can be understood that the first voltage threshold here can be a single voltage value, multiple voltage values, or a voltage range composed of multiple voltage values.

[0028] It is understood that the balancing circuit can determine whether the target capacitor needs to be charged in various ways, and comparing the terminal voltage of the target capacitor with a first voltage threshold is only one of them. The balancing circuit can also determine whether the inverter circuit capacitor needs to be charged in other ways, such as when the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is greater than or equal to a certain threshold, or when the voltage difference between the terminal voltage of the first capacitor (or the second capacitor) and the 1 / 2 bus voltage is greater than or equal to a certain threshold, the balancing circuit can determine that the inverter circuit capacitor needs to be charged. This application only describes the balancing circuit comparing the terminal voltage of the target capacitor with the first voltage threshold to determine whether the inverter circuit capacitor needs to be charged as an example. Other comparison methods can be set based on specific application scenarios and are also within the scope of this invention. Here, after the balancing circuit (e.g., by comparing the terminal voltage of the target capacitor with the first voltage threshold) determines that the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is large, or in other words, determines that the positive and negative DC bus voltages of the inverter circuit are unbalanced, the balancing circuit can charge the target capacitor through an inductor to increase the terminal voltage value of the target capacitor. Here, the balancing circuit includes multiple switching transistors. The balancing circuit can control the conduction or cutoff of each switching transistor to adjust the current charging the target capacitor through the inductor (for example, increasing the current charging the target capacitor), thereby reducing the voltage difference between the target capacitor and the non-target capacitor in the two sets of capacitors (that is, reducing the voltage difference between the first capacitor and the second capacitor). In other words, it balances the positive DC bus voltage and the negative DC bus voltage of the inverter circuit.

[0029] By using this application, when the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is large, the inverter can adjust the output current of the inductor through the balancing circuit to charge the target capacitor, thereby reducing the voltage difference between the two sets of capacitors in the inverter circuit, balancing the positive and negative bus voltages, improving the stability and power supply efficiency of the inverter, and having a simple structure, convenient method, and strong applicability.

[0030] In conjunction with the third aspect, in the first possible implementation, after detecting the DC bus voltage to obtain the terminal voltage values ​​of the first and second capacitors, the method may further include:

[0031] When the terminal voltage of the target capacitor is greater than or equal to the second voltage threshold, multiple switching transistors are controlled to remain off to stop charging the target capacitor. The second voltage threshold is greater than or equal to the first voltage threshold.

[0032] Here, when the terminal voltage of the target capacitor is greater than or equal to a certain voltage threshold (e.g., a second voltage threshold), it can be considered that the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is small, or that the positive and negative DC bus voltages of the inverter circuit are in a balanced state. At this time, the balancing circuit does not need to charge the capacitor (e.g., the target capacitor). The second voltage threshold can be determined based on the rated terminal voltage of the capacitor (first capacitor or second capacitor) in the inverter circuit, or it can be determined based on a voltage threshold obtained by the inverter through acquisition, collection, reception, detection, or storage (e.g., the second voltage threshold can be a voltage value less than 1 / 2 the bus voltage and greater than or equal to the first voltage threshold). The specific setting can be determined according to the application scenario. It can be understood that the second voltage threshold can be a single voltage value, multiple voltage values, or a voltage range composed of multiple voltage values. The second voltage threshold can be greater than or equal to the first voltage threshold. When the second voltage threshold is greater than the first voltage threshold, the inverter can avoid repeatedly starting and stopping charging the target capacitor through the balancing circuit when the terminal voltage of the target capacitor has not been stably greater than the first voltage threshold. In other words, when the second voltage threshold is greater than the first voltage threshold, the inverter can determine that the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is small after the terminal voltage of the target capacitor stabilizes (for example, stabilizes above the first voltage threshold), or in other words, determine that the positive DC bus voltage and the negative DC bus voltage of the inverter circuit are in a balanced state, and then stop charging the target capacitor through the balancing circuit.

[0033] It is understood that the balancing circuit can determine whether to stop charging the target capacitor in various ways, and comparing the terminal voltage of the target capacitor with a second voltage threshold is only one of them. The balancing circuit can also determine whether to stop charging the inverter circuit's capacitor in other ways, such as when the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is less than or equal to a certain threshold, or when the voltage difference between the terminal voltage of the first capacitor (or the second capacitor) and the 1 / 2 bus voltage is less than or equal to a certain threshold, the balancing circuit can determine that charging the inverter circuit's capacitor is not necessary. This application only describes the balancing circuit comparing the terminal voltage of the target capacitor with the second voltage threshold to determine whether to stop charging the inverter circuit's capacitor as an example. Other comparison methods can be set based on specific application scenarios and are also within the scope of this invention. Here, after the balancing circuit (e.g., by comparing the terminal voltage of the target capacitor with the second voltage threshold) determines that the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is small, or in other words, determines that the positive and negative DC bus voltages of the inverter circuit are in a balanced state, the balancing circuit can stop charging the target capacitor to increase the terminal voltage value of the target capacitor. Here, the balancing circuit can control each switch in the balancing circuit to remain off, so as to stop charging the target capacitor, save energy, and reduce costs.

[0034] By using this application, the inverter can stop charging the target capacitor through the balancing circuit when the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is small. This reduces the power consumption of the balancing circuit, lowers the cost, and improves the stability and power supply efficiency of the inverter. The structure is simple, the method is convenient, and the applicability is strong.

[0035] In conjunction with the third aspect or the first possible implementation of the third aspect, in the second possible implementation, the balancing circuit may include a control circuit and at least one balancing bridge arm, one balancing bridge arm may include two switches connected in series, the control circuit is connected to an inductor through at least one balancing bridge arm, and the acquisition circuit is connected to the control circuit. After detecting the DC bus voltage to obtain the terminal voltage values ​​of the first capacitor and the second capacitor, the method may further include:

[0036] The half-bus voltage value is obtained based on the DC bus voltage. A balanced modulation signal is generated based on the terminal voltage value of the target capacitor and the half-bus voltage value. The balanced modulation signal is used to control the on or off of the switching transistor in at least one balanced bridge arm to regulate the output current of the inductor.

[0037] Using this application, the balancing circuit includes at least one balancing bridge arm. For example, the balancing circuit may include a half-bridge circuit with two series-connected switches as one balancing bridge arm, or a full-bridge circuit with four switches as two balancing bridge arms. Here, the acquisition circuit can acquire the positive DC bus voltage and negative DC bus voltage of the inverter circuit, and obtain the half-bus voltage value (i.e., 1 / 2 bus voltage value) based on the positive DC bus voltage and negative DC bus voltage. Here, the control circuit (e.g., a voltage regulation loop (e.g., a proportional-integral regulation circuit) and drive control circuit, or other circuits with voltage regulation and drive control functions) can generate a balancing modulation signal based on the terminal voltage value of the target capacitor and the half-bus voltage value, controlling the switching transistors in the balancing circuit to turn on or off. For example, the control circuit can generate a PWM wave or other signal as the balancing modulation signal, or generate a drive pulse signal based on the PWM wave as the balancing modulation signal. Here, the balanced modulation signal can control the output current of the balanced circuit. The output current of the balanced circuit can charge the inductor, and the output current of the inductor during discharge can charge the target capacitor, thereby reducing the difference between the terminal voltages of the first and second capacitors and balancing the positive and negative DC bus voltages. It can be understood that the control circuit provided in this application can use a DPWM wave as the balanced modulation signal, or other PWM waves (e.g., SPWM wave, THIPWM wave, CBPWM wave, etc.) as the balanced modulation signal, or a drive pulse signal generated based on these PWM waves as the balanced modulation signal. It has wide applicability and good control effect.

[0038] In conjunction with the second possible implementation of the third aspect, in the third possible implementation, after obtaining the half-bus voltage value based on the DC bus voltage, the method may further include:

[0039] The output current value and input current value of the series connection point of the first and second capacitors are obtained. A voltage regulation command is generated based on the terminal voltage value of the target capacitor and the half-bus voltage value. A balanced modulation signal is generated based on the voltage regulation command, the output current value of the series connection point of the first and second capacitors, and the input current value of the series connection point of the first and second capacitors. The balanced modulation signal is used to control the on or off of the switching transistor in at least one balanced bridge arm to regulate the output current of the inductor.

[0040] Using this application, the acquisition circuit can obtain the output current value and the input current value of the series connection point of the first and second capacitors (or the midpoint of the inverter circuit). Here, the output current value of the series connection point of the first and second capacitors can be determined by adding the current values ​​output from the series connection point of the first and second capacitors to each switching arm of the inverter circuit, or it can be determined in other ways. Here, the input current value of the series connection point of the first and second capacitors can be determined by the output current of the inductor connected to the series connection point of the first and second capacitors, or it can be determined in other ways. Here, the reference directions of the output current and input current of the series connection point of the first and second capacitors (or the midpoint of the inverter circuit) can be determined based on the target capacitor. For example, the direction of the output current from the target capacitor to the series connection point of the first and second capacitors is positive, and the direction of the input current from the series connection point of the first and second capacitors to the target capacitor is positive. Here, the control circuit (e.g., a voltage regulation loop or other circuit with voltage regulation function) can generate a voltage regulation command based on the terminal voltage value of the target capacitor and the half-bus voltage value. Furthermore, the control circuit (e.g., a current regulation loop and drive control circuit, or other circuits with current regulation and drive control functions) can generate a balanced modulation signal (e.g., a balanced modulation signal such as a PWM wave) based on the voltage regulation command, the output current value at the series connection point of the first and second capacitors, and the input current value at the series connection point of the first and second capacitors. This balanced modulation signal controls the on / off state of the switching transistor in at least one balanced bridge arm to regulate the output current of the inductor. Here, the balanced modulation signal can control the output current of the balancing circuit, which can charge the inductor. The output current of the inductor during discharge can charge the target capacitor, thereby reducing the difference between the terminal voltages of the first and second capacitors and balancing the positive and negative DC bus voltages. It is understood that the control circuit provided in this application can use DPWM wave as the balanced modulation signal, or it can use other PWM waves (e.g., SPWM wave, THIPWM wave, CBPWM wave, etc.) as the balanced modulation signal, which has a wide range of applications and good control effect.

[0041] In conjunction with the third aspect or any possible implementation of the third aspect, in a fourth possible implementation, the balancing circuit may further include a control circuit and at least one balancing bridge arm, wherein one balancing bridge arm may include two series-connected switching transistors, the control circuit is connected to an inductor through at least one balancing bridge arm, and the acquisition circuit is connected to the control circuit. After detecting the DC bus voltage to obtain the terminal voltage values ​​of the first capacitor and the second capacitor, the method may further include:

[0042] The half-bus voltage value is obtained based on the DC bus voltage, and the output current value and input current value of the series connection point of the first and second capacitors are acquired. A balanced modulation signal is generated based on the terminal voltage value of the target capacitor, the half-bus voltage value, the output current value of the series connection point of the first and second capacitors, and the input current value of the series connection point of the first and second capacitors. This balanced modulation signal is used to control the on / off state of the switching transistor in at least one balanced bridge arm to adjust the output current of the inductor.

[0043] Here, the control circuit (e.g., a predictive control circuit and a drive control circuit, or other circuits with predictive control and drive control functions) can generate a balanced modulation signal based on the terminal voltage value of the target capacitor, the half-bus voltage value, the output current value of the series connection point of the first and second capacitors, and the input current value of the series connection point of the first and second capacitors. Furthermore, the control circuit (e.g., a current regulation loop and a drive control circuit, or other circuits with current regulation and drive control functions) can generate the balanced modulation signal based on the half-bus voltage value, the output current value of the series connection point of the first and second capacitors, and the input current value of the series connection point of the first and second capacitors, controlling the on / off state of the switching transistors in the balancing circuit. For example, the control circuit can generate a PWM wave or other signal as the balanced modulation signal, or generate a drive pulse signal based on the PWM wave as the balanced modulation signal. Here, the balanced modulation signal can control the output current of the balancing circuit. The output current of the balancing circuit can charge the inductor, and the output current of the inductor during discharge can charge the target capacitor, thereby reducing the difference between the terminal voltages of the first and second capacitors and balancing the positive and negative DC bus voltages. It is understood that the control circuit provided in this application can use DPWM wave as the balanced modulation signal, or other PWM waves (e.g., SPWM wave, THIPWM wave, CBPWM wave, etc.) as the balanced modulation signal, or drive pulse signal generated based on these PWM waves as the balanced modulation signal. It has a wide range of applications and good control effect. Attached Figure Description

[0044] Figure 1 This is a schematic diagram of an application scenario for the inverter provided in the embodiments of this application;

[0045] Figure 2 This is a schematic diagram of the inverter provided in an embodiment of this application;

[0046] Figure 3 This is another structural schematic diagram of the inverter provided in the embodiments of this application;

[0047] Figure 4 This is another structural schematic diagram of the inverter provided in the embodiments of this application;

[0048] Figure 5 This is another structural schematic diagram of the inverter provided in the embodiments of this application;

[0049] Figure 6 This is another structural schematic diagram of the inverter provided in the embodiments of this application;

[0050] Figure 7 This is a schematic diagram of the power supply system provided in an embodiment of this application;

[0051] Figure 8 This is a flowchart illustrating the control method provided in an embodiment of this application;

[0052] Figure 9 This is another schematic diagram of the control method provided in the embodiments of this application. Detailed Implementation

[0053] In the field of power electronics, inverter circuits are typically used to convert direct current (DC) energy into alternating current (AC) energy, enabling the transfer of electrical energy between the power source and the load. Three-level inverter circuits (e.g., NPC inverter circuits and their extensions) are widely used due to their advantages such as high safety, high efficiency, low loss, and low harmonics. A typical three-level inverter circuit includes two sets of capacitors connected in series and multiple switching arms. The series connection point of the two sets of capacitors is the midpoint n of the inverter circuit. Each switching arm includes four switching transistors and two clamping diodes. In operation, the inverter circuit charges and discharges the capacitors by switching different transistors on and off, converting the DC power supplied by the power source into AC power for the load. It's understandable that when the inverter's output voltage (or output current) is asymmetrical (e.g., due to different transistor models, losses, load asymmetry, or the influence of switch dead zones), the positive and negative DC bus voltages of the inverter circuit will become unbalanced. In other words, there will be a significant difference in the terminal voltages of the two sets of capacitors in the inverter circuit. This will cause distortion in the inverter's output voltage (or output current) and may even damage the power components within the system. Therefore, during inverter operation, it is necessary to control the difference in the terminal voltages of the two sets of capacitors in the inverter circuit (e.g., by charging the capacitors) to maintain a balance between the positive and negative DC bus voltages.

[0054] This application provides an inverter and its control method, which can charge the target capacitor by adjusting the output current of the inductor through a balancing circuit when the voltage difference between the two sets of capacitors in the inverter circuit is large, thereby reducing the voltage difference between the two sets of capacitors in the inverter circuit, improving the stability and power supply efficiency of the inverter, and having a simple structure, convenient method and strong applicability.

[0055] The inverter provided in this application is applicable to various fields, including new energy power generation, traditional power generation peak shaving and frequency regulation, power supply for critical equipment, and new energy vehicles. The specific application scenario can be determined accordingly, and no limitations are imposed here. The inverter provided in this application is also applicable to different power supply systems, such as energy storage systems, uninterruptible power supply systems, and motor drive systems. The specific application scenario can be determined accordingly, and no limitations are imposed here. The inverter provided in this application is adaptable to different application scenarios, such as controlling inverter circuits in solar power environments, wind power environments, pure energy storage environments, or other application scenarios. The following explanation will use the application scenario of controlling inverter circuits in a pure energy storage environment as an example; further details will not be elaborated upon here.

[0056] Please see Figure 1 , Figure 1 This is a schematic diagram illustrating an application scenario of the inverter provided in this application embodiment. In a pure energy storage power supply system, such as... Figure 1 As shown, the power supply system includes an inverter 1, a power supply 2, and a load 3. The inverter 1 includes an inverter circuit 11, and the power supply 2 can be connected to the load 3 via the inverter circuit 11. In some feasible embodiments, the power supply 2 can supply power to the load 3 via the inverter circuit 11. It is understood that the power supply 2 provided in this application is suitable for powering base station equipment in remote areas with no or poor mains power, or for powering household appliances (such as refrigerators, air conditioners, etc.), and other application scenarios involving powering various types of electrical equipment. The specific application scenario can be determined accordingly, and no limitations are imposed here. Furthermore, it can be understood that... Figure 2The load 3 in the diagram can include the power grid, which may include transmission lines, power transfer stations, communication base stations, or household appliances and other electrical equipment or power transmission equipment. The load 3 can also include motors, rectifiers, and other loads (electrical devices or power transmission devices) whose voltage and current relationships are non-linear during operation (power supply or power consumption). In some feasible implementations, the inverter circuit 11 can be a three-level inverter circuit (e.g., an NPC inverter circuit). The inverter circuit 11 may include two sets of capacitors (e.g., a first capacitor C1 and a second capacitor C2) and at least one switching bridge arm. Here, a set of capacitors can be a single capacitor or a capacitor composed of multiple integrated capacitors. During power supply, the inverter circuit 11 can charge and discharge the two sets of capacitors respectively by turning on and off different switching transistors in the switching bridge arm, converting the DC power supplied by the power source into AC power for transmission to the load. It is understandable that when the output voltage (or output current) of inverter 1 is asymmetrical (e.g., due to different switching transistor models, different losses, asymmetrical load, or the influence of switching dead zone), the amount of charge flowing into and out of the series connection point of the first capacitor C1 and the second capacitor C2 (or the midpoint of inverter circuit 11) is not the same within one power supply cycle. In other words, the charging (or discharging) of the two sets of capacitors in inverter circuit 11 is not equal, resulting in unequal voltages on the two sets of capacitors (i.e., the positive DC bus voltage and negative DC bus voltage of inverter circuit 11 are unbalanced, or the midpoint voltage of inverter circuit 11 is unbalanced). This will cause distortion in the output voltage (or output current) of inverter 1, and may even damage the power components within the system. Therefore, during inverter circuit operation, it is necessary to control the difference in terminal voltages of the two sets of capacitors in inverter circuit 11 to maintain a balance between the positive DC bus voltage and the negative DC bus voltage of inverter circuit 11. Here, the inverter 1 may further include a data acquisition circuit 12, a balancing circuit 13, and an inductor. The data acquisition circuit 12 acquires the DC bus voltage of the inverter circuit 11, for example, the positive or negative DC bus voltage, and the voltage at the series connection point of the first capacitor C1 and the second capacitor C2 (or the midpoint of the inverter circuit 11), to obtain the terminal voltage of the target capacitor (first capacitor C1 or second capacitor C2). When the terminal voltage of the target capacitor is less than or equal to a certain voltage threshold (e.g., a first voltage threshold), it can be considered that the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is large, or that the positive and negative DC bus voltages of the inverter circuit are unbalanced. At this time, the balancing circuit can adjust the current charging the target capacitor through the inductor to reduce the voltage difference between the two sets of capacitors, thereby keeping the positive and negative DC bus voltages of the inverter circuit 11 balanced.Here, when the voltage difference between the two sets of capacitors in the inverter circuit 11 is large, the inverter 1 can adjust the output current of the inductor through the balancing circuit 13 to charge the target capacitor, thereby reducing the voltage difference between the two sets of capacitors in the inverter circuit 11, improving the stability and power supply efficiency of the inverter. The structure is simple, the method is convenient, and the applicability is strong.

[0057] The following will combine Figures 2 to 9 The inverter provided in this application and its working principle are illustrated with examples.

[0058] Please see Figure 2 , Figure 2 This is a schematic diagram of the inverter provided in an embodiment of this application. Figure 2 As shown, the power supply system includes a power source, an inverter, and a load. The inverter includes an inverter circuit 101, a data acquisition circuit 102, a balancing circuit 103, and an inductor. The inverter circuit 101 may include at least one switching bridge arm and a first capacitor C1 and a second capacitor C2 connected in series. The balancing circuit 103 may include multiple switching transistors. Here, the inverter circuit 101 can be a multi-level inverter circuit or a multi-level inverter circuit topology. Figure 2 The inverter circuit 101 shown is just one type of three-level inverter circuit, including a first capacitor C1 and a second capacitor C2 connected in series and three switching arms. Specifically, one switching arm consists of switching transistors Ta1, Ta2, Ta3, and Ta4; another consists of switching transistors Tb1, Tb2, Tb3, and Tb4; and yet another consists of switching transistors Tc1, Tc2, Tc3, and Tc4. Here, one end of the inverter circuit 101 can be used to connect to a power supply via the positive and negative DC buses, and the other end can be used to connect to a load. The first capacitor C1 and the second capacitor C2, connected in series, can be connected in parallel with at least one switching arm between the positive and negative DC buses. The acquisition circuit 102 can be connected to the series connection point of the positive DC bus, the negative DC bus, the first capacitor C1, and the second capacitor C2, and the balancing circuit 103 (e.g., ...). Figure 2 (As shown by the dashed line), the balancing circuit 103 can be connected to the series connection point of the first capacitor C1 and the second capacitor C2 via an inductor. The acquisition circuit 102 here can detect the DC bus voltage (e.g., positive DC bus voltage, negative DC bus voltage, and the voltage at the series connection point of the first capacitor C1 and the second capacitor C2) to obtain the terminal voltage value of the target capacitor, where the target capacitor is the one with the smaller terminal voltage value between the first capacitor C1 and the second capacitor C2. The balancing circuit 103 can be used to control the on / off state of multiple switching transistors when the terminal voltage value of the target capacitor is less than or equal to a first voltage threshold, thereby adjusting the current charging the target capacitor through the inductor to reduce the voltage difference between the target capacitor and the non-target capacitor in the two sets of capacitors.

[0059] It is understood that the acquisition circuit 102 can acquire the DC bus voltage (e.g., positive DC bus voltage and / or negative DC bus voltage) of the inverter circuit 101 and the voltage at the series connection point of the first capacitor C1 and the second capacitor C2 (or the midpoint of the inverter circuit 101) to obtain the terminal voltage of the target capacitor. Here, the target capacitor can be the capacitor with the smaller terminal voltage value among the first capacitor C1 and the second capacitor C2. When the terminal voltage value of the target capacitor is less than or equal to a certain voltage threshold (e.g., the first voltage threshold), it can be considered that the difference between the terminal voltage of the first capacitor C1 and the terminal voltage of the second capacitor C2 is large, or that the positive and negative DC bus voltages of the inverter circuit 101 are in an unbalanced state. At this time, the balancing circuit 103 needs to charge the capacitor (e.g., the target capacitor). Here, the first voltage threshold can be determined based on the rated terminal voltage of the capacitor (first capacitor C1 or second capacitor C2) in the inverter circuit 101, or it can be determined based on a voltage threshold obtained by the inverter through acquisition, collection, reception, detection, or storage (for example, the first voltage threshold can be a voltage value less than 1 / 2 of the bus voltage, where the bus voltage is the voltage difference between the positive DC bus voltage and the negative DC bus voltage). The specific value can be set according to the application scenario. It can be understood that the first voltage threshold here can be a single voltage value, multiple voltage values, or a voltage range composed of multiple voltage values.

[0060] In some feasible implementations, the balancing circuit 103 can determine whether the target capacitor needs to be charged in various ways, and comparing the terminal voltage of the target capacitor with a first voltage threshold is just one of them. The balancing circuit 103 can also determine whether the capacitor of the inverter circuit 101 needs to be charged in other ways, such as when the difference between the terminal voltage of the first capacitor C1 and the terminal voltage of the second capacitor C2 is greater than or equal to a certain threshold, or when the voltage difference between the terminal voltage of the first capacitor C1 (or the second capacitor C2) and the 1 / 2 bus voltage is greater than or equal to a certain threshold, the balancing circuit 103 can determine that the capacitor of the inverter circuit 101 needs to be charged. This application only describes the comparison of the terminal voltage of the target capacitor with the first voltage threshold by the balancing circuit 103 to determine whether the capacitor of the inverter circuit 101 needs to be charged as an example. Other comparison methods can be set based on specific application scenarios and are also within the scope of this invention. Here, after the balancing circuit 103 determines, for example by comparing the terminal voltage of the target capacitor with a first voltage threshold, that the difference between the terminal voltage of the first capacitor C1 and the terminal voltage of the second capacitor C2 is large, or in other words, that the positive and negative DC bus voltages of the inverter circuit 101 are unbalanced, the balancing circuit 103 can charge the target capacitor through an inductor to increase the terminal voltage of the target capacitor. Here, the balancing circuit 103 includes multiple switching transistors, which can control the on or off state of each transistor to adjust the current charging the target capacitor through the inductor (e.g., increasing the current charging the target capacitor), thereby reducing the terminal voltage difference between the target capacitor and the non-target capacitor in the two sets of capacitors (i.e., reducing the terminal voltage difference between the first capacitor C1 and the second capacitor C2). In other words, it balances the positive and negative DC bus voltages of the inverter circuit 101.

[0061] By using this application, when the difference between the terminal voltage of the first capacitor C1 and the terminal voltage of the second capacitor C2 is large, the inverter can adjust the output current of the inductor through the balancing circuit 103 to charge the target capacitor, thereby reducing the terminal voltage difference between the two sets of capacitors in the inverter circuit 101, balancing the positive and negative bus voltages, improving the stability and power supply efficiency of the inverter, with a simple structure, convenient method, and strong applicability.

[0062] In some feasible implementations, the balancing circuit 103 can also be used to control multiple switching transistors to remain off when the terminal voltage of the target capacitor is greater than or equal to a second voltage threshold, thereby stopping the charging of the target capacitor. Here, when the terminal voltage of the target capacitor is greater than or equal to a certain voltage threshold (e.g., the second voltage threshold), it can be considered that the difference between the terminal voltage of the first capacitor C1 and the terminal voltage of the second capacitor C2 is small, or that the positive and negative DC bus voltages of the inverter circuit 101 are in a balanced state. At this time, the balancing circuit 103 does not need to charge the capacitor (e.g., the target capacitor). Here, the second voltage threshold can be determined based on the rated terminal voltage of the capacitor (first capacitor C1 or second capacitor C2) in the inverter circuit 101, or it can be determined based on the voltage threshold obtained by the inverter through acquisition, collection, reception, detection, or storage (e.g., the second voltage threshold can be a voltage value less than 1 / 2 of the bus voltage and greater than or equal to the first voltage threshold), which can be set according to the application scenario. It can be understood that the second voltage threshold here can be a single voltage value, multiple voltage values, or a voltage range composed of multiple voltage values. Here, the second voltage threshold can be greater than or equal to the first voltage threshold. When the second voltage threshold is greater than the first voltage threshold, the inverter can avoid repeatedly starting and stopping charging the target capacitor through the balancing circuit 103 before the terminal voltage of the target capacitor is stably greater than the first voltage threshold. That is, when the second voltage threshold is greater than the first voltage threshold, the inverter can, after the terminal voltage of the target capacitor is stable (e.g., stably greater than the first voltage threshold), determine that the difference between the terminal voltage of the first capacitor C1 and the terminal voltage of the second capacitor C2 is small, or in other words, determine that the positive DC bus voltage and the negative DC bus voltage of the inverter circuit 101 are in a balanced state, and then stop charging the target capacitor through the balancing circuit 103.

[0063] It is understood that the balancing circuit 103 can determine whether to stop charging the target capacitor in various ways, and comparing the terminal voltage of the target capacitor with the second voltage threshold is only one of them. The balancing circuit 103 can also determine whether to stop charging the capacitor of the inverter circuit 101 in other ways, such as when the difference between the terminal voltage of the first capacitor C1 and the terminal voltage of the second capacitor C2 is less than or equal to a certain threshold, or when the voltage difference between the terminal voltage of the first capacitor C1 (or the second capacitor C2) and the 1 / 2 bus voltage is less than or equal to a certain threshold, the balancing circuit 103 can determine that charging the capacitor of the inverter circuit 101 is not necessary at this time. This application only describes the balancing circuit 103 comparing the terminal voltage of the target capacitor with the second voltage threshold to determine whether to stop charging the capacitor of the inverter circuit 101 as an example. Other comparison methods can be set based on specific application scenarios and are also within the scope of this invention. Here, after the balancing circuit 103 determines, for example by comparing the terminal voltage of the target capacitor with a second voltage threshold, that the difference between the terminal voltage of the first capacitor C1 and the terminal voltage of the second capacitor C2 is small, or in other words, that the positive and negative DC bus voltages of the inverter circuit 101 are in a balanced state, the balancing circuit 103 can stop charging the target capacitor to increase its terminal voltage value. Here, the balancing circuit 103 can also control the individual switches within it to remain off to stop charging the target capacitor, thus saving energy and reducing costs.

[0064] By using this application, the inverter can stop charging the target capacitor through the balancing circuit 103 when the difference between the terminal voltage of the first capacitor C1 and the terminal voltage of the second capacitor C2 is small. This reduces the power consumption of the balancing circuit 103, lowers the cost, and improves the stability and power supply efficiency of the inverter. The structure is simple, the method is convenient, and the applicability is strong.

[0065] In some feasible implementations, the inverter circuit can be a multilevel inverter circuit of other structures and topologies. See also... Figure 3 , Figure 3 This is another structural schematic diagram of the inverter provided in an embodiment of this application. For example... Figure 3 As shown, the inverter circuit 201 can be a three-level inverter circuit with another structure. Here, the inverter circuit 201 may include a first capacitor C1 and a second capacitor C2 connected in series and three switching bridge arms. That is, a switching bridge arm composed of switching transistors Ta1, Ta2, Ta3, and Ta4 and two diodes; a switching bridge arm composed of switching transistors Tb1, Tb2, Tb3, and Tb4 and two diodes; and a switching bridge arm composed of switching transistors Tc1, Tc2, Tc3, and Tc4 and two diodes. Figure 3 The acquisition circuit 202 and the balancing circuit 203 in the middle are Figure 2 The connection relationship and working principle of the acquisition circuit 102 and the balancing circuit 103 are the same, and will not be described again here.

[0066] The inverter provided in this application is applicable to any inverter circuit and its topology that includes two sets of series capacitors and a switching bridge arm. Using this application, when the voltage difference between the terminals of the first and second capacitors is determined to be large, the inverter can adjust the output current of the inductor through a balancing circuit to charge the target capacitor, thereby reducing the voltage difference between the two sets of capacitors in the inverter circuit, balancing the positive and negative bus voltages, improving the stability and power supply efficiency of the inverter. The structure is simple, the method is convenient, and the applicability is strong.

[0067] In some feasible implementations, the balancing circuit may include control circuitry and at least one balancing bridge arm. See also... Figure 4 , Figure 4 This is another structural schematic diagram of the inverter provided in an embodiment of this application. For example... Figure 4 As shown, the balancing circuit may include a control circuit 3031 and at least one balancing bridge arm 3032. The balancing bridge arm 3032 may include two switching transistors connected in series between the positive and negative DC buses. The control circuit 3031 can be connected to an inductor through the balancing bridge arm 3032, and the acquisition circuit 302 can be connected to the control circuit 3031. The acquisition circuit 302 can also obtain the half-bus voltage value based on the positive and negative DC bus voltages. The control circuit 3031 can generate a balancing modulation signal based on the terminal voltage value of the target capacitor and the half-bus voltage value, and control the on / off state of the switching transistors in at least one balancing bridge arm 3032 through the balancing modulation signal to adjust the output current of the inductor. Here, the balancing circuit includes at least one balancing bridge arm 3032, such as... Figure 4 As shown, the balanced bridge arm 3032 in the balanced circuit can be a half-bridge circuit that includes two switches connected in series (e.g., switch T1 and switch T2).

[0068] In some feasible implementations, the acquisition circuit 302 can acquire the positive DC bus voltage and negative DC bus voltage of the inverter circuit 301, and obtain the half-bus voltage value (i.e., 1 / 2 bus voltage value) based on the positive DC bus voltage and negative DC bus voltage. Here, the control circuit 3031 (e.g., a voltage regulation loop (e.g., a proportional-integral regulation circuit) and drive control circuit 3031, or other circuits with voltage regulation and drive control functions) can generate a balance modulation signal based on the terminal voltage value of the target capacitor and the half-bus voltage value, and control the switching transistor in the balance circuit to turn on or off. For example, the control circuit 3031 can generate a pulse width modulation (PWM) wave signal as the balance modulation signal, or generate a drive pulse signal based on the PWM wave as the balance modulation signal. Here, the balance modulation signal can control the output current of the balance circuit. The output current of the balance circuit can charge the inductor, and the output current of the inductor when discharging can charge the target capacitor, thereby reducing the difference between the terminal voltage of the first capacitor C1 and the terminal voltage of the second capacitor C2, and balancing the positive and negative DC bus voltages. It is understood that the control circuit 3031 provided in this application can use a discontinuous pulse width modulation (DPWM) wave as the balanced modulation signal, or it can use other PWM waves (e.g., sinusoidal pulse width modulation (SPWM), third harmonic injection pulse width modulation (THIPWM), carrier-based space vector pulse width modulation (CBPWM), etc.) as the balanced modulation signal, or it can use a drive pulse signal generated based on these PWM waves as the balanced modulation signal. It has a wide range of applications and good control effect.

[0069] In some feasible implementations, the acquisition circuit 302 can also be used to acquire the output current value of the series connection point of the first capacitor C1 and the second capacitor C2, and the input current value of the series connection point of the first capacitor C1 and the second capacitor C2. The control circuit 3031 can also generate a voltage regulation command based on the terminal voltage value of the target capacitor and the half-bus voltage value, generate a balanced modulation signal based on the voltage regulation command, the output current value of the series connection point of the first capacitor C1 and the second capacitor C2, and the input current value of the series connection point of the first capacitor C1 and the second capacitor C2, and control the on / off state of the switching transistor in at least one balanced bridge arm 3032 through the balanced modulation signal to regulate the output current of the inductor. Here, the acquisition circuit 302 can acquire the output current value of the series connection point of the first capacitor C1 and the second capacitor C2 (or the midpoint of the inverter circuit 301) and the input current value of the series connection point of the first capacitor C1 and the second capacitor C2 (or the midpoint of the inverter circuit 301). Here, the output current value at the series connection point of the first capacitor C1 and the second capacitor C2 can be determined by adding the current values ​​output from the series connection point of the first capacitor C1 and the second capacitor C2 to each switching bridge arm of the inverter circuit 301, or it can be determined by other means. Here, the input current value at the series connection point of the first capacitor C1 and the second capacitor C2 can be determined by the output current of the inductor connected to the series connection point of the first capacitor C1 and the second capacitor C2, or it can be determined by other means. Here, the reference directions of the output current and input current at the series connection point of the first capacitor C1 and the second capacitor C2 (or the midpoint of the inverter circuit 301) can be determined based on the target capacitor. For example, the direction of the output current from the target capacitor to the series connection point of the first capacitor C1 and the second capacitor C2 is positive, and the direction of the input current from the series connection point of the first capacitor C1 and the second capacitor C2 to the target capacitor is positive. Here, the control circuit 3031 (e.g., a voltage regulation loop or other circuit with voltage regulation function) can generate a voltage regulation command based on the terminal voltage value of the target capacitor and the half-bus voltage value. Furthermore, the control circuit 3031 (e.g., a current regulation loop and drive control circuit, or other circuit with current regulation and drive control functions) can generate a balanced modulation signal (e.g., a balanced modulation signal such as a PWM wave) based on the voltage regulation command, the output current value at the series connection point of the first capacitor C1 and the second capacitor C2, and the input current value at the series connection point of the first capacitor C1 and the second capacitor C2. The balanced modulation signal is then used to control the on / off state of the switching transistor in at least one balanced bridge arm 3032 to regulate the output current of the inductor.Here, the balanced modulation signal can control the output current of the balanced circuit. The output current of the balanced circuit can charge the inductor, and the output current of the inductor during discharge can charge the target capacitor, thereby reducing the difference between the terminal voltage of the first capacitor C1 and the terminal voltage of the second capacitor C2, and balancing the positive and negative DC bus voltages. It can be understood that the control circuit 3031 provided in this application can use a DPWM wave as the balanced modulation signal, or it can use other PWM waves (e.g., SPWM wave, THIPWM wave, CBPWM wave, etc.) as the balanced modulation signal, making it widely applicable and providing good control performance.

[0070] In some feasible implementations, the acquisition circuit 302 can also obtain the half-bus voltage value based on the positive DC bus voltage and the negative DC bus voltage, and acquire the output current value and the input current value of the series connection point of the first capacitor C1 and the second capacitor C2. The control circuit 3031 can also generate a balanced modulation signal based on the terminal voltage value of the target capacitor, the half-bus voltage value, the output current value of the series connection point of the first capacitor C1 and the second capacitor C2, and the input current value of the series connection point of the first capacitor C1 and the second capacitor C2, and control the on / off state of the switching transistor in at least one balanced bridge arm 3032 through the balanced modulation signal to adjust the output current of the inductor. Here, the control circuit 3031 (e.g., a predictive control circuit and a drive control circuit, or other circuits with predictive control and drive control functions) can generate the balanced modulation signal based on the terminal voltage value of the target capacitor, the half-bus voltage value, the output current value of the series connection point of the first capacitor and the second capacitor, and the input current value of the series connection point of the first capacitor and the second capacitor. The predictive control circuit here is a circuit that can simulate the inverter structure. Predictive control can predict the inverter's operating state based on the inverter's input parameters (e.g., the terminal voltage of the target capacitor, the half-bus voltage, the output current value of the series connection point of the first capacitor and the second capacitor, and the input current value), thereby obtaining a balanced modulation signal that keeps the inverter's midpoint voltage balanced. Furthermore, the control circuit 3031 (e.g., a current regulation loop and drive control circuit, or other circuits with current regulation and drive control functions) can generate the balanced modulation signal based on the half-bus voltage value, the output current value of the series connection point of the first capacitor C1 and the second capacitor C2, and the input current value of the series connection point of the first capacitor C1 and the second capacitor C2, controlling the switching transistors in the balancing circuit to turn on or off. For example, the control circuit 3031 can generate a PWM wave or other signal as the balanced modulation signal, or generate a drive pulse signal based on the PWM wave as the balanced modulation signal. Here, the balanced modulation signal can control the output current of the balanced circuit. The output current of the balanced circuit can charge the inductor, and the output current of the inductor during discharge can charge the target capacitor, thereby reducing the difference between the terminal voltage of the first capacitor C1 and the terminal voltage of the second capacitor C2, and balancing the positive and negative DC bus voltages. It can be understood that the control circuit 3031 provided in this application can use a DPWM wave as the balanced modulation signal, or other PWM waves (e.g., SPWM wave, THIPWM wave, CBPWM wave, etc.) as the balanced modulation signal, or a drive pulse signal generated based on these PWM waves as the balanced modulation signal. It has a wide range of applications and good control effect.

[0071] In some feasible implementations, the balancing circuit may include multiple balancing arms. See details below. Figure 5 , Figure 5 This is another structural schematic diagram of the inverter provided in an embodiment of this application. For example... Figure 5 As shown, the balanced bridge arm 4032 in the balanced circuit can be a full-bridge circuit with two balanced bridge arms composed of four switching transistors (e.g., switching transistors T1, T2, T3, and T4). This full-bridge circuit can be connected between the positive and negative DC buses. It is understood that... Figure 5 The control circuit 4031 in the inverter circuit 401, the acquisition circuit 402, and the balancing circuit is the same as described above. Figure 4 The connection method and working principle of the inverter circuit 301, the acquisition circuit 302 and the control circuit 3031 in the balancing circuit are the same, and will not be described again here.

[0072] It is understood that the inverter provided in this application can be applied to any balancing circuit where the output current of the inductor can be adjusted. Using this application, when the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is determined to be large, the inverter can adjust the output current of the inductor through the balancing circuit to charge the target capacitor, thereby reducing the voltage difference between the two sets of capacitors in the inverter circuit, balancing the positive and negative bus voltages, improving the stability and power supply efficiency of the inverter, and exhibiting a simple structure, convenient method, and strong applicability.

[0073] In some feasible implementations, the inverter may also include a filter circuit. See details below. Figure 6 , Figure 6 This is another structural schematic diagram of the inverter provided in an embodiment of this application. For example... Figure 6 As shown, the filter circuit 504 can be connected to the switching bridge arm and the load in the inverter circuit 501. It can be understood that... Figure 6 The control circuit 5031 and the balance bridge arm 5032 in the inverter circuit 501, the acquisition circuit 502, and the balance circuit are the same as those mentioned above. Figure 5 The connection method and working principle of the control circuit 4031 and the balance bridge arm 4032 in the inverter circuit 401, the acquisition circuit 402, and the balancing circuit are the same, and will not be described again here. Here, the filter circuit 504 can be an LC filter circuit composed of inductors and capacitors, or an LCL filter circuit (not shown in the figure), or other circuits with filtering functions. The filter circuit 504 can filter out noise components (e.g., high-frequency components) contained in the output current (or output voltage) of the inverter circuit 501, improving power supply stability.

[0074] This application also provides a power supply system, which can be found in conjunction with the application. Figure 7 , Figure 7 This is a schematic diagram of the power supply system provided in an embodiment of this application. For example... Figure 7 As shown, the power supply system may include a power source and an inverter, wherein the inverter described above is applicable to the above-mentioned... Figures 1 to 6 The inverter shown Figure 7 China only Figure 2 The inverter shown is used as an example for illustration. It can be understood that... Figure 7 The inverter circuit 601, the acquisition circuit 602, and the balancing circuit 603 are the same as those mentioned above. Figure 2 The connection method and working principle of the inverter circuit 101, the acquisition circuit 102, and the balancing circuit 103 are the same, and will not be described again here. Figure 7 The power supply system shown may also include a combiner box 604, through which the power supply can be connected to the inverter. The power supply system may also include a DC bus, through which the combiner box 604 can be connected to the load via the DC bus and the inverter. Here, the DC bus may include a bus capacitor C or multiple bus capacitors connected in series, which can be used for energy storage. The inverter can convert the electrical energy output from the power supply and stored across the bus capacitors, and output corresponding current and voltage to maintain the operation of the power grid. Please see further details. Figure 7 The load here can be the power grid, and the power supply system can also include a grid connection device 605. The inverter can supply power to power-consuming equipment or power transmission equipment such as transmission lines, power transfer stations, batteries, communication base stations or household appliances in the power grid through the grid connection device 605.

[0075] In this application, the inverter and power supply system feature diverse and flexible configurations of functional modules, adaptable to different power supply environments, enhancing the versatility of power supply system applications and improving its adaptability. Furthermore, the aforementioned... Figures 1 to 7 Any of the power supply systems or inverters shown can, when the voltage difference between the two sets of capacitors in the inverter circuit is large, use a balancing circuit to adjust the output current of the inductor to charge the target capacitor, thereby reducing the voltage difference between the two sets of capacitors in the inverter circuit, improving the stability and power supply efficiency of the inverter. The structure is simple, the method is convenient, and the applicability is strong. For ease of description, the following will use... Figure 2 The structure of the inverter shown is used as an example to illustrate the grid-connected control method provided in the embodiments of this application.

[0076] Please see Figure 8 , Figure 8 This is a flowchart illustrating the control method provided in this application. The control method provided in this application is applicable to inverters, including but not limited to the above-mentioned... Figures 1 to 7 Any of the power supply systems shown or the inverters within the power supply systems.

[0077] like Figure 8 As shown, the control method provided in this application includes the following steps:

[0078] S701: Detects the DC bus voltage to obtain the terminal voltage values ​​of the first and second capacitors.

[0079] S702: When the terminal voltage of the target capacitor is less than or equal to the first voltage threshold, control the on or off of multiple switching transistors to adjust the current of the inductor charging the target capacitor, thereby reducing the terminal voltage difference between the target capacitor and the non-target capacitor in the two sets of capacitors.

[0080] In the embodiments provided in this application, the acquisition circuit can acquire the DC bus voltage of the inverter circuit (e.g., the positive DC bus voltage and / or the negative DC bus voltage, and the voltage at the series connection point of the first and second capacitors (or the midpoint of the inverter circuit)) to obtain the terminal voltage of the target capacitor. Here, the target capacitor can be the capacitor with the smaller terminal voltage value among the first and second capacitors. When the terminal voltage value of the target capacitor is less than or equal to a certain voltage threshold (e.g., a first voltage threshold), it can be considered that the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is large, or that the positive and negative DC bus voltages of the inverter circuit are in an unbalanced state. At this time, the balancing circuit needs to charge the capacitor (e.g., the target capacitor). Here, the first voltage threshold can be determined based on the rated terminal voltage of the capacitor (first capacitor or second capacitor) in the inverter circuit, or it can be determined based on a voltage threshold obtained by the inverter through acquisition, collection, reception, detection, or storage (for example, the first voltage threshold can be a voltage value less than 1 / 2 of the bus voltage, where the bus voltage is the voltage difference between the positive DC bus voltage and the negative DC bus voltage). The specific value can be set according to the application scenario. It can be understood that the first voltage threshold here can be a single voltage value, multiple voltage values, or a voltage range composed of multiple voltage values.

[0081] It is understood that the balancing circuit can determine whether the target capacitor needs to be charged in various ways, and comparing the terminal voltage of the target capacitor with a first voltage threshold is only one of them. The balancing circuit can also determine whether the inverter circuit capacitor needs to be charged in other ways, such as when the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is greater than or equal to a certain threshold, or when the voltage difference between the terminal voltage of the first capacitor (or the second capacitor) and the 1 / 2 bus voltage is greater than or equal to a certain threshold, the balancing circuit can determine that the inverter circuit capacitor needs to be charged. This application only describes the balancing circuit comparing the terminal voltage of the target capacitor with the first voltage threshold to determine whether the inverter circuit capacitor needs to be charged as an example. Other comparison methods can be set based on specific application scenarios and are also within the scope of this invention. Here, after the balancing circuit (e.g., by comparing the terminal voltage of the target capacitor with the first voltage threshold) determines that the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is large, or in other words, determines that the positive and negative DC bus voltages of the inverter circuit are unbalanced, the balancing circuit can charge the target capacitor through an inductor to increase the terminal voltage value of the target capacitor. Here, the balancing circuit includes multiple switching transistors. The balancing circuit can control the conduction or cutoff of each switching transistor to adjust the current charging the target capacitor through the inductor (for example, increasing the current charging the target capacitor), thereby reducing the voltage difference between the target capacitor and the non-target capacitor in the two sets of capacitors (that is, reducing the voltage difference between the first capacitor and the second capacitor). In other words, it balances the positive DC bus voltage and the negative DC bus voltage of the inverter circuit.

[0082] By using this application, when the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is large, the inverter can adjust the output current of the inductor through the balancing circuit to charge the target capacitor, thereby reducing the voltage difference between the two sets of capacitors in the inverter circuit, balancing the positive and negative bus voltages, improving the stability and power supply efficiency of the inverter, and having a simple structure, convenient method, and strong applicability.

[0083] In some feasible implementation methods, please refer to the following: Figure 9 , Figure 9 This is another flowchart illustrating the control method provided in this application. For example... Figure 9 As shown, after detecting the DC bus voltage in step S701 to obtain the terminal voltage values ​​of the first and second capacitors, the balancing circuit (or inverter) can stop charging the target capacitor based on the terminal voltage value of the target capacitor. This control method may include the following steps:

[0084] S801: Detects the DC bus voltage to obtain the terminal voltage values ​​of the first and second capacitors.

[0085] S802: When the terminal voltage of the target capacitor is less than or equal to the first voltage threshold, control the on or off of multiple switching transistors to adjust the current of the inductor charging the target capacitor, thereby reducing the terminal voltage difference between the target capacitor and the non-target capacitor in the two sets of capacitors.

[0086] S803: When the terminal voltage of the target capacitor is greater than or equal to the second voltage threshold, control multiple switching transistors to remain off.

[0087] Here, when the terminal voltage of the target capacitor is greater than or equal to a certain voltage threshold (e.g., a second voltage threshold), it can be considered that the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is small, or that the positive and negative DC bus voltages of the inverter circuit are in a balanced state. At this time, the balancing circuit does not need to charge the capacitor (e.g., the target capacitor). The second voltage threshold can be determined based on the rated terminal voltage of the capacitor (first capacitor or second capacitor) in the inverter circuit, or it can be determined based on a voltage threshold obtained by the inverter through acquisition, collection, reception, detection, or storage (e.g., the second voltage threshold can be a voltage value less than 1 / 2 the bus voltage and greater than or equal to the first voltage threshold). The specific setting can be determined according to the application scenario. It can be understood that the second voltage threshold can be a single voltage value, multiple voltage values, or a voltage range composed of multiple voltage values. The second voltage threshold can be greater than or equal to the first voltage threshold. When the second voltage threshold is greater than the first voltage threshold, the inverter can avoid repeatedly starting and stopping charging the target capacitor through the balancing circuit when the terminal voltage of the target capacitor has not been stably greater than the first voltage threshold. In other words, when the second voltage threshold is greater than the first voltage threshold, the inverter can determine that the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is small after the terminal voltage of the target capacitor stabilizes (for example, stabilizes above the first voltage threshold), or in other words, determine that the positive DC bus voltage and the negative DC bus voltage of the inverter circuit are in a balanced state, and then stop charging the target capacitor through the balancing circuit.

[0088] It is understood that the balancing circuit can determine whether to stop charging the target capacitor in various ways, and comparing the terminal voltage of the target capacitor with a second voltage threshold is only one of them. The balancing circuit can also determine whether to stop charging the inverter circuit's capacitor in other ways, such as when the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is less than or equal to a certain threshold, or when the voltage difference between the terminal voltage of the first capacitor (or the second capacitor) and the 1 / 2 bus voltage is less than or equal to a certain threshold, the balancing circuit can determine that charging the inverter circuit's capacitor is not necessary. This application only describes the balancing circuit comparing the terminal voltage of the target capacitor with the second voltage threshold to determine whether to stop charging the inverter circuit's capacitor as an example. Other comparison methods can be set based on specific application scenarios and are also within the scope of this invention. Here, after the balancing circuit (e.g., by comparing the terminal voltage of the target capacitor with the second voltage threshold) determines that the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is small, or in other words, determines that the positive and negative DC bus voltages of the inverter circuit are in a balanced state, the balancing circuit can stop charging the target capacitor to increase the terminal voltage value of the target capacitor. Here, the balancing circuit can control each switch in the balancing circuit to remain off, so as to stop charging the target capacitor, save energy, and reduce costs.

[0089] By using this application, the inverter can stop charging the target capacitor through the balancing circuit when the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is small. This reduces the power consumption of the balancing circuit, lowers the cost, and improves the stability and power supply efficiency of the inverter. The structure is simple, the method is convenient, and the applicability is strong.

[0090] In some feasible implementations, after detecting the DC bus voltage in the aforementioned step S701 or S801 to obtain the terminal voltage values ​​of the first capacitor and the second capacitor, the method may further include:

[0091] The half-bus voltage value is obtained based on the DC bus voltage. A balanced modulation signal is generated based on the terminal voltage value of the target capacitor and the half-bus voltage value. The balanced modulation signal is used to control the on or off of the switching transistor in at least one balanced bridge arm to regulate the output current of the inductor.

[0092] Using this application, the balancing circuit includes at least one balancing bridge arm. For example, the balancing circuit may include a half-bridge circuit with two series-connected switches as one balancing bridge arm, or a full-bridge circuit with four switches as two balancing bridge arms. Here, the acquisition circuit can acquire the positive DC bus voltage and negative DC bus voltage of the inverter circuit, and obtain the half-bus voltage value (i.e., 1 / 2 bus voltage value) based on the positive DC bus voltage and negative DC bus voltage. Here, the control circuit (e.g., a voltage regulation loop (e.g., a proportional-integral regulation circuit) and drive control circuit, or other circuits with voltage regulation and drive control functions) can generate a balancing modulation signal based on the terminal voltage value of the target capacitor and the half-bus voltage value, controlling the switching transistors in the balancing circuit to turn on or off. For example, the control circuit can generate a PWM wave or other signal as the balancing modulation signal, or generate a drive pulse signal based on the PWM wave as the balancing modulation signal. Here, the balanced modulation signal can control the output current of the balanced circuit. The output current of the balanced circuit can charge the inductor, and the output current of the inductor during discharge can charge the target capacitor, thereby reducing the difference between the terminal voltages of the first and second capacitors and balancing the positive and negative DC bus voltages. It can be understood that the control circuit provided in this application can use a DPWM wave as the balanced modulation signal, or other PWM waves (e.g., SPWM wave, THIPWM wave, CBPWM wave, etc.) as the balanced modulation signal, or a drive pulse signal generated based on these PWM waves as the balanced modulation signal. It has wide applicability and good control effect.

[0093] In some feasible implementations, after detecting the DC bus voltage in the aforementioned step S701 or S801 to obtain the terminal voltage values ​​of the first capacitor and the second capacitor, the method may further include:

[0094] The output current value and input current value of the series connection point of the first and second capacitors are obtained. A voltage regulation command is generated based on the terminal voltage value of the target capacitor and the half-bus voltage value. A balanced modulation signal is generated based on the voltage regulation command, the output current value of the series connection point of the first and second capacitors, and the input current value of the series connection point of the first and second capacitors. The balanced modulation signal is used to control the on or off of the switching transistor in at least one balanced bridge arm to regulate the output current of the inductor.

[0095] Using this application, the acquisition circuit can obtain the output current value and the input current value of the series connection point of the first and second capacitors (or the midpoint of the inverter circuit). Here, the output current value of the series connection point of the first and second capacitors can be determined by adding the current values ​​output from the series connection point of the first and second capacitors to each switching arm of the inverter circuit, or it can be determined in other ways. Here, the input current value of the series connection point of the first and second capacitors can be determined by the output current of the inductor connected to the series connection point of the first and second capacitors, or it can be determined in other ways. Here, the reference directions of the output current and input current of the series connection point of the first and second capacitors (or the midpoint of the inverter circuit) can be determined based on the target capacitor. For example, the direction of the output current from the target capacitor to the series connection point of the first and second capacitors is positive, and the direction of the input current from the series connection point of the first and second capacitors to the target capacitor is positive. Here, the control circuit (e.g., a voltage regulation loop or other circuit with voltage regulation function) can generate a voltage regulation command based on the terminal voltage value of the target capacitor and the half-bus voltage value. Furthermore, the control circuit (e.g., a current regulation loop and drive control circuit, or other circuits with current regulation and drive control functions) can generate a balanced modulation signal (e.g., a balanced modulation signal such as a PWM wave) based on the voltage regulation command, the output current value at the series connection point of the first and second capacitors, and the input current value at the series connection point of the first and second capacitors. This balanced modulation signal controls the on / off state of the switching transistor in at least one balanced bridge arm to regulate the output current of the inductor. Here, the balanced modulation signal can control the output current of the balancing circuit, which can charge the inductor. The output current of the inductor during discharge can charge the target capacitor, thereby reducing the difference between the terminal voltages of the first and second capacitors and balancing the positive and negative DC bus voltages. It is understood that the control circuit provided in this application can use DPWM wave as the balanced modulation signal, or it can use other PWM waves (e.g., SPWM wave, THIPWM wave, CBPWM wave, etc.) as the balanced modulation signal, which has a wide range of applications and good control effect.

[0096] In some feasible implementations, after detecting the DC bus voltage in the aforementioned step S701 or S801 to obtain the terminal voltage values ​​of the first capacitor and the second capacitor, the method may further include:

[0097] The half-bus voltage value is obtained based on the DC bus voltage (e.g., positive DC bus voltage and negative DC bus voltage), and the output current value and input current value of the series connection point of the first and second capacitors are acquired. A balanced modulation signal is generated based on the terminal voltage value of the target capacitor, the half-bus voltage value, the output current value of the series connection point of the first and second capacitors, and the input current value of the series connection point of the first and second capacitors. This balanced modulation signal is used to control the on / off state of a switch in at least one balanced bridge arm to adjust the output current of the inductor.

[0098] Here, the control circuit (e.g., a predictive control circuit and a drive control circuit, or other circuits with predictive control and drive control functions) can generate a balanced modulation signal based on the terminal voltage value of the target capacitor, the half-bus voltage value, the output current value at the series connection point of the first and second capacitors, and the input current value at the series connection point of the first and second capacitors. Furthermore, the control circuit (e.g., a current regulation loop and a drive control circuit, or other circuits with current regulation and drive control functions) can generate the balanced modulation signal based on the half-bus voltage value, the output current value at the series connection point of the first and second capacitors, and the input current value at the series connection point of the first and second capacitors, controlling the on / off state of the switching transistors in the balancing circuit. For example, the control circuit can generate a PWM wave or other signal as the balanced modulation signal, or generate a drive pulse signal based on the PWM wave as the balanced modulation signal. Here, the balanced modulation signal can control the output current of the balancing circuit. The output current of the balancing circuit can charge the inductor, and the output current of the inductor during discharge can charge the target capacitor, thereby reducing the difference between the terminal voltages of the first and second capacitors and balancing the positive and negative DC bus voltages. It is understood that the control circuit provided in this application can use DPWM wave as the balanced modulation signal, or other PWM waves (e.g., SPWM wave, THIPWM wave, CBPWM wave, etc.) as the balanced modulation signal, or drive pulse signal generated based on these PWM waves as the balanced modulation signal. It has a wide range of applications and good control effect.

[0099] In this application, when the difference between the terminal voltage of the first capacitor and the terminal voltage of the second capacitor is large, the inverter can adjust the output current of the inductor through the balancing circuit to charge the target capacitor, thereby reducing the voltage difference between the two sets of capacitors in the inverter circuit, balancing the positive and negative bus voltages, improving the stability and power supply efficiency of the inverter, and having a simple structure, convenient method, and strong applicability.

[0100] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. An inverter, characterized in that, The inverter includes an inverter circuit, a data acquisition circuit, a balancing circuit, and an inductor. The inverter circuit includes at least one switching bridge arm and a first capacitor and a second capacitor connected in series. The balancing circuit includes multiple switching transistors. One end of the inverter circuit is used to connect to the power supply through the positive DC bus and the negative DC bus, and the other end of the inverter circuit is used to connect to the load. The first capacitor and the second capacitor are connected in series and then connected in parallel with the at least one switch bridge arm between the positive DC bus and the negative DC bus. The acquisition circuit is connected to the positive DC bus, the negative DC bus, the series connection point of the first capacitor and the second capacitor, and the balancing circuit. The balancing circuit is connected to the series connection point of the first capacitor and the second capacitor through the inductor. The balancing circuit includes a control circuit and at least one balancing bridge arm. One balancing bridge arm includes two switches connected in series. The control circuit is connected to the inductor through the at least one balancing bridge arm. The acquisition circuit is connected to the control circuit. The acquisition circuit is used to detect the DC bus voltage to obtain the terminal voltage values ​​of the first capacitor and the second capacitor, obtain the half bus voltage value based on the DC bus voltage, and obtain the output current value of the series connection point of the first capacitor and the second capacitor and the input current value of the series connection point of the first capacitor and the second capacitor. The control circuit is used to generate a balanced modulation signal based on the terminal voltage of the target capacitor, the half-bus voltage, the output current value of the series connection point of the first capacitor and the second capacitor, and the input current value of the series connection point of the first capacitor and the second capacitor when the terminal voltage of the target capacitor is less than or equal to a first voltage threshold. The circuit then controls the switching transistors in at least one balanced bridge arm to turn on or off through the balanced modulation signal, thereby adjusting the output current of the inductor charging the target capacitor. The target capacitor is the capacitor with the smaller terminal voltage between the first capacitor and the second capacitor.

2. The inverter according to claim 1, characterized in that, The balancing circuit is also used to control the plurality of switching transistors to remain off when the terminal voltage value of the target capacitor is greater than or equal to a second voltage threshold, so as to stop charging the target capacitor, wherein the second voltage threshold is greater than or equal to the first voltage threshold.

3. The inverter according to any one of claims 1 to 2, characterized in that, The inverter also includes a filter circuit, which is connected to the switching arm of the inverter circuit and the load.

4. A control method for an inverter, characterized in that, The control method is applicable to an inverter, which includes an inverter circuit, a data acquisition circuit, a balancing circuit, and an inductor. The inverter circuit includes at least one switching bridge arm and a first capacitor and a second capacitor connected in series. The balancing circuit includes multiple switching transistors. One end of the inverter circuit is used to connect to a power source via a positive DC bus and a negative DC bus, and the other end of the inverter circuit is used to connect to a load. The first capacitor and the second capacitor are connected in series and then connected in parallel with the at least one switch bridge arm between the positive DC bus and the negative DC bus. The acquisition circuit is connected to the positive DC bus, the negative DC bus, the series connection point of the first capacitor and the second capacitor, and the balancing circuit. The balancing circuit is connected to the series connection point of the first capacitor and the second capacitor via the inductor. The balancing circuit includes a control circuit and at least one balancing bridge arm. One balancing bridge arm includes two switches connected in series. The control circuit is connected to the inductor via the at least one balancing bridge arm. The acquisition circuit is connected to the control circuit. The method includes: The DC bus voltage is detected to obtain the terminal voltage values ​​of the first capacitor and the second capacitor; The half-bus voltage value is obtained based on the DC bus voltage, and the output current value and the input current value of the series connection point of the first capacitor and the second capacitor are obtained. When the terminal voltage of the target capacitor is less than or equal to the first voltage threshold, a balanced modulation signal is generated based on the terminal voltage of the target capacitor, the half bus voltage, the output current value of the series connection point of the first capacitor and the second capacitor, and the input current value of the series connection point of the first capacitor and the second capacitor. The balanced modulation signal is used to control the on or off of the switching transistor in at least one balanced bridge arm to adjust the output current of the inductor charging the target capacitor. The target capacitor is the capacitor with the smaller terminal voltage value among the first capacitor and the second capacitor.

5. The control method according to claim 4, characterized in that, After detecting the DC bus voltage to obtain the terminal voltage values ​​of the first capacitor and the second capacitor, the method further includes: When the terminal voltage of the target capacitor is greater than or equal to the second voltage threshold, the plurality of switching transistors are controlled to remain off to stop charging the target capacitor, wherein the second voltage threshold is greater than or equal to the first voltage threshold.

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