Multi-channel comparator and multi-channel comparison method

Abstract

The present disclosure provides a multi-channel comparator, applied to the technical field of integrated circuits, comprising: a flip threshold extraction circuit, configured to extract a sampling flip voltage threshold; a threshold feedback adjustment circuit, connected to the flip threshold extraction circuit, configured to adjust the sampling flip voltage threshold into a preset flip voltage threshold; and a multi-channel comparison output circuit, connected to the threshold feedback adjustment circuit, configured to mirror the sampling flip voltage threshold, so that the voltage threshold of the multi-channel comparator is the preset flip voltage threshold, and compare an input voltage input into the multi-channel comparison output circuit with the voltage threshold. The present disclosure also provides a multi-channel comparison method.

Description

Technical Field

[0001] This disclosure relates to the field of comparator technology, and more particularly to a multiplex comparator and a multiplex comparison method. Background Technology

[0002] With the continuous development of integrated circuit technology, there is a growing demand for lower power consumption and smaller area. In multi-signal comparison applications, comparators based on operational amplifiers are usually connected in parallel to achieve the comparison of multiple signals. However, this method is complex in structure, has low circuit reuse, large circuit size, and high power consumption, which is not conducive to the development of low-power and high-integration circuit systems. Summary of the Invention

[0003] The main purpose of this disclosure is to provide a multiplexer and a multiplexer comparison method, which has a simple structure and high integration.

[0004] To achieve the above objectives, a first aspect of this disclosure provides a multiplexer comparator, comprising:

[0005] A flip threshold extraction circuit is used to extract the sampling flip voltage threshold.

[0006] A threshold feedback adjustment circuit, connected to the flip threshold extraction circuit, is used to adjust the sampled flip voltage threshold to a preset flip voltage threshold.

[0007] A multi-channel comparator output circuit, connected to the threshold feedback adjustment circuit, is used to make the voltage threshold of the multi-channel comparator the preset flip voltage threshold by mirroring the sampled flip voltage threshold, and to compare the input voltage of the multi-channel comparator output circuit with the voltage threshold.

[0008] In one embodiment of this disclosure, the flip threshold extraction circuit includes:

[0009] The first transistor M1 has its gate connected to the first terminal of the threshold feedback adjustment circuit, and its source is grounded.

[0010] The second transistor M2 has its source connected to the drain of the first transistor M1, and its gate connected to the drain of the second transistor M2.

[0011] The third transistor M3 has its gate connected to its drain, the gate of the second transistor M2 is connected to the gate of the third transistor M3, and the drain of the second transistor M2 is connected to the drain of the third transistor M3.

[0012] The fourth transistor M4 has its gate connected to the second terminal of the threshold feedback adjustment circuit, its drain connected to the source of the third transistor M3, and its source connected to the drain power supply voltage.

[0013] In one embodiment of this disclosure, the first transistor M1 and the second transistor M2 are NMOS transistors, and the third transistor M3 and the fourth transistor M4 are PMOS transistors.

[0014] In one embodiment of this disclosure, the threshold feedback adjustment circuit includes:

[0015] An operational amplifier, wherein the non-inverting input terminal of the operational amplifier is connected to the preset switching voltage threshold, the inverting input terminal of the operational amplifier is connected to the gates of the second transistor M2 and the third transistor M3, and the output terminal of the operational amplifier is connected to the gates of the first transistor M1, the gate of the fourth transistor M4, and the multiplexer output circuit.

[0016] In one embodiment of this disclosure, the multi-channel comparison output circuit includes a plurality of single-channel comparison output circuits connected in parallel, wherein the single-channel comparison output circuit includes:

[0017] The fifth transistor M5 has its gate connected to the first terminal of the threshold feedback adjustment circuit, and its source grounded.

[0018] The sixth transistor M6 has its source connected to the drain of the fifth transistor M5, its gate connected to the gate of the seventh transistor M7 and the input voltage, and its drain connected to the drain of the seventh transistor M7 and the output voltage.

[0019] The source of the seventh transistor M7 is connected to the drain of the eighth transistor M8.

[0020] The eighth transistor M8 has its gate connected to the second terminal of the threshold feedback adjustment circuit, and its source is connected to the drain power supply voltage.

[0021] In one embodiment of this disclosure, the gates of the fifth transistors M5 in the plurality of single-channel comparator output circuits are connected;

[0022] The gates of the eighth transistor M8 in the plurality of single-channel comparator output circuits are connected.

[0023] In one embodiment of this disclosure, the fifth transistor M5 and the sixth transistor M6 are NMOS transistors, and the seventh transistor M7 and the eighth transistor M8 are PMOS transistors.

[0024] A second aspect of this disclosure provides a multiplexer method applied to the multiplexer described in the first aspect, the method comprising:

[0025] The sampling flip voltage threshold is extracted using a flip threshold extraction circuit;

[0026] The sampling flip voltage threshold is adjusted to a preset flip voltage threshold using a threshold feedback adjustment circuit;

[0027] The input voltage to the multiple comparison output circuit is compared with the voltage threshold, which is the sampling flip voltage threshold.

[0028] As can be seen from the above embodiments of this disclosure, the multi-channel comparator and multi-channel comparison method provided by this disclosure can extract the sampling flip voltage threshold of the circuit using a flip threshold extraction circuit. A threshold feedback adjustment circuit is then used to clamp the sampling flip voltage threshold to a preset flip voltage threshold, thereby achieving adjustable sampling flip voltage threshold. Finally, by mirroring the sampling flip voltage threshold of the flip threshold extraction circuit, the sampling flip voltage threshold is equal to the preset flip voltage threshold, enabling comparison of the input voltage with the preset flip voltage threshold, thus achieving comparison of multiple signals. The voltage threshold compared with the input voltage can be fixed, and the structure is simple and highly integrated. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of this disclosure or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a schematic diagram of the structure of a multiplexer provided in an embodiment of the present disclosure;

[0031] Figure 2 This is a schematic diagram of the structure of a multiplexer provided in an embodiment of the present disclosure;

[0032] Figure 3 This is a flowchart illustrating a multi-way comparison method provided in an embodiment of the present disclosure. Detailed Implementation

[0033] To make the objectives, features, and advantages of this disclosure more apparent and understandable, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0034] Please see Figure 1 , Figure 1 This is a schematic diagram of a multi-channel comparator provided in an embodiment of the present disclosure. The multi-channel comparator includes: a flip threshold extraction circuit, a threshold feedback adjustment circuit, and a multi-channel comparison output circuit.

[0035] The flip threshold extraction circuit is used to extract the sampling flip voltage threshold.

[0036] A threshold feedback adjustment circuit, connected to the flip threshold extraction circuit, is used to adjust the sampled flip voltage threshold to a preset flip voltage threshold.

[0037] The multiplexer output circuit, connected to the threshold feedback adjustment circuit, is used to mirror the sampled flip-voltage threshold to make the voltage threshold of the multiplexer the preset flip-voltage threshold, and to compare the input voltage to the multiplexer output circuit with the voltage threshold.

[0038] In this disclosure, the threshold feedback adjustment circuit compares the sampled switching voltage threshold V with a preset switching voltage threshold Vx. When the sampled switching voltage threshold V extracted by the switching threshold extraction circuit is less than the preset switching voltage threshold Vx, the threshold feedback adjustment circuit adjusts the voltage Vy to lower the sampled switching voltage threshold V, thereby making the sampled switching voltage threshold V equal to the preset switching voltage threshold Vx. When the sampled switching voltage threshold V extracted by the switching threshold extraction circuit is greater than the preset switching voltage threshold Vx, the threshold feedback adjustment circuit raises the sampled switching voltage threshold V, thereby making the sampled switching voltage threshold V equal to the preset switching voltage threshold Vx.

[0039] According to this embodiment, the flip-threshold extraction circuit can extract the sampling flip-threshold voltage V of the circuit. Using a threshold feedback adjustment circuit, the sampling flip-threshold voltage V is clamped to a preset flip-threshold voltage Vx, thereby making the sampling flip-threshold voltage V adjustable. Finally, by mirroring the sampling flip-threshold voltage V of the flip-threshold extraction circuit, the sampling flip-threshold voltage V is equal to the preset flip-threshold voltage Vx. This allows for comparison of the input voltage with the preset flip-threshold voltage Vx, thus enabling the comparison of multiple signals. The voltage threshold for comparison with the input voltage can be fixed, and the structure is simple.

[0040] Please see Figure 2 , Figure 2 This is a schematic diagram of a multiplexer provided in an embodiment of the present disclosure. The flip threshold extraction circuit of the multiplexer includes a first transistor M1, a second transistor M2, a third transistor M3, and a fourth transistor M4.

[0041] The first transistor M1 has its gate connected to the first terminal of the threshold feedback adjustment circuit, and its source grounded.

[0042] The source of the second transistor M2 is connected to the drain of the first transistor M1, and the gate of the second transistor M2 is connected to the drain of the second transistor M2.

[0043] The gate of the third transistor M3 is connected to the drain of the third transistor M3, the gate of the second transistor M2 is connected to the gate of the third transistor M3, and the drain of the second transistor M2 is connected to the drain of the third transistor M3.

[0044] The fourth transistor M4 has its gate connected to the second terminal of the threshold feedback adjustment circuit, its drain connected to the source of the third transistor M3, and its source connected to the drain power supply voltage.

[0045] like Figure 2 As shown, the threshold feedback adjustment circuit of the multiplexer includes: an operational amplifier, the non-inverting input of which is connected to the preset flip voltage threshold, the inverting input of which is connected to the gates of the second transistor M2 and the third transistor M3, and the output of which is connected to the gates of the first transistor M1, the fourth transistor M4, and the multiplexer output circuit.

[0046] like Figure 2 As shown, the multiplexer's multiplexer output circuit includes multiple parallel single-comparison output circuits, which include: fifth transistor M5, sixth transistor M6, seventh transistor M7 and eighth transistor M8.

[0047] Understandably, this disclosure does not limit the number of multiple parallel single-channel comparator output circuits; it can be 2, 3, 10, etc. Figure 2 The diagram illustrates multiple parallel single-channel comparator output circuits, taking two parallel single-channel comparator output circuits as an example.

[0048] The fifth transistor M5 has its gate connected to the first terminal of the threshold feedback adjustment circuit, and its source is grounded.

[0049] The sixth transistor M6 has its source connected to the drain of the fifth transistor M5, its gate connected to the gate of the seventh transistor M7 and the input voltage, and its drain connected to the drain of the seventh transistor M7 and the output voltage.

[0050] The source of the seventh transistor M7 is connected to the drain of the eighth transistor M8.

[0051] The eighth transistor M8 has its gate connected to the second terminal of the threshold feedback adjustment circuit, and its source is connected to the drain power supply voltage.

[0052] like Figure 2 As shown, in this disclosure, the gates of the fifth transistors M5 of the plurality of single-channel comparator output circuits are connected, and the gates of the eighth transistors M8 of the plurality of single-channel comparator output circuits are connected.

[0053] In one embodiment of this disclosure, the fifth transistor M5 and the sixth transistor M6 are NMOS transistors, and the seventh transistor M7 and the eighth transistor M8 are PMOS transistors.

[0054] In one embodiment of this disclosure, the first transistor M1 and the second transistor M2 are NMOS transistors, and the third transistor M3 and the fourth transistor M4 are PMOS transistors.

[0055] like Figure 2 As shown, NMOS transistors M5 and M6, along with PMOS transistors M7 and M8, form a single-channel comparator output circuit with a mirrored voltage threshold. The gates of both M5 and M8 are connected to the output of the threshold feedback adjustment circuit. Since the multiplexers are symmetrical and identical in size, the voltage threshold of the multiplexer output circuit is equal to the preset switching voltage threshold Vx. This threshold is compared with the preset switching voltage threshold Vx via the input signal Vin1 and then output. Specifically, when Vin1 is greater than the preset switching voltage threshold Vx, the output Vout1 is low; when Vin1 is less than the preset switching voltage threshold Vx, the output Vout1 is high.

[0056] Similarly, NMOS transistors M9 and M10, along with PMOS transistors M11 and M12, constitute another single-channel comparator output circuit with mirrorable voltage thresholds. The voltage threshold of this single-channel comparator output circuit is equal to a preset switching voltage threshold Vx, and is compared with the preset switching voltage threshold Vx via the input signal Vin2 before being output. Specifically, when Vin2 is greater than the preset switching voltage threshold Vx, the output terminal Vout2 is at a low level; when Vin2 is less than the preset switching voltage threshold Vx, the output terminal Vout2 is at a high level.

[0057] Finally, the flip threshold extraction circuit and the threshold feedback adjustment circuit are multiplexed, and a simple, low-power multi-channel comparator with adjustable voltage threshold is realized by paralleling a single-channel comparison output circuit.

[0058] Please see Figure 3 , Figure 3 This is a flowchart illustrating a multi-way comparison method provided in an embodiment of the present disclosure. The multi-way comparison method is applied to... Figure 1 or Figure 2 The multiplexer shown in the diagram mainly includes the following steps:

[0059] S301. Extract the sampling flip voltage threshold using the flip threshold extraction circuit.

[0060] S302. The threshold feedback adjustment circuit is used to adjust the sampling flip voltage threshold to the preset flip voltage threshold.

[0061] S303. The input voltage of the multiplexer output circuit is compared with the voltage threshold, which is the sampling flip voltage threshold.

[0062] According to this embodiment, the flip-threshold extraction circuit can extract the sampling flip-threshold voltage V of the circuit. Using a threshold feedback adjustment circuit, the sampling flip-threshold voltage V is clamped to a preset flip-threshold voltage Vx, thereby making the sampling flip-threshold voltage V adjustable. Finally, by mirroring the sampling flip-threshold voltage V of the flip-threshold extraction circuit, the sampling flip-threshold voltage V is equal to the preset flip-threshold voltage Vx. This allows for comparison of the input voltage with the preset flip-threshold voltage Vx, thus enabling the comparison of multiple signals. The voltage threshold for comparison with the input voltage can be fixed, and the structure is simple.

[0063] It should be noted that the functional modules or circuits in the various embodiments of this disclosure can be integrated into one processing module or circuit, or each module or circuit can exist physically separately, or two or more modules or circuits can be integrated into one module or circuit. The integrated modules or circuits described above can be implemented in hardware or in the form of software functional modules.

[0064] If the integrated module is implemented as a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this disclosure, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product.

[0065] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this disclosure is not limited to the described order of actions, because according to this disclosure, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this disclosure.

[0066] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0067] The above is a description of a multiplexer and a multiplexer comparison method provided in this disclosure. For those skilled in the art, based on the ideas of the embodiments of this disclosure, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this disclosure.

Claims

1. A multiplexer comparator, characterized in that, include: A flip threshold extraction circuit is used to extract the sampling flip voltage threshold. A threshold feedback adjustment circuit, connected to the flip threshold extraction circuit, is used to adjust the sampled flip voltage threshold to a preset flip voltage threshold. A multiplexer output circuit, connected to the threshold feedback adjustment circuit, is used to make the voltage threshold of the multiplexer the preset flip voltage threshold by mirroring the sampled flip voltage threshold, and to compare the input voltage of the multiplexer output circuit with the preset flip voltage threshold. The flip threshold extraction circuit includes: The first transistor M1 has its gate connected to the threshold feedback adjustment circuit and its source grounded. The second transistor M2 has its source connected to the drain of the first transistor M1, and its gate connected to the drain of the second transistor M2. The third transistor M3 has its gate connected to its drain, the second transistor M2 has its gate connected to its gate, and the second transistor M2 has its drain connected to its drain. The fourth transistor M4 has its gate connected to the threshold feedback adjustment circuit, its drain connected to the source of the third transistor M3, and its source connected to the power supply voltage. The connection point between the gate of the second transistor M2 and the gate of the third transistor M3 is connected to the threshold feedback adjustment circuit. The threshold feedback adjustment circuit includes: An operational amplifier, wherein the non-inverting input terminal of the operational amplifier is connected to the preset switching voltage threshold, the inverting input terminal of the operational amplifier is connected to the gates of the second transistor M2 and the third transistor M3, and the output terminal of the operational amplifier is connected to the gates of the first transistor M1, the gates of the fourth transistor M4, and the multiplexer output circuit. The multi-channel comparator output circuit includes multiple parallel single-channel comparator output circuits, and each single-channel comparator output circuit includes: The fifth transistor M5 has its gate connected to the output terminal of the operational amplifier, and its source grounded. The sixth transistor M6 has its source connected to the drain of the fifth transistor M5, its gate and the gate of the seventh transistor M7 are both connected to the input voltage, and its drain and the drain of the seventh transistor M7 are both connected to the output voltage terminal. The source of the seventh transistor M7 is connected to the drain of the eighth transistor M8; The eighth transistor M8 has its gate connected to the output terminal of the operational amplifier, and its source connected to the power supply voltage.

2. The multiplexer according to claim 1, characterized in that, The first transistor M1 and the second transistor M2 are NMOS transistors, and the third transistor M3 and the fourth transistor M4 are PMOS transistors.

3. The multiplexer according to claim 1, characterized in that, The gates of the fifth transistor M5 in the plurality of single-channel comparator output circuits are connected; The gates of the eighth transistor M8 in the plurality of single-channel comparator output circuits are connected.

4. The multiplexer according to claim 1, characterized in that, The fifth transistor M5 and the sixth transistor M6 are NMOS transistors, and the seventh transistor M7 and the eighth transistor M8 are PMOS transistors.

5. A multi-way comparison method, characterized in that, Applied to the multiplexer according to any one of claims 1 to 4, the method comprises: The sampling flip voltage threshold is extracted using a flip threshold extraction circuit; The sampling flip voltage threshold is adjusted to a preset flip voltage threshold using a threshold feedback adjustment circuit; The input voltage to the multiple comparison output circuit is compared with a preset flip voltage threshold.

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